89 return A == other.
A &&
B == other.
B &&
Flag == other.
Flag;
100 size_t retval = 0xBADC0FFEE0DDF00D;
101 hash_combine( retval, hash<const void*>()( k.
A ), hash<const void*>()( k.
B ), hash<int>()( k.
Flag ) );
115 bool aUseClearanceEpsilon =
true )
override;
127 const PNS::ITEM* aCollidingItem )
override;
166 m_routerIface( aRouterIface ),
168 m_dummyTracks{ { aBoard }, { aBoard } },
169 m_dummyArcs{ { aBoard }, { aBoard } },
170 m_dummyVias{ { aBoard }, { aBoard } }
175 for(
PCB_ARC& arc : m_dummyArcs )
182 m_clearanceEpsilon = aBoard->GetDesignSettings().GetDRCEpsilon();
184 m_clearanceEpsilon = 0;
205 if( !aItem || !aCollidingItem )
215 if( collidingFp && itemFp && ( collidingFp == itemFp ) && itemFp->
IsNetTie() )
223 return drcEngine->IsNetTieExclusion(
NetCode( aItem->
Net() ),
225 aCollisionPos, collidingItem );
266 *aEnforce = checkKeepout( zone,
268 aObstacle->
Layer() ) ) );
338 return pad->GetAttribute() == PAD_ATTRIB::NPTH
339 &&
pad->GetDrillSizeX() !=
pad->GetDrillSizeY();
351 switch( aItem->
Kind() )
406 default:
return false;
415 if( aItemA && !parentA )
418 if( aItemB && !parentB )
422 hostConstraint = drcEngine->EvalRules( hostType, parentA, parentB, board_layer );
424 if( hostConstraint.
IsNull() )
431 aConstraint->
m_Type = aType;
451 aConstraint->
m_Type = aType;
464 std::set<const PNS::ITEM*> remainingItems( aItems.begin(), aItems.end() );
472 bool dirty = remainingItems.find( it->first.A ) != remainingItems.end();
473 dirty |= remainingItems.find( it->first.B) != remainingItems.end();
483 printf(
"ClearCache : n_pruned %d\n", n_pruned );
502 bool aUseClearanceEpsilon )
534 for(
int layer = layers.
Start(); layer <= layers.
End(); ++layer )
580 if( aUseClearanceEpsilon && rv > 0 )
610 assert( aItem->
Owner() !=
nullptr );
612 auto tryGetTrackWidth =
615 switch( aPnsItem->Kind() )
623 int itemTrackWidth = tryGetTrackWidth( aItem );
625 if( itemTrackWidth > 0 )
627 *aInheritedWidth = itemTrackWidth;
631 switch( aItem->
Kind() )
635 default:
return false;
640 assert( jt !=
nullptr );
649 int w = tryGetTrackWidth( item );
652 mval = std::min( w, mval );
655 if( mval == INT_MAX )
658 *aInheritedWidth = mval;
677 VECTOR2I startPosInt( aStartPosition.
x, aStartPosition.
y );
682 double anchor0Distance = startPosInt.
Distance( aStartItem->
Anchor( 0 ) );
683 double anchor1Distance = startPosInt.
Distance( aStartItem->
Anchor( 1 ) );
685 if( anchor1Distance < anchor0Distance )
692 dummyTrack.
SetEnds( aStartItem->
Anchor( startAnchor ), aStartItem->
Anchor( startAnchor ) );
722 dummyTrack.
SetEnds( aStartItem->
Anchor( startAnchor ), aStartItem->
Anchor( startAnchor ) );
729 trackWidth = std::max( trackWidth, constraint.
m_Value.
Opt() );
767 viaDiameter = std::max( viaDiameter, constraint.
m_Value.
Opt() );
773 viaDrill = std::max( viaDrill, constraint.
m_Value.
Opt() );
817 diffPairWidth = std::max( diffPairWidth, constraint.
m_Value.
Opt() );
819 if( diffPairWidth == constraint.
m_Value.
Opt() )
826 diffPairGap = std::max( diffPairGap, constraint.
m_Value.
Opt() );
827 diffPairViaGap = std::max( diffPairViaGap, constraint.
m_Value.
Opt() );
905 refName = net->GetNetname();
916 if( !aItem || !aItem->
Net() )
919 wxString netNameP =
static_cast<NETINFO_ITEM*
>( aItem->
Net() )->GetNetname();
920 wxString netNameN, netNameCoupled;
930 netNameN = netNameCoupled;
935 netNameP = netNameCoupled;
941 if( !netInfoP || !netInfoN )
987 const wxString& aName = wxT(
"" ),
995 sh.
Append( aP.
x - aSize, aP.
y - aSize );
996 sh.
Append( aP.
x + aSize, aP.
y + aSize );
998 sh.
Append( aP.
x - aSize, aP.
y + aSize );
999 sh.
Append( aP.
x + aSize, aP.
y - aSize );
1005 const wxString& aName = wxT(
"" ),
1022 const wxString& aName = wxT(
"" ),
1037 AddShape( &l, aColor, aOverrideWidth, aName, aSrcLoc );
1041 const wxString& aName = wxT(
"" ),
1072 printf(
"PNS: %s\n", msg.c_str().AsChar() );
1140 std::vector<std::unique_ptr<PNS::SOLID>> solids;
1150 case PAD_ATTRIB::PTH:
1151 case PAD_ATTRIB::NPTH:
1154 case PAD_ATTRIB::CONN:
1155 case PAD_ATTRIB::SMD:
1157 bool is_copper =
false;
1159 if( !lmsk.empty() && aPad->
GetAttribute() != PAD_ATTRIB::NPTH )
1172 wxLogTrace( wxT(
"PNS" ), wxT(
"unsupported pad type 0x%x" ), aPad->
GetAttribute() );
1176 auto makeSolidFromPadLayer =
1179 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1182 solid->SetRoutable(
false );
1190 if( aLayer ==
F_Cu || aLayer ==
B_Cu )
1197 solid->SetLayers( layers );
1200 solid->SetNet( aPad->
GetNet() );
1201 solid->SetParent( aPad );
1207 solid->SetIsFreePad();
1216 solid->SetPos(
VECTOR2I( c.
x - offset.
x, c.
y - offset.
y ) );
1217 solid->SetOffset(
VECTOR2I( offset.
x, offset.
y ) );
1227 const std::shared_ptr<SHAPE>& shape =
1230 if( shape->HasIndexableSubshapes() && shape->GetIndexableSubshapeCount() == 1 )
1232 std::vector<const SHAPE*> subshapes;
1233 shape->GetIndexableSubshapes( subshapes );
1235 solid->SetShape( subshapes[0]->Clone() );
1241 const std::shared_ptr<SHAPE_POLY_SET>& poly =
1244 if( poly->OutlineCount() )
1245 solid->SetShape(
new SHAPE_SIMPLE( poly->Outline( 0 ) ) );
1248 solids.emplace_back( std::move( solid ) );
1259 auto segment = std::make_unique<PNS::SEGMENT>(
SEG( aTrack->
GetStart(), aTrack->
GetEnd() ),
1262 segment->SetWidth( aTrack->
GetWidth() );
1264 segment->SetParent( aTrack );
1271 if( !generator->HasFlag(
IN_EDIT ) )
1286 arc->SetParent( aArc );
1293 if( !generator->HasFlag(
IN_EDIT ) )
1343 if( aVia->
GetViaType() == VIATYPE::BLIND_BURIED )
1360 via->SetParent( aVia );
1367 if( !generator->HasFlag(
IN_EDIT ) )
1382 static wxString msg;
1399 dlg.ShowDetailedText(
_(
"This zone cannot be handled by the router.\n"
1400 "Please verify it is not a self-intersecting polygon." ) );
1409 if( !layers[ layer ] )
1426 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1429 solid->SetNet(
nullptr );
1430 solid->SetParent( aZone );
1431 solid->SetShape( triShape );
1432 solid->SetIsCompoundShapePrimitive();
1433 solid->SetRoutable(
false );
1435 aWorld->
Add( std::move( solid ) );
1452 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1456 solid->SetNet(
nullptr );
1457 solid->SetParent( aItem );
1458 solid->SetShape( shape );
1459 solid->SetRoutable(
false );
1473 aWorld->
Add( std::move( solid ) );
1487 for(
SHAPE* shape : shapes )
1489 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1494 solid->SetRoutable(
false );
1504 switch( shape->Type() )
1514 solid->SetNet( aItem->
GetNet() );
1515 solid->SetParent( aItem );
1516 solid->SetShape( shape );
1518 if( shapes.size() > 1 )
1519 solid->SetIsCompoundShapePrimitive();
1521 aWorld->
Add( std::move( solid ) );
1534 wxLogTrace( wxT(
"PNS" ), wxT(
"m_board = %p" ),
m_board );
1547 return ::IsCopperLayer( aKicadLayer );
1556 for(
int i = aLayer.
Start(); i <= aLayer.
End(); i++ )
1615 for(
int layer =
test.Start(); layer <=
test.End(); ++layer )
1628 for(
int layer =
test.Start(); layer <=
test.End(); ++layer )
1646 for(
int layer =
test.Start(); layer <=
test.End(); ++layer )
1648 if(
via->ConnectsLayer( layer ) )
1667 bool isOnVisibleLayer =
true;
1694 wxLogTrace( wxT(
"PNS" ), wxT(
"No board attached, aborting sync." ) );
1722 boardOutline = &buffer;
1726 syncZone( aWorld, zone, boardOutline );
1731 for(
PAD*
pad : footprint->Pads() )
1733 std::vector<std::unique_ptr<PNS::SOLID>> solids =
syncPad(
pad );
1735 for( std::unique_ptr<PNS::SOLID>& solid : solids )
1736 aWorld->
Add( std::move( solid ) );
1738 std::optional<int> clearanceOverride =
pad->GetClearanceOverrides(
nullptr );
1740 if( clearanceOverride.has_value() )
1741 worstClearance = std::max( worstClearance, clearanceOverride.value() );
1743 if(
pad->GetProperty() == PAD_PROP::CASTELLATED )
1745 std::unique_ptr<SHAPE> hole;
1746 hole.reset(
pad->GetEffectiveHoleShape()->Clone() );
1751 syncTextItem( aWorld, &footprint->Reference(), footprint->Reference().GetLayer() );
1752 syncTextItem( aWorld, &footprint->Value(), footprint->Value().GetLayer() );
1754 for(
ZONE* zone : footprint->Zones() )
1755 syncZone( aWorld, zone, boardOutline );
1757 for(
PCB_FIELD* field : footprint->GetFields() )
1760 for(
BOARD_ITEM* item : footprint->GraphicalItems() )
1783 if( std::unique_ptr<PNS::SEGMENT> segment =
syncTrack( t ) )
1784 aWorld->
Add( std::move( segment ),
true );
1788 if( std::unique_ptr<PNS::ARC> arc =
syncArc(
static_cast<PCB_ARC*
>( t ) ) )
1789 aWorld->
Add( std::move( arc ),
true );
1794 aWorld->
Add( std::move(
via ) );
1839 if( zone->GetIsRuleArea() )
1849 if( aClearance >= 0 )
1855 switch( settings->m_Display.m_TrackClearance )
1888 if( aImportance >= 1 )
1890 else if( aImportance == 0 )
1916 netCode = net->GetNetCode();
1919 const NET_SETTINGS* netSettings = connectivity->GetNetSettings();
1921 if( connectivity->HasNetNameForNetCode( netCode ) )
1923 const wxString& netName = connectivity->GetNetNameForNetCode( netCode );
1929 if( colorByNet && netColors.count( netCode ) )
1930 color = netColors.at( netCode );
1934 color = defaultColor;
1936 if(
color == COLOR4D::UNSPECIFIED )
1937 color = defaultColor;
1939 pitem->
SetColor(
color.Brightened( 0.5 ).WithAlpha( std::min( 1.0,
color.a + 0.4 ) ) );
1960 if( td->IsTeardropArea()
1962 && td->Outline()->Collide( aItem->
Shape( td->GetLayer() ) ) )
2006 switch( aItem->
Kind() )
2027 const SEG& s = seg->
Seg();
2097 switch( aItem->
Kind() )
2114 newBoardItem = new_arc;
2122 const SEG& s = seg->
Seg();
2136 newBoardItem = track;
2147 via_board->
SetNet( net );
2161 newBoardItem = via_board;
2186 return newBoardItem;
2206 std::set<FOOTPRINT*> processedFootprints;
2212 VECTOR2I offset = fpOffset.p_new - fpOffset.p_old;
2217 if( processedFootprints.find( footprint ) != processedFootprints.end() )
2220 processedFootprints.insert( footprint );
2240 wxLogTrace( wxT(
"PNS" ), wxT(
"SetView %p" ), aView );
2279 return static_cast<NETINFO_ITEM*
>( aNet )->GetNetname();
2281 return wxEmptyString;
2287 wxLogTrace( wxT(
"PNS" ), wxT(
"Update-net %s" ),
GetNetName( aNet ) );
2313 return PCB_LAYER_ID::UNDEFINED_LAYER;
2321 return static_cast<PCB_LAYER_ID>( ( aLayer + 1 ) * 2 );
2330 if( aLayer ==
F_Cu )
2333 if( aLayer ==
B_Cu )
2336 return ( aLayer / 2 ) - 1;
2358 const PAD* startPad =
nullptr;
2359 const PAD* endPad =
nullptr;
2362 startPad =
static_cast<PAD*
>( aStartPad->
Parent() );
2365 endPad =
static_cast<PAD*
>( aEndPad->
Parent() );
2368 .
OptimiseViaLayers =
false, .MergeTracks =
false, .OptimiseTracesInPads =
false, .InferViaInPad =
true
2380 const PAD* startPad =
nullptr;
2381 const PAD* endPad =
nullptr;
2384 startPad =
static_cast<PAD*
>( aStartPad->
Parent() );
2387 endPad =
static_cast<PAD*
>( aEndPad->
Parent() );
2390 .
OptimiseViaLayers =
false, .MergeTracks =
false, .OptimiseTracesInPads =
false, .InferViaInPad =
true
2398 const bool aIsDiffPairCoupled,
const int aDiffPairCouplingGap,
2399 const int aPNSLayer,
const NETCLASS* aNetClass )
2414 bool aIsDiffPairCoupled,
int aDiffPairCouplingGap,
2415 int aPNSLayer,
const NETCLASS* aNetClass )
2429std::vector<LENGTH_DELAY_CALCULATION_ITEM>
2432 std::vector<LENGTH_DELAY_CALCULATION_ITEM> lengthItems;
2434 for(
int idx = 0; idx < aLine.
Size(); idx++ )
2438 if(
const PNS::LINE* l = dyn_cast<const PNS::LINE*>( lineItem ) )
2447 lengthItems.emplace_back( std::move( item ) );
2451 const int layerPrev = aLine[idx - 1]->Layer();
2452 const int layerNext = aLine[idx + 1]->Layer();
2456 if( layerPrev != layerNext )
2460 item.
SetLayers( pcbLayerPrev, pcbLayerNext );
2462 lengthItems.emplace_back( std::move( item ) );
constexpr EDA_IU_SCALE pcbIUScale
static const ADVANCED_CFG & GetCfg()
Get the singleton instance's config, which is shared by all consumers.
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
NETINFO_ITEM * GetNet() const
Return #NET_INFO object for a given item.
void SetNet(NETINFO_ITEM *aNetInfo)
Set a NET_INFO object for the item.
Container for design settings for a BOARD object.
std::shared_ptr< NET_SETTINGS > m_NetSettings
int GetCurrentViaSize() const
std::shared_ptr< DRC_ENGINE > m_DRCEngine
bool m_UseConnectedTrackWidth
bool m_TempOverrideTrackWidth
int GetCurrentDiffPairWidth() const
int GetCurrentDiffPairViaGap() const
int GetCurrentDiffPairGap() const
bool UseNetClassVia() const
Return true if netclass values should be used to obtain appropriate via size.
int GetCurrentTrackWidth() const
BOARD_STACKUP & GetStackupDescriptor()
bool UseNetClassTrack() const
Return true if netclass values should be used to obtain appropriate track width.
bool UseNetClassDiffPair() const
Return true if netclass values should be used to obtain appropriate diff pair dimensions.
bool m_UseHeightForLengthCalcs
Enable inclusion of stackup height in track length measurements and length tuning.
int GetCurrentViaDrill() const
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
bool IsLocked() const override
virtual void TransformShapeToPolygon(SHAPE_POLY_SET &aBuffer, PCB_LAYER_ID aLayer, int aClearance, int aError, ERROR_LOC aErrorLoc, bool ignoreLineWidth=false) const
Convert the item shape to a closed polygon.
virtual bool IsOnLayer(PCB_LAYER_ID aLayer) const
Test to see if this object is on the given layer.
virtual void SetLayer(PCB_LAYER_ID aLayer)
Set the layer this item is on.
FOOTPRINT * GetParentFootprint() const
virtual LSET GetLayerSet() const
Return a std::bitset of all layers on which the item physically resides.
virtual bool HasDrilledHole() const
virtual int BoardCopperLayerCount() const
Return the total number of copper layers for the board that this item resides on.
virtual bool IsOnCopperLayer() const
Manage layers needed to make a physical board.
int GetLayerDistance(PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer) const
Calculate the distance (height) between the two given copper layers.
Information pertinent to a Pcbnew printed circuit board.
bool GetBoardPolygonOutlines(SHAPE_POLY_SET &aOutlines, OUTLINE_ERROR_HANDLER *aErrorHandler=nullptr, bool aAllowUseArcsInPolygons=false, bool aIncludeNPTHAsOutlines=false)
Extract the board outlines and build a closed polygon from lines, arcs and circle items on edge cut l...
NETINFO_ITEM * DpCoupledNet(const NETINFO_ITEM *aNet)
LENGTH_DELAY_CALCULATION * GetLengthCalculation() const
Returns the track length calculator.
NETINFO_ITEM * FindNet(int aNetcode) const
Search for a net with the given netcode.
const ZONES & Zones() const
int GetMaxClearanceValue() const
Returns the maximum clearance value for any object on the board.
int GetCopperLayerCount() const
int MatchDpSuffix(const wxString &aNetName, wxString &aComplementNet)
Fetch the coupled netname for a given net.
const FOOTPRINTS & Footprints() const
const TRACKS & Tracks() const
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
std::shared_ptr< CONNECTIVITY_DATA > GetConnectivity() const
Return a list of missing connections between components/tracks.
const DRAWINGS & Drawings() const
constexpr const Vec & GetOrigin() const
constexpr const SizeVec & GetSize() const
SEVERITY GetSeverity() const
const MINOPTMAX< int > & GetValue() const
bool GetOption(OPTIONS option) const
virtual const BOX2I GetBoundingBox() const
Return the orthogonal bounding box of this object for display purposes.
void SetFlags(EDA_ITEM_FLAGS aMask)
virtual EDA_GROUP * GetParentGroup() const
KICAD_T Type() const
Returns the type of object.
void ClearFlags(EDA_ITEM_FLAGS aMask=EDA_ITEM_ALL_FLAGS)
virtual bool IsType(const std::vector< KICAD_T > &aScanTypes) const
Check whether the item is one of the listed types.
virtual std::vector< SHAPE * > MakeEffectiveShapes(bool aEdgeOnly=false) const
Make a set of SHAPE objects representing the EDA_SHAPE.
virtual bool IsVisible() const
Helper class to create more flexible dialogs, including 'do not show again' checkbox handling.
void DoNotShowCheckbox(wxString file, int line)
Shows the 'do not show again' checkbox.
A color representation with 4 components: red, green, blue, alpha.
COLOR4D WithAlpha(double aAlpha) const
Return a color with the same color, but the given alpha.
double GetMinDepth() const
virtual RENDER_SETTINGS * GetSettings()=0
Return a pointer to current settings that are going to be used when drawing items.
PCB specific render settings.
NET_COLOR_MODE GetNetColorMode() const
COLOR4D GetColor(const VIEW_ITEM *aItem, int aLayer) const override
Returns the color that should be used to draw the specific VIEW_ITEM on the specific layer using curr...
std::map< int, KIGFX::COLOR4D > & GetNetColorMap()
Container for all the knowledge about how graphical objects are drawn on any output surface/device.
const std::set< int > & GetHighlightNetCodes() const
Return the netcode of currently highlighted net.
PCB_LAYER_ID GetPrimaryHighContrastLayer() const
Return the board layer which is in high-contrast mode.
bool GetHighContrast() const
Extend VIEW_ITEM by possibility of grouping items into a single object.
void FreeItems()
Free all the items that were added to the group.
virtual void SetLayer(int aLayer)
Set layer used to draw the group.
virtual void Add(VIEW_ITEM *aItem)
Add an item to the group.
virtual double ViewGetLOD(int aLayer, const VIEW *aView) const
Return the level of detail (LOD) of the item.
Hold a (potentially large) number of VIEW_ITEMs and renders them on a graphics device provided by the...
virtual void Add(VIEW_ITEM *aItem, int aDrawPriority=-1)
Add a VIEW_ITEM to the view.
virtual void Update(const VIEW_ITEM *aItem, int aUpdateFlags) const
For dynamic VIEWs, inform the associated VIEW that the graphical representation of this item has chan...
GAL * GetGAL() const
Return the #GAL this view is using to draw graphical primitives.
bool IsLayerVisible(int aLayer) const
Return information about visibility of a particular layer.
PAINTER * GetPainter() const
Return the painter object used by the view for drawing #VIEW_ITEMS.
bool IsVisible(const VIEW_ITEM *aItem) const
Return information if the item is visible (or not).
void SetVisible(VIEW_ITEM *aItem, bool aIsVisible=true)
Set the item visibility.
Lightweight class which holds a pad, via, or a routed trace outline.
void SetLine(const SHAPE_LINE_CHAIN &aLine)
Sets the source SHAPE_LINE_CHAIN of this item.
void SetVia(const PCB_VIA *aVia)
Sets the VIA associated with this item.
void SetEffectiveNetClass(const NETCLASS *aNetClass)
Sets the effective net class for the item.
void SetLayers(const PCB_LAYER_ID aStart, const PCB_LAYER_ID aEnd=PCB_LAYER_ID::UNDEFINED_LAYER)
Sets the first and last layers associated with this item.
int64_t CalculateLengthForDelay(int64_t aDesiredDelay, const TIME_DOMAIN_GEOMETRY_CONTEXT &aCtx) const
Calculates the length of track required for the given delay in a specific geometry context.
int64_t CalculatePropagationDelayForShapeLineChain(const SHAPE_LINE_CHAIN &aShape, const TIME_DOMAIN_GEOMETRY_CONTEXT &aCtx) const
Gets the propagation delay for the given shape line chain.
int64_t CalculateDelay(std::vector< LENGTH_DELAY_CALCULATION_ITEM > &aItems, PATH_OPTIMISATIONS aOptimisations, const PAD *aStartPad=nullptr, const PAD *aEndPad=nullptr) const
Calculates the electrical propagation delay of the given items.
int64_t CalculateLength(std::vector< LENGTH_DELAY_CALCULATION_ITEM > &aItems, PATH_OPTIMISATIONS aOptimisations, const PAD *aStartPad=nullptr, const PAD *aEndPad=nullptr) const
Calculates the electrical length of the given items.
LSEQ is a sequence (and therefore also a set) of PCB_LAYER_IDs.
LSET is a set of PCB_LAYER_IDs.
LSEQ CuStack() const
Return a sequence of copper layers in starting from the front/top and extending to the back/bottom.
A collection of nets and the parameters used to route or test these nets.
COLOR4D GetPcbColor(bool aIsForSave=false) const
Handle the data for a net.
void SetParent(BOARD *aParent)
void SetNetClass(const std::shared_ptr< NETCLASS > &aNetClass)
static NETINFO_ITEM * OrphanedItem()
NETINFO_ITEM meaning that there was no net assigned for an item, as there was no board storing net li...
NET_SETTINGS stores various net-related settings in a project context.
bool HasEffectiveNetClass(const wxString &aNetName) const
Determines if an effective netclass for the given net name has been cached.
std::shared_ptr< NETCLASS > GetCachedEffectiveNetClass(const wxString &aNetName) const
Returns an already cached effective netclass for the given net name.
void ForEachUniqueLayer(const std::function< void(PCB_LAYER_ID)> &aMethod) const
Runs the given callable for each active unique copper layer in this padstack, meaning F_Cu for MODE::...
void SetUnconnectedLayerMode(UNCONNECTED_LAYER_MODE aMode)
UNCONNECTED_LAYER_MODE UnconnectedLayerMode() const
@ NORMAL
Shape is the same on all layers.
@ CUSTOM
Shapes can be defined on arbitrary layers.
@ FRONT_INNER_BACK
Up to three shapes can be defined (F_Cu, inner copper layers, B_Cu)
static constexpr PCB_LAYER_ID ALL_LAYERS
! Temporary layer identifier to identify code that is not padstack-aware
static constexpr PCB_LAYER_ID INNER_LAYERS
! The layer identifier to use for "inner layers" on top/inner/bottom padstacks
LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer, FLASHING flashPTHPads=FLASHING::DEFAULT) const override
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
const VECTOR2I & GetDrillSize() const
PAD_ATTRIB GetAttribute() const
int GetPadToDieDelay() const
const PADSTACK & Padstack() const
const VECTOR2I & GetOffset(PCB_LAYER_ID aLayer) const
EDA_ANGLE GetOrientation() const
Return the rotation angle of the pad.
const std::shared_ptr< SHAPE_POLY_SET > & GetEffectivePolygon(PCB_LAYER_ID aLayer, ERROR_LOC aErrorLoc=ERROR_INSIDE) const
VECTOR2I ShapePos(PCB_LAYER_ID aLayer) const
std::shared_ptr< SHAPE_SEGMENT > GetEffectiveHoleShape() const override
Return a SHAPE_SEGMENT object representing the pad's hole.
int GetPadToDieLength() const
void SetMid(const VECTOR2I &aMid)
const VECTOR2I & GetMid() const
std::vector< VECTOR2I > GetConnectionPoints() const
bool IsOnLayer(PCB_LAYER_ID aLayer) const override
Test to see if this object is on the given layer.
PCB_LAYER_ID GetLayer() const override
Return the primary layer this item is on.
void SetHasSolderMask(bool aVal)
void SetEnd(const VECTOR2I &aEnd)
bool HasSolderMask() const
void SetStart(const VECTOR2I &aStart)
void SetLocalSolderMaskMargin(std::optional< int > aMargin)
std::optional< int > GetLocalSolderMaskMargin() const
const VECTOR2I & GetStart() const
const VECTOR2I & GetEnd() const
virtual void SetWidth(int aWidth)
virtual int GetWidth() const
bool GetIsFree() const
Check if the via is a free via (as opposed to one created on a track by the router).
PCB_LAYER_ID BottomLayer() const
VECTOR2I GetPosition() const override
const PADSTACK & Padstack() const
void SetFrontTentingMode(TENTING_MODE aMode)
TENTING_MODE GetFrontTentingMode() const
void SetDrill(int aDrill)
Set the drill value for vias.
void SetBackTentingMode(TENTING_MODE aMode)
void SetIsFree(bool aFree=true)
void SetPosition(const VECTOR2I &aPoint) override
void SetLayerPair(PCB_LAYER_ID aTopLayer, PCB_LAYER_ID aBottomLayer)
For a via m_layer contains the top layer, the other layer is in m_bottomLayer/.
void SetLayer(PCB_LAYER_ID aLayer) override
Set the layer this item is on.
int GetWidth() const override
void SetViaType(VIATYPE aViaType)
TENTING_MODE GetBackTentingMode() const
PCB_LAYER_ID TopLayer() const
int GetDrillValue() const
Calculate the drill value for vias (m_drill if > 0, or default drill value for the board).
VIATYPE GetViaType() const
void SetWidth(int aWidth) override
void LayerPair(PCB_LAYER_ID *top_layer, PCB_LAYER_ID *bottom_layer) const
Return the 2 layers used by the via (the via actually uses all layers between these 2 layers)
int Width() const override
const SHAPE * Shape(int aLayer) const override
Return the geometrical shape of the item.
void SetDebugEnabled(bool aEnabled)
static HOLE * MakeCircularHole(const VECTOR2I &pos, int radius, PNS_LAYER_RANGE aLayers)
ITEM_SET & ExcludeItem(const ITEM *aItem)
ITEM_SET & FilterKinds(int aKindMask, bool aInvert=false)
std::vector< ITEM * > & Items()
Base class for PNS router board items.
BOARD_ITEM * Parent() const
virtual ITEM * ParentPadVia() const
virtual const SHAPE * Shape(int aLayer) const
Return the geometrical shape of the item.
const PNS_LAYER_RANGE & Layers() const
virtual NET_HANDLE Net() const
PnsKind Kind() const
Return the type (kind) of the item.
void SetNet(NET_HANDLE aNet)
BOARD_ITEM * GetSourceItem() const
virtual int Layer() const
void SetLayer(int aLayer)
void SetParent(BOARD_ITEM *aParent)
bool OfKind(int aKindMask) const
virtual VECTOR2I Anchor(int n) const
virtual BOARD_ITEM * BoardItem() const
A 2D point on a given set of layers and belonging to a certain net, that links together a number of b...
const ITEM_SET & CLinks() const
Represents a track on a PCB, connecting two non-trivial joints (that is, vias, pads,...
Keep the router "world" - i.e.
void SetMaxClearance(int aClearance)
Assign a clearance resolution function object.
bool Add(std::unique_ptr< SEGMENT > aSegment, bool aAllowRedundant=false)
Add an item to the current node.
void SetRuleResolver(RULE_RESOLVER *aFunc)
void AddEdgeExclusion(std::unique_ptr< SHAPE > aShape)
const ITEM_OWNER * Owner() const
Return the owner of this item, or NULL if there's none.
virtual wxString GetNetName(PNS::NET_HANDLE aNet) const =0
virtual int GetNetCode(NET_HANDLE aNet) const =0
virtual PCB_LAYER_ID GetBoardLayerFromPNSLayer(int aLayer) const =0
void SetEnds(const VECTOR2I &a, const VECTOR2I &b)
int Width() const override
void SetTrackWidth(int aWidth)
void SetBoardMinTrackWidth(int aWidth)
void SetDiffPairViaGapSameAsTraceGap(bool aEnable)
void SetDiffPairWidth(int aWidth)
void SetDiffPairWidthSource(const wxString &aSource)
void SetDiffPairGapSource(const wxString &aSource)
void SetDiffPairGap(int aGap)
void SetHoleToHole(int aHoleToHole)
void SetViaDrill(int aDrill)
void SetDiffPairViaGap(int aGap)
void SetDiffPairHoleToHole(int aHoleToHole)
void SetMinClearance(int aClearance)
void SetClearance(int aClearance)
void SetViaDiameter(int aDiameter)
void SetClearanceSource(const wxString &aSource)
void SetWidthSource(const wxString &aSource)
void SetTrackWidthIsExplicit(bool aIsExplicit)
bool ConnectsLayer(int aLayer) const
bool syncGraphicalItem(PNS::NODE *aWorld, PCB_SHAPE *aItem)
bool inheritTrackWidth(PNS::ITEM *aItem, int *aInheritedWidth)
void AddItem(PNS::ITEM *aItem) override
virtual EDA_UNITS GetUnits() const
PNS::DEBUG_DECORATOR * m_debugDecorator
void SetDebugDecorator(PNS::DEBUG_DECORATOR *aDec)
bool syncZone(PNS::NODE *aWorld, ZONE *aZone, SHAPE_POLY_SET *aBoardOutline)
void SetBoard(BOARD *aBoard)
long long int CalculateRoutedPathLength(const PNS::ITEM_SET &aLine, const PNS::SOLID *aStartPad, const PNS::SOLID *aEndPad, const NETCLASS *aNetClass) override
int64_t CalculateRoutedPathDelay(const PNS::ITEM_SET &aLine, const PNS::SOLID *aStartPad, const PNS::SOLID *aEndPad, const NETCLASS *aNetClass) override
~PNS_KICAD_IFACE_BASE() override
std::unique_ptr< PNS::ARC > syncArc(PCB_ARC *aArc)
void RemoveItem(PNS::ITEM *aItem) override
bool IsPNSCopperLayer(int aPNSLayer) const override
int64_t CalculateLengthForDelay(int64_t aDesiredDelay, int aWidth, bool aIsDiffPairCoupled, int aDiffPairCouplingGap, int aPNSLayer, const NETCLASS *aNetClass) override
PNS::RULE_RESOLVER * GetRuleResolver() override
bool syncTextItem(PNS::NODE *aWorld, BOARD_ITEM *aItem, PCB_LAYER_ID aLayer)
std::vector< LENGTH_DELAY_CALCULATION_ITEM > getLengthDelayCalculationItems(const PNS::ITEM_SET &aLine, const NETCLASS *aNetClass) const
bool IsKicadCopperLayer(PCB_LAYER_ID aPcbnewLayer) const
std::vector< std::unique_ptr< PNS::SOLID > > syncPad(PAD *aPad)
void SetStartLayerFromPCBNew(PCB_LAYER_ID aLayer)
bool IsFlashedOnLayer(const PNS::ITEM *aItem, int aLayer) const override
PCB_LAYER_ID GetBoardLayerFromPNSLayer(int aLayer) const override
void SyncWorld(PNS::NODE *aWorld) override
int StackupHeight(int aFirstLayer, int aSecondLayer) const override
int64_t CalculateDelayForShapeLineChain(const SHAPE_LINE_CHAIN &aShape, int aWidth, bool aIsDiffPairCoupled, int aDiffPairCouplingGap, int aPNSLayer, const NETCLASS *aNetClass) override
PNS::DEBUG_DECORATOR * GetDebugDecorator() override
std::unique_ptr< PNS::SEGMENT > syncTrack(PCB_TRACK *aTrack)
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver
PNS::NET_HANDLE GetOrphanedNetHandle() override
std::unique_ptr< PNS::VIA > syncVia(PCB_VIA *aVia)
int GetPNSLayerFromBoardLayer(PCB_LAYER_ID aLayer) const override
PNS_LAYER_RANGE SetLayersFromPCBNew(PCB_LAYER_ID aStartLayer, PCB_LAYER_ID aEndLayer)
void UpdateItem(PNS::ITEM *aItem) override
bool ImportSizes(PNS::SIZES_SETTINGS &aSizes, PNS::ITEM *aStartItem, PNS::NET_HANDLE aNet, VECTOR2D aStartPosition) override
void SetView(KIGFX::VIEW *aView)
void RemoveItem(PNS::ITEM *aItem) override
void AddItem(PNS::ITEM *aItem) override
void UpdateItem(PNS::ITEM *aItem) override
std::map< PAD *, OFFSET > m_fpOffsets
int GetNetCode(PNS::NET_HANDLE aNet) const override
virtual void SetHostTool(PCB_TOOL_BASE *aTool)
void DisplayItem(const PNS::ITEM *aItem, int aClearance, bool aEdit=false, int aFlags=0) override
std::unique_ptr< BOARD_COMMIT > m_commit
void EraseView() override
void HideItem(PNS::ITEM *aItem) override
void UpdateNet(PNS::NET_HANDLE aNet) override
BOARD_CONNECTED_ITEM * createBoardItem(PNS::ITEM *aItem)
void DisplayPathLine(const SHAPE_LINE_CHAIN &aLine, int aImportance) override
bool IsItemVisible(const PNS::ITEM *aItem) const override
std::unordered_set< BOARD_ITEM * > m_hiddenItems
EDA_UNITS GetUnits() const override
bool IsAnyLayerVisible(const PNS_LAYER_RANGE &aLayer) const override
void modifyBoardItem(PNS::ITEM *aItem)
KIGFX::VIEW_GROUP * m_previewItems
void DisplayRatline(const SHAPE_LINE_CHAIN &aRatline, PNS::NET_HANDLE aNet) override
wxString GetNetName(PNS::NET_HANDLE aNet) const override
~PNS_KICAD_IFACE() override
Represent a contiguous set of PCB layers.
bool Overlaps(const PNS_LAYER_RANGE &aOther) const
PNS_LAYER_RANGE Intersection(const PNS_LAYER_RANGE &aOther) const
Shortcut for comparisons/overlap tests.
~PNS_PCBNEW_DEBUG_DECORATOR()
PNS_PCBNEW_DEBUG_DECORATOR(PNS::ROUTER_IFACE *aIface)
void AddPoint(const VECTOR2I &aP, const KIGFX::COLOR4D &aColor, int aSize, const wxString &aName=wxT(""), const SRC_LOCATION_INFO &aSrcLoc=SRC_LOCATION_INFO()) override
KIGFX::VIEW_GROUP * m_items
void AddShape(const BOX2I &aBox, const KIGFX::COLOR4D &aColor, int aOverrideWidth=0, const wxString &aName=wxT(""), const SRC_LOCATION_INFO &aSrcLoc=SRC_LOCATION_INFO()) override
PNS::ROUTER_IFACE * m_iface
void AddItem(const PNS::ITEM *aItem, const KIGFX::COLOR4D &aColor, int aOverrideWidth=0, const wxString &aName=wxT(""), const SRC_LOCATION_INFO &aSrcLoc=SRC_LOCATION_INFO()) override
virtual void Message(const wxString &msg, const SRC_LOCATION_INFO &aSrcLoc=SRC_LOCATION_INFO()) override
void SetView(KIGFX::VIEW *aView)
void AddShape(const SHAPE *aShape, const KIGFX::COLOR4D &aColor, int aOverrideWidth=0, const wxString &aName=wxT(""), const SRC_LOCATION_INFO &aSrcLoc=SRC_LOCATION_INFO()) override
int NetCode(PNS::NET_HANDLE aNet) override
virtual ~PNS_PCBNEW_RULE_RESOLVER()
PNS_PCBNEW_RULE_RESOLVER(BOARD *aBoard, PNS::ROUTER_IFACE *aRouterIface)
bool IsDrilledHole(const PNS::ITEM *aItem) override
void ClearCaches() override
void ClearTemporaryCaches() override
bool QueryConstraint(PNS::CONSTRAINT_TYPE aType, const PNS::ITEM *aItemA, const PNS::ITEM *aItemB, int aLayer, PNS::CONSTRAINT *aConstraint) override
int ClearanceEpsilon() const override
BOARD_ITEM * getBoardItem(const PNS::ITEM *aItem, PCB_LAYER_ID aBoardLayer, int aIdx=0)
bool IsKeepout(const PNS::ITEM *aObstacle, const PNS::ITEM *aItem, bool *aEnforce) override
int Clearance(const PNS::ITEM *aA, const PNS::ITEM *aB, bool aUseClearanceEpsilon=true) override
void ClearCacheForItems(std::vector< const PNS::ITEM * > &aItems) override
bool IsNonPlatedSlot(const PNS::ITEM *aItem) override
std::unordered_map< CLEARANCE_CACHE_KEY, int > m_clearanceCache
int DpNetPolarity(PNS::NET_HANDLE aNet) override
std::unordered_map< CLEARANCE_CACHE_KEY, int > m_tempClearanceCache
bool IsNetTieExclusion(const PNS::ITEM *aItem, const VECTOR2I &aCollisionPos, const PNS::ITEM *aCollidingItem) override
PCB_TRACK m_dummyTracks[2]
bool IsInNetTie(const PNS::ITEM *aA) override
PNS::NET_HANDLE DpCoupledNet(PNS::NET_HANDLE aNet) override
bool DpNetPair(const PNS::ITEM *aItem, PNS::NET_HANDLE &aNetP, PNS::NET_HANDLE &aNetN) override
PNS::ROUTER_IFACE * m_routerIface
wxString NetName(PNS::NET_HANDLE aNet) override
void SetWidth(int aWidth)
void SetClearance(int aClearance)
static constexpr double PathOverlayDepth
void SetColor(const KIGFX::COLOR4D &aColor)
double GetOriginDepth() const
void SetDepth(double aDepth)
void ShowClearance(bool aEnabled)
const VECTOR2I & GetArcMid() const
const VECTOR2I & GetP1() const
const VECTOR2I & GetP0() const
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
int Width() const
Get the current width of the segments in the chain.
void Append(int aX, int aY, bool aAllowDuplication=false)
Append a new point at the end of the line chain.
void SetWidth(int aWidth)
Set the width of all segments in the chain.
const std::vector< VECTOR2I > & CPoints() const
size_t GetTriangleCount() const
void GetTriangle(int index, VECTOR2I &a, VECTOR2I &b, VECTOR2I &c) const
Represent a set of closed polygons.
bool IsTriangulationUpToDate() const
virtual void CacheTriangulation(bool aPartition=true, bool aSimplify=false)
Build a polygon triangulation, needed to draw a polygon on OpenGL and in some other calculations.
void Simplify()
Simplify the polyset (merges overlapping polys, eliminates degeneracy/self-intersections)
SHAPE_LINE_CHAIN & Outline(int aIndex)
Return the reference to aIndex-th outline in the set.
const TRIANGULATED_POLYGON * TriangulatedPolygon(int aIndex) const
unsigned int TriangulatedPolyCount() const
Return the number of triangulated polygons.
int OutlineCount() const
Return the number of outlines in the set.
Represent a simple polygon consisting of a zero-thickness closed chain of connected line segments.
void Append(int aX, int aY)
Append a new point at the end of the polygon.
An abstract shape on 2D plane.
double Distance(const VECTOR2< extended_type > &aVector) const
Compute the distance between two vectors.
VECTOR2_TRAITS< int32_t >::extended_type extended_type
Handle a list of polygons defining a copper zone.
wxString GetItemDescription(UNITS_PROVIDER *aUnitsProvider, bool aFull) const override
Return a user-visible description string of this item.
bool GetIsRuleArea() const
Accessors to parameters used in Rule Area zones:
bool GetDoNotAllowVias() const
bool GetDoNotAllowPads() const
bool GetDoNotAllowTracks() const
SHAPE_POLY_SET * Outline()
bool GetDoNotAllowFootprints() const
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
bool HasKeepoutParametersSet() const
Accessor to determine if any keepout parameters are set.
@ VIA_DIAMETER_CONSTRAINT
@ DIFF_PAIR_GAP_CONSTRAINT
@ EDGE_CLEARANCE_CONSTRAINT
@ MAX_UNCOUPLED_CONSTRAINT
@ HOLE_CLEARANCE_CONSTRAINT
@ PHYSICAL_CLEARANCE_CONSTRAINT
@ HOLE_TO_HOLE_CONSTRAINT
#define ROUTER_TRANSIENT
transient items that should NOT be cached
#define IN_EDIT
Item currently edited.
static constexpr void hash_combine(std::size_t &seed)
This is a dummy function to take the final case of hash_combine below.
This file is part of the common library.
constexpr PCB_LAYER_ID PCBNEW_LAYER_ID_START
@ LAYER_SELECT_OVERLAY
Selected items overlay.
PCB_LAYER_ID
A quick note on layer IDs:
This file contains miscellaneous commonly used macros and functions.
@ APPEARANCE
Visibility flag has changed.
Push and Shove diff pair dimensions (gap) settings dialog.
@ SHOW_WITH_VIA_WHILE_ROUTING_OR_DRAGGING
@ SHOW_WITH_VIA_WHILE_ROUTING
static bool isEdge(const PNS::ITEM *aItem)
static bool isHole(const PNS::ITEM *aItem)
static bool isCopper(const PNS::ITEM *aItem)
VECTOR2I::extended_type ecoord
@ SH_LINE_CHAIN
line chain (polyline)
bool operator==(const CLEARANCE_CACHE_KEY &other) const
Struct to control which optimisations the length calculation code runs on the given path objects.
bool OptimiseViaLayers
Optimise via layers for height calculations, ensuring only the distance between routed segments is co...
An abstract function object, returning a design rule (clearance, diff pair gap, etc) required between...
A data structure to contain basic geometry data which can affect signal propagation calculations.
PCB_LAYER_ID Layer
The layer this track is on.
bool IsDiffPairCoupled
Whether this track or via is a member of a coupled differential pair.
int64_t DiffPairCouplingGap
The gap between coupled tracks.
int64_t Width
The width (in internal units) of the track.
const NETCLASS * NetClass
The net class this track belongs to.
std::size_t operator()(const CLEARANCE_CACHE_KEY &k) const
void RotatePoint(int *pX, int *pY, const EDA_ANGLE &aAngle)
Calculate the new point of coord coord pX, pY, for a rotation center 0, 0.
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
@ PCB_SHAPE_T
class PCB_SHAPE, a segment not on copper layers
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
@ PCB_TEXTBOX_T
class PCB_TEXTBOX, wrapped text on a layer
@ PCB_ZONE_T
class ZONE, a copper pour area
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
@ PCB_FIELD_T
class PCB_FIELD, text associated with a footprint property
@ PCB_TABLECELL_T
class PCB_TABLECELL, PCB_TEXTBOX for use in tables
@ PCB_PAD_T
class PAD, a pad in a footprint
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
@ PCB_TABLE_T
class PCB_TABLE, table of PCB_TABLECELLs
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
VECTOR2< int32_t > VECTOR2I