KiCad PCB EDA Suite
board_stackup.h
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2019 Jean-Pierre Charras, jp.charras at wanadoo.fr
5 * Copyright (C) 2009-2021 KiCad Developers, see AUTHORS.txt for contributors.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 3
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
25#ifndef BOARD_STACKUP_H
26#define BOARD_STACKUP_H
27
28
29#include <vector>
30#include <wx/string.h>
31#include <layer_ids.h>
32
33class BOARD;
35class OUTPUTFORMATTER;
36
37// A enum to manage the different layers inside the stackup layers.
38// Note the stackup layers include both dielectric and some layers handled by the board editor
39// Therefore a stackup layer item is not exactly like a board layer
41{
42 BS_ITEM_TYPE_UNDEFINED, // For not yet initialized BOARD_STACKUP_ITEM item
43 BS_ITEM_TYPE_COPPER, // A initialized BOARD_STACKUP_ITEM item for copper layers
44 BS_ITEM_TYPE_DIELECTRIC, // A initialized BOARD_STACKUP_ITEM item for the
45 // dielectric between copper layers
46 BS_ITEM_TYPE_SOLDERPASTE, // A initialized BOARD_STACKUP_ITEM item for solder paste layers
47 BS_ITEM_TYPE_SOLDERMASK, // A initialized BOARD_STACKUP_ITEM item for solder mask layers
48 // note: this is a specialized dielectric material
49 BS_ITEM_TYPE_SILKSCREEN, // A initialized BOARD_STACKUP_ITEM item for silkscreen layers
50};
51
52// A enum to manage edge connector fab info
54{
55 BS_EDGE_CONNECTOR_NONE, // No edge connector in board
56 BS_EDGE_CONNECTOR_IN_USE, // some edge connector in board
57 BS_EDGE_CONNECTOR_BEVELLED // Some connector in board, and the connector must be beveled
58};
59
60
65{
66public:
68 m_Thickness(0), m_ThicknessLocked( false ),
69 m_EpsilonR( 1.0 ), m_LossTangent( 0.0 )
70 {}
71
72private:
73 friend class BOARD_STACKUP_ITEM;
74
75 wxString m_Material;
79 double m_EpsilonR;
81};
82
83
90{
91public:
94
101 void AddDielectricPrms( int aDielectricPrmsIdx );
102
108 void RemoveDielectricPrms( int aDielectricPrmsIdx );
109
112 bool HasEpsilonRValue() const;
113
116 bool HasLossTangentValue() const;
117
119 bool HasMaterialValue( int aDielectricSubLayer = 0 ) const;
120
122 bool IsMaterialEditable() const;
123
125 bool IsColorEditable() const;
126
128 bool IsThicknessEditable() const;
129
131 static int GetCopperDefaultThickness();
132
134 static int GetMaskDefaultThickness();
135
138 int GetSublayersCount() const { return m_DielectricPrmsList.size(); }
139
141 wxString FormatEpsilonR( int aDielectricSubLayer = 0 ) const;
142
144 wxString FormatLossTangent( int aDielectricSubLayer = 0 ) const;
145
147 wxString FormatDielectricLayerName() const;
148
149 // Getters:
150 bool IsEnabled() const { return m_enabled; }
151
154 wxString GetColor() const { return m_Color; }
155 wxString GetLayerName() const { return m_LayerName; }
156 wxString GetTypeName() const { return m_TypeName; }
158
159 int GetThickness( int aDielectricSubLayer = 0 ) const;
160 bool IsThicknessLocked( int aDielectricSubLayer = 0 ) const;
161 double GetEpsilonR( int aDielectricSubLayer = 0 ) const;
162 double GetLossTangent( int aDielectricSubLayer = 0 ) const;
163 wxString GetMaterial( int aDielectricSubLayer = 0 ) const;
164
165 // Setters:
166 void SetEnabled( bool aEnable) { m_enabled = aEnable; }
167 void SetBrdLayerId( PCB_LAYER_ID aBrdLayerId ) { m_LayerId = aBrdLayerId; }
168 void SetColor( const wxString& aColorName ){ m_Color = aColorName; }
169 void SetLayerName( const wxString& aName ) { m_LayerName = aName; }
170 void SetTypeName( const wxString& aName ) { m_TypeName = aName; }
171 void SetDielectricLayerId( int aLayerId ) { m_DielectricLayerId = aLayerId; }
172
173 void SetThickness( int aThickness, int aDielectricSubLayer = 0 );
174 void SetThicknessLocked( bool aLocked, int aDielectricSubLayer = 0 );
175 void SetEpsilonR( double aEpsilon, int aDielectricSubLayer = 0 );
176 void SetLossTangent( double aTg, int aDielectricSubLayer = 0 );
177 void SetMaterial( const wxString& aName, int aDielectricSubLayer = 0 );
178
179private:
181 wxString m_LayerName;
182 wxString m_TypeName;
183 wxString m_Color;
194 std::vector<DIELECTRIC_PRMS> m_DielectricPrmsList;
195
198};
199
200
211{
212public:
214 BOARD_STACKUP( const BOARD_STACKUP& aOther );
215 BOARD_STACKUP& operator=( const BOARD_STACKUP& aOther );
216
218
219 const std::vector<BOARD_STACKUP_ITEM*>& GetList() const { return m_list; }
220
222 BOARD_STACKUP_ITEM* GetStackupLayer( int aIndex );
223
229 {
232 }
233
234
236 void RemoveAll();
237
239 int GetCount() const { return (int) m_list.size(); }
240
243
245 void Add( BOARD_STACKUP_ITEM* aItem ) { m_list.push_back( aItem ); }
246
255
264 void BuildDefaultStackupList( const BOARD_DESIGN_SETTINGS* aSettings,
265 int aActiveCopperLayersCount = 0 );
266
273 void FormatBoardStackup( OUTPUTFORMATTER* aFormatter,
274 const BOARD* aBoard, int aNestLevel ) const;
275
290 int GetLayerDistance( PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer ) const;
291
295 wxString m_FinishType;
296
305
310
319
322
323private:
324 // The list of items describing the stackup for fabrication.
325 // this is not just copper layers, but also mask dielectric layers
326 std::vector<BOARD_STACKUP_ITEM*> m_list;
327};
328
329
330#endif // BOARD_STACKUP_H
BS_EDGE_CONNECTOR_CONSTRAINTS
Definition: board_stackup.h:54
@ BS_EDGE_CONNECTOR_BEVELLED
Definition: board_stackup.h:57
@ BS_EDGE_CONNECTOR_NONE
Definition: board_stackup.h:55
@ BS_EDGE_CONNECTOR_IN_USE
Definition: board_stackup.h:56
BOARD_STACKUP_ITEM_TYPE
Definition: board_stackup.h:41
@ BS_ITEM_TYPE_UNDEFINED
Definition: board_stackup.h:42
@ BS_ITEM_TYPE_COPPER
Definition: board_stackup.h:43
@ BS_ITEM_TYPE_SILKSCREEN
Definition: board_stackup.h:49
@ BS_ITEM_TYPE_DIELECTRIC
Definition: board_stackup.h:44
@ BS_ITEM_TYPE_SOLDERPASTE
Definition: board_stackup.h:46
@ BS_ITEM_TYPE_SOLDERMASK
Definition: board_stackup.h:47
Container for design settings for a BOARD object.
Manage one layer needed to make a physical board.
Definition: board_stackup.h:90
void AddDielectricPrms(int aDielectricPrmsIdx)
Add (insert) a DIELECTRIC_PRMS item to m_DielectricPrmsList all values are set to default.
wxString GetTypeName() const
wxString m_Color
type name of layer (copper, silk screen, core, prepreg ...)
PCB_LAYER_ID m_LayerId
mainly for silkscreen and solder mask
int GetSublayersCount() const
void SetDielectricLayerId(int aLayerId)
double GetEpsilonR(int aDielectricSubLayer=0) const
bool HasEpsilonRValue() const
void SetThickness(int aThickness, int aDielectricSubLayer=0)
bool IsMaterialEditable() const
BOARD_STACKUP_ITEM_TYPE m_Type
bool HasMaterialValue(int aDielectricSubLayer=0) const
void SetThicknessLocked(bool aLocked, int aDielectricSubLayer=0)
wxString FormatDielectricLayerName() const
wxString GetLayerName() const
void SetMaterial(const wxString &aName, int aDielectricSubLayer=0)
BOARD_STACKUP_ITEM(BOARD_STACKUP_ITEM_TYPE aType)
bool HasLossTangentValue() const
PCB_LAYER_ID GetBrdLayerId() const
bool IsThicknessEditable() const
wxString GetColor() const
void SetLossTangent(double aTg, int aDielectricSubLayer=0)
int GetThickness(int aDielectricSubLayer=0) const
void SetEnabled(bool aEnable)
std::vector< DIELECTRIC_PRMS > m_DielectricPrmsList
the "layer" id for dielectric layers, from 1 (top) to 31 (bottom) (only 31 dielectric layers for 32 c...
static int GetMaskDefaultThickness()
bool IsEnabled() const
BOARD_STACKUP_ITEM_TYPE GetType() const
wxString GetMaterial(int aDielectricSubLayer=0) const
wxString m_TypeName
name of layer as shown in layer manager. Useful to create reports
void SetBrdLayerId(PCB_LAYER_ID aBrdLayerId)
void SetTypeName(const wxString &aName)
bool IsThicknessLocked(int aDielectricSubLayer=0) const
wxString FormatEpsilonR(int aDielectricSubLayer=0) const
int m_DielectricLayerId
the layer id (F.Cu to B.Cu, F.Silk, B.silk, F.Mask, B.Mask) and UNDEFINED_LAYER (-1) for dielectric l...
void SetEpsilonR(double aEpsilon, int aDielectricSubLayer=0)
void SetColor(const wxString &aColorName)
void SetLayerName(const wxString &aName)
void RemoveDielectricPrms(int aDielectricPrmsIdx)
Remove a DIELECTRIC_PRMS item from m_DielectricPrmsList.
int GetDielectricLayerId() const
bool IsColorEditable() const
wxString FormatLossTangent(int aDielectricSubLayer=0) const
double GetLossTangent(int aDielectricSubLayer=0) const
static int GetCopperDefaultThickness()
Manage layers needed to make a physical board.
void RemoveAll()
Delete all items in list and clear the list.
void FormatBoardStackup(OUTPUTFORMATTER *aFormatter, const BOARD *aBoard, int aNestLevel) const
Write the stackup info on board file.
bool m_CastellatedPads
True if castellated pads exist.
const std::vector< BOARD_STACKUP_ITEM * > & GetList() const
static LSET StackupAllowedBrdLayers()
int GetCount() const
bool SynchronizeWithBoard(BOARD_DESIGN_SETTINGS *aSettings)
Synchronize the BOARD_STACKUP_ITEM* list with the board.
int BuildBoardThicknessFromStackup() const
bool m_HasDielectricConstrains
True if some layers have impedance controlled tracks or have specific constrains for micro-wave appli...
void Add(BOARD_STACKUP_ITEM *aItem)
Add a new item in stackup layer.
void BuildDefaultStackupList(const BOARD_DESIGN_SETTINGS *aSettings, int aActiveCopperLayersCount=0)
Create a default stackup, according to the current BOARD_DESIGN_SETTINGS settings.
BOARD_STACKUP & operator=(const BOARD_STACKUP &aOther)
BOARD_STACKUP_ITEM * GetStackupLayer(int aIndex)
int GetLayerDistance(PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer) const
Calculate the distance (height) between the two given copper layers.
std::vector< BOARD_STACKUP_ITEM * > m_list
bool m_EdgePlating
True if the edge board is plated.
BS_EDGE_CONNECTOR_CONSTRAINTS m_EdgeConnectorConstraints
If the board has edge connector cards, some constrains can be specified in job file: BS_EDGE_CONNECTO...
bool m_HasThicknessConstrains
True if some layers (copper and/or dielectric) have specific thickness.
wxString m_FinishType
The name of external copper finish.
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:265
A helper class to manage a dielectric layer set of parameters.
Definition: board_stackup.h:65
double m_EpsilonR
true for dielectric layers with a fixed thickness (for impedance controlled purposes),...
Definition: board_stackup.h:79
int m_Thickness
type of material (for dielectric and solder mask)
Definition: board_stackup.h:76
wxString m_Material
Definition: board_stackup.h:75
bool m_ThicknessLocked
the physical layer thickness in internal units
Definition: board_stackup.h:77
double m_LossTangent
For dielectric (and solder mask) the dielectric constant.
Definition: board_stackup.h:80
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:530
static LSET ExternalCuMask()
Return a mask holding the Front and Bottom layers.
Definition: lset.cpp:801
static LSET InternalCuMask()
Return a complete set of internal copper layers which is all Cu layers except F_Cu and B_Cu.
Definition: lset.cpp:733
An interface used to output 8 bit text in a convenient way.
Definition: richio.h:310
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:59
@ F_Paste
Definition: layer_ids.h:101
@ B_Mask
Definition: layer_ids.h:106
@ F_Mask
Definition: layer_ids.h:107
@ B_Paste
Definition: layer_ids.h:100
@ F_SilkS
Definition: layer_ids.h:104
@ B_SilkS
Definition: layer_ids.h:103