KiCad PCB EDA Suite
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board_design_settings.h
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2009-2019 Jean-Pierre Charras, jp.charras at wanadoo.fr
5 * Copyright (C) 1992-2023 KiCad Developers, see AUTHORS.txt for contributors.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, you may find one here:
19 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
20 * or you may search the http://www.gnu.org website for the version 2 license,
21 * or you may write to the Free Software Foundation, Inc.,
22 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
23 */
24
25#ifndef BOARD_DESIGN_SETTINGS_H_
26#define BOARD_DESIGN_SETTINGS_H_
27
28#include <memory>
29
30#include <netclass.h>
33#include <drc/drc_engine.h>
34#include <lset.h>
36#include <widgets/ui_common.h>
37#include <zone_settings.h>
39#include <router/pns_meander.h>
40
41
42#define DEFAULT_SILK_LINE_WIDTH 0.1
43#define DEFAULT_COPPER_LINE_WIDTH 0.2
44#define DEFAULT_EDGE_WIDTH 0.05
45#define DEFAULT_COURTYARD_WIDTH 0.05
46#define DEFAULT_LINE_WIDTH 0.10
47
48#define DEFAULT_SILK_TEXT_SIZE 1.0
49#define DEFAULT_COPPER_TEXT_SIZE 1.5
50#define DEFAULT_TEXT_SIZE 1.0
51
52#define DEFAULT_SILK_TEXT_WIDTH 0.1
53#define DEFAULT_COPPER_TEXT_WIDTH 0.30
54#define DEFAULT_TEXT_WIDTH 0.15
55
56#define DEFAULT_DIMENSION_ARROW_LENGTH 50 // mils, for legacy purposes
57#define DEFAULT_DIMENSION_EXTENSION_OFFSET 0.5
58
59// Board thickness, mainly for 3D view:
60#define DEFAULT_BOARD_THICKNESS_MM 1.6
61
62#define DEFAULT_PCB_EDGE_THICKNESS 0.15
63
64// soldermask to pad clearance. The default is 0 because usually board houses
65// create a clearance depending on their fab process: mask material, color, price, etc.
66#define DEFAULT_SOLDERMASK_EXPANSION 0.0
67
68#define DEFAULT_SOLDERMASK_TO_COPPER_CLEARANCE 0.0
69
70#define DEFAULT_SOLDERMASK_MIN_WIDTH 0.0
71
72#define DEFAULT_SOLDERPASTE_CLEARANCE 0.0
73#define DEFAULT_SOLDERPASTE_RATIO 0.0
74
75#define DEFAULT_CUSTOMTRACKWIDTH 0.2
76#define DEFAULT_CUSTOMDPAIRWIDTH 0.125
77#define DEFAULT_CUSTOMDPAIRGAP 0.18
78#define DEFAULT_CUSTOMDPAIRVIAGAP 0.18
79
80#define DEFAULT_MEANDER_SPACING 0.6
81#define DEFAULT_DP_MEANDER_SPACING 1.0
82
83#define DEFAULT_MINCLEARANCE 0.0 // overall min clearance
84#define DEFAULT_MINCONNECTION 0.0 // overall min connection width
85#define DEFAULT_TRACKMINWIDTH 0.0 // track width min value
86#define DEFAULT_VIASMINSIZE 0.5 // vias (not micro vias) min diameter
87#define DEFAULT_MINTHROUGHDRILL 0.3 // through holes (not micro vias) min drill diameter
88#define DEFAULT_MICROVIASMINSIZE 0.2 // micro vias (not vias) min diameter
89#define DEFAULT_MICROVIASMINDRILL 0.1 // micro vias (not vias) min drill diameter
90#define DEFAULT_HOLETOHOLEMIN 0.25 // minimum web thickness between two drilled holes
91#define DEFAULT_HOLECLEARANCE 0.25 // copper-to-hole clearance (from IPC level A)
92
93#define DEFAULT_COPPEREDGECLEARANCE 0.5 // clearance between copper items and edge cuts
94#define LEGACY_COPPEREDGECLEARANCE -0.01 // A flag to indicate the legacy method (based
95 // on edge cut line thicknesses) should be used.
96#define DEFAULT_SILKCLEARANCE 0.0
97
98#define DEFAULT_MINRESOLVEDSPOKES 2 // Fewer resolved spokes indicates a starved thermal
99
100#define MINIMUM_ERROR_SIZE_MM 0.001 // For arc approximation
101#define MAXIMUM_ERROR_SIZE_MM 0.1 // For arc approximation
102
103// Min/max values used in dialogs to validate settings
104#define MINIMUM_LINE_WIDTH_MM 0.005 // minimal line width entered in a dialog
105#define MAXIMUM_LINE_WIDTH_MM 100.0 // max line width entered in a dialog
106
107// Default pad properies
108#define DEFAULT_PAD_WIDTH_MM 2.54 // master pad width
109#define DEFAULT_PAD_HEIGTH_MM 1.27 // master pad heigth
110#define DEFAULT_PAD_DRILL_DIAMETER_MM 0.8 // master pad drill diameter for PTH
111#define DEFAULT_PAD_REACT_RADIUS 15 // master pad corner radius in percent
112
118{
119 int m_Diameter; // <= 0 means use Netclass via diameter
120 int m_Drill; // <= 0 means use Netclass via drill
121
123 {
124 m_Diameter = 0;
125 m_Drill = 0;
126 }
127
128 VIA_DIMENSION( int aDiameter, int aDrill )
129 {
130 m_Diameter = aDiameter;
131 m_Drill = aDrill;
132 }
133
134 bool operator==( const VIA_DIMENSION& aOther ) const
135 {
136 return ( m_Diameter == aOther.m_Diameter ) && ( m_Drill == aOther.m_Drill );
137 }
138
139 bool operator!=( const VIA_DIMENSION& aOther ) const { return !operator==( aOther ); }
140
141 bool operator<( const VIA_DIMENSION& aOther ) const
142 {
143 if( m_Diameter != aOther.m_Diameter )
144 return m_Diameter < aOther.m_Diameter;
145
146 return m_Drill < aOther.m_Drill;
147 }
148};
149
150
156{
157 int m_Width; // <= 0 means use Netclass differential pair width
158 int m_Gap; // <= 0 means use Netclass differential pair gap
159 int m_ViaGap; // <= 0 means use Netclass differential pair via gap
160
162 {
163 m_Width = 0;
164 m_Gap = 0;
165 m_ViaGap = 0;
166 }
167
168 DIFF_PAIR_DIMENSION( int aWidth, int aGap, int aViaGap )
169 {
170 m_Width = aWidth;
171 m_Gap = aGap;
172 m_ViaGap = aViaGap;
173 }
174
175 bool operator==( const DIFF_PAIR_DIMENSION& aOther ) const
176 {
177 return ( m_Width == aOther.m_Width )
178 && ( m_Gap == aOther.m_Gap )
179 && ( m_ViaGap == aOther.m_ViaGap );
180 }
181
182 bool operator!=( const DIFF_PAIR_DIMENSION& aOther ) const { return !operator==( aOther ); }
183
184 bool operator<( const DIFF_PAIR_DIMENSION& aOther ) const
185 {
186 if( m_Width != aOther.m_Width )
187 return m_Width < aOther.m_Width;
188
189 if( m_Gap != aOther.m_Gap )
190 return m_Gap < aOther.m_Gap;
191
192 return m_ViaGap < aOther.m_ViaGap;
193 }
194};
195
196
197enum
198{
205
208
209
211{
212 wxString m_Text;
215
216 TEXT_ITEM_INFO( const wxString& aText, bool aVisible, int aLayer )
217 {
218 m_Text = aText;
219 m_Visible = aVisible;
220 m_Layer = aLayer;
221 }
222
223 bool operator==( const TEXT_ITEM_INFO& aOther ) const
224 {
225 return m_Text.IsSameAs( aOther.m_Text )
226 && ( m_Visible == aOther.m_Visible )
227 && ( m_Layer == aOther.m_Layer );
228 }
229};
230
231
232// forward declaration from class_track.h
233enum class VIATYPE : int;
234
235// forward declarations from dimension.h
236enum class DIM_UNITS_FORMAT : int;
237enum class DIM_TEXT_POSITION : int;
238enum class DIM_UNITS_MODE : int;
239enum class DIM_PRECISION : int;
240
241class PAD;
242
247{
248public:
249 BOARD_DESIGN_SETTINGS( JSON_SETTINGS* aParent, const std::string& aPath );
250
251 virtual ~BOARD_DESIGN_SETTINGS();
252
253 bool operator==( const BOARD_DESIGN_SETTINGS& aOther ) const;
254 bool operator!=( const BOARD_DESIGN_SETTINGS& aOther ) const
255 {
256 return !operator==( aOther );
257 }
258
260
262
263 bool LoadFromFile( const wxString& aDirectory = "" ) override;
264
267
269 {
270 return &m_TeardropParamsList;
271 }
272
273 SEVERITY GetSeverity( int aDRCErrorCode );
274
278 bool Ignore( int aDRCErrorCode );
279
281 {
283 }
284
285 void SetDefaultZoneSettings( const ZONE_SETTINGS& aSettings )
286 {
287 m_defaultZoneSettings = aSettings;
288 }
289
293 inline const wxString& GetCurrentNetClassName() const
294 {
296 }
297
301 inline bool UseNetClassTrack() const
302 {
303 return ( m_trackWidthIndex == 0 && !m_useCustomTrackVia );
304 }
305
309 inline bool UseNetClassVia() const
310 {
311 return ( m_viaSizeIndex == 0 && !m_useCustomTrackVia );
312 }
313
317 inline bool UseNetClassDiffPair() const
318 {
319 return ( m_diffPairIndex == 0 && !m_useCustomDiffPair );
320 }
321
325 int GetBiggestClearanceValue() const;
326
330 int GetSmallestClearanceValue() const;
331
335 inline unsigned GetTrackWidthIndex() const { return m_trackWidthIndex; }
336
342 void SetTrackWidthIndex( unsigned aIndex );
343
349 int GetCurrentTrackWidth() const;
350
359 inline void SetCustomTrackWidth( int aWidth )
360 {
361 m_customTrackWidth = aWidth;
362 }
363
367 inline int GetCustomTrackWidth() const
368 {
369 return m_customTrackWidth;
370 }
371
375 inline unsigned GetViaSizeIndex() const
376 {
377 return m_viaSizeIndex;
378 }
379
385 void SetViaSizeIndex( unsigned aIndex );
386
392 int GetCurrentViaSize() const;
393
402 inline void SetCustomViaSize( int aSize )
403 {
405 }
406
410 inline int GetCustomViaSize() const
411 {
413 }
414
420 int GetCurrentViaDrill() const;
421
430 inline void SetCustomViaDrill( int aDrill )
431 {
432 m_customViaSize.m_Drill = aDrill;
433 }
434
438 inline int GetCustomViaDrill() const
439 {
441 }
442
451 inline void UseCustomTrackViaSize( bool aEnabled )
452 {
453 m_useCustomTrackVia = aEnabled;
454 }
455
459 inline bool UseCustomTrackViaSize() const
460 {
461 return m_useCustomTrackVia;
462 }
463
467 inline unsigned GetDiffPairIndex() const { return m_diffPairIndex; }
468
472 void SetDiffPairIndex( unsigned aIndex );
473
480 inline void SetCustomDiffPairWidth( int aWidth )
481 {
482 m_customDiffPair.m_Width = aWidth;
483 }
484
489 {
491 }
492
498 inline void SetCustomDiffPairGap( int aGap )
499 {
500 m_customDiffPair.m_Gap = aGap;
501 }
502
508 {
509 return m_customDiffPair.m_Gap;
510 }
511
518 inline void SetCustomDiffPairViaGap( int aGap )
519 {
521 }
522
527 {
529 }
530
536 inline void UseCustomDiffPairDimensions( bool aEnabled )
537 {
538 m_useCustomDiffPair = aEnabled;
539 }
540
544 inline bool UseCustomDiffPairDimensions() const
545 {
546 return m_useCustomDiffPair;
547 }
548
553 int GetCurrentDiffPairWidth() const;
554
559 int GetCurrentDiffPairGap() const;
560
566 int GetCurrentDiffPairViaGap() const;
567
573 inline LSET GetEnabledLayers() const
574 {
575 return m_enabledLayers;
576 }
577
583 void SetEnabledLayers( LSET aMask );
584
591 inline bool IsLayerEnabled( PCB_LAYER_ID aLayerId ) const
592 {
593 if( aLayerId >= 0 && aLayerId < PCB_LAYER_ID_COUNT )
594 return m_enabledLayers[aLayerId];
595
596 return false;
597 }
598
602 inline int GetCopperLayerCount() const
603 {
604 return m_copperLayerCount;
605 }
606
612 void SetCopperLayerCount( int aNewLayerCount );
613
618 inline int GetBoardThickness() const { return m_boardThickness; }
619 inline void SetBoardThickness( int aThickness ) { m_boardThickness = aThickness; }
620
621 /*
622 * Return an epsilon which accounts for rounding errors, etc.
623 *
624 * While currently an advanced cfg, going through this API allows us to easily change
625 * it to board-specific if so desired.
626 */
627 int GetDRCEpsilon() const;
628
634 int GetHolePlatingThickness() const;
635
639 int GetLineThickness( PCB_LAYER_ID aLayer ) const;
640
644 VECTOR2I GetTextSize( PCB_LAYER_ID aLayer ) const;
645
649 int GetTextThickness( PCB_LAYER_ID aLayer ) const;
650
651 bool GetTextItalic( PCB_LAYER_ID aLayer ) const;
652 bool GetTextUpright( PCB_LAYER_ID aLayer ) const;
653
654 int GetLayerClass( PCB_LAYER_ID aLayer ) const;
655
656 void SetAuxOrigin( const VECTOR2I& aOrigin ) { m_auxOrigin = aOrigin; }
657 const VECTOR2I& GetAuxOrigin() { return m_auxOrigin; }
658
659 void SetGridOrigin( const VECTOR2I& aOrigin ) { m_gridOrigin = aOrigin; }
661
662 void SetDefaultMasterPad();
663
664private:
665 void initFromOther( const BOARD_DESIGN_SETTINGS& aOther );
666
667 bool migrateSchema0to1();
668
669public:
670 // Note: the first value in each dimensions list is the current netclass value
671 std::vector<int> m_TrackWidthList;
672 std::vector<VIA_DIMENSION> m_ViasDimensionsList;
673 std::vector<DIFF_PAIR_DIMENSION> m_DiffPairDimensionsList;
674
679
683
685
686 bool m_UseConnectedTrackWidth; // use width of existing track when creating a new,
687 // connected track
688 bool m_TempOverrideTrackWidth; // use selected track width temporarily even when
689 // using connected track width
690 int m_MinClearance; // overall min clearance
691 int m_MinConn; // overall min connection width
692 int m_TrackMinWidth; // overall min track width
693 int m_ViasMinAnnularWidth; // overall minimum width of the via copper ring
694 int m_ViasMinSize; // overall vias (not micro vias) min diameter
695 int m_MinThroughDrill; // through hole (not micro vias) min drill diameter
696 int m_MicroViasMinSize; // micro vias min diameter
697 int m_MicroViasMinDrill; // micro vias min drill diameter
699 int m_HoleClearance; // Hole to copper clearance
700 int m_HoleToHoleMin; // Min width of web between two drilled holes
701 int m_SilkClearance; // Min dist between two silk items
702 int m_MinResolvedSpokes; // Min spoke count to not be a starved thermal
703 int m_MinSilkTextHeight; // Min text height for silkscreen layers
704 int m_MinSilkTextThickness; // Min text thickness for silkscreen layers
705
706 std::shared_ptr<DRC_ENGINE> m_DRCEngine;
707 std::map<int, SEVERITY> m_DRCSeverities; // Map from DRCErrorCode to SEVERITY
708 std::set<wxString> m_DrcExclusions; // Serialized excluded DRC markers
709 std::map<wxString, wxString> m_DrcExclusionComments; // Map from serialization to comment
710
711 // When smoothing the zone's outline there's the question of external fillets (that is, those
712 // applied to concave corners). While it seems safer to never have copper extend outside the
713 // zone outline, 5.1.x and prior did indeed fill them so we leave the mode available.
715
716 // Maximum error allowed when approximating circles and arcs to segments
718
719 // Global mask margins:
720 int m_SolderMaskExpansion; // Solder mask inflation around the pad or via
721 int m_SolderMaskMinWidth; // Solder mask min width (2 areas closer than this
722 // width are merged)
723 int m_SolderMaskToCopperClearance; // Min distance allowed from copper to a mask
724 // aperture of another net
725
726 int m_SolderPasteMargin; // Solder paste margin absolute value
727 double m_SolderPasteMarginRatio; // Solder mask margin ratio value of pad size
728 // The final margin is the sum of these 2 values
730 bool m_TentViasFront; // The default tenting option if not overridden on an
731 bool m_TentViasBack; // individual via
732
733 std::shared_ptr<NET_SETTINGS> m_NetSettings;
734
735 // Variables used in footprint editing (default value in item/footprint creation)
736 std::vector<TEXT_ITEM_INFO> m_DefaultFPTextItems;
737
738 // Arrays of default values for the various layer classes.
744
745 // Default values for dimension objects
754
758
759 // Miscellaneous
760 std::unique_ptr<PAD> m_Pad_Master; // A dummy pad to store all default parameters
761 // when importing values or creating a new pad
762
763 // Set to true if the board has a stackup management.
764 // If not set a default basic stackup will be used to generate the gbrjob file.
765 // Could be removed later, or at least always set to true
767
770
771private:
774
775 // Indices into the trackWidth, viaSizes and diffPairDimensions lists.
776 // The 0 index is always the current netclass value(s)
780
781 // Custom values for track/via sizes (specified via dialog instead of netclass or lists)
785
786 // Custom values for differential pairs (specified via dialog instead of netclass/lists)
789
791
793
795
799
805
808};
809
810#endif // BOARD_DESIGN_SETTINGS_H_
@ LAYER_CLASS_OTHERS
@ LAYER_CLASS_COUNT
@ LAYER_CLASS_FAB
@ LAYER_CLASS_COURTYARD
@ LAYER_CLASS_SILK
@ LAYER_CLASS_COPPER
@ LAYER_CLASS_EDGES
Container for design settings for a BOARD object.
DIM_PRECISION m_DimensionPrecision
Number of digits after the decimal.
TEARDROP_PARAMETERS_LIST * GetTeadropParamsList()
void UseCustomTrackViaSize(bool aEnabled)
Enables/disables custom track/via size settings.
std::vector< TEXT_ITEM_INFO > m_DefaultFPTextItems
int GetHolePlatingThickness() const
Pad & via drills are finish size.
void SetCustomDiffPairWidth(int aWidth)
Sets custom track width for differential pairs (i.e.
VIATYPE m_CurrentViaType
(VIA_BLIND_BURIED, VIA_THROUGH, VIA_MICROVIA)
void SetDiffPairIndex(unsigned aIndex)
int GetCustomDiffPairGap()
Function GetCustomDiffPairGap.
std::shared_ptr< NET_SETTINGS > m_NetSettings
bool operator==(const BOARD_DESIGN_SETTINGS &aOther) const
void SetCustomTrackWidth(int aWidth)
Sets custom width for track (i.e.
std::map< wxString, wxString > m_DrcExclusionComments
DIM_UNITS_FORMAT m_DimensionUnitsFormat
void initFromOther(const BOARD_DESIGN_SETTINGS &aOther)
bool GetTextUpright(PCB_LAYER_ID aLayer) const
std::map< int, SEVERITY > m_DRCSeverities
VECTOR2I m_gridOrigin
origin for grid offsets
int GetTextThickness(PCB_LAYER_ID aLayer) const
Return the default text thickness from the layer class for the given layer.
void SetGridOrigin(const VECTOR2I &aOrigin)
VECTOR2I m_auxOrigin
origin for plot exports
bool m_TextUpright[LAYER_CLASS_COUNT]
bool GetTextItalic(PCB_LAYER_ID aLayer) const
const wxString & GetCurrentNetClassName() const
wxString m_currentNetClassName
Current net class name used to display netclass info.
std::shared_ptr< DRC_ENGINE > m_DRCEngine
void SetEnabledLayers(LSET aMask)
Change the bit-mask of enabled layers to aMask.
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
LSET GetEnabledLayers() const
Return a bit-mask of all the layers that are enabled.
std::set< wxString > m_DrcExclusions
bool Ignore(int aDRCErrorCode)
Return true if the DRC error code's severity is SEVERITY_IGNORE.
void SetCustomViaSize(int aSize)
Set custom size for via diameter (i.e.
int GetBoardThickness() const
The full thickness of the board including copper and masks.
const VECTOR2I & GetGridOrigin()
const VECTOR2I & GetAuxOrigin()
std::unique_ptr< PAD > m_Pad_Master
void SetCustomDiffPairGap(int aGap)
Sets custom gap for differential pairs (i.e.
bool IsLayerEnabled(PCB_LAYER_ID aLayerId) const
Test whether a given layer aLayerId is enabled.
void SetTrackWidthIndex(unsigned aIndex)
Set the current track width list index to aIndex.
TEARDROP_PARAMETERS_LIST m_TeardropParamsList
The parameters of teardrops for the different teardrop targets (via/pad, track end) 3 set of paramete...
void SetAuxOrigin(const VECTOR2I &aOrigin)
void SetViaSizeIndex(unsigned aIndex)
Set the current via size list index to aIndex.
bool operator!=(const BOARD_DESIGN_SETTINGS &aOther) const
unsigned GetTrackWidthIndex() const
int GetLayerClass(PCB_LAYER_ID aLayer) const
PNS::MEANDER_SETTINGS m_DiffPairMeanderSettings
bool UseNetClassVia() const
Return true if netclass values should be used to obtain appropriate via size.
BOARD_STACKUP & GetStackupDescriptor()
int m_boardThickness
Board thickness for 3D viewer.
int m_copperLayerCount
Number of copper layers for this design.
unsigned GetViaSizeIndex() const
bool UseNetClassTrack() const
Return true if netclass values should be used to obtain appropriate track width.
bool UseNetClassDiffPair() const
Return true if netclass values should be used to obtain appropriate diff pair dimensions.
void SetCustomViaDrill(int aDrill)
Sets custom size for via drill (i.e.
bool LoadFromFile(const wxString &aDirectory="") override
Loads the backing file from disk and then calls Load()
void SetDefaultZoneSettings(const ZONE_SETTINGS &aSettings)
PNS::MEANDER_SETTINGS m_SingleTrackMeanderSettings
int m_TextThickness[LAYER_CLASS_COUNT]
ZONE_SETTINGS m_defaultZoneSettings
The default settings that will be used for new zones.
const BOARD_STACKUP & GetStackupDescriptor() const
void UseCustomDiffPairDimensions(bool aEnabled)
Enables/disables custom differential pair dimensions.
bool UseCustomDiffPairDimensions() const
SEVERITY GetSeverity(int aDRCErrorCode)
std::vector< int > m_TrackWidthList
unsigned GetDiffPairIndex() const
DIFF_PAIR_DIMENSION m_customDiffPair
int m_LineThickness[LAYER_CLASS_COUNT]
VECTOR2I GetTextSize(PCB_LAYER_ID aLayer) const
Return the default text size from the layer class for the given layer.
void SetBoardThickness(int aThickness)
int GetLineThickness(PCB_LAYER_ID aLayer) const
Return the default graphic segment thickness from the layer class for the given layer.
ZONE_SETTINGS & GetDefaultZoneSettings()
bool m_UseHeightForLengthCalcs
Enable inclusion of stackup height in track length measurements and length tuning.
VECTOR2I m_TextSize[LAYER_CLASS_COUNT]
PNS::MEANDER_SETTINGS m_SkewMeanderSettings
LSET m_enabledLayers
Bit-mask for layer enabling.
bool m_TextItalic[LAYER_CLASS_COUNT]
void SetCopperLayerCount(int aNewLayerCount)
Set the copper layer count to aNewLayerCount.
DIM_TEXT_POSITION m_DimensionTextPosition
BOARD_STACKUP m_stackup
the description of layers stackup, for board fabrication only physical layers are in layers stackup.
DIM_UNITS_MODE m_DimensionUnitsMode
std::vector< VIA_DIMENSION > m_ViasDimensionsList
BOARD_DESIGN_SETTINGS & operator=(const BOARD_DESIGN_SETTINGS &aOther)
void SetCustomDiffPairViaGap(int aGap)
Sets custom via gap for differential pairs (i.e.
Manage layers needed to make a physical board.
LSET is a set of PCB_LAYER_IDs.
Definition: lset.h:35
NESTED_SETTINGS is a JSON_SETTINGS that lives inside a JSON_SETTINGS.
Definition: pad.h:54
Dimensions for the meandering algorithm.
Definition: pns_meander.h:68
TEARDROP_PARAMETERS_LIST is a helper class to handle the list of TEARDROP_PARAMETERS needed to build ...
ZONE_SETTINGS handles zones parameters.
Definition: zone_settings.h:72
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
@ PCB_LAYER_ID_COUNT
Definition: layer_ids.h:137
DIM_TEXT_POSITION
Where to place the text on a dimension.
Definition: pcb_dimension.h:62
DIM_UNITS_FORMAT
How to display the units in a dimension's text.
Definition: pcb_dimension.h:40
DIM_UNITS_MODE
Used for storing the units selection in the file because EDA_UNITS alone doesn't cut it.
Definition: pcb_dimension.h:72
DIM_PRECISION
Definition: pcb_dimension.h:47
VIATYPE
Definition: pcb_track.h:66
SEVERITY
Container to handle a stock of specific differential pairs each with unique track width,...
DIFF_PAIR_DIMENSION(int aWidth, int aGap, int aViaGap)
bool operator<(const DIFF_PAIR_DIMENSION &aOther) const
bool operator==(const DIFF_PAIR_DIMENSION &aOther) const
bool operator!=(const DIFF_PAIR_DIMENSION &aOther) const
TEXT_ITEM_INFO(const wxString &aText, bool aVisible, int aLayer)
bool operator==(const TEXT_ITEM_INFO &aOther) const
Container to handle a stock of specific vias each with unique diameter and drill sizes in the BOARD c...
bool operator==(const VIA_DIMENSION &aOther) const
VIA_DIMENSION(int aDiameter, int aDrill)
bool operator!=(const VIA_DIMENSION &aOther) const
bool operator<(const VIA_DIMENSION &aOther) const
Functions to provide common constants and other functions to assist in making a consistent UI.
Class ZONE_SETTINGS used to handle zones parameters in dialogs.