KiCad PCB EDA Suite
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board_design_settings.h
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2009-2019 Jean-Pierre Charras, jp.charras at wanadoo.fr
5 * Copyright (C) 1992-2022 KiCad Developers, see AUTHORS.txt for contributors.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, you may find one here:
19 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
20 * or you may search the http://www.gnu.org website for the version 2 license,
21 * or you may write to the Free Software Foundation, Inc.,
22 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
23 */
24
25#ifndef BOARD_DESIGN_SETTINGS_H_
26#define BOARD_DESIGN_SETTINGS_H_
27
28#include <memory>
29
30#include <netclass.h>
32#include <config_params.h>
34#include <drc/drc_engine.h>
36#include <widgets/ui_common.h>
37#include <zone_settings.h>
39
40
41#define DEFAULT_SILK_LINE_WIDTH 0.1
42#define DEFAULT_COPPER_LINE_WIDTH 0.2
43#define DEFAULT_EDGE_WIDTH 0.05
44#define DEFAULT_COURTYARD_WIDTH 0.05
45#define DEFAULT_LINE_WIDTH 0.10
46
47#define DEFAULT_SILK_TEXT_SIZE 1.0
48#define DEFAULT_COPPER_TEXT_SIZE 1.5
49#define DEFAULT_TEXT_SIZE 1.0
50
51#define DEFAULT_SILK_TEXT_WIDTH 0.1
52#define DEFAULT_COPPER_TEXT_WIDTH 0.30
53#define DEFAULT_TEXT_WIDTH 0.15
54
55#define DEFAULT_DIMENSION_ARROW_LENGTH 50 // mils, for legacy purposes
56#define DEFAULT_DIMENSION_EXTENSION_OFFSET 0.5
57
58// Board thickness, mainly for 3D view:
59#define DEFAULT_BOARD_THICKNESS_MM 1.6
60
61#define DEFAULT_PCB_EDGE_THICKNESS 0.15
62
63// soldermask to pad clearance. The default is 0 because usually board houses
64// create a clearance depending on their fab process: mask material, color, price, etc.
65#define DEFAULT_SOLDERMASK_EXPANSION 0.0
66
67#define DEFAULT_SOLDERMASK_TO_COPPER_CLEARANCE 0.0
68
69#define DEFAULT_SOLDERMASK_MIN_WIDTH 0.0
70
71#define DEFAULT_SOLDERPASTE_CLEARANCE 0.0
72#define DEFAULT_SOLDERPASTE_RATIO 0.0
73
74#define DEFAULT_CUSTOMTRACKWIDTH 0.2
75#define DEFAULT_CUSTOMDPAIRWIDTH 0.125
76#define DEFAULT_CUSTOMDPAIRGAP 0.18
77#define DEFAULT_CUSTOMDPAIRVIAGAP 0.18
78
79#define DEFAULT_MINCLEARANCE 0.0 // overall min clearance
80#define DEFAULT_MINCONNECTION 0.0 // overall min connection width
81#define DEFAULT_TRACKMINWIDTH 0.0 // track width min value
82#define DEFAULT_VIASMINSIZE 0.5 // vias (not micro vias) min diameter
83#define DEFAULT_MINTHROUGHDRILL 0.3 // through holes (not micro vias) min drill diameter
84#define DEFAULT_MICROVIASMINSIZE 0.2 // micro vias (not vias) min diameter
85#define DEFAULT_MICROVIASMINDRILL 0.1 // micro vias (not vias) min drill diameter
86#define DEFAULT_HOLETOHOLEMIN 0.25 // minimum web thickness between two drilled holes
87#define DEFAULT_HOLECLEARANCE 0.25 // copper-to-hole clearance (from IPC level A)
88
89#define DEFAULT_COPPEREDGECLEARANCE 0.5 // clearance between copper items and edge cuts
90#define LEGACY_COPPEREDGECLEARANCE -0.01 // A flag to indicate the legacy method (based
91 // on edge cut line thicknesses) should be used.
92#define DEFAULT_SILKCLEARANCE 0.0
93
94#define DEFAULT_MINRESOLVEDSPOKES 2 // Fewer resolved spokes indicates a starved thermal
95
96#define MINIMUM_ERROR_SIZE_MM 0.001
97#define MAXIMUM_ERROR_SIZE_MM 0.1
98
99
105{
106 int m_Diameter; // <= 0 means use Netclass via diameter
107 int m_Drill; // <= 0 means use Netclass via drill
108
110 {
111 m_Diameter = 0;
112 m_Drill = 0;
113 }
114
115 VIA_DIMENSION( int aDiameter, int aDrill )
116 {
117 m_Diameter = aDiameter;
118 m_Drill = aDrill;
119 }
120
121 bool operator==( const VIA_DIMENSION& aOther ) const
122 {
123 return ( m_Diameter == aOther.m_Diameter ) && ( m_Drill == aOther.m_Drill );
124 }
125
126 bool operator<( const VIA_DIMENSION& aOther ) const
127 {
128 if( m_Diameter != aOther.m_Diameter )
129 return m_Diameter < aOther.m_Diameter;
130
131 return m_Drill < aOther.m_Drill;
132 }
133};
134
135
141{
142 int m_Width; // <= 0 means use Netclass differential pair width
143 int m_Gap; // <= 0 means use Netclass differential pair gap
144 int m_ViaGap; // <= 0 means use Netclass differential pair via gap
145
147 {
148 m_Width = 0;
149 m_Gap = 0;
150 m_ViaGap = 0;
151 }
152
153 DIFF_PAIR_DIMENSION( int aWidth, int aGap, int aViaGap )
154 {
155 m_Width = aWidth;
156 m_Gap = aGap;
157 m_ViaGap = aViaGap;
158 }
159
160 bool operator==( const DIFF_PAIR_DIMENSION& aOther ) const
161 {
162 return ( m_Width == aOther.m_Width )
163 && ( m_Gap == aOther.m_Gap )
164 && ( m_ViaGap == aOther.m_ViaGap );
165 }
166
167 bool operator<( const DIFF_PAIR_DIMENSION& aOther ) const
168 {
169 if( m_Width != aOther.m_Width )
170 return m_Width < aOther.m_Width;
171
172 if( m_Gap != aOther.m_Gap )
173 return m_Gap < aOther.m_Gap;
174
175 return m_ViaGap < aOther.m_ViaGap;
176 }
177};
178
179
180enum
181{
188
191
192
194{
195 wxString m_Text;
198
199 TEXT_ITEM_INFO( const wxString& aText, bool aVisible, int aLayer )
200 {
201 m_Text = aText;
202 m_Visible = aVisible;
203 m_Layer = aLayer;
204 }
205};
206
207
208// forward declaration from class_track.h
209enum class VIATYPE : int;
210
211// forward declarations from dimension.h
212enum class DIM_UNITS_FORMAT : int;
213enum class DIM_TEXT_POSITION : int;
214enum class DIM_UNITS_MODE : int;
215enum class DIM_PRECISION : int;
216
217class PAD;
218
223{
224public:
225 BOARD_DESIGN_SETTINGS( JSON_SETTINGS* aParent, const std::string& aPath );
226
227 virtual ~BOARD_DESIGN_SETTINGS();
228
230
232
233 bool LoadFromFile( const wxString& aDirectory = "" ) override;
234
237
239 {
240 return &m_TeardropParamsList;
241 }
242
243 SEVERITY GetSeverity( int aDRCErrorCode );
244
248 bool Ignore( int aDRCErrorCode );
249
251 {
253 }
254
255 void SetDefaultZoneSettings( const ZONE_SETTINGS& aSettings )
256 {
257 m_defaultZoneSettings = aSettings;
258 }
259
263 inline const wxString& GetCurrentNetClassName() const
264 {
266 }
267
271 inline bool UseNetClassTrack() const
272 {
273 return ( m_trackWidthIndex == 0 && !m_useCustomTrackVia );
274 }
275
279 inline bool UseNetClassVia() const
280 {
281 return ( m_viaSizeIndex == 0 && !m_useCustomTrackVia );
282 }
283
287 inline bool UseNetClassDiffPair() const
288 {
289 return ( m_diffPairIndex == 0 && !m_useCustomDiffPair );
290 }
291
295 int GetBiggestClearanceValue() const;
296
300 int GetSmallestClearanceValue() const;
301
305 inline unsigned GetTrackWidthIndex() const { return m_trackWidthIndex; }
306
312 void SetTrackWidthIndex( unsigned aIndex );
313
319 int GetCurrentTrackWidth() const;
320
329 inline void SetCustomTrackWidth( int aWidth )
330 {
331 m_customTrackWidth = aWidth;
332 }
333
337 inline int GetCustomTrackWidth() const
338 {
339 return m_customTrackWidth;
340 }
341
345 inline unsigned GetViaSizeIndex() const
346 {
347 return m_viaSizeIndex;
348 }
349
355 void SetViaSizeIndex( unsigned aIndex );
356
362 int GetCurrentViaSize() const;
363
372 inline void SetCustomViaSize( int aSize )
373 {
375 }
376
380 inline int GetCustomViaSize() const
381 {
383 }
384
390 int GetCurrentViaDrill() const;
391
400 inline void SetCustomViaDrill( int aDrill )
401 {
402 m_customViaSize.m_Drill = aDrill;
403 }
404
408 inline int GetCustomViaDrill() const
409 {
411 }
412
421 inline void UseCustomTrackViaSize( bool aEnabled )
422 {
423 m_useCustomTrackVia = aEnabled;
424 }
425
429 inline bool UseCustomTrackViaSize() const
430 {
431 return m_useCustomTrackVia;
432 }
433
437 inline unsigned GetDiffPairIndex() const { return m_diffPairIndex; }
438
442 void SetDiffPairIndex( unsigned aIndex );
443
450 inline void SetCustomDiffPairWidth( int aWidth )
451 {
452 m_customDiffPair.m_Width = aWidth;
453 }
454
459 {
461 }
462
468 inline void SetCustomDiffPairGap( int aGap )
469 {
470 m_customDiffPair.m_Gap = aGap;
471 }
472
478 {
479 return m_customDiffPair.m_Gap;
480 }
481
488 inline void SetCustomDiffPairViaGap( int aGap )
489 {
491 }
492
497 {
499 }
500
506 inline void UseCustomDiffPairDimensions( bool aEnabled )
507 {
508 m_useCustomDiffPair = aEnabled;
509 }
510
514 inline bool UseCustomDiffPairDimensions() const
515 {
516 return m_useCustomDiffPair;
517 }
518
523 int GetCurrentDiffPairWidth() const;
524
529 int GetCurrentDiffPairGap() const;
530
536 int GetCurrentDiffPairViaGap() const;
537
543 inline LSET GetEnabledLayers() const
544 {
545 return m_enabledLayers;
546 }
547
553 void SetEnabledLayers( LSET aMask );
554
561 inline bool IsLayerEnabled( PCB_LAYER_ID aLayerId ) const
562 {
563 if( aLayerId >= 0 && aLayerId < PCB_LAYER_ID_COUNT )
564 return m_enabledLayers[aLayerId];
565
566 return false;
567 }
568
572 inline int GetCopperLayerCount() const
573 {
574 return m_copperLayerCount;
575 }
576
582 void SetCopperLayerCount( int aNewLayerCount );
583
588 inline int GetBoardThickness() const { return m_boardThickness; }
589 inline void SetBoardThickness( int aThickness ) { m_boardThickness = aThickness; }
590
591 /*
592 * Return an epsilon which accounts for rounding errors, etc.
593 *
594 * While currently an advanced cfg, going through this API allows us to easily change
595 * it to board-specific if so desired.
596 */
597 int GetDRCEpsilon() const;
598
604 int GetHolePlatingThickness() const;
605
609 int GetLineThickness( PCB_LAYER_ID aLayer ) const;
610
614 VECTOR2I GetTextSize( PCB_LAYER_ID aLayer ) const;
615
619 int GetTextThickness( PCB_LAYER_ID aLayer ) const;
620
621 bool GetTextItalic( PCB_LAYER_ID aLayer ) const;
622 bool GetTextUpright( PCB_LAYER_ID aLayer ) const;
623
624 int GetLayerClass( PCB_LAYER_ID aLayer ) const;
625
626 void SetAuxOrigin( const VECTOR2I& aOrigin ) { m_auxOrigin = aOrigin; }
627 const VECTOR2I& GetAuxOrigin() { return m_auxOrigin; }
628
629 void SetGridOrigin( const VECTOR2I& aOrigin ) { m_gridOrigin = aOrigin; }
631
632private:
633 void initFromOther( const BOARD_DESIGN_SETTINGS& aOther );
634
635 bool migrateSchema0to1();
636
637public:
638 // Note: the first value in each dimensions list is the current netclass value
639 std::vector<int> m_TrackWidthList;
640 std::vector<VIA_DIMENSION> m_ViasDimensionsList;
641 std::vector<DIFF_PAIR_DIMENSION> m_DiffPairDimensionsList;
642
647
649
650 bool m_UseConnectedTrackWidth; // use width of existing track when creating a new,
651 // connected track
652 bool m_TempOverrideTrackWidth; // use selected track width temporarily even when
653 // using connected track width
654 int m_MinClearance; // overall min clearance
655 int m_MinConn; // overall min connection width
656 int m_TrackMinWidth; // overall min track width
657 int m_ViasMinAnnularWidth; // overall minimum width of the via copper ring
658 int m_ViasMinSize; // overall vias (not micro vias) min diameter
659 int m_MinThroughDrill; // through hole (not micro vias) min drill diameter
660 int m_MicroViasMinSize; // micro vias min diameter
661 int m_MicroViasMinDrill; // micro vias min drill diameter
663 int m_HoleClearance; // Hole to copper clearance
664 int m_HoleToHoleMin; // Min width of web between two drilled holes
665 int m_SilkClearance; // Min dist between two silk items
666 int m_MinResolvedSpokes; // Min spoke count to not be a starved thermal
667 int m_MinSilkTextHeight; // Min text height for silkscreen layers
668 int m_MinSilkTextThickness; // Min text thickness for silkscreen layers
669
670 std::shared_ptr<DRC_ENGINE> m_DRCEngine;
671 std::map<int, SEVERITY> m_DRCSeverities; // Map from DRCErrorCode to SEVERITY
672 std::set<wxString> m_DrcExclusions;
673
674 // When smoothing the zone's outline there's the question of external fillets (that is, those
675 // applied to concave corners). While it seems safer to never have copper extend outside the
676 // zone outline, 5.1.x and prior did indeed fill them so we leave the mode available.
678
679 // Maximum error allowed when approximating circles and arcs to segments
681
682 // Global mask margins:
683 int m_SolderMaskExpansion; // Solder mask inflation around the pad or via
684 int m_SolderMaskMinWidth; // Solder mask min width (2 areas closer than this
685 // width are merged)
686 int m_SolderMaskToCopperClearance; // Min distance allowed from copper to a mask
687 // aperture of another net
688
689 int m_SolderPasteMargin; // Solder paste margin absolute value
690 double m_SolderPasteMarginRatio; // Solder mask margin ratio value of pad size
691 // The final margin is the sum of these 2 values
693
694 std::shared_ptr<NET_SETTINGS> m_NetSettings;
695
696 // Variables used in footprint editing (default value in item/footprint creation)
697 std::vector<TEXT_ITEM_INFO> m_DefaultFPTextItems;
698
699 // Arrays of default values for the various layer classes.
705
706 // Default values for dimension objects
715
716 // Miscellaneous
717 std::unique_ptr<PAD> m_Pad_Master; // A dummy pad to store all default parameters
718 // when importing values or creating a new pad
719
720 // Set to true if the board has a stackup management.
721 // If not set a default basic stackup will be used to generate the gbrjob file.
722 // Could be removed later, or at least always set to true
724
727
728private:
731
732 // Indices into the trackWidth, viaSizes and diffPairDimensions lists.
733 // The 0 index is always the current netclass value(s)
737
738 // Custom values for track/via sizes (specified via dialog instead of netclass or lists)
742
743 // Custom values for differential pairs (specified via dialog instead of netclass/lists)
746
748
750
752
756
762
765};
766
767#endif // BOARD_DESIGN_SETTINGS_H_
@ LAYER_CLASS_OTHERS
@ LAYER_CLASS_COUNT
@ LAYER_CLASS_FAB
@ LAYER_CLASS_COURTYARD
@ LAYER_CLASS_SILK
@ LAYER_CLASS_COPPER
@ LAYER_CLASS_EDGES
Container for design settings for a BOARD object.
DIM_PRECISION m_DimensionPrecision
Number of digits after the decimal.
TEARDROP_PARAMETERS_LIST * GetTeadropParamsList()
void UseCustomTrackViaSize(bool aEnabled)
Enables/disables custom track/via size settings.
std::vector< TEXT_ITEM_INFO > m_DefaultFPTextItems
int GetHolePlatingThickness() const
Pad & via drills are finish size.
void SetCustomDiffPairWidth(int aWidth)
Sets custom track width for differential pairs (i.e.
VIATYPE m_CurrentViaType
(VIA_BLIND_BURIED, VIA_THROUGH, VIA_MICROVIA)
void SetDiffPairIndex(unsigned aIndex)
int GetCustomDiffPairGap()
Function GetCustomDiffPairGap.
std::shared_ptr< NET_SETTINGS > m_NetSettings
void SetCustomTrackWidth(int aWidth)
Sets custom width for track (i.e.
DIM_UNITS_FORMAT m_DimensionUnitsFormat
void initFromOther(const BOARD_DESIGN_SETTINGS &aOther)
bool GetTextUpright(PCB_LAYER_ID aLayer) const
std::map< int, SEVERITY > m_DRCSeverities
VECTOR2I m_gridOrigin
origin for grid offsets
int GetTextThickness(PCB_LAYER_ID aLayer) const
Return the default text thickness from the layer class for the given layer.
void SetGridOrigin(const VECTOR2I &aOrigin)
VECTOR2I m_auxOrigin
origin for plot exports
bool m_TextUpright[LAYER_CLASS_COUNT]
bool GetTextItalic(PCB_LAYER_ID aLayer) const
const wxString & GetCurrentNetClassName() const
wxString m_currentNetClassName
Current net class name used to display netclass info.
std::shared_ptr< DRC_ENGINE > m_DRCEngine
void SetEnabledLayers(LSET aMask)
Change the bit-mask of enabled layers to aMask.
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
LSET GetEnabledLayers() const
Return a bit-mask of all the layers that are enabled.
std::set< wxString > m_DrcExclusions
bool Ignore(int aDRCErrorCode)
Return true if the DRC error code's severity is SEVERITY_IGNORE.
void SetCustomViaSize(int aSize)
Set custom size for via diameter (i.e.
int GetBoardThickness() const
The full thickness of the board including copper and masks.
const VECTOR2I & GetGridOrigin()
const VECTOR2I & GetAuxOrigin()
std::unique_ptr< PAD > m_Pad_Master
void SetCustomDiffPairGap(int aGap)
Sets custom gap for differential pairs (i.e.
bool IsLayerEnabled(PCB_LAYER_ID aLayerId) const
Test whether a given layer aLayerId is enabled.
void SetTrackWidthIndex(unsigned aIndex)
Set the current track width list index to aIndex.
TEARDROP_PARAMETERS_LIST m_TeardropParamsList
The parameters of teardrops for the different teardrop targets (via/pad, track end) 3 set of paramete...
void SetAuxOrigin(const VECTOR2I &aOrigin)
void SetViaSizeIndex(unsigned aIndex)
Set the current via size list index to aIndex.
unsigned GetTrackWidthIndex() const
int GetLayerClass(PCB_LAYER_ID aLayer) const
bool UseNetClassVia() const
Return true if netclass values should be used to obtain appropriate via size.
BOARD_STACKUP & GetStackupDescriptor()
int m_boardThickness
Board thickness for 3D viewer.
int m_copperLayerCount
Number of copper layers for this design.
unsigned GetViaSizeIndex() const
bool UseNetClassTrack() const
Return true if netclass values should be used to obtain appropriate track width.
bool UseNetClassDiffPair() const
Return true if netclass values should be used to obtain appropriate diff pair dimensions.
void SetCustomViaDrill(int aDrill)
Sets custom size for via drill (i.e.
bool LoadFromFile(const wxString &aDirectory="") override
Loads the backing file from disk and then calls Load()
void SetDefaultZoneSettings(const ZONE_SETTINGS &aSettings)
int m_TextThickness[LAYER_CLASS_COUNT]
ZONE_SETTINGS m_defaultZoneSettings
The default settings that will be used for new zones.
const BOARD_STACKUP & GetStackupDescriptor() const
void UseCustomDiffPairDimensions(bool aEnabled)
Enables/disables custom differential pair dimensions.
bool UseCustomDiffPairDimensions() const
SEVERITY GetSeverity(int aDRCErrorCode)
std::vector< int > m_TrackWidthList
unsigned GetDiffPairIndex() const
DIFF_PAIR_DIMENSION m_customDiffPair
int m_LineThickness[LAYER_CLASS_COUNT]
VECTOR2I GetTextSize(PCB_LAYER_ID aLayer) const
Return the default text size from the layer class for the given layer.
void SetBoardThickness(int aThickness)
int GetLineThickness(PCB_LAYER_ID aLayer) const
Return the default graphic segment thickness from the layer class for the given layer.
ZONE_SETTINGS & GetDefaultZoneSettings()
bool m_UseHeightForLengthCalcs
Enable inclusion of stackup height in track length measurements and length tuning.
VECTOR2I m_TextSize[LAYER_CLASS_COUNT]
LSET m_enabledLayers
Bit-mask for layer enabling.
bool m_TextItalic[LAYER_CLASS_COUNT]
void SetCopperLayerCount(int aNewLayerCount)
Set the copper layer count to aNewLayerCount.
DIM_TEXT_POSITION m_DimensionTextPosition
BOARD_STACKUP m_stackup
the description of layers stackup, for board fabrication only physical layers are in layers stackup.
DIM_UNITS_MODE m_DimensionUnitsMode
std::vector< VIA_DIMENSION > m_ViasDimensionsList
BOARD_DESIGN_SETTINGS & operator=(const BOARD_DESIGN_SETTINGS &aOther)
void SetCustomDiffPairViaGap(int aGap)
Sets custom via gap for differential pairs (i.e.
Manage layers needed to make a physical board.
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:536
NESTED_SETTINGS is a JSON_SETTINGS that lives inside a JSON_SETTINGS.
Definition: pad.h:59
TEARDROP_PARAMETERS_LIST is a helper class to handle the list of TEARDROP_PARAMETERS needed to build ...
ZONE_SETTINGS handles zones parameters.
Definition: zone_settings.h:70
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:59
@ PCB_LAYER_ID_COUNT
Definition: layer_ids.h:137
DIM_TEXT_POSITION
Where to place the text on a dimension.
Definition: pcb_dimension.h:62
DIM_UNITS_FORMAT
How to display the units in a dimension's text.
Definition: pcb_dimension.h:40
DIM_UNITS_MODE
Used for storing the units selection in the file because EDA_UNITS alone doesn't cut it.
Definition: pcb_dimension.h:72
DIM_PRECISION
Definition: pcb_dimension.h:47
VIATYPE
Definition: pcb_track.h:64
SEVERITY
Container to handle a stock of specific differential pairs each with unique track width,...
DIFF_PAIR_DIMENSION(int aWidth, int aGap, int aViaGap)
bool operator<(const DIFF_PAIR_DIMENSION &aOther) const
bool operator==(const DIFF_PAIR_DIMENSION &aOther) const
TEXT_ITEM_INFO(const wxString &aText, bool aVisible, int aLayer)
Container to handle a stock of specific vias each with unique diameter and drill sizes in the BOARD c...
bool operator==(const VIA_DIMENSION &aOther) const
VIA_DIMENSION(int aDiameter, int aDrill)
bool operator<(const VIA_DIMENSION &aOther) const
Functions to provide common constants and other functions to assist in making a consistent UI.
Class ZONE_SETTINGS used to handle zones parameters in dialogs.