KiCad PCB EDA Suite
board_stackup.cpp
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1 /*
2  * This program source code file is part of KiCad, a free EDA CAD application.
3  *
4  * Copyright (C) 2019 Jean-Pierre Charras, jp.charras at wanadoo.fr
5  * Copyright (C) 2009-2021 KiCad Developers, see AUTHORS.txt for contributors.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * as published by the Free Software Foundation; either version 3
10  * of the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License along
18  * with this program. If not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 
22 #include "board_stackup.h"
23 #include <convert_to_biu.h>
24 #include <base_units.h>
25 #include <string_utils.h>
26 #include <layer_ids.h>
27 #include <board_design_settings.h>
28 #include <board.h>
29 #include <i18n_utility.h> // For _HKI definition
31 #include <string_utils.h> // for Double2Str()
32 
33 
35 {
36  DIELECTRIC_PRMS item_prms;
37  m_DielectricPrmsList.emplace_back( item_prms );
39  m_Type = aType;
41  SetEnabled( true );
42 
43  // Initialize parameters to a usual value for allowed types:
44  switch( m_Type )
45  {
49  break;
50 
52  m_TypeName = KEY_CORE; // or prepreg
53  SetMaterial( wxT( "FR4" ) ); // or other dielectric name
54  SetLossTangent( 0.02 ); // for FR4
55  SetEpsilonR( 4.5 ); // for FR4
56  break;
57 
59  m_TypeName = wxT( "solderpaste" );
60  break;
61 
63  m_TypeName = wxT( "soldermask" );
65  SetMaterial( NotSpecifiedPrm() ); // or other solder mask material name
68  break;
69 
71  m_TypeName = wxT( "silkscreen" );
73  SetMaterial( NotSpecifiedPrm() ); // or other silkscreen material name
75  break;
76 
78  break;
79  }
80 }
81 
82 
84 {
85  m_LayerId = aOther.m_LayerId;
87  m_Type = aOther.m_Type;
88  m_enabled = aOther.m_enabled;
90  m_TypeName = aOther.m_TypeName;
91  m_LayerName = aOther.m_LayerName;
92  m_Color = aOther.GetColor();
93 }
94 
95 
96 void BOARD_STACKUP_ITEM::AddDielectricPrms( int aDielectricPrmsIdx )
97 {
98  // add a DIELECTRIC_PRMS item to m_DielectricPrmsList
99  DIELECTRIC_PRMS new_prms;
100 
101  m_DielectricPrmsList.emplace( m_DielectricPrmsList.begin() + aDielectricPrmsIdx,
102  new_prms );
103 }
104 
105 
106 void BOARD_STACKUP_ITEM::RemoveDielectricPrms( int aDielectricPrmsIdx )
107 {
108  // Remove a DIELECTRIC_PRMS item from m_DielectricPrmsList if possible
109 
110  if( GetSublayersCount() < 2 || aDielectricPrmsIdx < 0
111  || aDielectricPrmsIdx >= GetSublayersCount() )
112  return;
113 
114  m_DielectricPrmsList.erase( m_DielectricPrmsList.begin() + aDielectricPrmsIdx );
115 }
116 
117 
118 
120 {
121  // A reasonable thickness for copper layers:
122  return Millimeter2iu( 0.035 );
123 }
124 
125 
127 {
128  // A reasonable thickness for solder mask:
129  return Millimeter2iu( 0.01 );
130 }
131 
132 
133 // Getters:
134 int BOARD_STACKUP_ITEM::GetThickness( int aDielectricSubLayer ) const
135 {
136  wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
137 
138  return m_DielectricPrmsList[aDielectricSubLayer].m_Thickness;
139 }
140 
141 
142 double BOARD_STACKUP_ITEM::GetLossTangent( int aDielectricSubLayer ) const
143 {
144  wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
145 
146  return m_DielectricPrmsList[aDielectricSubLayer].m_LossTangent;
147 }
148 
149 
150 double BOARD_STACKUP_ITEM::GetEpsilonR( int aDielectricSubLayer ) const
151 {
152  wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
153 
154  return m_DielectricPrmsList[aDielectricSubLayer].m_EpsilonR;
155 }
156 
157 
158 bool BOARD_STACKUP_ITEM::IsThicknessLocked( int aDielectricSubLayer ) const
159 {
160  wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
161 
162  return m_DielectricPrmsList[aDielectricSubLayer].m_ThicknessLocked;
163 }
164 
165 
166 wxString BOARD_STACKUP_ITEM::GetMaterial( int aDielectricSubLayer ) const
167 {
168  wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
169 
170  return m_DielectricPrmsList[aDielectricSubLayer].m_Material;
171 }
172 
173 
174 // Setters:
175 void BOARD_STACKUP_ITEM::SetThickness( int aThickness, int aDielectricSubLayer )
176 {
177  wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
178 
179  if( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() )
180  m_DielectricPrmsList[aDielectricSubLayer].m_Thickness = aThickness;
181 }
182 
183 
184 void BOARD_STACKUP_ITEM::SetLossTangent( double aTg, int aDielectricSubLayer )
185 {
186  wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
187 
188  if( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() )
189  m_DielectricPrmsList[aDielectricSubLayer].m_LossTangent = aTg;
190 }
191 
192 
193 void BOARD_STACKUP_ITEM::SetEpsilonR( double aEpsilon, int aDielectricSubLayer )
194 {
195  wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
196 
197  if( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() )
198  m_DielectricPrmsList[aDielectricSubLayer].m_EpsilonR = aEpsilon;
199 }
200 
201 
202 void BOARD_STACKUP_ITEM::SetThicknessLocked( bool aLocked, int aDielectricSubLayer )
203 {
204  wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
205 
206  if( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() )
207  m_DielectricPrmsList[aDielectricSubLayer].m_ThicknessLocked = aLocked;
208 }
209 
210 
211 void BOARD_STACKUP_ITEM::SetMaterial( const wxString& aName, int aDielectricSubLayer )
212 {
213  wxASSERT( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() );
214 
215  if( aDielectricSubLayer >= 0 && aDielectricSubLayer < GetSublayersCount() )
216  m_DielectricPrmsList[aDielectricSubLayer].m_Material = aName;
217 }
218 
219 
221 {
224  //|| m_Type == BS_ITEM_TYPE_SILKSCREEN
225  ;
226 };
227 
228 
230 {
233 };
234 
235 
236 bool BOARD_STACKUP_ITEM::HasMaterialValue( int aDielectricSubLayer ) const
237 {
238  // return true if the material is specified
239  return IsMaterialEditable() && IsPrmSpecified( GetMaterial( aDielectricSubLayer ) );
240 }
241 
242 
244 {
245  // The material is editable only for dielectric
246  return m_Type == BS_ITEM_TYPE_DIELECTRIC ||
249 }
250 
251 
253 {
255 }
256 
257 
259 {
260  switch( m_Type )
261  {
262  case BS_ITEM_TYPE_COPPER:
263  return true;
264 
266  return true;
267 
269  return true;
270 
272  return false;
273 
275  return false;
276 
277  default:
278  break;
279  }
280 
281  return false;
282 }
283 
284 
285 wxString BOARD_STACKUP_ITEM::FormatEpsilonR( int aDielectricSubLayer ) const
286 {
287  // return a wxString to print/display Epsilon R
288  // note: we do not want scientific notation
289  wxString txt = Double2Str( GetEpsilonR( aDielectricSubLayer ) );
290  return txt;
291 }
292 
293 
294 wxString BOARD_STACKUP_ITEM::FormatLossTangent( int aDielectricSubLayer ) const
295 {
296  // return a wxString to print/display Loss Tangent
297  // note: we do not want scientific notation
298  wxString txt = Double2Str( GetLossTangent( aDielectricSubLayer ) );
299  return txt;
300 }
301 
302 
304 {
305  // return a wxString to print/display a dielectric name
306  wxString lname;
307  lname.Printf( _( "Dielectric %d" ), GetDielectricLayerId() );
308 
309  return lname;
310 }
311 
312 
314 {
315  m_HasDielectricConstrains = false; // True if some dielectric layers have constrains
316  // (Loss tg and Epison R)
317  m_HasThicknessConstrains = false; // True if some dielectric or copper layers have constrains
319  m_CastellatedPads = false; // True if some castellated pads exist
320  m_EdgePlating = false; // True if edge board is plated
321  m_FinishType = wxT( "None" ); // undefined finish type
322 }
323 
324 
326 {
331  m_EdgePlating = aOther.m_EdgePlating;
332  m_FinishType = aOther.m_FinishType;
333 
334  // All items in aOther.m_list have to be duplicated, because aOther.m_list
335  // manage pointers to these items
336  for( auto item : aOther.m_list )
337  {
338  BOARD_STACKUP_ITEM* dup_item = new BOARD_STACKUP_ITEM( *item );
339  Add( dup_item );
340  }
341 }
342 
343 
345 {
350  m_EdgePlating = aOther.m_EdgePlating;
351  m_FinishType = aOther.m_FinishType;
352 
353  RemoveAll();
354 
355  // All items in aOther.m_list have to be duplicated, because aOther.m_list
356  // manage pointers to these items
357  for( auto item : aOther.m_list )
358  {
359  BOARD_STACKUP_ITEM* dup_item = new BOARD_STACKUP_ITEM( *item );
360  Add( dup_item );
361  }
362 
363  return *this;
364 }
365 
366 
368 {
369  for( auto item : m_list )
370  delete item;
371 
372  m_list.clear();
373 }
374 
375 
377 {
378  if( aIndex < 0 || aIndex >= GetCount() )
379  return nullptr;
380 
381  return GetList()[aIndex];
382 }
383 
384 
386 {
387  // return the board thickness from the thickness of BOARD_STACKUP_ITEM list
388  int thickness = 0;
389 
390  for( auto item : m_list )
391  {
392  if( item->IsThicknessEditable() && item->IsEnabled() )
393  {
394  thickness += item->GetThickness();
395 
396  // dielectric layers can have more than one main layer
397  // add thickness of all sublayers
398  for( int idx = 1; idx < item->GetSublayersCount(); idx++ )
399  {
400  thickness += item->GetThickness( idx );
401  }
402  }
403  }
404 
405  return thickness;
406 }
407 
408 
410 {
411  bool change = false;
412  // Build the suitable stackup:
413  BOARD_STACKUP stackup;
414  stackup.BuildDefaultStackupList( aSettings );
415 
416  // First, find removed layers:
417  for( BOARD_STACKUP_ITEM* curr_item: m_list )
418  {
419  bool found = false;
420 
421  for( BOARD_STACKUP_ITEM* item: stackup.GetList() )
422  {
423  if( curr_item->GetBrdLayerId() != UNDEFINED_LAYER )
424  {
425  if( item->GetBrdLayerId() == curr_item->GetBrdLayerId() )
426  {
427  found = true;
428  break;
429  }
430  }
431  else // curr_item = dielectric layer
432  {
433  if( item->GetBrdLayerId() != UNDEFINED_LAYER )
434  continue;
435 
436  if( item->GetDielectricLayerId() == curr_item->GetDielectricLayerId() )
437  {
438  found = true;
439  break;
440  }
441  }
442  }
443 
444  if( !found ) // a layer was removed: a change is found
445  {
446  change = true;
447  break;
448  }
449  }
450 
451  // Now initialize all stackup items to the initial values, when exist
452  for( BOARD_STACKUP_ITEM* item : stackup.GetList() )
453  {
454  bool found = false;
455  // Search for initial settings:
456  for( const BOARD_STACKUP_ITEM* initial_item : m_list )
457  {
458  if( item->GetBrdLayerId() != UNDEFINED_LAYER )
459  {
460  if( item->GetBrdLayerId() == initial_item->GetBrdLayerId() )
461  {
462  *item = *initial_item;
463  found = true;
464  break;
465  }
466  }
467  else // dielectric layer: see m_DielectricLayerId for identification
468  {
469  // Compare dielectric layer with dielectric layer
470  if( initial_item->GetBrdLayerId() != UNDEFINED_LAYER )
471  continue;
472 
473  if( item->GetDielectricLayerId() == initial_item->GetDielectricLayerId() )
474  {
475  *item = *initial_item;
476  found = true;
477  break;
478  }
479  }
480  }
481 
482  if( !found )
483  {
484  change = true;
485  }
486  }
487 
488  // Transfert layer settings:
489  *this = stackup;
490 
491  // Transfer other stackup settings from aSettings
492  const BOARD_STACKUP& source_stackup = aSettings->GetStackupDescriptor();
495  m_CastellatedPads = source_stackup.m_CastellatedPads;
496  m_EdgePlating = source_stackup.m_EdgePlating;
497  m_FinishType = source_stackup.m_FinishType;
498 
499  return change;
500 }
501 
502 
504  int aActiveCopperLayersCount )
505 {
506  // Creates a default stackup, according to the current BOARD_DESIGN_SETTINGS settings.
507  // Note: the m_TypeName string is made translatable using _HKI marker, but is not
508  // translated when building the stackup.
509  // It will be used as this in files, and can be translated only in dialog
510  // if aSettings == NULL, build a full stackup (with 32 copper layers)
511  LSET enabledLayer = aSettings ? aSettings->GetEnabledLayers() : StackupAllowedBrdLayers();
512  int copperLayerCount = aSettings ? aSettings->GetCopperLayerCount() : B_Cu+1;
513 
514  // We need to calculate a suitable dielectric layer thickness.
515  // If no settings, and if aActiveCopperLayersCount is given, use it
516  // (If no settings, and no aActiveCopperLayersCount, the full 32 layers are used)
517  int activeCuLayerCount = copperLayerCount;
518 
519  if( aSettings == nullptr && aActiveCopperLayersCount > 0 )
520  activeCuLayerCount = aActiveCopperLayersCount;
521 
522  int brd__thickness = aSettings ? aSettings->GetBoardThickness() : Millimeter2iu( 1.6 );
523  int diel_thickness = brd__thickness -
524  ( BOARD_STACKUP_ITEM::GetCopperDefaultThickness() * activeCuLayerCount );
525 
526  // Take in account the solder mask thickness:
527  int sm_count = ( enabledLayer & LSET( 2, F_Mask, B_Mask) ).count();
528  diel_thickness -= BOARD_STACKUP_ITEM::GetMaskDefaultThickness() * sm_count;
529  diel_thickness /= std::max( 1, activeCuLayerCount - 1 );
530 
531  int dielectric_idx = 0;
532 
533  // Add silk screen, solder mask and solder paste layers on top
534  if( enabledLayer[F_SilkS] )
535  {
537  item->SetBrdLayerId( F_SilkS );
538  item->SetTypeName( _HKI( "Top Silk Screen" ) );
539  Add( item );
540  }
541 
542  if( enabledLayer[F_Paste] )
543  {
545  item->SetBrdLayerId( F_Paste );
546  item->SetTypeName( _HKI( "Top Solder Paste" ) );
547  Add( item );
548  }
549 
550  if( enabledLayer[F_Mask] )
551  {
553  item->SetBrdLayerId( F_Mask );
554  item->SetTypeName( _HKI( "Top Solder Mask" ) );
555  Add( item );
556  }
557 
558  // Add copper and dielectric layers
559  for( int ii = 0; ii < copperLayerCount; ii++ )
560  {
562  item->SetBrdLayerId( ( PCB_LAYER_ID )ii );
563  item->SetTypeName( KEY_COPPER );
564  Add( item );
565 
566  if( ii == copperLayerCount-1 )
567  {
568  item->SetBrdLayerId( B_Cu );
569  break;
570  }
571 
572  // Add the dielectric layer:
574  item->SetThickness( diel_thickness );
575  item->SetDielectricLayerId( dielectric_idx + 1 );
576 
577  // Display a dielectric default layer name:
578  if( (dielectric_idx & 1) == 0 )
579  {
580  item->SetTypeName( KEY_CORE );
581  item->SetMaterial( wxT( "FR4" ) );
582  }
583  else
584  {
585  item->SetTypeName( KEY_PREPREG );
586  item->SetMaterial( wxT( "FR4" ) );
587  }
588 
589  Add( item );
590  dielectric_idx++;
591  }
592 
593  // Add silk screen, solder mask and solder paste layers on bottom
594  if( enabledLayer[B_Mask] )
595  {
597  item->SetBrdLayerId( B_Mask );
598  item->SetTypeName( _HKI( "Bottom Solder Mask" ) );
599  Add( item );
600  }
601 
602  if( enabledLayer[B_Paste] )
603  {
605  item->SetBrdLayerId( B_Paste );
606  item->SetTypeName( _HKI( "Bottom Solder Paste" ) );
607  Add( item );
608  }
609 
610  if( enabledLayer[B_SilkS] )
611  {
613  item->SetBrdLayerId( B_SilkS );
614  item->SetTypeName( _HKI( "Bottom Silk Screen" ) );
615  Add( item );
616  }
617 
618  // Transfer other stackup settings from aSettings
619  if( aSettings )
620  {
621  const BOARD_STACKUP& source_stackup = aSettings->GetStackupDescriptor();
623  m_CastellatedPads = source_stackup.m_CastellatedPads;
624  m_EdgePlating = source_stackup.m_EdgePlating;
625  m_FinishType = source_stackup.m_FinishType;
626  }
627 }
628 
629 
631  const BOARD* aBoard, int aNestLevel ) const
632 {
633  // Board stackup is the ordered list from top to bottom of
634  // physical layers and substrate used to build the board.
635  if( m_list.empty() )
636  return;
637 
638  aFormatter->Print( aNestLevel, "(stackup\n" );
639  int nest_level = aNestLevel+1;
640 
641  // Note:
642  // Unspecified parameters are not stored in file.
643  for( BOARD_STACKUP_ITEM* item: m_list )
644  {
645  wxString layer_name;
646 
647  if( item->GetBrdLayerId() == UNDEFINED_LAYER )
648  layer_name.Printf( wxT( "dielectric %d" ), item->GetDielectricLayerId() );
649  else
650  layer_name = LSET::Name( item->GetBrdLayerId() );
651 
652  aFormatter->Print( nest_level, "(layer %s (type %s)",
653  aFormatter->Quotew( layer_name ).c_str(),
654  aFormatter->Quotew( item->GetTypeName() ).c_str() );
655 
656  if( item->IsColorEditable() && IsPrmSpecified( item->GetColor() ) )
657  aFormatter->Print( 0, " (color %s)",
658  aFormatter->Quotew( item->GetColor() ).c_str() );
659 
660  for( int idx = 0; idx < item->GetSublayersCount(); idx++ )
661  {
662  if( idx ) // not for the main (first) layer.
663  {
664  aFormatter->Print( 0, "\n" );
665  aFormatter->Print( nest_level+1, "addsublayer" );
666  }
667 
668  if( item->IsThicknessEditable() )
669  {
670  if( item->GetType() == BS_ITEM_TYPE_DIELECTRIC && item->IsThicknessLocked( idx ) )
671  aFormatter->Print( 0, " (thickness %s locked)",
672  FormatInternalUnits( item->GetThickness( idx ) ).c_str() );
673  else
674  aFormatter->Print( 0, " (thickness %s)",
675  FormatInternalUnits( item->GetThickness( idx ) ).c_str() );
676  }
677 
678  if( item->HasMaterialValue( idx ) )
679  aFormatter->Print( 0, " (material %s)",
680  aFormatter->Quotew( item->GetMaterial( idx ) ).c_str() );
681 
682  if( item->HasEpsilonRValue() && item->HasMaterialValue( idx ) )
683  aFormatter->Print( 0, " (epsilon_r %g)", item->GetEpsilonR( idx ) );
684 
685  if( item->HasLossTangentValue() && item->HasMaterialValue( idx ) )
686  aFormatter->Print( 0, " (loss_tangent %s)",
687  Double2Str(item->GetLossTangent( idx ) ).c_str() );
688  }
689 
690  aFormatter->Print( 0, ")\n" );
691  }
692 
693  // Other infos about board, related to layers and other fabrication specifications
695  aFormatter->Print( nest_level, "(copper_finish %s)\n",
696  aFormatter->Quotew( m_FinishType ).c_str() );
697 
698  aFormatter->Print( nest_level, "(dielectric_constraints %s)\n",
699  m_HasDielectricConstrains ? "yes" : "no" );
700 
702  aFormatter->Print( nest_level, "(edge_connector %s)\n",
703  m_EdgeConnectorConstraints > 1 ? "bevelled": "yes" );
704 
705  if( m_CastellatedPads )
706  aFormatter->Print( nest_level, "(castellated_pads yes)\n" );
707 
708  if( m_EdgePlating )
709  aFormatter->Print( nest_level, "(edge_plating yes)\n" );
710 
711  aFormatter->Print( aNestLevel, ")\n" );
712 }
713 
714 
715 int BOARD_STACKUP::GetLayerDistance( PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer ) const
716 {
717  wxASSERT( IsCopperLayer( aFirstLayer ) && IsCopperLayer( aSecondLayer ) );
718 
719  if( aFirstLayer == aSecondLayer )
720  return 0;
721 
722  if( aSecondLayer < aFirstLayer )
723  std::swap( aFirstLayer, aSecondLayer );
724 
725  int total = 0;
726  bool start = false;
727  bool half = false;
728 
729  for( BOARD_STACKUP_ITEM* item : m_list )
730  {
731  // Will be UNDEFINED_LAYER for dielectrics
732  PCB_LAYER_ID layer = item->GetBrdLayerId();
733 
734  if( layer != UNDEFINED_LAYER && !IsCopperLayer( layer ) )
735  continue; // Silk/mask layer
736 
737  // Reached the start copper layer? Start counting the next dielectric after it
738  if( !start && ( layer != UNDEFINED_LAYER && layer >= aFirstLayer ) )
739  {
740  start = true;
741  half = true;
742  }
743  else if( !start )
744  continue;
745 
746  // Reached the stop copper layer? we're done
747  if( start && ( layer != UNDEFINED_LAYER && layer >= aSecondLayer ) )
748  half = true;
749 
750  for( int sublayer = 0; sublayer < item->GetSublayersCount(); sublayer++ )
751  {
752  int subThickness = item->GetThickness( sublayer );
753  total += half ? ( subThickness / 2 ) : subThickness;
754  }
755 
756  half = false;
757 
758  if( layer != UNDEFINED_LAYER && layer >= aSecondLayer )
759  break;
760  }
761 
762  return total;
763 }
764 
765 
766 bool IsPrmSpecified( const wxString& aPrmValue )
767 {
768  // return true if the param value is specified:
769 
770  if( !aPrmValue.IsEmpty()
771  && ( aPrmValue.CmpNoCase( NotSpecifiedPrm() ) != 0 )
772  && aPrmValue != wxGetTranslation( NotSpecifiedPrm() ) )
773  return true;
774 
775  return false;
776 }
#define DEFAULT_EPSILON_R_SOLDERMASK
bool HasEpsilonRValue() const
void SetBrdLayerId(PCB_LAYER_ID aBrdLayerId)
void SetTypeName(const wxString &aName)
BOARD_STACKUP_ITEM * GetStackupLayer(int aIndex)
BOARD_STACKUP_ITEM_TYPE
Definition: board_stackup.h:40
bool HasMaterialValue(int aDielectricSubLayer=0) const
Manage layers needed to make a physical board.
Implementation of conversion functions that require both schematic and board internal units.
int GetSublayersCount() const
wxString m_FinishType
The name of external copper finish.
bool m_EdgePlating
True if the edge board is plated.
bool IsThicknessLocked(int aDielectricSubLayer=0) const
int GetLayerDistance(PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer) const
Calculate the distance (height) between the two given copper layers.
BS_EDGE_CONNECTOR_CONSTRAINTS m_EdgeConnectorConstraints
If the board has edge connector cards, some constrains can be specified in job file: BS_EDGE_CONNECTO...
bool m_CastellatedPads
True if castellated pads exist.
#define KEY_COPPER
wxString GetColor() const
An interface used to output 8 bit text in a convenient way.
Definition: richio.h:309
wxString m_TypeName
name of layer as shown in layer manager. Useful to create reports
BOARD_STACKUP & operator=(const BOARD_STACKUP &aOther)
double GetLossTangent(int aDielectricSubLayer=0) const
static int GetCopperDefaultThickness()
bool SynchronizeWithBoard(BOARD_DESIGN_SETTINGS *aSettings)
Synchronize the BOARD_STACKUP_ITEM* list with the board.
int BuildBoardThicknessFromStackup() const
std::vector< DIELECTRIC_PRMS > m_DielectricPrmsList
the "layer" id for dielectric layers, from 1 (top) to 31 (bottom) (only 31 dielectric layers for 32 c...
bool m_HasDielectricConstrains
True if some layers have impedance controlled tracks or have specific constrains for micro-wave appli...
BOARD_STACKUP & GetStackupDescriptor()
bool IsThicknessEditable() const
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:516
static LSET StackupAllowedBrdLayers()
static const wxChar * Name(PCB_LAYER_ID aLayerId)
Return the fixed name association with aLayerId.
Definition: lset.cpp:82
wxString NotSpecifiedPrm()
int GetThickness(int aDielectricSubLayer=0) const
bool IsColorEditable() const
void SetDielectricLayerId(int aLayerId)
bool HasLossTangentValue() const
A helper class to manage a dielectric layer set of parameters.
Definition: board_stackup.h:64
double GetEpsilonR(int aDielectricSubLayer=0) const
PCB_LAYER_ID m_LayerId
mainly for silkscreen and solder mask
wxString FormatEpsilonR(int aDielectricSubLayer=0) const
bool IsMaterialEditable() const
#define _(s)
wxString FormatLossTangent(int aDielectricSubLayer=0) const
void SetMaterial(const wxString &aName, int aDielectricSubLayer=0)
std::vector< BOARD_STACKUP_ITEM * > m_list
int GetCount() const
#define KEY_PREPREG
bool m_HasThicknessConstrains
True if some layers (copper and/or dielectric) have specific thickness.
Manage one layer needed to make a physical board.
Definition: board_stackup.h:89
void SetEpsilonR(double aEpsilon, int aDielectricSubLayer=0)
const std::vector< BOARD_STACKUP_ITEM * > & GetList() const
void FormatBoardStackup(OUTPUTFORMATTER *aFormatter, const BOARD *aBoard, int aNestLevel) const
Write the stackup info on board file.
bool IsCopperLayer(LAYER_NUM aLayerId)
Tests whether a layer is a copper layer.
Definition: layer_ids.h:808
void AddDielectricPrms(int aDielectricPrmsIdx)
Add (insert) a DIELECTRIC_PRMS item to m_DielectricPrmsList all values are set to default.
void SetThickness(int aThickness, int aDielectricSubLayer=0)
Some functions to handle hotkeys in KiCad.
static int GetMaskDefaultThickness()
#define DEFAULT_EPSILON_R_SILKSCREEN
void SetThicknessLocked(bool aLocked, int aDielectricSubLayer=0)
wxString m_Color
type name of layer (copper, silk screen, core, prepreg ...)
void RemoveAll()
Delete all items in list and clear the list.
BOARD_STACKUP_ITEM(BOARD_STACKUP_ITEM_TYPE aType)
bool IsPrmSpecified(const wxString &aPrmValue)
int GetDielectricLayerId() const
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:191
LSET GetEnabledLayers() const
Return a bit-mask of all the layers that are enabled.
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:65
std::string Double2Str(double aValue)
Print a float number without using scientific notation and no trailing 0 We want to avoid scientific ...
int PRINTF_FUNC Print(int nestLevel, const char *fmt,...)
Format and write text to the output stream.
Definition: richio.cpp:426
#define KEY_CORE
void Add(BOARD_STACKUP_ITEM *aItem)
Add a new item in stackup layer.
void BuildDefaultStackupList(const BOARD_DESIGN_SETTINGS *aSettings, int aActiveCopperLayersCount=0)
Create a default stackup, according to the current BOARD_DESIGN_SETTINGS settings.
BOARD_STACKUP_ITEM_TYPE m_Type
static constexpr int Millimeter2iu(double mm)
#define _HKI(x)
void SetLossTangent(double aTg, int aDielectricSubLayer=0)
wxString GetMaterial(int aDielectricSubLayer=0) const
int m_DielectricLayerId
the layer id (F.Cu to B.Cu, F.Silk, B.silk, F.Mask, B.Mask) and UNDEFINED_LAYER (-1) for dielectric l...
std::string FormatInternalUnits(int aValue)
Function FormatInternalUnits converts aValue from internal units to a string appropriate for writing ...
Definition: base_units.cpp:485
wxString FormatDielectricLayerName() const
std::string Quotew(const wxString &aWrapee) const
Definition: richio.cpp:494
Container for design settings for a BOARD object.
void SetEnabled(bool aEnable)
void RemoveDielectricPrms(int aDielectricPrmsIdx)
Remove a DIELECTRIC_PRMS item from m_DielectricPrmsList.