KiCad PCB EDA Suite
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pns_kicad_iface.h
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1/*
2 * KiRouter - a push-and-(sometimes-)shove PCB router
3 *
4 * Copyright (C) 2013-2016 CERN
5 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
6 * Author: Tomasz Wlostowski <[email protected]>
7 *
8 * This program is free software: you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation, either version 3 of the License, or (at your
11 * option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#ifndef __PNS_KICAD_IFACE_H
23#define __PNS_KICAD_IFACE_H
24
25#include <unordered_set>
26#include <unordered_map>
27#include <vector>
28
29#include "pns_router.h"
30
33
34class BOARD;
35class BOARD_COMMIT;
36class PCB_TEXT;
38class PCB_TOOL_BASE;
39class FOOTPRINT;
40class PAD;
41class EDA_TEXT;
43class BOARD_ITEM;
44class EDA_GROUP;
45
46namespace PNS
47{
48 class SIZES_SETTINGS;
49}
50
51namespace KIGFX
52{
53 class VIEW;
54}
55
57{
58public:
60 ~PNS_KICAD_IFACE_BASE() override;
61
62 void EraseView() override {};
63 void SetBoard( BOARD* aBoard );
64 void SyncWorld( PNS::NODE* aWorld ) override;
65 bool IsAnyLayerVisible( const PNS_LAYER_RANGE& aLayer ) const override { return true; };
66 bool IsFlashedOnLayer( const PNS::ITEM* aItem, int aLayer ) const override;
67 bool IsFlashedOnLayer( const PNS::ITEM* aItem, const PNS_LAYER_RANGE& aLayer ) const override;
68 bool IsItemVisible( const PNS::ITEM* aItem ) const override { return true; };
69 bool IsPNSCopperLayer( int aPNSLayer ) const override;
70 bool IsKicadCopperLayer( PCB_LAYER_ID aPcbnewLayer ) const;
71 void HideItem( PNS::ITEM* aItem ) override {}
72 void DisplayItem( const PNS::ITEM* aItem, int aClearance, bool aEdit = false,
73 int aFlags = 0 ) override {}
74 void DisplayPathLine( const SHAPE_LINE_CHAIN& aLine, int aImportance ) override {}
75 void DisplayRatline( const SHAPE_LINE_CHAIN& aRatline, PNS::NET_HANDLE aNet ) override {}
76 void AddItem( PNS::ITEM* aItem ) override;
77 void UpdateItem( PNS::ITEM* aItem ) override;
78 void RemoveItem( PNS::ITEM* aItem ) override;
79 void Commit() override {}
80 bool ImportSizes( PNS::SIZES_SETTINGS& aSizes, PNS::ITEM* aStartItem, PNS::NET_HANDLE aNet,
81 VECTOR2D aStartPosition ) override;
82 int StackupHeight( int aFirstLayer, int aSecondLayer ) const override;
83
84 int GetNetCode( PNS::NET_HANDLE aNet ) const override { return -1; }
85 wxString GetNetName( PNS::NET_HANDLE aNet ) const override { return wxEmptyString; }
86 void UpdateNet( PNS::NET_HANDLE aNet ) override {}
88
90
91 long long int CalculateRoutedPathLength( const PNS::ITEM_SET& aLine, const PNS::SOLID* aStartPad,
92 const PNS::SOLID* aEndPad, const NETCLASS* aNetClass ) override;
93 int64_t CalculateRoutedPathDelay( const PNS::ITEM_SET& aLine, const PNS::SOLID* aStartPad,
94 const PNS::SOLID* aEndPad, const NETCLASS* aNetClass ) override;
95 int64_t CalculateLengthForDelay( int64_t aDesiredDelay, int aWidth, bool aIsDiffPairCoupled,
96 int aDiffPairCouplingGap, int aPNSLayer, const NETCLASS* aNetClass ) override;
97 int64_t CalculateDelayForShapeLineChain( const SHAPE_LINE_CHAIN& aShape, int aWidth, bool aIsDiffPairCoupled,
98 int aDiffPairCouplingGap, int aPNSLayer,
99 const NETCLASS* aNetClass ) override;
100
101 PCB_LAYER_ID GetBoardLayerFromPNSLayer( int aLayer ) const override;
102 int GetPNSLayerFromBoardLayer( PCB_LAYER_ID aLayer ) const override;
103
105 void SetStartLayerFromPNS( int aLayer ) { m_startLayer = aLayer; }
106
108
109 virtual PNS::NODE* GetWorld() const override { return m_world; };
110
111 BOARD* GetBoard() const { return m_board; }
112
113 virtual EDA_UNITS GetUnits() const { return EDA_UNITS::MM; };
114
117
118protected:
121
122 std::vector<std::unique_ptr<PNS::SOLID>> syncPad( PAD* aPad );
123 std::unique_ptr<PNS::SEGMENT> syncTrack( PCB_TRACK* aTrack );
124 std::unique_ptr<PNS::ARC> syncArc( PCB_ARC* aArc );
125 std::unique_ptr<PNS::VIA> syncVia( PCB_VIA* aVia );
126 bool syncTextItem( PNS::NODE* aWorld, BOARD_ITEM* aItem, PCB_LAYER_ID aLayer );
127 bool syncGraphicalItem( PNS::NODE* aWorld, PCB_SHAPE* aItem );
128 bool syncZone( PNS::NODE* aWorld, ZONE* aZone, SHAPE_POLY_SET* aBoardOutline );
129 bool inheritTrackWidth( PNS::ITEM* aItem, int* aInheritedWidth );
130 std::vector<LENGTH_DELAY_CALCULATION_ITEM> getLengthDelayCalculationItems( const PNS::ITEM_SET& aLine,
131 const NETCLASS* aNetClass ) const;
132
133protected:
136 int m_startLayer; // The starting layer, in PNS layer coordinates
137};
138
140{
141public:
143 ~PNS_KICAD_IFACE() override;
144
145 virtual void SetHostTool( PCB_TOOL_BASE* aTool );
146
147 void SetView( KIGFX::VIEW* aView );
148 void EraseView() override;
149 bool IsAnyLayerVisible( const PNS_LAYER_RANGE& aLayer ) const override;
150 bool IsItemVisible( const PNS::ITEM* aItem ) const override;
151 void HideItem( PNS::ITEM* aItem ) override;
152 void DisplayItem( const PNS::ITEM* aItem, int aClearance, bool aEdit = false,
153 int aFlags = 0 ) override;
154 void DisplayPathLine( const SHAPE_LINE_CHAIN& aLine, int aImportance ) override;
155 void DisplayRatline( const SHAPE_LINE_CHAIN& aRatline, PNS::NET_HANDLE aNet ) override;
156 void Commit() override;
157 void AddItem( PNS::ITEM* aItem ) override;
158 void UpdateItem( PNS::ITEM* aItem ) override;
159 void RemoveItem( PNS::ITEM* aItem ) override;
160
161 int GetNetCode( PNS::NET_HANDLE aNet ) const override;
162 wxString GetNetName( PNS::NET_HANDLE aNet ) const override;
163 void UpdateNet( PNS::NET_HANDLE aNet ) override;
164
165 EDA_UNITS GetUnits() const override;
166
167 void SetCommitFlags( int aCommitFlags ) { m_commitFlags = aCommitFlags; }
168
169protected:
171 void modifyBoardItem( PNS::ITEM* aItem );
172
173 struct OFFSET
174 {
176 };
177
178 std::map<PAD*, OFFSET> m_fpOffsets;
181 std::unordered_set<BOARD_ITEM*> m_hiddenItems;
182
183 std::unordered_map<BOARD_ITEM*, EDA_GROUP*> m_itemGroups;
184 std::unordered_map<BOARD_ITEM*, std::vector<BOARD_ITEM*>> m_replacementMap;
185
187 std::unique_ptr<BOARD_COMMIT> m_commit;
189};
190
191
192#endif
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition board_item.h:79
Information pertinent to a Pcbnew printed circuit board.
Definition board.h:317
A set of EDA_ITEMs (i.e., without duplicates).
Definition eda_group.h:46
A mix-in class (via multiple inheritance) that handles texts such as labels, parts,...
Definition eda_text.h:79
Extend VIEW_ITEM by possibility of grouping items into a single object.
Definition view_group.h:43
Hold a (potentially large) number of VIEW_ITEMs and renders them on a graphics device provided by the...
Definition view.h:66
Lightweight class which holds a pad, via, or a routed trace outline.
A collection of nets and the parameters used to route or test these nets.
Definition netclass.h:45
Definition pad.h:54
Base class for PNS router board items.
Definition pns_item.h:98
Keep the router "world" - i.e.
Definition pns_node.h:232
void DisplayItem(const PNS::ITEM *aItem, int aClearance, bool aEdit=false, int aFlags=0) override
bool syncGraphicalItem(PNS::NODE *aWorld, PCB_SHAPE *aItem)
void DisplayRatline(const SHAPE_LINE_CHAIN &aRatline, PNS::NET_HANDLE aNet) override
bool inheritTrackWidth(PNS::ITEM *aItem, int *aInheritedWidth)
void AddItem(PNS::ITEM *aItem) override
wxString GetNetName(PNS::NET_HANDLE aNet) const override
virtual EDA_UNITS GetUnits() const
PNS::DEBUG_DECORATOR * m_debugDecorator
void SetDebugDecorator(PNS::DEBUG_DECORATOR *aDec)
bool syncZone(PNS::NODE *aWorld, ZONE *aZone, SHAPE_POLY_SET *aBoardOutline)
void SetBoard(BOARD *aBoard)
long long int CalculateRoutedPathLength(const PNS::ITEM_SET &aLine, const PNS::SOLID *aStartPad, const PNS::SOLID *aEndPad, const NETCLASS *aNetClass) override
virtual PNS::NODE * GetWorld() const override
int64_t CalculateRoutedPathDelay(const PNS::ITEM_SET &aLine, const PNS::SOLID *aStartPad, const PNS::SOLID *aEndPad, const NETCLASS *aNetClass) override
std::unique_ptr< PNS::ARC > syncArc(PCB_ARC *aArc)
void RemoveItem(PNS::ITEM *aItem) override
bool IsPNSCopperLayer(int aPNSLayer) const override
int64_t CalculateLengthForDelay(int64_t aDesiredDelay, int aWidth, bool aIsDiffPairCoupled, int aDiffPairCouplingGap, int aPNSLayer, const NETCLASS *aNetClass) override
void DisplayPathLine(const SHAPE_LINE_CHAIN &aLine, int aImportance) override
PNS::RULE_RESOLVER * GetRuleResolver() override
bool syncTextItem(PNS::NODE *aWorld, BOARD_ITEM *aItem, PCB_LAYER_ID aLayer)
std::vector< LENGTH_DELAY_CALCULATION_ITEM > getLengthDelayCalculationItems(const PNS::ITEM_SET &aLine, const NETCLASS *aNetClass) const
bool IsAnyLayerVisible(const PNS_LAYER_RANGE &aLayer) const override
bool IsKicadCopperLayer(PCB_LAYER_ID aPcbnewLayer) const
std::vector< std::unique_ptr< PNS::SOLID > > syncPad(PAD *aPad)
int GetNetCode(PNS::NET_HANDLE aNet) const override
void HideItem(PNS::ITEM *aItem) override
void SetStartLayerFromPCBNew(PCB_LAYER_ID aLayer)
void Commit() override
bool IsItemVisible(const PNS::ITEM *aItem) const override
bool IsFlashedOnLayer(const PNS::ITEM *aItem, int aLayer) const override
PCB_LAYER_ID GetBoardLayerFromPNSLayer(int aLayer) const override
BOARD * GetBoard() const
void UpdateNet(PNS::NET_HANDLE aNet) override
void SyncWorld(PNS::NODE *aWorld) override
int StackupHeight(int aFirstLayer, int aSecondLayer) const override
int64_t CalculateDelayForShapeLineChain(const SHAPE_LINE_CHAIN &aShape, int aWidth, bool aIsDiffPairCoupled, int aDiffPairCouplingGap, int aPNSLayer, const NETCLASS *aNetClass) override
PNS::DEBUG_DECORATOR * GetDebugDecorator() override
std::unique_ptr< PNS::SEGMENT > syncTrack(PCB_TRACK *aTrack)
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver
PNS::NET_HANDLE GetOrphanedNetHandle() override
std::unique_ptr< PNS::VIA > syncVia(PCB_VIA *aVia)
int GetPNSLayerFromBoardLayer(PCB_LAYER_ID aLayer) const override
void SetStartLayerFromPNS(int aLayer)
PNS_LAYER_RANGE SetLayersFromPCBNew(PCB_LAYER_ID aStartLayer, PCB_LAYER_ID aEndLayer)
void EraseView() override
void UpdateItem(PNS::ITEM *aItem) override
bool ImportSizes(PNS::SIZES_SETTINGS &aSizes, PNS::ITEM *aStartItem, PNS::NET_HANDLE aNet, VECTOR2D aStartPosition) override
void SetView(KIGFX::VIEW *aView)
void RemoveItem(PNS::ITEM *aItem) override
void AddItem(PNS::ITEM *aItem) override
void UpdateItem(PNS::ITEM *aItem) override
std::map< PAD *, OFFSET > m_fpOffsets
int GetNetCode(PNS::NET_HANDLE aNet) const override
virtual void SetHostTool(PCB_TOOL_BASE *aTool)
void DisplayItem(const PNS::ITEM *aItem, int aClearance, bool aEdit=false, int aFlags=0) override
std::unique_ptr< BOARD_COMMIT > m_commit
void EraseView() override
void HideItem(PNS::ITEM *aItem) override
void UpdateNet(PNS::NET_HANDLE aNet) override
BOARD_CONNECTED_ITEM * createBoardItem(PNS::ITEM *aItem)
KIGFX::VIEW * m_view
void DisplayPathLine(const SHAPE_LINE_CHAIN &aLine, int aImportance) override
std::unordered_map< BOARD_ITEM *, EDA_GROUP * > m_itemGroups
bool IsItemVisible(const PNS::ITEM *aItem) const override
std::unordered_set< BOARD_ITEM * > m_hiddenItems
EDA_UNITS GetUnits() const override
bool IsAnyLayerVisible(const PNS_LAYER_RANGE &aLayer) const override
PCB_TOOL_BASE * m_tool
void modifyBoardItem(PNS::ITEM *aItem)
void Commit() override
KIGFX::VIEW_GROUP * m_previewItems
void DisplayRatline(const SHAPE_LINE_CHAIN &aRatline, PNS::NET_HANDLE aNet) override
void SetCommitFlags(int aCommitFlags)
std::unordered_map< BOARD_ITEM *, std::vector< BOARD_ITEM * > > m_replacementMap
wxString GetNetName(PNS::NET_HANDLE aNet) const override
~PNS_KICAD_IFACE() override
Represent a contiguous set of PCB layers.
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
Represent a set of closed polygons.
Handle a list of polygons defining a copper zone.
Definition zone.h:74
EDA_UNITS
Definition eda_units.h:48
PCB_LAYER_ID
A quick note on layer IDs:
Definition layer_ids.h:60
The Cairo implementation of the graphics abstraction layer.
Definition eda_group.h:33
Push and Shove diff pair dimensions (gap) settings dialog.
void * NET_HANDLE
Definition pns_item.h:55
VECTOR2< int32_t > VECTOR2I
Definition vector2d.h:695
VECTOR2< double > VECTOR2D
Definition vector2d.h:694