KiCad PCB EDA Suite
PNS_PCBNEW_RULE_RESOLVER Class Reference
Inheritance diagram for PNS_PCBNEW_RULE_RESOLVER:
PNS::RULE_RESOLVER

Public Member Functions

 PNS_PCBNEW_RULE_RESOLVER (BOARD *aBoard, PNS::ROUTER_IFACE *aRouterIface)
 
virtual ~PNS_PCBNEW_RULE_RESOLVER ()
 
virtual int Clearance (const PNS::ITEM *aA, const PNS::ITEM *aB, bool aUseClearanceEpsilon=true) override
 
virtual int HoleClearance (const PNS::ITEM *aA, const PNS::ITEM *aB, bool aUseClearanceEpsilon=true) override
 
virtual int HoleToHoleClearance (const PNS::ITEM *aA, const PNS::ITEM *aB, bool aUseClearanceEpsilon=true) override
 
virtual int DpCoupledNet (int aNet) override
 
virtual int DpNetPolarity (int aNet) override
 
virtual bool DpNetPair (const PNS::ITEM *aItem, int &aNetP, int &aNetN) override
 
virtual bool IsDiffPair (const PNS::ITEM *aA, const PNS::ITEM *aB) override
 
virtual bool IsInNetTie (const PNS::ITEM *aA) override
 
virtual bool IsNetTieExclusion (const PNS::ITEM *aItem, const VECTOR2I &aCollisionPos, const PNS::ITEM *aCollidingItem) override
 
virtual bool QueryConstraint (PNS::CONSTRAINT_TYPE aType, const PNS::ITEM *aItemA, const PNS::ITEM *aItemB, int aLayer, PNS::CONSTRAINT *aConstraint) override
 
virtual wxString NetName (int aNet) override
 
int ClearanceEpsilon () const
 
void ClearCacheForItem (const PNS::ITEM *aItem) override
 
void ClearCaches () override
 

Private Member Functions

int holeRadius (const PNS::ITEM *aItem) const
 
int matchDpSuffix (const wxString &aNetName, wxString &aComplementNet)
 Checks for netnamed differential pairs. More...
 

Private Attributes

PNS::ROUTER_IFACEm_routerIface
 
BOARDm_board
 
PCB_TRACK m_dummyTracks [2]
 
PCB_ARC m_dummyArcs [2]
 
PCB_VIA m_dummyVias [2]
 
int m_clearanceEpsilon
 
std::unordered_map< CLEARANCE_CACHE_KEY, int > m_clearanceCache
 
std::unordered_map< CLEARANCE_CACHE_KEY, int > m_holeClearanceCache
 
std::unordered_map< CLEARANCE_CACHE_KEY, int > m_holeToHoleClearanceCache
 

Detailed Description

Definition at line 101 of file pns_kicad_iface.cpp.

Constructor & Destructor Documentation

◆ PNS_PCBNEW_RULE_RESOLVER()

PNS_PCBNEW_RULE_RESOLVER::PNS_PCBNEW_RULE_RESOLVER ( BOARD aBoard,
PNS::ROUTER_IFACE aRouterIface 
)

Definition at line 161 of file pns_kicad_iface.cpp.

162 :
163 m_routerIface( aRouterIface ),
164 m_board( aBoard ),
165 m_dummyTracks{ { aBoard }, { aBoard } },
166 m_dummyArcs{ { aBoard }, { aBoard } },
167 m_dummyVias{ { aBoard }, { aBoard } }
168{
169 if( aBoard )
171 else
173}
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:686
PNS::ROUTER_IFACE * m_routerIface

◆ ~PNS_PCBNEW_RULE_RESOLVER()

PNS_PCBNEW_RULE_RESOLVER::~PNS_PCBNEW_RULE_RESOLVER ( )
virtual

Definition at line 176 of file pns_kicad_iface.cpp.

177{
178}

Member Function Documentation

◆ Clearance()

int PNS_PCBNEW_RULE_RESOLVER::Clearance ( const PNS::ITEM aA,
const PNS::ITEM aB,
bool  aUseClearanceEpsilon = true 
)
overridevirtual

Implements PNS::RULE_RESOLVER.

Definition at line 405 of file pns_kicad_iface.cpp.

407{
408 CLEARANCE_CACHE_KEY key = { aA, aB, aUseClearanceEpsilon };
409 auto it = m_clearanceCache.find( key );
410
411 if( it != m_clearanceCache.end() )
412 return it->second;
413
414 PNS::CONSTRAINT constraint;
415 int rv = 0;
416 LAYER_RANGE layers;
417
418 if( !aB )
419 layers = aA->Layers();
420 else if( isEdge( aA ) )
421 layers = aB->Layers();
422 else if( isEdge( aB ) )
423 layers = aA->Layers();
424 else
425 layers = aA->Layers().Intersection( aB->Layers() );
426
427 // Normalize layer range (no -1 magic numbers)
429
430 for( int layer = layers.Start(); layer <= layers.End(); ++layer )
431 {
432 if( isCopper( aA ) && ( !aB || isCopper( aB ) ) )
433 {
434 if( QueryConstraint( PNS::CONSTRAINT_TYPE::CT_CLEARANCE, aA, aB, layer, &constraint ) )
435 {
436 if( constraint.m_Value.Min() > rv )
437 rv = constraint.m_Value.Min();
438 }
439 }
440
441 if( isEdge( aA ) || ( aB && isEdge( aB ) ) )
442 {
443 if( QueryConstraint( PNS::CONSTRAINT_TYPE::CT_EDGE_CLEARANCE, aA, aB, layer, &constraint ) )
444 {
445 if( constraint.m_Value.Min() > rv )
446 rv = constraint.m_Value.Min();
447 }
448 }
449 }
450
451 if( aUseClearanceEpsilon && rv > 0 )
452 rv = std::max( 0, rv - m_clearanceEpsilon );
453
454 m_clearanceCache[ key ] = rv;
455 return rv;
456}
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:32
int Start() const
Definition: pns_layerset.h:82
int End() const
Definition: pns_layerset.h:87
LAYER_RANGE Intersection(const LAYER_RANGE &aOther) const
Shortcut for comparisons/overlap tests.
Definition: pns_layerset.h:108
T Min() const
Definition: minoptmax.h:33
const LAYER_RANGE & Layers() const
Definition: pns_item.h:156
virtual bool QueryConstraint(PNS::CONSTRAINT_TYPE aType, const PNS::ITEM *aItemA, const PNS::ITEM *aItemB, int aLayer, PNS::CONSTRAINT *aConstraint) override
std::unordered_map< CLEARANCE_CACHE_KEY, int > m_clearanceCache
@ PCBNEW_LAYER_ID_START
Definition: layer_ids.h:63
@ PCB_LAYER_ID_COUNT
Definition: layer_ids.h:137
bool isEdge(const PNS::ITEM *aItem)
bool isCopper(const PNS::ITEM *aItem)
MINOPTMAX< int > m_Value
Definition: pns_node.h:70

References PNS::CT_CLEARANCE, PNS::CT_EDGE_CLEARANCE, LAYER_RANGE::End(), LAYER_RANGE::Intersection(), isCopper(), isEdge(), PNS::ITEM::Layers(), m_clearanceCache, m_clearanceEpsilon, PNS::CONSTRAINT::m_Value, MINOPTMAX< T >::Min(), PCB_LAYER_ID_COUNT, PCBNEW_LAYER_ID_START, QueryConstraint(), and LAYER_RANGE::Start().

◆ ClearanceEpsilon()

int PNS_PCBNEW_RULE_RESOLVER::ClearanceEpsilon ( ) const
inline

Definition at line 128 of file pns_kicad_iface.cpp.

128{ return m_clearanceEpsilon; }

References m_clearanceEpsilon.

Referenced by PNS_KICAD_IFACE_BASE::SyncWorld().

◆ ClearCacheForItem()

void PNS_PCBNEW_RULE_RESOLVER::ClearCacheForItem ( const PNS::ITEM aItem)
overridevirtual

Reimplemented from PNS::RULE_RESOLVER.

Definition at line 387 of file pns_kicad_iface.cpp.

388{
389 CLEARANCE_CACHE_KEY key = { aItem, nullptr, false };
390 m_clearanceCache.erase( key );
391
392 key.Flag = true;
393 m_clearanceCache.erase( key );
394}

References CLEARANCE_CACHE_KEY::Flag, and m_clearanceCache.

◆ ClearCaches()

void PNS_PCBNEW_RULE_RESOLVER::ClearCaches ( )
overridevirtual

Reimplemented from PNS::RULE_RESOLVER.

Definition at line 397 of file pns_kicad_iface.cpp.

398{
399 m_clearanceCache.clear();
400 m_holeClearanceCache.clear();
402}
std::unordered_map< CLEARANCE_CACHE_KEY, int > m_holeToHoleClearanceCache
std::unordered_map< CLEARANCE_CACHE_KEY, int > m_holeClearanceCache

References m_clearanceCache, m_holeClearanceCache, and m_holeToHoleClearanceCache.

◆ DpCoupledNet()

int PNS_PCBNEW_RULE_RESOLVER::DpCoupledNet ( int  aNet)
overridevirtual

Implements PNS::RULE_RESOLVER.

Definition at line 802 of file pns_kicad_iface.cpp.

803{
804 wxString refName = m_board->FindNet( aNet )->GetNetname();
805 wxString coupledNetName;
806
807 if( matchDpSuffix( refName, coupledNetName ) )
808 {
809 NETINFO_ITEM* net = m_board->FindNet( coupledNetName );
810
811 if( !net )
812 return -1;
813
814 return net->GetNetCode();
815 }
816
817 return -1;
818}
NETINFO_ITEM * FindNet(int aNetcode) const
Search for a net with the given netcode.
Definition: board.cpp:1460
Handle the data for a net.
Definition: netinfo.h:67
const wxString & GetNetname() const
Definition: netinfo.h:120
int GetNetCode() const
Definition: netinfo.h:114
int matchDpSuffix(const wxString &aNetName, wxString &aComplementNet)
Checks for netnamed differential pairs.

References BOARD::FindNet(), NETINFO_ITEM::GetNetCode(), NETINFO_ITEM::GetNetname(), m_board, and matchDpSuffix().

◆ DpNetPair()

bool PNS_PCBNEW_RULE_RESOLVER::DpNetPair ( const PNS::ITEM aItem,
int &  aNetP,
int &  aNetN 
)
overridevirtual

Implements PNS::RULE_RESOLVER.

Definition at line 836 of file pns_kicad_iface.cpp.

837{
838 if( !aItem || !aItem->Parent() || !aItem->Parent()->IsConnected() )
839 return false;
840
841 BOARD_CONNECTED_ITEM* cItem = static_cast<BOARD_CONNECTED_ITEM*>( aItem->Parent() );
842 NETINFO_ITEM* netInfo = cItem->GetNet();
843
844 if( !netInfo )
845 return false;
846
847 wxString netNameP = netInfo->GetNetname();
848 wxString netNameN, netNameCoupled;
849
850 int r = matchDpSuffix( netNameP, netNameCoupled );
851
852 if( r == 0 )
853 {
854 return false;
855 }
856 else if( r == 1 )
857 {
858 netNameN = netNameCoupled;
859 }
860 else
861 {
862 netNameN = netNameP;
863 netNameP = netNameCoupled;
864 }
865
866 NETINFO_ITEM* netInfoP = m_board->FindNet( netNameP );
867 NETINFO_ITEM* netInfoN = m_board->FindNet( netNameN );
868
869 if( !netInfoP || !netInfoN )
870 return false;
871
872 aNetP = netInfoP->GetNetCode();
873 aNetN = netInfoN->GetNetCode();
874
875 return true;
876}
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
NETINFO_ITEM * GetNet() const
Return #NET_INFO object for a given item.
virtual bool IsConnected() const
Returns information if the object is derived from BOARD_CONNECTED_ITEM.
Definition: board_item.h:115
BOARD_ITEM * Parent() const
Definition: pns_item.h:151

References BOARD::FindNet(), BOARD_CONNECTED_ITEM::GetNet(), NETINFO_ITEM::GetNetCode(), NETINFO_ITEM::GetNetname(), BOARD_ITEM::IsConnected(), m_board, matchDpSuffix(), and PNS::ITEM::Parent().

Referenced by IsDiffPair().

◆ DpNetPolarity()

int PNS_PCBNEW_RULE_RESOLVER::DpNetPolarity ( int  aNet)
overridevirtual

Implements PNS::RULE_RESOLVER.

Definition at line 827 of file pns_kicad_iface.cpp.

828{
829 wxString refName = m_board->FindNet( aNet )->GetNetname();
830 wxString dummy1;
831
832 return matchDpSuffix( refName, dummy1 );
833}

References BOARD::FindNet(), NETINFO_ITEM::GetNetname(), m_board, and matchDpSuffix().

◆ HoleClearance()

int PNS_PCBNEW_RULE_RESOLVER::HoleClearance ( const PNS::ITEM aA,
const PNS::ITEM aB,
bool  aUseClearanceEpsilon = true 
)
overridevirtual

Implements PNS::RULE_RESOLVER.

Definition at line 459 of file pns_kicad_iface.cpp.

461{
462 CLEARANCE_CACHE_KEY key = { aA, aB, aUseClearanceEpsilon };
463 auto it = m_holeClearanceCache.find( key );
464
465 if( it != m_holeClearanceCache.end() )
466 return it->second;
467
468 PNS::CONSTRAINT constraint;
469 int rv = 0;
470 int layer;
471
472 if( !aA->Layers().IsMultilayer() || !aB || aB->Layers().IsMultilayer() )
473 layer = aA->Layer();
474 else
475 layer = aB->Layer();
476
477 if( QueryConstraint( PNS::CONSTRAINT_TYPE::CT_HOLE_CLEARANCE, aA, aB, layer, &constraint ) )
478 rv = constraint.m_Value.Min();
479
480#define HAS_PLATED_HOLE( a ) ( a )->IsRoutable()
481
482 if( IsCopperLayer( layer )
483 && ( HAS_PLATED_HOLE( aA ) || HAS_PLATED_HOLE( aB ) )
484 && QueryConstraint( PNS::CONSTRAINT_TYPE::CT_CLEARANCE, aA, aB, layer, &constraint )
485 && constraint.m_Value.Min() > rv )
486 {
487 rv = constraint.m_Value.Min();
488 }
489
490 if( aUseClearanceEpsilon && rv > 0 )
491 rv = std::max( 0, rv - m_clearanceEpsilon );
492
493 m_holeClearanceCache[ key ] = rv;
494 return rv;
495}
bool IsMultilayer() const
Definition: pns_layerset.h:77
virtual int Layer() const
Definition: pns_item.h:160
bool IsCopperLayer(int aLayerId)
Tests whether a layer is a copper layer.
Definition: layer_ids.h:825
#define HAS_PLATED_HOLE(a)

References PNS::CT_CLEARANCE, PNS::CT_HOLE_CLEARANCE, HAS_PLATED_HOLE, IsCopperLayer(), LAYER_RANGE::IsMultilayer(), PNS::ITEM::Layer(), PNS::ITEM::Layers(), m_clearanceEpsilon, m_holeClearanceCache, PNS::CONSTRAINT::m_Value, MINOPTMAX< T >::Min(), and QueryConstraint().

◆ holeRadius()

int PNS_PCBNEW_RULE_RESOLVER::holeRadius ( const PNS::ITEM aItem) const
private

Definition at line 181 of file pns_kicad_iface.cpp.

182{
183 if( aItem->Kind() == PNS::ITEM::SOLID_T )
184 {
185 const PAD* pad = dynamic_cast<const PAD*>( aItem->Parent() );
186
187 if( pad && pad->GetDrillShape() == PAD_DRILL_SHAPE_CIRCLE )
188 return pad->GetDrillSize().x / 2;
189 }
190 else if( aItem->Kind() == PNS::ITEM::VIA_T )
191 {
192 const PCB_VIA* via = dynamic_cast<const PCB_VIA*>( aItem->Parent() );
193
194 if( via )
195 return via->GetDrillValue() / 2;
196 }
197
198 return 0;
199}
Definition: pad.h:59
PnsKind Kind() const
Return the type (kind) of the item.
Definition: pns_item.h:132
@ SOLID_T
Definition: pns_item.h:63
@ PAD_DRILL_SHAPE_CIRCLE
Definition: pad_shapes.h:70

References PNS::ITEM::Kind(), pad, PAD_DRILL_SHAPE_CIRCLE, PNS::ITEM::Parent(), PNS::ITEM::SOLID_T, via, and PNS::ITEM::VIA_T.

◆ HoleToHoleClearance()

int PNS_PCBNEW_RULE_RESOLVER::HoleToHoleClearance ( const PNS::ITEM aA,
const PNS::ITEM aB,
bool  aUseClearanceEpsilon = true 
)
overridevirtual

Implements PNS::RULE_RESOLVER.

Definition at line 498 of file pns_kicad_iface.cpp.

500{
501 CLEARANCE_CACHE_KEY key = { aA, aB, aUseClearanceEpsilon };
502 auto it = m_holeToHoleClearanceCache.find( key );
503
504 if( it != m_holeToHoleClearanceCache.end() )
505 return it->second;
506
507 PNS::CONSTRAINT constraint;
508 int rv = 0;
509 int layer;
510
511 if( !aA->Layers().IsMultilayer() || !aB || aB->Layers().IsMultilayer() )
512 layer = aA->Layer();
513 else
514 layer = aB->Layer();
515
516 if( QueryConstraint( PNS::CONSTRAINT_TYPE::CT_HOLE_TO_HOLE, aA, aB, layer, &constraint ) )
517 rv = constraint.m_Value.Min();
518
519 if( aUseClearanceEpsilon && rv > 0 )
520 rv = std::max( 0, rv - m_clearanceEpsilon );
521
522 m_holeToHoleClearanceCache[ key ] = rv;
523 return rv;
524}

References PNS::CT_HOLE_TO_HOLE, LAYER_RANGE::IsMultilayer(), PNS::ITEM::Layer(), PNS::ITEM::Layers(), m_clearanceEpsilon, m_holeToHoleClearanceCache, PNS::CONSTRAINT::m_Value, MINOPTMAX< T >::Min(), and QueryConstraint().

◆ IsDiffPair()

bool PNS_PCBNEW_RULE_RESOLVER::IsDiffPair ( const PNS::ITEM aA,
const PNS::ITEM aB 
)
overridevirtual

Implements PNS::RULE_RESOLVER.

Definition at line 202 of file pns_kicad_iface.cpp.

203{
204 int net_p, net_n;
205
206 if( !DpNetPair( aA, net_p, net_n ) )
207 return false;
208
209 if( aA->Net() == net_p && aB->Net() == net_n )
210 return true;
211
212 if( aB->Net() == net_p && aA->Net() == net_n )
213 return true;
214
215 return false;
216}
int Net() const
Definition: pns_item.h:154
virtual bool DpNetPair(const PNS::ITEM *aItem, int &aNetP, int &aNetN) override

References DpNetPair(), and PNS::ITEM::Net().

◆ IsInNetTie()

bool PNS_PCBNEW_RULE_RESOLVER::IsInNetTie ( const PNS::ITEM aA)
overridevirtual

Implements PNS::RULE_RESOLVER.

Definition at line 219 of file pns_kicad_iface.cpp.

220{
221 BOARD_ITEM* item = aA->Parent();
222 BOARD_ITEM* parentFootprint = item ? item->GetParentFootprint() : nullptr;
223
224 if( parentFootprint )
225 return static_cast<FOOTPRINT*>( parentFootprint )->IsNetTie();
226
227 return false;
228}
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:58
BOARD_ITEM_CONTAINER * GetParentFootprint() const
Definition: board_item.cpp:239

References BOARD_ITEM::GetParentFootprint(), and PNS::ITEM::Parent().

◆ IsNetTieExclusion()

bool PNS_PCBNEW_RULE_RESOLVER::IsNetTieExclusion ( const PNS::ITEM aItem,
const VECTOR2I aCollisionPos,
const PNS::ITEM aCollidingItem 
)
overridevirtual

Implements PNS::RULE_RESOLVER.

Definition at line 231 of file pns_kicad_iface.cpp.

234{
235 std::shared_ptr<DRC_ENGINE> drcEngine = m_board->GetDesignSettings().m_DRCEngine;
236 BOARD_ITEM* collidingItem = aCollidingItem->Parent();
237
238 if( drcEngine && collidingItem )
239 {
240 return drcEngine->IsNetTieExclusion( aItem->Net(), ToLAYER_ID( aItem->Layer() ),
241 aCollisionPos, collidingItem );
242 }
243
244 return false;
245}
std::shared_ptr< DRC_ENGINE > m_DRCEngine
PCB_LAYER_ID ToLAYER_ID(int aLayer)
Definition: lset.cpp:932

References BOARD::GetDesignSettings(), PNS::ITEM::Layer(), m_board, BOARD_DESIGN_SETTINGS::m_DRCEngine, PNS::ITEM::Net(), PNS::ITEM::Parent(), and ToLAYER_ID().

◆ matchDpSuffix()

int PNS_PCBNEW_RULE_RESOLVER::matchDpSuffix ( const wxString &  aNetName,
wxString &  aComplementNet 
)
private

Checks for netnamed differential pairs.

This accepts nets named suffixed by 'P', 'N', '+', '-', as well as additional numbers and underscores following the suffix. So NET_P_123 is a valid positive net name matched to NET_N_123.

Parameters
aNetNameInput net name to check for DP naming
aComplementNetGenerated net name for the pair
Returns
-1 if found the negative pair, +1 if found the positive pair, 0 otherwise

Definition at line 753 of file pns_kicad_iface.cpp.

754{
755 int rv = 0;
756 int count = 0;
757
758 for( auto it = aNetName.rbegin(); it != aNetName.rend() && rv == 0; ++it, ++count )
759 {
760 int ch = *it;
761
762 if( ( ch >= '0' && ch <= '9' ) || ch == '_' )
763 {
764 continue;
765 }
766 else if( ch == '+' )
767 {
768 aComplementNet = wxT( "-" );
769 rv = 1;
770 }
771 else if( ch == '-' )
772 {
773 aComplementNet = wxT( "+" );
774 rv = -1;
775 }
776 else if( ch == 'N' )
777 {
778 aComplementNet = wxT( "P" );
779 rv = -1;
780 }
781 else if ( ch == 'P' )
782 {
783 aComplementNet = wxT( "N" );
784 rv = 1;
785 }
786 else
787 {
788 break;
789 }
790 }
791
792 if( rv != 0 && count >= 1 )
793 {
794 aComplementNet = aNetName.Left( aNetName.length() - count ) + aComplementNet
795 + aNetName.Right( count - 1 );
796 }
797
798 return rv;
799}

Referenced by DpCoupledNet(), DpNetPair(), and DpNetPolarity().

◆ NetName()

wxString PNS_PCBNEW_RULE_RESOLVER::NetName ( int  aNet)
overridevirtual

Implements PNS::RULE_RESOLVER.

Definition at line 821 of file pns_kicad_iface.cpp.

822{
823 return m_board->FindNet( aNet )->GetNetname();
824}

References BOARD::FindNet(), NETINFO_ITEM::GetNetname(), and m_board.

◆ QueryConstraint()

bool PNS_PCBNEW_RULE_RESOLVER::QueryConstraint ( PNS::CONSTRAINT_TYPE  aType,
const PNS::ITEM aItemA,
const PNS::ITEM aItemB,
int  aLayer,
PNS::CONSTRAINT aConstraint 
)
overridevirtual

Implements PNS::RULE_RESOLVER.

Definition at line 286 of file pns_kicad_iface.cpp.

289{
290 std::shared_ptr<DRC_ENGINE> drcEngine = m_board->GetDesignSettings().m_DRCEngine;
291
292 if( !drcEngine )
293 return false;
294
295 DRC_CONSTRAINT_T hostType;
296
297 switch ( aType )
298 {
308 default: return false; // should not happen
309 }
310
311 BOARD_ITEM* parentA = aItemA ? aItemA->Parent() : nullptr;
312 BOARD_ITEM* parentB = aItemB ? aItemB->Parent() : nullptr;
313 DRC_CONSTRAINT hostConstraint;
314
315 // A track being routed may not have a BOARD_ITEM associated yet.
316 if( aItemA && !parentA )
317 {
318 switch( aItemA->Kind() )
319 {
320 case PNS::ITEM::ARC_T: parentA = &m_dummyArcs[0]; break;
321 case PNS::ITEM::VIA_T: parentA = &m_dummyVias[0]; break;
322 case PNS::ITEM::SEGMENT_T: parentA = &m_dummyTracks[0]; break;
323 case PNS::ITEM::LINE_T: parentA = &m_dummyTracks[0]; break;
324 default: break;
325 }
326
327 if( parentA )
328 {
329 parentA->SetLayer( ToLAYER_ID( aLayer ) );
330 static_cast<BOARD_CONNECTED_ITEM*>( parentA )->SetNetCode( aItemA->Net(), true );
331 }
332 }
333
334 if( aItemB && !parentB )
335 {
336 switch( aItemB->Kind() )
337 {
338 case PNS::ITEM::ARC_T: parentB = &m_dummyArcs[1]; break;
339 case PNS::ITEM::VIA_T: parentB = &m_dummyVias[1]; break;
340 case PNS::ITEM::SEGMENT_T: parentB = &m_dummyTracks[1]; break;
341 case PNS::ITEM::LINE_T: parentB = &m_dummyTracks[1]; break;
342 default: break;
343 }
344
345 if( parentB )
346 {
347 parentB->SetLayer( ToLAYER_ID( aLayer ) );
348 static_cast<BOARD_CONNECTED_ITEM*>( parentB )->SetNetCode( aItemB->Net(), true );
349 }
350 }
351
352 if( parentA )
353 hostConstraint = drcEngine->EvalRules( hostType, parentA, parentB, ToLAYER_ID( aLayer ) );
354
355 if( hostConstraint.IsNull() )
356 return false;
357
358 if( hostConstraint.GetSeverity() == RPT_SEVERITY_IGNORE )
359 {
360 aConstraint->m_Value.SetMin( -1 );
361 aConstraint->m_RuleName = hostConstraint.GetName();
362 aConstraint->m_Type = aType;
363 return true;
364 }
365
366 switch ( aType )
367 {
376 aConstraint->m_Value = hostConstraint.GetValue();
377 aConstraint->m_RuleName = hostConstraint.GetName();
378 aConstraint->m_Type = aType;
379 return true;
380
381 default:
382 return false;
383 }
384}
virtual void SetLayer(PCB_LAYER_ID aLayer)
Set the layer this item is on.
Definition: board_item.h:214
wxString GetName() const
Definition: drc_rule.h:149
SEVERITY GetSeverity() const
Definition: drc_rule.h:162
const MINOPTMAX< int > & GetValue() const
Definition: drc_rule.h:141
bool IsNull() const
Definition: drc_rule.h:136
void SetMin(T v)
Definition: minoptmax.h:41
@ LINE_T
Definition: pns_item.h:64
@ SEGMENT_T
Definition: pns_item.h:66
DRC_CONSTRAINT_T
Definition: drc_rule.h:45
@ VIA_DIAMETER_CONSTRAINT
Definition: drc_rule.h:63
@ DIFF_PAIR_GAP_CONSTRAINT
Definition: drc_rule.h:66
@ TRACK_WIDTH_CONSTRAINT
Definition: drc_rule.h:56
@ EDGE_CLEARANCE_CONSTRAINT
Definition: drc_rule.h:50
@ LENGTH_CONSTRAINT
Definition: drc_rule.h:64
@ CLEARANCE_CONSTRAINT
Definition: drc_rule.h:47
@ HOLE_CLEARANCE_CONSTRAINT
Definition: drc_rule.h:48
@ HOLE_SIZE_CONSTRAINT
Definition: drc_rule.h:51
@ HOLE_TO_HOLE_CONSTRAINT
Definition: drc_rule.h:49
@ RPT_SEVERITY_IGNORE
wxString m_RuleName
Definition: pns_node.h:72
CONSTRAINT_TYPE m_Type
Definition: pns_node.h:69

References PNS::ITEM::ARC_T, CLEARANCE_CONSTRAINT, PNS::CT_CLEARANCE, PNS::CT_DIFF_PAIR_GAP, PNS::CT_EDGE_CLEARANCE, PNS::CT_HOLE_CLEARANCE, PNS::CT_HOLE_TO_HOLE, PNS::CT_LENGTH, PNS::CT_VIA_DIAMETER, PNS::CT_VIA_HOLE, PNS::CT_WIDTH, DIFF_PAIR_GAP_CONSTRAINT, EDGE_CLEARANCE_CONSTRAINT, BOARD::GetDesignSettings(), DRC_CONSTRAINT::GetName(), DRC_CONSTRAINT::GetSeverity(), DRC_CONSTRAINT::GetValue(), HOLE_CLEARANCE_CONSTRAINT, HOLE_SIZE_CONSTRAINT, HOLE_TO_HOLE_CONSTRAINT, DRC_CONSTRAINT::IsNull(), PNS::ITEM::Kind(), LENGTH_CONSTRAINT, PNS::ITEM::LINE_T, m_board, BOARD_DESIGN_SETTINGS::m_DRCEngine, m_dummyArcs, m_dummyTracks, m_dummyVias, PNS::CONSTRAINT::m_RuleName, PNS::CONSTRAINT::m_Type, PNS::CONSTRAINT::m_Value, PNS::ITEM::Net(), PNS::ITEM::Parent(), RPT_SEVERITY_IGNORE, PNS::ITEM::SEGMENT_T, BOARD_ITEM::SetLayer(), MINOPTMAX< T >::SetMin(), ToLAYER_ID(), TRACK_WIDTH_CONSTRAINT, VIA_DIAMETER_CONSTRAINT, and PNS::ITEM::VIA_T.

Referenced by Clearance(), HoleClearance(), HoleToHoleClearance(), and PNS_KICAD_IFACE_BASE::ImportSizes().

Member Data Documentation

◆ m_board

BOARD* PNS_PCBNEW_RULE_RESOLVER::m_board
private

◆ m_clearanceCache

std::unordered_map<CLEARANCE_CACHE_KEY, int> PNS_PCBNEW_RULE_RESOLVER::m_clearanceCache
private

Definition at line 155 of file pns_kicad_iface.cpp.

Referenced by Clearance(), ClearCacheForItem(), and ClearCaches().

◆ m_clearanceEpsilon

int PNS_PCBNEW_RULE_RESOLVER::m_clearanceEpsilon
private

◆ m_dummyArcs

PCB_ARC PNS_PCBNEW_RULE_RESOLVER::m_dummyArcs[2]
private

Definition at line 151 of file pns_kicad_iface.cpp.

Referenced by QueryConstraint().

◆ m_dummyTracks

PCB_TRACK PNS_PCBNEW_RULE_RESOLVER::m_dummyTracks[2]
private

Definition at line 150 of file pns_kicad_iface.cpp.

Referenced by QueryConstraint().

◆ m_dummyVias

PCB_VIA PNS_PCBNEW_RULE_RESOLVER::m_dummyVias[2]
private

Definition at line 152 of file pns_kicad_iface.cpp.

Referenced by QueryConstraint().

◆ m_holeClearanceCache

std::unordered_map<CLEARANCE_CACHE_KEY, int> PNS_PCBNEW_RULE_RESOLVER::m_holeClearanceCache
private

Definition at line 156 of file pns_kicad_iface.cpp.

Referenced by ClearCaches(), and HoleClearance().

◆ m_holeToHoleClearanceCache

std::unordered_map<CLEARANCE_CACHE_KEY, int> PNS_PCBNEW_RULE_RESOLVER::m_holeToHoleClearanceCache
private

Definition at line 157 of file pns_kicad_iface.cpp.

Referenced by ClearCaches(), and HoleToHoleClearance().

◆ m_routerIface

PNS::ROUTER_IFACE* PNS_PCBNEW_RULE_RESOLVER::m_routerIface
private

Definition at line 148 of file pns_kicad_iface.cpp.


The documentation for this class was generated from the following file: