KiCad PCB EDA Suite
pcb_track.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2012 Jean-Pierre Charras, jp.charras at wanadoo.fr
5 * Copyright (C) 2012 SoftPLC Corporation, Dick Hollenbeck <[email protected]>
6 * Copyright (C) 2012 Wayne Stambaugh <[email protected]>
7 * Copyright (C) 1992-2022 KiCad Developers, see AUTHORS.txt for contributors.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, you may find one here:
21 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
22 * or you may search the http://www.gnu.org website for the version 2 license,
23 * or you may write to the Free Software Foundation, Inc.,
24 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
25 */
26
27#include <pcb_base_frame.h>
28#include <core/mirror.h>
30#include <board.h>
33#include <pcb_track.h>
34#include <base_units.h>
35#include <bitmaps.h>
36#include <string_utils.h>
37#include <view/view.h>
40#include <i18n_utility.h>
41#include <geometry/seg.h>
44#include <geometry/shape_arc.h>
45#include <drc/drc_engine.h>
46#include <pcb_painter.h>
47#include <trigo.h>
48
51
53 BOARD_CONNECTED_ITEM( aParent, idtype )
54{
55 m_Width = pcbIUScale.mmToIU( 0.2 ); // Gives a reasonable default width
56 m_CachedScale = -1.0; // Set invalid to force update
57 m_CachedLOD = 0.0; // Set to always display
58}
59
60
62{
63 return new PCB_TRACK( *this );
64}
65
66
67PCB_ARC::PCB_ARC( BOARD_ITEM* aParent, const SHAPE_ARC* aArc ) :
68 PCB_TRACK( aParent, PCB_ARC_T )
69{
70 m_Start = aArc->GetP0();
71 m_End = aArc->GetP1();
72 m_Mid = aArc->GetArcMid();
73}
74
75
77{
78 return new PCB_ARC( *this );
79}
80
81
83 PCB_TRACK( aParent, PCB_VIA_T )
84{
88
91
92 for( size_t ii = 0; ii < arrayDim( m_zoneLayerConnections ); ++ii )
94
95 m_isFree = false;
96}
97
98
99PCB_VIA::PCB_VIA( const PCB_VIA& aOther ) :
100 PCB_TRACK( aOther.GetParent(), PCB_VIA_T )
101{
102 PCB_VIA::operator=( aOther );
103
104 const_cast<KIID&>( m_Uuid ) = aOther.m_Uuid;
105}
106
107
109{
111
112 m_Width = aOther.m_Width;
113 m_Start = aOther.m_Start;
114 m_End = aOther.m_End;
115 m_CachedLOD = aOther.m_CachedLOD;
117
119 m_viaType = aOther.m_viaType;
120 m_drill = aOther.m_drill;
123 m_isFree = aOther.m_isFree;
124
125 return *this;
126}
127
128
130{
131 return new PCB_VIA( *this );
132}
133
134
135wxString PCB_VIA::GetItemDescription( UNITS_PROVIDER* aUnitsProvider ) const
136{
137 wxString formatStr;
138
139 switch( GetViaType() )
140 {
141 case VIATYPE::BLIND_BURIED: formatStr = _( "Blind/Buried Via %s on %s" ); break;
142 case VIATYPE::MICROVIA: formatStr = _( "Micro Via %s on %s" ); break;
143 default: formatStr = _( "Via %s on %s" ); break;
144 }
145
146 return wxString::Format( formatStr,
149}
150
151
153{
154 return BITMAPS::via;
155}
156
157
159{
160 SEG a( m_Start, m_End );
161 SEG b( aTrack.GetStart(), aTrack.GetEnd() );
162 return a.ApproxCollinear( b );
163}
164
165
166int PCB_TRACK::GetLocalClearance( wxString* aSource ) const
167{
168 // Not currently implemented
169 return 0;
170}
171
172
174{
175 DRC_CONSTRAINT constraint;
176
177 if( GetBoard() && GetBoard()->GetDesignSettings().m_DRCEngine )
178 {
180
181 constraint = bds.m_DRCEngine->EvalRules( TRACK_WIDTH_CONSTRAINT, this, nullptr, m_layer );
182 }
183
184 if( aSource )
185 *aSource = constraint.GetName();
186
187 return constraint.Value();
188}
189
190
191int PCB_VIA::GetMinAnnulus( PCB_LAYER_ID aLayer, wxString* aSource ) const
192{
193 if( !FlashLayer( aLayer ) )
194 {
195 if( aSource )
196 *aSource = _( "removed annular ring" );
197
198 return 0;
199 }
200
201 DRC_CONSTRAINT constraint;
202
203 if( GetBoard() && GetBoard()->GetDesignSettings().m_DRCEngine )
204 {
206
207 constraint = bds.m_DRCEngine->EvalRules( ANNULAR_WIDTH_CONSTRAINT, this, nullptr, aLayer );
208 }
209
210 if( constraint.Value().HasMin() )
211 {
212 if( aSource )
213 *aSource = constraint.GetName();
214
215 return constraint.Value().Min();
216 }
217
218 return 0;
219}
220
221
223{
224 if( m_drill > 0 ) // Use the specific value.
225 return m_drill;
226
227 // Use the default value from the Netclass
228 NETCLASS* netclass = GetEffectiveNetClass();
229
231 return netclass->GetuViaDrill();
232
233 return netclass->GetViaDrill();
234}
235
236
237EDA_ITEM_FLAGS PCB_TRACK::IsPointOnEnds( const VECTOR2I& point, int min_dist ) const
238{
239 EDA_ITEM_FLAGS result = 0;
240
241 if( min_dist < 0 )
242 min_dist = m_Width / 2;
243
244 if( min_dist == 0 )
245 {
246 if( m_Start == point )
247 result |= STARTPOINT;
248
249 if( m_End == point )
250 result |= ENDPOINT;
251 }
252 else
253 {
254 double dist = GetLineLength( m_Start, point );
255
256 if( min_dist >= KiROUND( dist ) )
257 result |= STARTPOINT;
258
259 dist = GetLineLength( m_End, point );
260
261 if( min_dist >= KiROUND( dist ) )
262 result |= ENDPOINT;
263 }
264
265 return result;
266}
267
268
270{
271 // end of track is round, this is its radius, rounded up
272 int radius = ( m_Width + 1 ) / 2;
273 int ymax, xmax, ymin, xmin;
274
275 if( Type() == PCB_VIA_T )
276 {
277 ymax = m_Start.y;
278 xmax = m_Start.x;
279
280 ymin = m_Start.y;
281 xmin = m_Start.x;
282 }
283 else if( Type() == PCB_ARC_T )
284 {
285 std::shared_ptr<SHAPE> arc = GetEffectiveShape();
286 BOX2I bbox = arc->BBox();
287
288 xmin = bbox.GetLeft();
289 xmax = bbox.GetRight();
290 ymin = bbox.GetTop();
291 ymax = bbox.GetBottom();
292 }
293 else
294 {
295 ymax = std::max( m_Start.y, m_End.y );
296 xmax = std::max( m_Start.x, m_End.x );
297
298 ymin = std::min( m_Start.y, m_End.y );
299 xmin = std::min( m_Start.x, m_End.x );
300 }
301
302 ymax += radius;
303 xmax += radius;
304
305 ymin -= radius;
306 xmin -= radius;
307
308 // return a rectangle which is [pos,dim) in nature. therefore the +1
309 BOX2I ret( VECTOR2I( xmin, ymin ), VECTOR2I( xmax - xmin + 1, ymax - ymin + 1 ) );
310
311 return ret;
312}
313
314
316{
317 return GetLineLength( m_Start, m_End );
318}
319
320
321void PCB_TRACK::Rotate( const VECTOR2I& aRotCentre, const EDA_ANGLE& aAngle )
322{
323 RotatePoint( m_Start, aRotCentre, aAngle );
324 RotatePoint( m_End, aRotCentre, aAngle );
325}
326
327
328void PCB_ARC::Rotate( const VECTOR2I& aRotCentre, const EDA_ANGLE& aAngle )
329{
330 RotatePoint( m_Start, aRotCentre, aAngle );
331 RotatePoint( m_End, aRotCentre, aAngle );
332 RotatePoint( m_Mid, aRotCentre, aAngle );
333}
334
335
336void PCB_TRACK::Mirror( const VECTOR2I& aCentre, bool aMirrorAroundXAxis )
337{
338 if( aMirrorAroundXAxis )
339 {
340 MIRROR( m_Start.y, aCentre.y );
341 MIRROR( m_End.y, aCentre.y );
342 }
343 else
344 {
345 MIRROR( m_Start.x, aCentre.x );
346 MIRROR( m_End.x, aCentre.x );
347 }
348}
349
350
351void PCB_ARC::Mirror( const VECTOR2I& aCentre, bool aMirrorAroundXAxis )
352{
353 if( aMirrorAroundXAxis )
354 {
355 MIRROR( m_Start.y, aCentre.y );
356 MIRROR( m_End.y, aCentre.y );
357 MIRROR( m_Mid.y, aCentre.y );
358 }
359 else
360 {
361 MIRROR( m_Start.x, aCentre.x );
362 MIRROR( m_End.x, aCentre.x );
363 MIRROR( m_Mid.x, aCentre.x );
364 }
365}
366
367
368void PCB_TRACK::Flip( const VECTOR2I& aCentre, bool aFlipLeftRight )
369{
370 if( aFlipLeftRight )
371 {
372 m_Start.x = aCentre.x - ( m_Start.x - aCentre.x );
373 m_End.x = aCentre.x - ( m_End.x - aCentre.x );
374 }
375 else
376 {
377 m_Start.y = aCentre.y - ( m_Start.y - aCentre.y );
378 m_End.y = aCentre.y - ( m_End.y - aCentre.y );
379 }
380
381 int copperLayerCount = GetBoard()->GetCopperLayerCount();
382 SetLayer( FlipLayer( GetLayer(), copperLayerCount ) );
383}
384
385
386void PCB_ARC::Flip( const VECTOR2I& aCentre, bool aFlipLeftRight )
387{
388 if( aFlipLeftRight )
389 {
390 m_Start.x = aCentre.x - ( m_Start.x - aCentre.x );
391 m_End.x = aCentre.x - ( m_End.x - aCentre.x );
392 m_Mid.x = aCentre.x - ( m_Mid.x - aCentre.x );
393 }
394 else
395 {
396 m_Start.y = aCentre.y - ( m_Start.y - aCentre.y );
397 m_End.y = aCentre.y - ( m_End.y - aCentre.y );
398 m_Mid.y = aCentre.y - ( m_Mid.y - aCentre.y );
399 }
400
401 int copperLayerCount = GetBoard()->GetCopperLayerCount();
402 SetLayer( FlipLayer( GetLayer(), copperLayerCount ) );
403}
404
405
406bool PCB_ARC::IsCCW() const
407{
408 VECTOR2I start_end = m_End - m_Start;
409 VECTOR2I start_mid = m_Mid - m_Start;
410
411 return start_end.Cross( start_mid ) < 0;
412}
413
414
415void PCB_VIA::Flip( const VECTOR2I& aCentre, bool aFlipLeftRight )
416{
417 if( aFlipLeftRight )
418 {
419 m_Start.x = aCentre.x - ( m_Start.x - aCentre.x );
420 m_End.x = aCentre.x - ( m_End.x - aCentre.x );
421 }
422 else
423 {
424 m_Start.y = aCentre.y - ( m_Start.y - aCentre.y );
425 m_End.y = aCentre.y - ( m_End.y - aCentre.y );
426 }
427
429 {
430 int copperLayerCount = GetBoard()->GetCopperLayerCount();
431 PCB_LAYER_ID top_layer;
432 PCB_LAYER_ID bottom_layer;
433 LayerPair( &top_layer, &bottom_layer );
434 top_layer = FlipLayer( top_layer, copperLayerCount );
435 bottom_layer = FlipLayer( bottom_layer, copperLayerCount );
436 SetLayerPair( top_layer, bottom_layer );
437 }
438}
439
440
441// see class_track.h
442INSPECT_RESULT PCB_TRACK::Visit( INSPECTOR inspector, void* testData,
443 const std::vector<KICAD_T>& aScanTypes )
444{
445 for( KICAD_T scanType : aScanTypes )
446 {
447 if( scanType == Type() )
448 {
449 if( INSPECT_RESULT::QUIT == inspector( this, testData ) )
451 }
452 }
453
455}
456
457
458std::shared_ptr<SHAPE_SEGMENT> PCB_VIA::GetEffectiveHoleShape() const
459{
460 return std::make_shared<SHAPE_SEGMENT>( SEG( m_Start, m_Start ), m_drill );
461}
462
463
465{
466 const BOARD* board = GetBoard();
467
468 if( board )
469 return board->GetTentVias();
470 else
471 return true;
472}
473
474
476{
477 const BOARD* board = GetBoard();
478
479 if( board )
481 else
482 return 0;
483}
484
485
487{
488#if 0
489 // Nice and simple, but raises its ugly head in performance profiles....
490 return GetLayerSet().test( aLayer );
491#endif
492
493 if( aLayer >= m_layer && aLayer <= m_bottomLayer )
494 return true;
495
496 if( !IsTented() )
497 {
498 if( aLayer == F_Mask )
499 return IsOnLayer( F_Cu );
500 else if( aLayer == B_Mask )
501 return IsOnLayer( B_Cu );
502 }
503
504 return false;
505}
506
507
509{
510 LSET layermask;
511
513 layermask = LSET::AllCuMask();
514 else
515 wxASSERT( m_layer <= m_bottomLayer );
516
517 // PCB_LAYER_IDs are numbered from front to back, this is top to bottom.
518 for( int id = m_layer; id <= m_bottomLayer; ++id )
519 layermask.set( id );
520
521 if( !IsTented() )
522 {
523 if( layermask.test( F_Cu ) )
524 layermask.set( F_Mask );
525
526 if( layermask.test( B_Cu ) )
527 layermask.set( B_Mask );
528 }
529
530 return layermask;
531}
532
533
534void PCB_VIA::SetLayerSet( LSET aLayerSet )
535{
536 bool first = true;
537
538 for( PCB_LAYER_ID layer : aLayerSet.Seq() )
539 {
540 if( first )
541 {
542 m_layer = layer;
543 first = false;
544 }
545
546 m_bottomLayer = layer;
547 }
548}
549
550
551void PCB_VIA::SetLayerPair( PCB_LAYER_ID aTopLayer, PCB_LAYER_ID aBottomLayer )
552{
553
554 m_layer = aTopLayer;
555 m_bottomLayer = aBottomLayer;
557}
558
559
561{
562 m_layer = aLayer;
563}
564
565
567{
568 m_bottomLayer = aLayer;
569}
570
571
572void PCB_VIA::LayerPair( PCB_LAYER_ID* top_layer, PCB_LAYER_ID* bottom_layer ) const
573{
574 PCB_LAYER_ID t_layer = F_Cu;
575 PCB_LAYER_ID b_layer = B_Cu;
576
578 {
579 b_layer = m_bottomLayer;
580 t_layer = m_layer;
581
582 if( b_layer < t_layer )
583 std::swap( b_layer, t_layer );
584 }
585
586 if( top_layer )
587 *top_layer = t_layer;
588
589 if( bottom_layer )
590 *bottom_layer = b_layer;
591}
592
593
595{
596 return m_layer;
597}
598
599
601{
602 return m_bottomLayer;
603}
604
605
607{
609 {
610 m_layer = F_Cu;
612 }
613
614 if( m_bottomLayer < m_layer )
615 std::swap( m_bottomLayer, m_layer );
616}
617
618
619bool PCB_VIA::FlashLayer( LSET aLayers ) const
620{
621 for( auto layer : aLayers.Seq() )
622 {
623 if( FlashLayer( layer ) )
624 return true;
625 }
626
627 return false;
628}
629
630
631bool PCB_VIA::FlashLayer( int aLayer ) const
632{
633 // Return the "normal" shape if the caller doesn't specify a particular layer
634 if( aLayer == UNDEFINED_LAYER )
635 return true;
636
637 const BOARD* board = GetBoard();
638
639 if( !board )
640 return true;
641
642 if( !IsOnLayer( static_cast<PCB_LAYER_ID>( aLayer ) ) )
643 return false;
644
646 {
647 return true;
648 }
649
650 if( m_keepStartEndLayer && ( aLayer == m_layer || aLayer == m_bottomLayer ) )
651 return true;
652
653 // Must be static to keep from raising its ugly head in performance profiles
654 static std::initializer_list<KICAD_T> connectedTypes = { PCB_TRACE_T, PCB_ARC_T, PCB_VIA_T,
655 PCB_PAD_T };
656
657 // Only the highest priority zone that a via interacts with on any given layer gets to
658 // determine if it is connected or not. This keeps us from deciding it's not flashed when
659 // filling the first zone, and then later having another zone connect to it, causing it to
660 // become flashed, resulting in the first zone having insufficient clearance.
661 // See https://gitlab.com/kicad/code/kicad/-/issues/11299.
662 if( m_zoneLayerConnections[ aLayer ] == ZLC_CONNECTED )
663 return true;
664
665 return board->GetConnectivity()->IsConnectedOnLayer( this, aLayer, connectedTypes );
666}
667
668
669void PCB_TRACK::ViewGetLayers( int aLayers[], int& aCount ) const
670{
671 // Show the track and its netname on different layers
672 aLayers[0] = GetLayer();
673 aLayers[1] = GetNetnameLayer( aLayers[0] );
674 aCount = 2;
675
676 if( IsLocked() )
677 aLayers[ aCount++ ] = LAYER_LOCKED_ITEM_SHADOW;
678}
679
680
681double PCB_TRACK::ViewGetLOD( int aLayer, KIGFX::VIEW* aView ) const
682{
683 constexpr double HIDE = std::numeric_limits<double>::max();
684
685 PCB_PAINTER* painter = static_cast<PCB_PAINTER*>( aView->GetPainter() );
686 PCB_RENDER_SETTINGS* renderSettings = painter->GetSettings();
687
688 if( !aView->IsLayerVisible( LAYER_TRACKS ) )
689 return HIDE;
690
691 if( IsNetnameLayer( aLayer ) )
692 {
694 return HIDE;
695
696 // Hide netnames on dimmed tracks
697 if( renderSettings->GetHighContrast() )
698 {
699 if( m_layer != renderSettings->GetPrimaryHighContrastLayer() )
700 return HIDE;
701 }
702
703 // Pick the approximate size of the netname (square chars)
704 wxString netName = GetUnescapedShortNetname();
705 size_t num_chars = netName.size();
706
707 if( GetLength() < num_chars * GetWidth() )
708 return HIDE;
709
710 // When drawing netnames, clip the track to the viewport
711 VECTOR2I start( GetStart() );
712 VECTOR2I end( GetEnd() );
713 BOX2D viewport = aView->GetViewport();
714 BOX2I clipBox( viewport.GetOrigin(), viewport.GetSize() );
715
716 ClipLine( &clipBox, start.x, start.y, end.x, end.y );
717
718 VECTOR2I line = ( end - start );
719
720 if( line.EuclideanNorm() == 0 )
721 return HIDE;
722
723 // Netnames will be shown only if zoom is appropriate
724 return ( double ) pcbIUScale.mmToIU( 4 ) / ( m_Width + 1 );
725 }
726
727 if( aLayer == LAYER_LOCKED_ITEM_SHADOW )
728 {
729 // Hide shadow if the main layer is not shown
730 if( !aView->IsLayerVisible( m_layer ) )
731 return HIDE;
732
733 // Hide shadow on dimmed tracks
734 if( renderSettings->GetHighContrast() )
735 {
736 if( m_layer != renderSettings->GetPrimaryHighContrastLayer() )
737 return HIDE;
738 }
739 }
740
741 // Other layers are shown without any conditions
742 return 0.0;
743}
744
745
747{
748 BOX2I bbox = GetBoundingBox();
749 const BOARD* board = GetBoard();
750
751 if( board )
753 else
754 bbox.Inflate( GetWidth() ); // Add a bit extra for safety
755
756 return bbox;
757}
758
759
760void PCB_VIA::ViewGetLayers( int aLayers[], int& aCount ) const
761{
762 aLayers[0] = LAYER_VIA_HOLES;
763 aLayers[1] = LAYER_VIA_HOLEWALLS;
764 aLayers[2] = LAYER_VIA_NETNAMES;
765
766 // Just show it on common via & via holes layers
767 switch( GetViaType() )
768 {
769 case VIATYPE::THROUGH: aLayers[3] = LAYER_VIA_THROUGH; break;
770 case VIATYPE::BLIND_BURIED: aLayers[3] = LAYER_VIA_BBLIND; break;
771 case VIATYPE::MICROVIA: aLayers[3] = LAYER_VIA_MICROVIA; break;
772 default: aLayers[3] = LAYER_GP_OVERLAY; break;
773 }
774
775 aCount = 4;
776
777 if( IsLocked() )
778 aLayers[ aCount++ ] = LAYER_LOCKED_ITEM_SHADOW;
779}
780
781
782double PCB_VIA::ViewGetLOD( int aLayer, KIGFX::VIEW* aView ) const
783{
784 constexpr double HIDE = (double)std::numeric_limits<double>::max();
785
786 PCB_PAINTER* painter = static_cast<PCB_PAINTER*>( aView->GetPainter() );
787 PCB_RENDER_SETTINGS* renderSettings = painter->GetSettings();
788 const BOARD* board = GetBoard();
789 LSET visible = LSET::AllLayersMask();
790
791 // Meta control for hiding all vias
792 if( !aView->IsLayerVisible( LAYER_VIAS ) )
793 return HIDE;
794
795 // Handle board visibility
796 if( board )
797 visible = board->GetVisibleLayers() & board->GetEnabledLayers();
798
799 // In high contrast mode don't show vias that don't cross the high-contrast layer
800 if( renderSettings->GetHighContrast() )
801 {
802 PCB_LAYER_ID highContrastLayer = renderSettings->GetPrimaryHighContrastLayer();
803
804 if( LSET::FrontTechMask().Contains( highContrastLayer ) )
805 highContrastLayer = F_Cu;
806 else if( LSET::BackTechMask().Contains( highContrastLayer ) )
807 highContrastLayer = B_Cu;
808
809 if( !GetLayerSet().Contains( highContrastLayer ) )
810 return HIDE;
811 }
812
813 if( IsHoleLayer( aLayer ) )
814 {
816 {
817 // Show a blind or micro via's hole if it crosses a visible layer
818 if( !( visible & GetLayerSet() ).any() )
819 return HIDE;
820 }
821 else
822 {
823 // Show a through via's hole if any physical layer is shown
824 if( !( visible & LSET::PhysicalLayersMask() ).any() )
825 return HIDE;
826 }
827 }
828 else if( IsNetnameLayer( aLayer ) )
829 {
830 if( renderSettings->GetHighContrast() )
831 {
832 // Hide netnames unless via is flashed to a high-contrast layer
833 if( !FlashLayer( renderSettings->GetPrimaryHighContrastLayer() ) )
834 return HIDE;
835 }
836 else
837 {
838 // Hide netnames unless pad is flashed to a visible layer
839 if( !FlashLayer( visible ) )
840 return HIDE;
841 }
842
843 // Netnames will be shown only if zoom is appropriate
844 return m_Width == 0 ? HIDE : ( (double)pcbIUScale.mmToIU( 10 ) / m_Width );
845 }
846
847 // Passed all tests; show.
848 return 0.0;
849}
850
851
853{
854 switch( Type() )
855 {
856 case PCB_ARC_T: return _( "Track (arc)" );
857 case PCB_VIA_T: return _( "Via" );
858 case PCB_TRACE_T:
859 default: return _( "Track" );
860 }
861}
862
863
864void PCB_TRACK::GetMsgPanelInfo( EDA_DRAW_FRAME* aFrame, std::vector<MSG_PANEL_ITEM>& aList )
865{
866 wxString msg;
867 BOARD* board = GetBoard();
868
869 aList.emplace_back( _( "Type" ), GetFriendlyName() );
870
871 GetMsgPanelInfoBase_Common( aFrame, aList );
872
873 aList.emplace_back( _( "Layer" ), layerMaskDescribe() );
874
875 aList.emplace_back( _( "Width" ), aFrame->MessageTextFromValue( m_Width ) );
876
877 if( Type() == PCB_ARC_T )
878 {
879 double radius = static_cast<PCB_ARC*>( this )->GetRadius();
880 aList.emplace_back( _( "Radius" ), aFrame->MessageTextFromValue( radius ) );
881 }
882
883 aList.emplace_back( _( "Segment Length" ), aFrame->MessageTextFromValue( GetLength() ) );
884
885 // Display full track length (in Pcbnew)
886 if( board && GetNetCode() > 0 )
887 {
888 int count;
889 double trackLen;
890 double lenPadToDie;
891
892 std::tie( count, trackLen, lenPadToDie ) = board->GetTrackLength( *this );
893
894 aList.emplace_back( _( "Routed Length" ), aFrame->MessageTextFromValue( trackLen ) );
895
896 if( lenPadToDie != 0 )
897 {
898 msg = aFrame->MessageTextFromValue( lenPadToDie );
899 aList.emplace_back( _( "Pad To Die Length" ), msg );
900
901 msg = aFrame->MessageTextFromValue( trackLen + lenPadToDie );
902 aList.emplace_back( _( "Full Length" ), msg );
903 }
904 }
905
906 wxString source;
907 int clearance = GetOwnClearance( GetLayer(), &source );
908
909 aList.emplace_back( wxString::Format( _( "Min Clearance: %s" ),
910 aFrame->MessageTextFromValue( clearance ) ),
911 wxString::Format( _( "(from %s)" ), source ) );
912
913 MINOPTMAX<int> c = GetWidthConstraint( &source );
914
915 if( c.HasMax() )
916 {
917 aList.emplace_back( wxString::Format( _( "Width Constraints: min %s, max %s" ),
918 aFrame->MessageTextFromValue( c.Min() ),
919 aFrame->MessageTextFromValue( c.Max() ) ),
920 wxString::Format( _( "(from %s)" ), source ) );
921 }
922 else
923 {
924 aList.emplace_back( wxString::Format( _( "Width Constraints: min %s" ),
925 aFrame->MessageTextFromValue( c.Min() ) ),
926 wxString::Format( _( "(from %s)" ), source ) );
927 }
928}
929
930
931void PCB_VIA::GetMsgPanelInfo( EDA_DRAW_FRAME* aFrame, std::vector<MSG_PANEL_ITEM>& aList )
932{
933 wxString msg;
934
935 switch( GetViaType() )
936 {
937 case VIATYPE::MICROVIA: msg = _( "Micro Via" ); break;
938 case VIATYPE::BLIND_BURIED: msg = _( "Blind/Buried Via" ); break;
939 case VIATYPE::THROUGH: msg = _( "Through Via" ); break;
940 default: msg = _( "Via" ); break;
941 }
942
943 aList.emplace_back( _( "Type" ), msg );
944
945 GetMsgPanelInfoBase_Common( aFrame, aList );
946
947 aList.emplace_back( _( "Layer" ), layerMaskDescribe() );
948 aList.emplace_back( _( "Diameter" ), aFrame->MessageTextFromValue( m_Width ) );
949 aList.emplace_back( _( "Hole" ), aFrame->MessageTextFromValue( GetDrillValue() ) );
950
951 wxString source;
952 int clearance = GetOwnClearance( GetLayer(), &source );
953
954 aList.emplace_back( wxString::Format( _( "Min Clearance: %s" ),
955 aFrame->MessageTextFromValue( clearance ) ),
956 wxString::Format( _( "(from %s)" ), source ) );
957
958 int minAnnulus = GetMinAnnulus( GetLayer(), &source );
959
960 aList.emplace_back( wxString::Format( _( "Min Annular Width: %s" ),
961 aFrame->MessageTextFromValue( minAnnulus ) ),
962 wxString::Format( _( "(from %s)" ), source ) );
963}
964
965
967 std::vector<MSG_PANEL_ITEM>& aList ) const
968{
969 aList.emplace_back( _( "Net" ), UnescapeString( GetNetname() ) );
970
971 aList.emplace_back( _( "Resolved Netclass" ),
972 UnescapeString( GetEffectiveNetClass()->GetName() ) );
973
974#if 0 // Enable for debugging
975 if( GetBoard() )
976 aList.emplace_back( _( "NetCode" ), wxString::Format( wxT( "%d" ), GetNetCode() ) );
977
978 aList.emplace_back( wxT( "Flags" ), wxString::Format( wxT( "0x%08X" ), m_flags ) );
979
980 aList.emplace_back( wxT( "Start pos" ), wxString::Format( wxT( "%d %d" ),
981 m_Start.x,
982 m_Start.y ) );
983 aList.emplace_back( wxT( "End pos" ), wxString::Format( wxT( "%d %d" ),
984 m_End.x,
985 m_End.y ) );
986#endif
987
988 if( aFrame->GetName() == PCB_EDIT_FRAME_NAME && IsLocked() )
989 aList.emplace_back( _( "Status" ), _( "Locked" ) );
990}
991
992
994{
995 const BOARD* board = GetBoard();
996 PCB_LAYER_ID top_layer;
997 PCB_LAYER_ID bottom_layer;
998
999 LayerPair( &top_layer, &bottom_layer );
1000
1001 return board->GetLayerName( top_layer ) + wxT( " - " ) + board->GetLayerName( bottom_layer );
1002}
1003
1004
1005bool PCB_TRACK::HitTest( const VECTOR2I& aPosition, int aAccuracy ) const
1006{
1007 return TestSegmentHit( aPosition, m_Start, m_End, aAccuracy + ( m_Width / 2 ) );
1008}
1009
1010
1011bool PCB_ARC::HitTest( const VECTOR2I& aPosition, int aAccuracy ) const
1012{
1013 int max_dist = aAccuracy + ( m_Width / 2 );
1014
1015 // Short-circuit common cases where the arc is connected to a track or via at an endpoint
1016 if( EuclideanNorm( GetStart() - aPosition ) <= max_dist ||
1017 EuclideanNorm( GetEnd() - aPosition ) <= max_dist )
1018 {
1019 return true;
1020 }
1021
1022 VECTOR2I center = GetPosition();
1023 VECTOR2I relpos = aPosition - center;
1024 double dist = EuclideanNorm( relpos );
1025 double radius = GetRadius();
1026
1027 if( std::abs( dist - radius ) > max_dist )
1028 return false;
1029
1030 EDA_ANGLE arc_angle = GetAngle();
1031 EDA_ANGLE arc_angle_start = GetArcAngleStart(); // Always 0.0 ... 360 deg
1032 EDA_ANGLE arc_hittest( relpos );
1033
1034 // Calculate relative angle between the starting point of the arc, and the test point
1035 arc_hittest -= arc_angle_start;
1036
1037 // Normalise arc_hittest between 0 ... 360 deg
1038 arc_hittest.Normalize();
1039
1040 if( arc_angle < ANGLE_0 )
1041 return arc_hittest >= ANGLE_360 + arc_angle;
1042
1043 return arc_hittest <= arc_angle;
1044}
1045
1046
1047bool PCB_VIA::HitTest( const VECTOR2I& aPosition, int aAccuracy ) const
1048{
1049 int max_dist = aAccuracy + ( m_Width / 2 );
1050
1051 // rel_pos is aPosition relative to m_Start (or the center of the via)
1052 VECTOR2I rel_pos = aPosition - m_Start;
1053 double dist = (double) rel_pos.x * rel_pos.x + (double) rel_pos.y * rel_pos.y;
1054 return dist <= (double) max_dist * max_dist;
1055}
1056
1057
1058bool PCB_TRACK::HitTest( const BOX2I& aRect, bool aContained, int aAccuracy ) const
1059{
1060 BOX2I arect = aRect;
1061 arect.Inflate( aAccuracy );
1062
1063 if( aContained )
1064 return arect.Contains( GetStart() ) && arect.Contains( GetEnd() );
1065 else
1066 return arect.Intersects( GetStart(), GetEnd() );
1067}
1068
1069
1070bool PCB_ARC::HitTest( const BOX2I& aRect, bool aContained, int aAccuracy ) const
1071{
1072 BOX2I arect = aRect;
1073 arect.Inflate( aAccuracy );
1074
1075 BOX2I box( GetStart() );
1076 box.Merge( GetMid() );
1077 box.Merge( GetEnd() );
1078
1079 box.Inflate( GetWidth() / 2 );
1080
1081 if( aContained )
1082 return arect.Contains( box );
1083 else
1084 return arect.Intersects( box );
1085}
1086
1087
1088bool PCB_VIA::HitTest( const BOX2I& aRect, bool aContained, int aAccuracy ) const
1089{
1090 BOX2I arect = aRect;
1091 arect.Inflate( aAccuracy );
1092
1093 BOX2I box( GetStart() );
1094 box.Inflate( GetWidth() / 2 );
1095
1096 if( aContained )
1097 return arect.Contains( box );
1098 else
1099 return arect.IntersectsCircle( GetStart(), GetWidth() / 2 );
1100}
1101
1102
1103wxString PCB_TRACK::GetItemDescription( UNITS_PROVIDER* aUnitsProvider ) const
1104{
1105 return wxString::Format( Type() == PCB_ARC_T ? _("Track (arc) %s on %s, length %s" )
1106 : _("Track %s on %s, length %s" ),
1107 GetNetnameMsg(),
1108 GetLayerName(),
1109 aUnitsProvider->MessageTextFromValue( GetLength() ) );
1110}
1111
1112
1114{
1115 return BITMAPS::add_tracks;
1116}
1117
1119{
1120 assert( aImage->Type() == PCB_TRACE_T );
1121
1122 std::swap( *((PCB_TRACK*) this), *((PCB_TRACK*) aImage) );
1123}
1124
1126{
1127 assert( aImage->Type() == PCB_ARC_T );
1128
1129 std::swap( *this, *static_cast<PCB_ARC*>( aImage ) );
1130}
1131
1133{
1134 assert( aImage->Type() == PCB_VIA_T );
1135
1136 std::swap( *((PCB_VIA*) this), *((PCB_VIA*) aImage) );
1137}
1138
1139
1141{
1143 return center;
1144}
1145
1147{
1148 auto center = CalcArcCenter( m_Start, m_Mid , m_End );
1149 return GetLineLength( center, m_Start );
1150}
1151
1153{
1154 VECTOR2I center = GetPosition();
1155 EDA_ANGLE angle1 = EDA_ANGLE( m_Mid - center ) - EDA_ANGLE( m_Start - center );
1156 EDA_ANGLE angle2 = EDA_ANGLE( m_End - center ) - EDA_ANGLE( m_Mid - center );
1157
1158 return angle1.Normalize180() + angle2.Normalize180();
1159}
1160
1162{
1163 EDA_ANGLE angleStart( m_Start - GetPosition() );
1164 return angleStart.Normalize();
1165}
1166
1168{
1169 EDA_ANGLE angleEnd( m_End - GetPosition() );
1170 return angleEnd.Normalize();
1171}
1172
1173
1175{
1176 if( a->GetNetCode() != b->GetNetCode() )
1177 return a->GetNetCode() < b->GetNetCode();
1178
1179 if( a->GetLayer() != b->GetLayer() )
1180 return a->GetLayer() < b->GetLayer();
1181
1182 if( a->Type() != b->Type() )
1183 return a->Type() < b->Type();
1184
1185 if( a->m_Uuid != b->m_Uuid )
1186 return a->m_Uuid < b->m_Uuid;
1187
1188 return a < b;
1189}
1190
1191
1192std::shared_ptr<SHAPE> PCB_TRACK::GetEffectiveShape( PCB_LAYER_ID aLayer, FLASHING aFlash ) const
1193{
1194 return std::make_shared<SHAPE_SEGMENT>( m_Start, m_End, m_Width );
1195}
1196
1197
1198std::shared_ptr<SHAPE> PCB_VIA::GetEffectiveShape( PCB_LAYER_ID aLayer, FLASHING aFlash ) const
1199{
1200 if( aFlash == FLASHING::ALWAYS_FLASHED
1201 || ( aFlash == FLASHING::DEFAULT && FlashLayer( aLayer ) ) )
1202 {
1203 return std::make_shared<SHAPE_CIRCLE>( m_Start, m_Width / 2 );
1204 }
1205 else
1206 {
1207 return std::make_shared<SHAPE_CIRCLE>( m_Start, GetDrillValue() / 2 );
1208 }
1209}
1210
1211
1212std::shared_ptr<SHAPE> PCB_ARC::GetEffectiveShape( PCB_LAYER_ID aLayer, FLASHING aFlash ) const
1213{
1214 return std::make_shared<SHAPE_ARC>( GetStart(), GetMid(), GetEnd(), GetWidth() );
1215}
1216
1217
1219 int aClearance, int aError, ERROR_LOC aErrorLoc,
1220 bool ignoreLineWidth ) const
1221{
1222 wxASSERT_MSG( !ignoreLineWidth, wxT( "IgnoreLineWidth has no meaning for tracks." ) );
1223
1224
1225 switch( Type() )
1226 {
1227 case PCB_VIA_T:
1228 {
1229 int radius = ( m_Width / 2 ) + aClearance;
1230 TransformCircleToPolygon( aBuffer, m_Start, radius, aError, aErrorLoc );
1231 break;
1232 }
1233
1234 case PCB_ARC_T:
1235 {
1236 const PCB_ARC* arc = static_cast<const PCB_ARC*>( this );
1237 int width = m_Width + ( 2 * aClearance );
1238
1239 TransformArcToPolygon( aBuffer, arc->GetStart(), arc->GetMid(), arc->GetEnd(), width,
1240 aError, aErrorLoc );
1241 break;
1242 }
1243
1244 default:
1245 {
1246 int width = m_Width + ( 2 * aClearance );
1247
1248 TransformOvalToPolygon( aBuffer, m_Start, m_End, width, aError, aErrorLoc );
1249 break;
1250 }
1251 }
1252}
1253
1254
1255static struct TRACK_VIA_DESC
1256{
1258 {
1260 .Undefined( VIATYPE::NOT_DEFINED )
1261 .Map( VIATYPE::THROUGH, _HKI( "Through" ) )
1262 .Map( VIATYPE::BLIND_BURIED, _HKI( "Blind/buried" ) )
1263 .Map( VIATYPE::MICROVIA, _HKI( "Micro" ) );
1264
1266
1267 if( layerEnum.Choices().GetCount() == 0 )
1268 {
1269 layerEnum.Undefined( UNDEFINED_LAYER );
1270
1271 for( LSEQ seq = LSET::AllLayersMask().Seq(); seq; ++seq )
1272 layerEnum.Map( *seq, LSET::Name( *seq ) );
1273 }
1274
1276
1277 // Track
1280
1281 propMgr.AddProperty( new PROPERTY<PCB_TRACK, int>( _HKI( "Width" ),
1283 propMgr.ReplaceProperty( TYPE_HASH( BOARD_ITEM ), _HKI( "Position X" ),
1287 propMgr.ReplaceProperty( TYPE_HASH( BOARD_ITEM ), _HKI( "Position Y" ),
1291 propMgr.AddProperty( new PROPERTY<PCB_TRACK, int>( _HKI( "End X" ),
1294 propMgr.AddProperty( new PROPERTY<PCB_TRACK, int>( _HKI( "End Y" ),
1297
1298 // Arc
1301
1302 // Via
1305
1306 // TODO test drill, use getdrillvalue?
1307 const wxString groupVia = _HKI( "Via Properties" );
1308
1309 propMgr.Mask( TYPE_HASH( PCB_VIA ), TYPE_HASH( BOARD_CONNECTED_ITEM ), _HKI( "Layer" ) );
1310
1311 propMgr.ReplaceProperty( TYPE_HASH( PCB_TRACK ), _HKI( "Width" ),
1312 new PROPERTY<PCB_VIA, int, PCB_TRACK>( _HKI( "Diameter" ),
1314 propMgr.AddProperty( new PROPERTY<PCB_VIA, int>( _HKI( "Hole" ),
1316 propMgr.ReplaceProperty( TYPE_HASH( BOARD_ITEM ), _HKI( "Layer" ),
1318 &PCB_VIA::SetLayer, &PCB_VIA::GetLayer ), groupVia );
1319 propMgr.AddProperty( new PROPERTY_ENUM<PCB_VIA, PCB_LAYER_ID>( _HKI( "Layer Bottom" ),
1321 propMgr.AddProperty( new PROPERTY_ENUM<PCB_VIA, VIATYPE>( _HKI( "Via Type" ),
1323 }
1325
constexpr std::size_t arrayDim(T const (&)[N]) noexcept
Returns # of elements in an array.
Definition: arraydim.h:31
constexpr EDA_IU_SCALE pcbIUScale
Definition: base_units.h:109
BITMAPS
A list of all bitmap identifiers.
Definition: bitmaps_list.h:33
@ ZLC_CONNECTED
Definition: board_item.h:47
@ ZLC_UNCONNECTED
Definition: board_item.h:48
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
wxString GetNetnameMsg() const
virtual NETCLASS * GetEffectiveNetClass() const
Return the NETCLASS for this item.
virtual int GetOwnClearance(PCB_LAYER_ID aLayer, wxString *aSource=nullptr) const
Return an item's "own" clearance in internal units.
wxString GetUnescapedShortNetname() const
Container for design settings for a BOARD object.
std::shared_ptr< DRC_ENGINE > m_DRCEngine
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:58
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:180
int GetY() const
Definition: board_item.h:82
PCB_LAYER_ID m_layer
Definition: board_item.h:329
int GetX() const
Definition: board_item.h:76
void SetX(int aX)
Definition: board_item.h:98
void SetY(int aY)
Definition: board_item.h:104
virtual void SetLayer(PCB_LAYER_ID aLayer)
Set the layer this item is on.
Definition: board_item.h:214
virtual const BOARD * GetBoard() const
Return the BOARD in which this BOARD_ITEM resides, or NULL if none.
Definition: board_item.cpp:43
virtual bool IsLocked() const
Definition: board_item.cpp:71
virtual wxString layerMaskDescribe() const
Return a string (to be shown to the user) describing a layer mask.
Definition: board_item.cpp:106
wxString GetLayerName() const
Return the name of the PCB layer on which the item resides.
Definition: board_item.cpp:94
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:265
LSET GetEnabledLayers() const
A proxy function that calls the corresponding function in m_BoardSettings.
Definition: board.cpp:565
LSET GetVisibleLayers() const
A proxy function that calls the correspondent function in m_BoardSettings.
Definition: board.cpp:579
int GetCopperLayerCount() const
Definition: board.cpp:541
bool GetTentVias() const
Definition: board.h:623
const wxString GetLayerName(PCB_LAYER_ID aLayer) const
Return the name of a aLayer.
Definition: board.cpp:452
std::tuple< int, double, double > GetTrackLength(const PCB_TRACK &aTrack) const
Return data on the length and number of track segments connected to a given track.
Definition: board.cpp:1758
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:682
std::shared_ptr< CONNECTIVITY_DATA > GetConnectivity() const
Return a list of missing connections between components/tracks.
Definition: board.h:424
const Vec & GetOrigin() const
Definition: box2.h:183
bool Intersects(const BOX2< Vec > &aRect) const
Definition: box2.h:269
coord_type GetTop() const
Definition: box2.h:194
bool IntersectsCircle(const Vec &aCenter, const int aRadius) const
Definition: box2.h:452
bool Contains(const Vec &aPoint) const
Definition: box2.h:141
BOX2< Vec > & Inflate(coord_type dx, coord_type dy)
Inflates the rectangle horizontally by dx and vertically by dy.
Definition: box2.h:506
coord_type GetRight() const
Definition: box2.h:189
coord_type GetLeft() const
Definition: box2.h:193
const Vec & GetSize() const
Definition: box2.h:179
coord_type GetBottom() const
Definition: box2.h:190
BOX2< Vec > & Merge(const BOX2< Vec > &aRect)
Modify the position and size of the rectangle in order to contain aRect.
Definition: box2.h:588
wxString GetName() const
Definition: drc_rule.h:149
MINOPTMAX< int > & Value()
Definition: drc_rule.h:142
EDA_ANGLE Normalize()
Definition: eda_angle.h:249
EDA_ANGLE Normalize180()
Definition: eda_angle.h:271
The base class for create windows for drawing purpose.
A base class for most all the KiCad significant classes used in schematics and boards.
Definition: eda_item.h:85
EDA_ITEM & operator=(const EDA_ITEM &aItem)
Assign the members of aItem to another object.
Definition: eda_item.cpp:240
const KIID m_Uuid
Definition: eda_item.h:492
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:97
EDA_ITEM_FLAGS m_flags
Definition: eda_item.h:498
ENUM_MAP & Map(T aValue, const wxString &aName)
Definition: property.h:579
static ENUM_MAP< T > & Instance()
Definition: property.h:573
ENUM_MAP & Undefined(T aValue)
Definition: property.h:586
wxPGChoices & Choices()
Definition: property.h:622
Contains methods for drawing PCB-specific items.
Definition: pcb_painter.h:158
virtual PCB_RENDER_SETTINGS * GetSettings() override
Return a pointer to current settings that are going to be used when drawing items.
Definition: pcb_painter.h:163
PCB specific render settings.
Definition: pcb_painter.h:72
PCB_LAYER_ID GetPrimaryHighContrastLayer() const
Return the board layer which is in high-contrast mode.
bool GetHighContrast() const
Hold a (potentially large) number of VIEW_ITEMs and renders them on a graphics device provided by the...
Definition: view.h:69
BOX2D GetViewport() const
Return the current viewport visible area rectangle.
Definition: view.cpp:511
bool IsLayerVisible(int aLayer) const
Return information about visibility of a particular layer.
Definition: view.h:410
PAINTER * GetPainter() const
Return the painter object used by the view for drawing #VIEW_ITEMS.
Definition: view.h:213
Definition: kiid.h:48
LSEQ is a sequence (and therefore also a set) of PCB_LAYER_IDs.
Definition: layer_ids.h:491
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:530
static LSET AllLayersMask()
Definition: lset.cpp:808
LSEQ Seq(const PCB_LAYER_ID *aWishListSequence, unsigned aCount) const
Return an LSEQ from the union of this LSET and a desired sequence.
Definition: lset.cpp:411
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:773
static LSET PhysicalLayersMask()
Return a mask holding all layers which are physically realized.
Definition: lset.cpp:870
static const wxChar * Name(PCB_LAYER_ID aLayerId)
Return the fixed name association with aLayerId.
Definition: lset.cpp:82
static LSET FrontTechMask()
Return a mask holding all technical layers (no CU layer) on front side.
Definition: lset.cpp:827
static LSET BackTechMask()
Return a mask holding all technical layers (no CU layer) on back side.
Definition: lset.cpp:815
T Min() const
Definition: minoptmax.h:33
bool HasMax() const
Definition: minoptmax.h:38
bool HasMin() const
Definition: minoptmax.h:37
T Max() const
Definition: minoptmax.h:34
A collection of nets and the parameters used to route or test these nets.
Definition: netclass.h:47
int GetViaDrill() const
Definition: netclass.h:84
int GetuViaDrill() const
Definition: netclass.h:92
static const int UNCONNECTED
Constant that forces initialization of a netinfo item to the NETINFO_ITEM ORPHANED (typically -1) whe...
Definition: netinfo.h:382
virtual VECTOR2I GetPosition() const override
Definition: pcb_track.cpp:1140
virtual void swapData(BOARD_ITEM *aImage) override
Definition: pcb_track.cpp:1125
bool IsCCW() const
Definition: pcb_track.cpp:406
EDA_ITEM * Clone() const override
Create a duplicate of this item with linked list members set to NULL.
Definition: pcb_track.cpp:76
EDA_ANGLE GetArcAngleStart() const
Definition: pcb_track.cpp:1161
virtual bool HitTest(const VECTOR2I &aPosition, int aAccuracy=0) const override
Test if aPosition is inside or on the boundary of this item.
Definition: pcb_track.cpp:1011
EDA_ANGLE GetArcAngleEnd() const
Definition: pcb_track.cpp:1167
double GetRadius() const
Definition: pcb_track.cpp:1146
EDA_ANGLE GetAngle() const
Definition: pcb_track.cpp:1152
const VECTOR2I & GetMid() const
Definition: pcb_track.h:312
PCB_ARC(BOARD_ITEM *aParent)
Definition: pcb_track.h:286
void Flip(const VECTOR2I &aCentre, bool aFlipLeftRight) override
Flip this object, i.e.
Definition: pcb_track.cpp:386
VECTOR2I m_Mid
Arc mid point, halfway between start and end.
Definition: pcb_track.h:358
void Rotate(const VECTOR2I &aRotCentre, const EDA_ANGLE &aAngle) override
Rotate this object.
Definition: pcb_track.cpp:328
std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const override
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: pcb_track.cpp:1212
void Mirror(const VECTOR2I &aCentre, bool aMirrorAroundXAxis) override
Definition: pcb_track.cpp:351
double m_CachedScale
Last zoom scale used to draw this track's net (we want to redraw when changing zoom)
Definition: pcb_track.h:279
double m_CachedLOD
Last LOD used to draw this track's net.
Definition: pcb_track.h:278
void Rotate(const VECTOR2I &aRotCentre, const EDA_ANGLE &aAngle) override
Rotate this object.
Definition: pcb_track.cpp:321
virtual void ViewGetLayers(int aLayers[], int &aCount) const override
Return the all the layers within the VIEW the object is painted on.
Definition: pcb_track.cpp:669
int GetLocalClearance(wxString *aSource) const override
Function GetLocalClearance returns any local clearance overrides set in the "classic" (ie: pre-rule) ...
Definition: pcb_track.cpp:166
void SetEndY(int aY)
Definition: pcb_track.h:116
void SetWidth(int aWidth)
Definition: pcb_track.h:106
MINOPTMAX< int > GetWidthConstraint(wxString *aSource) const
Definition: pcb_track.cpp:173
double ViewGetLOD(int aLayer, KIGFX::VIEW *aView) const override
Return the level of detail (LOD) of the item.
Definition: pcb_track.cpp:681
virtual double GetLength() const
Function GetLength returns the length of the track using the hypotenuse calculation.
Definition: pcb_track.cpp:315
int GetWidth() const
Definition: pcb_track.h:107
virtual void swapData(BOARD_ITEM *aImage) override
Definition: pcb_track.cpp:1118
wxString GetItemDescription(UNITS_PROVIDER *aUnitsProvider) const override
Return a user-visible description string of this item.
Definition: pcb_track.cpp:1103
const BOX2I ViewBBox() const override
Return the bounding box of the item covering all its layers.
Definition: pcb_track.cpp:746
int GetEndX() const
Definition: pcb_track.h:118
INSPECT_RESULT Visit(INSPECTOR inspector, void *testData, const std::vector< KICAD_T > &aScanTypes) override
May be re-implemented for each derived class in order to handle all the types given by its member dat...
Definition: pcb_track.cpp:442
bool ApproxCollinear(const PCB_TRACK &aTrack)
Definition: pcb_track.cpp:158
VECTOR2I m_End
Line end point.
Definition: pcb_track.h:276
void GetMsgPanelInfo(EDA_DRAW_FRAME *aFrame, std::vector< MSG_PANEL_ITEM > &aList) override
Populate aList of MSG_PANEL_ITEM objects with it's internal state for display purposes.
Definition: pcb_track.cpp:864
virtual EDA_ITEM * Clone() const override
Create a duplicate of this item with linked list members set to NULL.
Definition: pcb_track.cpp:61
const BOX2I GetBoundingBox() const override
Return the orthogonal bounding box of this object for display purposes.
Definition: pcb_track.cpp:269
void TransformShapeToPolygon(SHAPE_POLY_SET &aBuffer, PCB_LAYER_ID aLayer, int aClearance, int aError, ERROR_LOC aErrorLoc, bool ignoreLineWidth=false) const override
Function TransformShapeToPolygon Convert the track shape to a closed polygon Used in filling zones ca...
Definition: pcb_track.cpp:1218
const VECTOR2I & GetStart() const
Definition: pcb_track.h:113
VECTOR2I m_Start
Line start point.
Definition: pcb_track.h:275
int GetEndY() const
Definition: pcb_track.h:119
wxString GetFriendlyName() const override
Definition: pcb_track.cpp:852
BITMAPS GetMenuImage() const override
Return a pointer to an image to be used in menus.
Definition: pcb_track.cpp:1113
void Flip(const VECTOR2I &aCentre, bool aFlipLeftRight) override
Flip this object, i.e.
Definition: pcb_track.cpp:368
bool HitTest(const VECTOR2I &aPosition, int aAccuracy=0) const override
Test if aPosition is inside or on the boundary of this item.
Definition: pcb_track.cpp:1005
std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const override
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: pcb_track.cpp:1192
const VECTOR2I & GetEnd() const
Definition: pcb_track.h:110
PCB_TRACK(BOARD_ITEM *aParent, KICAD_T idtype=PCB_TRACE_T)
Definition: pcb_track.cpp:52
int m_Width
Thickness of track, or via diameter.
Definition: pcb_track.h:274
void SetEndX(int aX)
Definition: pcb_track.h:115
virtual void Mirror(const VECTOR2I &aCentre, bool aMirrorAroundXAxis)
Definition: pcb_track.cpp:336
EDA_ITEM_FLAGS IsPointOnEnds(const VECTOR2I &point, int min_dist=0) const
Function IsPointOnEnds returns STARTPOINT if point if near (dist = min_dist) start point,...
Definition: pcb_track.cpp:237
void GetMsgPanelInfoBase_Common(EDA_DRAW_FRAME *aFrame, std::vector< MSG_PANEL_ITEM > &aList) const
Definition: pcb_track.cpp:966
bool IsTented() const override
Definition: pcb_track.cpp:464
PCB_LAYER_ID BottomLayer() const
Definition: pcb_track.cpp:600
BITMAPS GetMenuImage() const override
Return a pointer to an image to be used in menus.
Definition: pcb_track.cpp:152
std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const override
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: pcb_track.cpp:1198
bool FlashLayer(int aLayer) const
Checks to see whether the via should have a pad on the specific layer.
Definition: pcb_track.cpp:631
void SetDrillDefault()
Function SetDrillDefault sets the drill value for vias to the default value UNDEFINED_DRILL_DIAMETER.
Definition: pcb_track.h:536
PCB_LAYER_ID m_bottomLayer
The bottom layer of the via (the top layer is in m_layer)
Definition: pcb_track.h:580
bool m_isFree
"Free" vias don't get their nets auto-updated
Definition: pcb_track.h:588
bool HitTest(const VECTOR2I &aPosition, int aAccuracy=0) const override
Test if aPosition is inside or on the boundary of this item.
Definition: pcb_track.cpp:1047
virtual void SetLayerSet(LSET aLayers) override
Definition: pcb_track.cpp:534
void SetBottomLayer(PCB_LAYER_ID aLayer)
Definition: pcb_track.cpp:566
int GetSolderMaskExpansion() const
Definition: pcb_track.cpp:475
void SetDrill(int aDrill)
Function SetDrill sets the drill value for vias.
Definition: pcb_track.h:515
ZONE_LAYER_CONNECTION m_zoneLayerConnections[B_Cu+1]
Definition: pcb_track.h:591
void GetMsgPanelInfo(EDA_DRAW_FRAME *aFrame, std::vector< MSG_PANEL_ITEM > &aList) override
Populate aList of MSG_PANEL_ITEM objects with it's internal state for display purposes.
Definition: pcb_track.cpp:931
EDA_ITEM * Clone() const override
Create a duplicate of this item with linked list members set to NULL.
Definition: pcb_track.cpp:129
int m_drill
for vias: via drill (- 1 for default value)
Definition: pcb_track.h:584
double ViewGetLOD(int aLayer, KIGFX::VIEW *aView) const override
Return the level of detail (LOD) of the item.
Definition: pcb_track.cpp:782
void SetTopLayer(PCB_LAYER_ID aLayer)
Definition: pcb_track.cpp:560
std::shared_ptr< SHAPE_SEGMENT > GetEffectiveHoleShape() const override
Definition: pcb_track.cpp:458
void SetLayerPair(PCB_LAYER_ID aTopLayer, PCB_LAYER_ID aBottomLayer)
Function SetLayerPair For a via m_layer contains the top layer, the other layer is in m_bottomLayer.
Definition: pcb_track.cpp:551
bool m_removeUnconnectedLayer
Remove annular rings on unconnected layers.
Definition: pcb_track.h:586
void ViewGetLayers(int aLayers[], int &aCount) const override
Return the all the layers within the VIEW the object is painted on.
Definition: pcb_track.cpp:760
void SanitizeLayers()
Function SanitizeLayers Check so that the layers are correct dependin on the type of via,...
Definition: pcb_track.cpp:606
PCB_VIA & operator=(const PCB_VIA &aOther)
Definition: pcb_track.cpp:108
void swapData(BOARD_ITEM *aImage) override
Definition: pcb_track.cpp:1132
PCB_VIA(BOARD_ITEM *aParent)
Definition: pcb_track.cpp:82
wxString layerMaskDescribe() const override
Return a string (to be shown to the user) describing a layer mask.
Definition: pcb_track.cpp:993
void SetViaType(VIATYPE aViaType)
Definition: pcb_track.h:394
int GetMinAnnulus(PCB_LAYER_ID aLayer, wxString *aSource) const
Definition: pcb_track.cpp:191
bool IsOnLayer(PCB_LAYER_ID aLayer) const override
Test to see if this object is on the given layer.
Definition: pcb_track.cpp:486
PCB_LAYER_ID TopLayer() const
Definition: pcb_track.cpp:594
wxString GetItemDescription(UNITS_PROVIDER *aUnitsProvider) const override
Return a user-visible description string of this item.
Definition: pcb_track.cpp:135
VIATYPE m_viaType
through, blind/buried or micro
Definition: pcb_track.h:582
bool m_keepStartEndLayer
Keep the start and end annular rings.
Definition: pcb_track.h:587
int GetDrillValue() const
Function GetDrillValue "calculates" the drill value for vias (m-Drill if > 0, or default drill value ...
Definition: pcb_track.cpp:222
VIATYPE GetViaType() const
Definition: pcb_track.h:393
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: pcb_track.cpp:508
void LayerPair(PCB_LAYER_ID *top_layer, PCB_LAYER_ID *bottom_layer) const
Function LayerPair Return the 2 layers used by the via (the via actually uses all layers between thes...
Definition: pcb_track.cpp:572
void Flip(const VECTOR2I &aCentre, bool aFlipLeftRight) override
Flip this object, i.e.
Definition: pcb_track.cpp:415
Provide class metadata.Helper macro to map type hashes to names.
Definition: property_mgr.h:74
void InheritsAfter(TYPE_ID aDerived, TYPE_ID aBase)
Declare an inheritance relationship between types.
void Mask(TYPE_ID aDerived, TYPE_ID aBase, const wxString &aName)
Sets a base class property as masked in a derived class.
static PROPERTY_MANAGER & Instance()
Definition: property_mgr.h:76
void AddProperty(PROPERTY_BASE *aProperty, const wxString &aGroup=wxEmptyString)
Register a property.
void ReplaceProperty(size_t aBase, const wxString &aName, PROPERTY_BASE *aNew, const wxString &aGroup=wxEmptyString)
Replace an existing property for a specific type.
Definition: seg.h:42
bool ApproxCollinear(const SEG &aSeg, int aDistanceThreshold=1) const
Definition: seg.cpp:382
const VECTOR2I & GetArcMid() const
Definition: shape_arc.h:114
const VECTOR2I & GetP1() const
Definition: shape_arc.h:113
const VECTOR2I & GetP0() const
Definition: shape_arc.h:112
Represent a set of closed polygons.
wxString MessageTextFromValue(double aValue, bool aAddUnitLabel=true, EDA_DATA_TYPE aType=EDA_DATA_TYPE::DISTANCE)
A lower-precision version of StringFromValue().
T EuclideanNorm() const
Compute the Euclidean norm of the vector, which is defined as sqrt(x ** 2 + y ** 2).
Definition: vector2d.h:293
extended_type Cross(const VECTOR2< T > &aVector) const
Compute cross product of self with aVector.
Definition: vector2d.h:487
void TransformCircleToPolygon(SHAPE_LINE_CHAIN &aBuffer, const VECTOR2I &aCenter, int aRadius, int aError, ERROR_LOC aErrorLoc, int aMinSegCount=0)
Convert a circle to a polygon, using multiple straight lines.
void TransformArcToPolygon(SHAPE_POLY_SET &aBuffer, const VECTOR2I &aStart, const VECTOR2I &aMid, const VECTOR2I &aEnd, int aWidth, int aError, ERROR_LOC aErrorLoc)
Convert arc to multiple straight segments.
void TransformOvalToPolygon(SHAPE_POLY_SET &aBuffer, const VECTOR2I &aStart, const VECTOR2I &aEnd, int aWidth, int aError, ERROR_LOC aErrorLoc, int aMinSegCount=0)
Convert a oblong shape to a polygon, using multiple segments.
#define _HKI(x)
@ ANNULAR_WIDTH_CONSTRAINT
Definition: drc_rule.h:57
@ TRACK_WIDTH_CONSTRAINT
Definition: drc_rule.h:56
#define _(s)
static constexpr EDA_ANGLE & ANGLE_360
Definition: eda_angle.h:418
static constexpr EDA_ANGLE & ANGLE_0
Definition: eda_angle.h:412
#define PCB_EDIT_FRAME_NAME
INSPECT_RESULT
Definition: eda_item.h:42
const INSPECTOR_FUNC & INSPECTOR
Definition: eda_item.h:78
#define ENDPOINT
ends. (Used to support dragging.)
std::uint32_t EDA_ITEM_FLAGS
#define STARTPOINT
When a line is selected, these flags indicate which.
static std::vector< KICAD_T > connectedTypes
ERROR_LOC
When approximating an arc or circle, should the error be placed on the outside or inside of the curve...
bool ClipLine(const BOX2I *aClipBox, int &x1, int &y1, int &x2, int &y2)
Test if any part of a line falls within the bounds of a rectangle.
Some functions to handle hotkeys in KiCad.
@ LAYER_VIA_NETNAMES
Definition: layer_ids.h:168
FLASHING
Enum used during connectivity building to ensure we do not query connectivity while building the data...
Definition: layer_ids.h:147
@ ALWAYS_FLASHED
int GetNetnameLayer(int aLayer)
Returns a netname layer corresponding to the given layer.
Definition: layer_ids.h:966
@ LAYER_LOCKED_ITEM_SHADOW
shadow layer for locked items
Definition: layer_ids.h:239
@ LAYER_VIA_HOLEWALLS
Definition: layer_ids.h:234
@ LAYER_GP_OVERLAY
general purpose overlay
Definition: layer_ids.h:218
@ LAYER_TRACKS
Definition: layer_ids.h:212
@ LAYER_VIA_HOLES
to draw via holes (pad holes do not use this layer)
Definition: layer_ids.h:215
@ LAYER_VIA_MICROVIA
to draw micro vias
Definition: layer_ids.h:194
@ LAYER_VIA_THROUGH
to draw usual through hole vias
Definition: layer_ids.h:196
@ LAYER_VIAS
Meta control for all vias opacity/visibility.
Definition: layer_ids.h:193
@ LAYER_VIA_BBLIND
to draw blind/buried vias
Definition: layer_ids.h:195
bool IsNetnameLayer(int aLayer)
Test whether a layer is a netname layer.
Definition: layer_ids.h:989
bool IsHoleLayer(int aLayer)
Definition: layer_ids.h:864
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:59
@ B_Mask
Definition: layer_ids.h:106
@ B_Cu
Definition: layer_ids.h:95
@ F_Mask
Definition: layer_ids.h:107
@ UNDEFINED_LAYER
Definition: layer_ids.h:60
@ F_Cu
Definition: layer_ids.h:64
PCB_LAYER_ID FlipLayer(PCB_LAYER_ID aLayerId, int aCopperLayersCount)
Definition: lset.cpp:544
void MIRROR(T &aPoint, const T &aMirrorRef)
Updates aPoint with the mirror of aPoint relative to the aMirrorRef.
Definition: mirror.h:40
EDA_ANGLE abs(const EDA_ANGLE &aAngle)
Definition: eda_angle.h:401
ENUM_TO_WXANY(VIATYPE)
static struct TRACK_VIA_DESC _TRACK_VIA_DESC
VIATYPE
Definition: pcb_track.h:64
@ BLIND_BURIED
#define TYPE_HASH(x)
Definition: property.h:62
@ PT_COORD
Coordinate expressed in distance units (mm/inch)
Definition: property.h:56
@ PT_SIZE
Size expressed in distance units (mm/inch)
Definition: property.h:55
#define REGISTER_TYPE(x)
Definition: property_mgr.h:328
void Format(OUTPUTFORMATTER *out, int aNestLevel, int aCtl, const CPTREE &aTree)
Output a PTREE into s-expression format via an OUTPUTFORMATTER derivative.
Definition: ptree.cpp:200
wxString UnescapeString(const wxString &aSource)
constexpr int mmToIU(double mm) const
Definition: base_units.h:89
bool operator()(const PCB_TRACK *aFirst, const PCB_TRACK *aSecond) const
Definition: pcb_track.cpp:1174
bool TestSegmentHit(const VECTOR2I &aRefPoint, const VECTOR2I &aStart, const VECTOR2I &aEnd, int aDist)
Test if aRefPoint is with aDistance on the line defined by aStart and aEnd.
Definition: trigo.cpp:129
void RotatePoint(int *pX, int *pY, const EDA_ANGLE &aAngle)
Definition: trigo.cpp:183
const VECTOR2I CalcArcCenter(const VECTOR2I &aStart, const VECTOR2I &aMid, const VECTOR2I &aEnd)
Determine the center of an arc or circle given three points on its circumference.
Definition: trigo.cpp:472
double GetLineLength(const VECTOR2I &aPointA, const VECTOR2I &aPointB)
Return the length of a line segment defined by aPointA and aPointB.
Definition: trigo.h:188
double EuclideanNorm(const VECTOR2I &vector)
Definition: trigo.h:129
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:78
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:102
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:103
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:101
constexpr ret_type KiROUND(fp_type v)
Round a floating point number to an integer using "round halfway cases away from zero".
Definition: util.h:85
VECTOR2< int > VECTOR2I
Definition: vector2d.h:618