KiCad PCB EDA Suite
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drc_rule.h
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2020-2023 KiCad Developers, see change_log.txt for contributors.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you may find one here:
18 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19 * or you may search the http://www.gnu.org website for the version 2 license,
20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
24#ifndef DRC_RULE_H
25#define DRC_RULE_H
26
27#include <kiid.h>
28#include <core/typeinfo.h>
29#include <optional>
30#include <core/minoptmax.h>
31#include <layer_ids.h>
32#include <netclass.h>
33#include <zones.h>
35#include <wx/intl.h>
37
38class BOARD_ITEM;
39class PCBEXPR_UCODE;
40class DRC_CONSTRAINT;
42
43
45{
74};
75
76
78{
89};
90
91
93{
94public:
95 DRC_RULE();
96 DRC_RULE( const wxString& aName );
97
98 virtual ~DRC_RULE();
99
100 virtual bool AppliesTo( const BOARD_ITEM* a, const BOARD_ITEM* b = nullptr ) const
101 {
102 return true;
103 };
104
105 void AddConstraint( DRC_CONSTRAINT& aConstraint );
106 std::optional<DRC_CONSTRAINT> FindConstraint( DRC_CONSTRAINT_T aType );
107
108public:
112 wxString m_Name;
116 std::vector<DRC_CONSTRAINT> m_Constraints;
118};
119
120
122{
123 public:
125 const wxString& aName = wxEmptyString ) :
126 m_Type( aType ),
127 m_Value(),
128 m_DisallowFlags( 0 ),
130 m_Test( nullptr ),
131 m_name( aName ),
132 m_parentRule( nullptr )
133 {
134 }
135
136 bool IsNull() const
137 {
138 return m_Type == NULL_CONSTRAINT;
139 }
140
141 const MINOPTMAX<int>& GetValue() const { return m_Value; }
143
144 void SetParentRule( DRC_RULE *aParentRule ) { m_parentRule = aParentRule; }
146
147 void SetName( const wxString& aName ) { m_name = aName; }
148
149 wxString GetName() const
150 {
151 if( m_parentRule )
152 {
154 return m_parentRule->m_Name;
155 else
156 return wxString::Format( _( "rule '%s'" ), m_parentRule->m_Name );
157 }
158
159 return m_name;
160 }
161
163 {
164 if( m_parentRule )
165 return m_parentRule->m_Severity;
166 else
168 }
169
170public:
176
177private:
178 wxString m_name; // For just-in-time constraints
179 DRC_RULE* m_parentRule; // For constraints found in rules
180};
181
182
183const DRC_CONSTRAINT* GetConstraint( const BOARD_ITEM* aItem, const BOARD_ITEM* bItem,
184 int aConstraint, PCB_LAYER_ID aLayer,
185 wxString* aRuleName = nullptr );
186
187
188#endif // DRC_RULE_H
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:77
DRC_RULE_CONDITION * m_Test
Definition: drc_rule.h:175
wxString GetName() const
Definition: drc_rule.h:149
int m_DisallowFlags
Definition: drc_rule.h:173
SEVERITY GetSeverity() const
Definition: drc_rule.h:162
DRC_RULE * m_parentRule
Definition: drc_rule.h:179
void SetParentRule(DRC_RULE *aParentRule)
Definition: drc_rule.h:144
MINOPTMAX< int > & Value()
Definition: drc_rule.h:142
const MINOPTMAX< int > & GetValue() const
Definition: drc_rule.h:141
ZONE_CONNECTION m_ZoneConnection
Definition: drc_rule.h:174
void SetName(const wxString &aName)
Definition: drc_rule.h:147
MINOPTMAX< int > m_Value
Definition: drc_rule.h:172
DRC_CONSTRAINT_T m_Type
Definition: drc_rule.h:171
wxString m_name
Definition: drc_rule.h:178
DRC_RULE * GetParentRule() const
Definition: drc_rule.h:145
DRC_CONSTRAINT(DRC_CONSTRAINT_T aType=NULL_CONSTRAINT, const wxString &aName=wxEmptyString)
Definition: drc_rule.h:124
bool IsNull() const
Definition: drc_rule.h:136
SEVERITY m_Severity
Definition: drc_rule.h:117
bool m_Unary
Definition: drc_rule.h:109
DRC_RULE_CONDITION * m_Condition
Definition: drc_rule.h:115
LSET m_LayerCondition
Definition: drc_rule.h:114
virtual bool AppliesTo(const BOARD_ITEM *a, const BOARD_ITEM *b=nullptr) const
Definition: drc_rule.h:100
KIID m_ImplicitItemId
Definition: drc_rule.h:111
DRC_RULE()
Definition: drc_rule.cpp:31
std::vector< DRC_CONSTRAINT > m_Constraints
Definition: drc_rule.h:116
bool m_Implicit
Definition: drc_rule.h:110
wxString m_Name
Definition: drc_rule.h:112
void AddConstraint(DRC_CONSTRAINT &aConstraint)
Definition: drc_rule.cpp:60
wxString m_LayerSource
Definition: drc_rule.h:113
virtual ~DRC_RULE()
Definition: drc_rule.cpp:54
std::optional< DRC_CONSTRAINT > FindConstraint(DRC_CONSTRAINT_T aType)
Definition: drc_rule.cpp:67
Definition: kiid.h:49
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:575
const DRC_CONSTRAINT * GetConstraint(const BOARD_ITEM *aItem, const BOARD_ITEM *bItem, int aConstraint, PCB_LAYER_ID aLayer, wxString *aRuleName=nullptr)
DRC_DISALLOW_T
Definition: drc_rule.h:78
@ DRC_DISALLOW_PADS
Definition: drc_rule.h:83
@ DRC_DISALLOW_VIAS
Definition: drc_rule.h:79
@ DRC_DISALLOW_TEXTS
Definition: drc_rule.h:85
@ DRC_DISALLOW_ZONES
Definition: drc_rule.h:84
@ DRC_DISALLOW_HOLES
Definition: drc_rule.h:87
@ DRC_DISALLOW_GRAPHICS
Definition: drc_rule.h:86
@ DRC_DISALLOW_FOOTPRINTS
Definition: drc_rule.h:88
@ DRC_DISALLOW_TRACKS
Definition: drc_rule.h:82
@ DRC_DISALLOW_MICRO_VIAS
Definition: drc_rule.h:80
@ DRC_DISALLOW_BB_VIAS
Definition: drc_rule.h:81
DRC_CONSTRAINT_T
Definition: drc_rule.h:45
@ ANNULAR_WIDTH_CONSTRAINT
Definition: drc_rule.h:57
@ COURTYARD_CLEARANCE_CONSTRAINT
Definition: drc_rule.h:52
@ VIA_DIAMETER_CONSTRAINT
Definition: drc_rule.h:63
@ ZONE_CONNECTION_CONSTRAINT
Definition: drc_rule.h:58
@ DIFF_PAIR_GAP_CONSTRAINT
Definition: drc_rule.h:66
@ DISALLOW_CONSTRAINT
Definition: drc_rule.h:62
@ TRACK_WIDTH_CONSTRAINT
Definition: drc_rule.h:56
@ SILK_CLEARANCE_CONSTRAINT
Definition: drc_rule.h:53
@ EDGE_CLEARANCE_CONSTRAINT
Definition: drc_rule.h:50
@ MIN_RESOLVED_SPOKES_CONSTRAINT
Definition: drc_rule.h:61
@ TEXT_THICKNESS_CONSTRAINT
Definition: drc_rule.h:55
@ LENGTH_CONSTRAINT
Definition: drc_rule.h:64
@ VIA_COUNT_CONSTRAINT
Definition: drc_rule.h:69
@ PHYSICAL_HOLE_CLEARANCE_CONSTRAINT
Definition: drc_rule.h:71
@ CLEARANCE_CONSTRAINT
Definition: drc_rule.h:47
@ NULL_CONSTRAINT
Definition: drc_rule.h:46
@ THERMAL_SPOKE_WIDTH_CONSTRAINT
Definition: drc_rule.h:60
@ CONNECTION_WIDTH_CONSTRAINT
Definition: drc_rule.h:73
@ THERMAL_RELIEF_GAP_CONSTRAINT
Definition: drc_rule.h:59
@ MAX_UNCOUPLED_CONSTRAINT
Definition: drc_rule.h:67
@ ASSERTION_CONSTRAINT
Definition: drc_rule.h:72
@ SKEW_CONSTRAINT
Definition: drc_rule.h:65
@ HOLE_CLEARANCE_CONSTRAINT
Definition: drc_rule.h:48
@ HOLE_SIZE_CONSTRAINT
Definition: drc_rule.h:51
@ TEXT_HEIGHT_CONSTRAINT
Definition: drc_rule.h:54
@ DIFF_PAIR_INTRA_SKEW_CONSTRAINT
Definition: drc_rule.h:68
@ PHYSICAL_CLEARANCE_CONSTRAINT
Definition: drc_rule.h:70
@ HOLE_TO_HOLE_CONSTRAINT
Definition: drc_rule.h:49
#define _(s)
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
SEVERITY
@ RPT_SEVERITY_UNDEFINED
ZONE_CONNECTION
How pads are covered by copper in zone.
Definition: zones.h:47