KiCad PCB EDA Suite
PNS_KICAD_IFACE_BASE Class Reference

#include <pns_kicad_iface.h>

Inheritance diagram for PNS_KICAD_IFACE_BASE:
PNS::ROUTER_IFACE PNS_KICAD_IFACE PNS_LOG_PLAYER_KICAD_IFACE

Public Member Functions

 PNS_KICAD_IFACE_BASE ()
 
 ~PNS_KICAD_IFACE_BASE ()
 
void EraseView () override
 
void SetBoard (BOARD *aBoard)
 
void SyncWorld (PNS::NODE *aWorld) override
 
bool IsAnyLayerVisible (const LAYER_RANGE &aLayer) const override
 
bool IsFlashedOnLayer (const PNS::ITEM *aItem, int aLayer) const override
 
bool IsItemVisible (const PNS::ITEM *aItem) const override
 
void HideItem (PNS::ITEM *aItem) override
 
void DisplayItem (const PNS::ITEM *aItem, int aClearance, bool aEdit=false, bool aIsHeadTrace=false) override
 
void DisplayRatline (const SHAPE_LINE_CHAIN &aRatline, int aNetCode) override
 
void AddItem (PNS::ITEM *aItem) override
 
void UpdateItem (PNS::ITEM *aItem) override
 
void RemoveItem (PNS::ITEM *aItem) override
 
void Commit () override
 
bool ImportSizes (PNS::SIZES_SETTINGS &aSizes, PNS::ITEM *aStartItem, int aNet) override
 
int StackupHeight (int aFirstLayer, int aSecondLayer) const override
 
void UpdateNet (int aNetCode) override
 
void SetDebugDecorator (PNS::DEBUG_DECORATOR *aDec)
 
void SetStartLayer (int aLayer)
 
virtual PNS::NODEGetWorld () const override
 
BOARDGetBoard () const
 
virtual EDA_UNITS GetUnits () const
 
PNS::RULE_RESOLVERGetRuleResolver () override
 
PNS::DEBUG_DECORATORGetDebugDecorator () override
 

Protected Member Functions

std::unique_ptr< PNS::SOLIDsyncPad (PAD *aPad)
 
std::unique_ptr< PNS::SEGMENTsyncTrack (PCB_TRACK *aTrack)
 
std::unique_ptr< PNS::ARCsyncArc (PCB_ARC *aArc)
 
std::unique_ptr< PNS::VIAsyncVia (PCB_VIA *aVia)
 
bool syncTextItem (PNS::NODE *aWorld, EDA_TEXT *aText, PCB_LAYER_ID aLayer)
 
bool syncGraphicalItem (PNS::NODE *aWorld, PCB_SHAPE *aItem)
 
bool syncZone (PNS::NODE *aWorld, ZONE *aZone, SHAPE_POLY_SET *aBoardOutline)
 
bool inheritTrackWidth (PNS::ITEM *aItem, int *aInheritedWidth)
 

Protected Attributes

PNS_PCBNEW_RULE_RESOLVERm_ruleResolver
 
PNS::DEBUG_DECORATORm_debugDecorator
 
PNS::NODEm_world
 
BOARDm_board
 
int m_startLayer
 

Detailed Description

Definition at line 49 of file pns_kicad_iface.h.

Constructor & Destructor Documentation

◆ PNS_KICAD_IFACE_BASE()

PNS_KICAD_IFACE_BASE::PNS_KICAD_IFACE_BASE ( )

Definition at line 1030 of file pns_kicad_iface.cpp.

1031{
1032 m_ruleResolver = nullptr;
1033 m_board = nullptr;
1034 m_world = nullptr;
1035 m_debugDecorator = nullptr;
1036 m_startLayer = -1;
1037}
PNS::DEBUG_DECORATOR * m_debugDecorator
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver

References m_board, m_debugDecorator, m_ruleResolver, m_startLayer, and m_world.

◆ ~PNS_KICAD_IFACE_BASE()

PNS_KICAD_IFACE_BASE::~PNS_KICAD_IFACE_BASE ( )

Definition at line 1049 of file pns_kicad_iface.cpp.

1050{
1051}

Member Function Documentation

◆ AddItem()

void PNS_KICAD_IFACE_BASE::AddItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1796 of file pns_kicad_iface.cpp.

1797{
1798
1799}

◆ Commit()

void PNS_KICAD_IFACE_BASE::Commit ( )
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 67 of file pns_kicad_iface.h.

67{}

◆ DisplayItem()

void PNS_KICAD_IFACE_BASE::DisplayItem ( const PNS::ITEM aItem,
int  aClearance,
bool  aEdit = false,
bool  aIsHeadTrace = false 
)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE, and PNS_LOG_PLAYER_KICAD_IFACE.

Definition at line 62 of file pns_kicad_iface.h.

62{}

◆ DisplayRatline()

void PNS_KICAD_IFACE_BASE::DisplayRatline ( const SHAPE_LINE_CHAIN aRatline,
int  aNetCode 
)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 63 of file pns_kicad_iface.h.

63{}

◆ EraseView()

void PNS_KICAD_IFACE_BASE::EraseView ( )
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 55 of file pns_kicad_iface.h.

55{};

◆ GetBoard()

BOARD * PNS_KICAD_IFACE_BASE::GetBoard ( ) const
inline

Definition at line 79 of file pns_kicad_iface.h.

79{ return m_board; }

References m_board.

Referenced by ROUTER_TOOL::saveRouterDebugLog().

◆ GetDebugDecorator()

PNS::DEBUG_DECORATOR * PNS_KICAD_IFACE_BASE::GetDebugDecorator ( )
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 1024 of file pns_kicad_iface.cpp.

1025{
1026 return m_debugDecorator;
1027}

References m_debugDecorator.

◆ GetRuleResolver()

PNS::RULE_RESOLVER * PNS_KICAD_IFACE_BASE::GetRuleResolver ( )
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 1942 of file pns_kicad_iface.cpp.

1943{
1944 return m_ruleResolver;
1945}

References m_ruleResolver.

Referenced by ROUTER_TOOL::UpdateMessagePanel().

◆ GetUnits()

virtual EDA_UNITS PNS_KICAD_IFACE_BASE::GetUnits ( ) const
inlinevirtual

Reimplemented in PNS_KICAD_IFACE.

Definition at line 81 of file pns_kicad_iface.h.

81{ return EDA_UNITS::MILLIMETRES; };

References MILLIMETRES.

Referenced by syncZone().

◆ GetWorld()

virtual PNS::NODE * PNS_KICAD_IFACE_BASE::GetWorld ( ) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 77 of file pns_kicad_iface.h.

77{ return m_world; };

References m_world.

◆ HideItem()

void PNS_KICAD_IFACE_BASE::HideItem ( PNS::ITEM aItem)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE, and PNS_LOG_PLAYER_KICAD_IFACE.

Definition at line 61 of file pns_kicad_iface.h.

61{}

◆ ImportSizes()

bool PNS_KICAD_IFACE_BASE::ImportSizes ( PNS::SIZES_SETTINGS aSizes,
PNS::ITEM aStartItem,
int  aNet 
)
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 590 of file pns_kicad_iface.cpp.

592{
594 PNS::CONSTRAINT constraint;
595
596 if( aStartItem && m_startLayer < 0 )
597 m_startLayer = aStartItem->Layer();
598
599 aSizes.SetMinClearance( bds.m_MinClearance );
600 aSizes.SetClearanceSource( _( "board minimum clearance" ) );
601
603 m_startLayer, &constraint ) )
604 {
605 if( constraint.m_Value.Min() > bds.m_MinClearance )
606 {
607 aSizes.SetMinClearance( constraint.m_Value.Min() );
608 aSizes.SetClearanceSource( constraint.m_RuleName );
609 }
610 }
611
612 int trackWidth = bds.m_TrackMinWidth;
613 bool found = false;
614 aSizes.SetWidthSource( _( "board minimum track width" ) );
615
616 if( bds.m_UseConnectedTrackWidth && !bds.m_TempOverrideTrackWidth && aStartItem != nullptr )
617 {
618 found = inheritTrackWidth( aStartItem, &trackWidth );
619
620 if( found )
621 aSizes.SetWidthSource( _( "existing track" ) );
622 }
623
624 if( !found && bds.UseNetClassTrack() && aStartItem )
625 {
627 m_startLayer, &constraint ) )
628 {
629 trackWidth = std::max( trackWidth, constraint.m_Value.Opt() );
630 found = true;
631
632 if( trackWidth == constraint.m_Value.Opt() )
633 aSizes.SetWidthSource( constraint.m_RuleName );
634 }
635 }
636
637 if( !found )
638 {
639 trackWidth = std::max( trackWidth, bds.GetCurrentTrackWidth() );
640
641 if( bds.UseNetClassTrack() )
642 aSizes.SetWidthSource( _( "netclass 'Default'" ) );
643 else if( trackWidth == bds.GetCurrentTrackWidth() )
644 aSizes.SetWidthSource( _( "user choice" ) );
645 }
646
647 aSizes.SetTrackWidth( trackWidth );
649
650 int viaDiameter = bds.m_ViasMinSize;
651 int viaDrill = bds.m_MinThroughDrill;
652
653 if( bds.UseNetClassVia() && aStartItem ) // netclass value
654 {
656 nullptr, m_startLayer, &constraint ) )
657 {
658 viaDiameter = std::max( viaDiameter, constraint.m_Value.Opt() );
659 }
660
662 nullptr, m_startLayer, &constraint ) )
663 {
664 viaDrill = std::max( viaDrill, constraint.m_Value.Opt() );
665 }
666 }
667 else
668 {
669 viaDiameter = bds.GetCurrentViaSize();
670 viaDrill = bds.GetCurrentViaDrill();
671 }
672
673 aSizes.SetViaDiameter( viaDiameter );
674 aSizes.SetViaDrill( viaDrill );
675
676 int diffPairWidth = bds.m_TrackMinWidth;
677 int diffPairGap = bds.m_MinClearance;
678 int diffPairViaGap = bds.m_MinClearance;
679
680 aSizes.SetDiffPairWidthSource( _( "board minimum track width" ) );
681 aSizes.SetDiffPairGapSource( _( "board minimum clearance" ) );
682
683 found = false;
684
685 // First try to pick up diff pair width from starting track, if enabled
686 if( bds.m_UseConnectedTrackWidth && aStartItem )
687 found = inheritTrackWidth( aStartItem, &diffPairWidth );
688
689 // Next, pick up gap from netclass, and width also if we didn't get a starting width above
690 if( bds.UseNetClassDiffPair() && aStartItem )
691 {
693 nullptr, m_startLayer, &constraint ) )
694 {
695 diffPairWidth = std::max( diffPairWidth, constraint.m_Value.Opt() );
696
697 if( diffPairWidth == constraint.m_Value.Opt() )
698 aSizes.SetDiffPairWidthSource( constraint.m_RuleName );
699 }
700
702 nullptr, m_startLayer, &constraint ) )
703 {
704 diffPairGap = std::max( diffPairGap, constraint.m_Value.Opt() );
705 diffPairViaGap = std::max( diffPairViaGap, constraint.m_Value.Opt() );
706
707 if( diffPairGap == constraint.m_Value.Opt() )
708 aSizes.SetDiffPairGapSource( constraint.m_RuleName );
709 }
710 }
711 else
712 {
713 diffPairWidth = bds.GetCurrentDiffPairWidth();
714 diffPairGap = bds.GetCurrentDiffPairGap();
715 diffPairViaGap = bds.GetCurrentDiffPairViaGap();
716
717 aSizes.SetDiffPairWidthSource( _( "user choice" ) );
718 aSizes.SetDiffPairGapSource( _( "user choice" ) );
719 }
720
721 aSizes.SetDiffPairWidth( diffPairWidth );
722 aSizes.SetDiffPairGap( diffPairGap );
723 aSizes.SetDiffPairViaGap( diffPairViaGap );
724 aSizes.SetDiffPairViaGapSameAsTraceGap( false );
725
726 int holeToHoleMin = bds.m_HoleToHoleMin;
727 PNS::VIA dummyVia;
728
730 &dummyVia, UNDEFINED_LAYER, &constraint ) )
731 {
732 holeToHoleMin = constraint.m_Value.Min();
733 }
734
735 aSizes.SetHoleToHole( holeToHoleMin );
736
737 return true;
738}
Container for design settings for a BOARD object.
bool UseNetClassVia() const
Return true if netclass values should be used to obtain appropriate via size.
bool UseNetClassTrack() const
Return true if netclass values should be used to obtain appropriate track width.
bool UseNetClassDiffPair() const
Return true if netclass values should be used to obtain appropriate diff pair dimensions.
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:682
T Min() const
Definition: minoptmax.h:33
T Opt() const
Definition: minoptmax.h:35
virtual int Layer() const
Definition: pns_item.h:160
void SetTrackWidth(int aWidth)
void SetDiffPairViaGapSameAsTraceGap(bool aEnable)
void SetDiffPairWidth(int aWidth)
void SetDiffPairWidthSource(const wxString &aSource)
void SetDiffPairGapSource(const wxString &aSource)
void SetDiffPairGap(int aGap)
void SetHoleToHole(int aHoleToHole)
void SetViaDrill(int aDrill)
void SetDiffPairViaGap(int aGap)
void SetMinClearance(int aClearance)
void SetViaDiameter(int aDiameter)
void SetClearanceSource(const wxString &aSource)
void SetWidthSource(const wxString &aSource)
void SetTrackWidthIsExplicit(bool aIsExplicit)
bool inheritTrackWidth(PNS::ITEM *aItem, int *aInheritedWidth)
virtual bool QueryConstraint(PNS::CONSTRAINT_TYPE aType, const PNS::ITEM *aItemA, const PNS::ITEM *aItemB, int aLayer, PNS::CONSTRAINT *aConstraint) override
#define _(s)
@ UNDEFINED_LAYER
Definition: layer_ids.h:60
wxString m_RuleName
Definition: pns_node.h:72
MINOPTMAX< int > m_Value
Definition: pns_node.h:70

References _, PNS::CT_CLEARANCE, PNS::CT_DIFF_PAIR_GAP, PNS::CT_HOLE_TO_HOLE, PNS::CT_VIA_DIAMETER, PNS::CT_VIA_HOLE, PNS::CT_WIDTH, BOARD_DESIGN_SETTINGS::GetCurrentDiffPairGap(), BOARD_DESIGN_SETTINGS::GetCurrentDiffPairViaGap(), BOARD_DESIGN_SETTINGS::GetCurrentDiffPairWidth(), BOARD_DESIGN_SETTINGS::GetCurrentTrackWidth(), BOARD_DESIGN_SETTINGS::GetCurrentViaDrill(), BOARD_DESIGN_SETTINGS::GetCurrentViaSize(), BOARD::GetDesignSettings(), inheritTrackWidth(), PNS::ITEM::Layer(), m_board, BOARD_DESIGN_SETTINGS::m_HoleToHoleMin, BOARD_DESIGN_SETTINGS::m_MinClearance, BOARD_DESIGN_SETTINGS::m_MinThroughDrill, PNS::CONSTRAINT::m_RuleName, m_ruleResolver, m_startLayer, BOARD_DESIGN_SETTINGS::m_TempOverrideTrackWidth, BOARD_DESIGN_SETTINGS::m_TrackMinWidth, BOARD_DESIGN_SETTINGS::m_UseConnectedTrackWidth, PNS::CONSTRAINT::m_Value, BOARD_DESIGN_SETTINGS::m_ViasMinSize, MINOPTMAX< T >::Min(), MINOPTMAX< T >::Opt(), PNS_PCBNEW_RULE_RESOLVER::QueryConstraint(), PNS::SIZES_SETTINGS::SetClearanceSource(), PNS::SIZES_SETTINGS::SetDiffPairGap(), PNS::SIZES_SETTINGS::SetDiffPairGapSource(), PNS::SIZES_SETTINGS::SetDiffPairViaGap(), PNS::SIZES_SETTINGS::SetDiffPairViaGapSameAsTraceGap(), PNS::SIZES_SETTINGS::SetDiffPairWidth(), PNS::SIZES_SETTINGS::SetDiffPairWidthSource(), PNS::SIZES_SETTINGS::SetHoleToHole(), PNS::SIZES_SETTINGS::SetMinClearance(), PNS::SIZES_SETTINGS::SetTrackWidth(), PNS::SIZES_SETTINGS::SetTrackWidthIsExplicit(), PNS::SIZES_SETTINGS::SetViaDiameter(), PNS::SIZES_SETTINGS::SetViaDrill(), PNS::SIZES_SETTINGS::SetWidthSource(), UNDEFINED_LAYER, BOARD_DESIGN_SETTINGS::UseNetClassDiffPair(), BOARD_DESIGN_SETTINGS::UseNetClassTrack(), and BOARD_DESIGN_SETTINGS::UseNetClassVia().

Referenced by ROUTER_TOOL::onTrackViaSizeChanged(), and ROUTER_TOOL::prepareInteractive().

◆ inheritTrackWidth()

bool PNS_KICAD_IFACE_BASE::inheritTrackWidth ( PNS::ITEM aItem,
int *  aInheritedWidth 
)
protected

Definition at line 527 of file pns_kicad_iface.cpp.

528{
529 VECTOR2I p;
530
531 assert( aItem->Owner() != nullptr );
532
533 auto tryGetTrackWidth =
534 []( PNS::ITEM* aPnsItem ) -> int
535 {
536 switch( aPnsItem->Kind() )
537 {
538 case PNS::ITEM::SEGMENT_T: return static_cast<PNS::SEGMENT*>( aPnsItem )->Width();
539 case PNS::ITEM::ARC_T: return static_cast<PNS::ARC*>( aPnsItem )->Width();
540 default: return -1;
541 }
542 };
543
544 int itemTrackWidth = tryGetTrackWidth( aItem );
545
546 if( itemTrackWidth > 0 )
547 {
548 *aInheritedWidth = itemTrackWidth;
549 return true;
550 }
551
552 switch( aItem->Kind() )
553 {
554 case PNS::ITEM::VIA_T:
555 p = static_cast<PNS::VIA*>( aItem )->Pos();
556 break;
557
559 p = static_cast<PNS::SOLID*>( aItem )->Pos();
560 break;
561
562 default:
563 return false;
564 }
565
566 PNS::JOINT* jt = static_cast<PNS::NODE*>( aItem->Owner() )->FindJoint( p, aItem );
567
568 assert( jt != nullptr );
569
570 int mval = INT_MAX;
571
572 PNS::ITEM_SET linkedSegs = jt->Links();
574
575 for( PNS::ITEM* item : linkedSegs.Items() )
576 {
577 int w = tryGetTrackWidth( item );
578 assert( w > 0 );
579 mval = std::min( w, mval );
580 }
581
582 if( mval == INT_MAX )
583 return false;
584
585 *aInheritedWidth = mval;
586 return true;
587}
ITEM_SET & ExcludeItem(const ITEM *aItem)
ITEM_SET & FilterKinds(int aKindMask, bool aInvert=false)
Definition: pns_itemset.cpp:68
ENTRIES & Items()
Definition: pns_itemset.h:135
Base class for PNS router board items.
Definition: pns_item.h:56
PnsKind Kind() const
Return the type (kind) of the item.
Definition: pns_item.h:132
NODE * Owner() const
Return the owner of this item, or NULL if there's none.
Definition: pns_item.h:173
@ SOLID_T
Definition: pns_item.h:63
@ SEGMENT_T
Definition: pns_item.h:66
A 2D point on a given set of layers and belonging to a certain net, that links together a number of b...
Definition: pns_joint.h:43
ITEM_SET & Links()
Definition: pns_joint.h:251
Keep the router "world" - i.e.
Definition: pns_node.h:156

References PNS::ITEM::ARC_T, PNS::ITEM_SET::ExcludeItem(), PNS::ITEM_SET::FilterKinds(), PNS::ITEM_SET::Items(), PNS::ITEM::Kind(), PNS::JOINT::Links(), PNS::ITEM::Owner(), PNS::ITEM::SEGMENT_T, PNS::ITEM::SOLID_T, and PNS::ITEM::VIA_T.

Referenced by ImportSizes().

◆ IsAnyLayerVisible()

bool PNS_KICAD_IFACE_BASE::IsAnyLayerVisible ( const LAYER_RANGE aLayer) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 58 of file pns_kicad_iface.h.

58{ return true; };

◆ IsFlashedOnLayer()

bool PNS_KICAD_IFACE_BASE::IsFlashedOnLayer ( const PNS::ITEM aItem,
int  aLayer 
) const
overridevirtual

Default is all layers

Implements PNS::ROUTER_IFACE.

Definition at line 1417 of file pns_kicad_iface.cpp.

1418{
1420 if( aLayer < 0 )
1421 return true;
1422
1423 if( aItem->Parent() )
1424 {
1425 switch( aItem->Parent()->Type() )
1426 {
1427 case PCB_VIA_T:
1428 {
1429 const PCB_VIA* via = static_cast<const PCB_VIA*>( aItem->Parent() );
1430
1431 return via->FlashLayer( ToLAYER_ID( aLayer ) );
1432 }
1433
1434 case PCB_PAD_T:
1435 {
1436 const PAD* pad = static_cast<const PAD*>( aItem->Parent() );
1437
1438 return pad->FlashLayer( ToLAYER_ID( aLayer ) );
1439 }
1440
1441 default:
1442 break;
1443 }
1444 }
1445
1446 return aItem->Layers().Overlaps( aLayer );
1447}
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:97
bool Overlaps(const LAYER_RANGE &aOther) const
Definition: pns_layerset.h:67
Definition: pad.h:59
BOARD_ITEM * Parent() const
Definition: pns_item.h:151
const LAYER_RANGE & Layers() const
Definition: pns_item.h:156
PCB_LAYER_ID ToLAYER_ID(int aLayer)
Definition: lset.cpp:932
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:102
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87

References PNS::ITEM::Layers(), LAYER_RANGE::Overlaps(), pad, PNS::ITEM::Parent(), PCB_PAD_T, PCB_VIA_T, ToLAYER_ID(), EDA_ITEM::Type(), and via.

◆ IsItemVisible()

bool PNS_KICAD_IFACE_BASE::IsItemVisible ( const PNS::ITEM aItem) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 60 of file pns_kicad_iface.h.

60{ return true; };

◆ RemoveItem()

void PNS_KICAD_IFACE_BASE::RemoveItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1704 of file pns_kicad_iface.cpp.

1705{
1706}

◆ SetBoard()

void PNS_KICAD_IFACE_BASE::SetBoard ( BOARD aBoard)

Definition at line 1395 of file pns_kicad_iface.cpp.

1396{
1397 m_board = aBoard;
1398 wxLogTrace( wxT( "PNS" ), wxT( "m_board = %p" ), m_board );
1399}

References m_board.

Referenced by PNS::TOOL_BASE::Reset().

◆ SetDebugDecorator()

void PNS_KICAD_IFACE_BASE::SetDebugDecorator ( PNS::DEBUG_DECORATOR aDec)

Definition at line 1601 of file pns_kicad_iface.cpp.

1602{
1603 m_debugDecorator = aDec;
1604}

References m_debugDecorator.

◆ SetStartLayer()

void PNS_KICAD_IFACE_BASE::SetStartLayer ( int  aLayer)
inline

Definition at line 75 of file pns_kicad_iface.h.

75{ m_startLayer = aLayer; }

References m_startLayer.

Referenced by ROUTER_TOOL::prepareInteractive().

◆ StackupHeight()

int PNS_KICAD_IFACE_BASE::StackupHeight ( int  aFirstLayer,
int  aSecondLayer 
) const
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 741 of file pns_kicad_iface.cpp.

742{
744 return 0;
745
747
748 return stackup.GetLayerDistance( ToLAYER_ID( aFirstLayer ), ToLAYER_ID( aSecondLayer ) );
749}
BOARD_STACKUP & GetStackupDescriptor()
bool m_UseHeightForLengthCalcs
Enable inclusion of stackup height in track length measurements and length tuning.
Manage layers needed to make a physical board.
int GetLayerDistance(PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer) const
Calculate the distance (height) between the two given copper layers.

References BOARD::GetDesignSettings(), BOARD_STACKUP::GetLayerDistance(), BOARD_DESIGN_SETTINGS::GetStackupDescriptor(), m_board, BOARD_DESIGN_SETTINGS::m_UseHeightForLengthCalcs, and ToLAYER_ID().

◆ syncArc()

std::unique_ptr< PNS::ARC > PNS_KICAD_IFACE_BASE::syncArc ( PCB_ARC aArc)
protected

Definition at line 1175 of file pns_kicad_iface.cpp.

1176{
1177 auto arc = std::make_unique<PNS::ARC>(
1178 SHAPE_ARC( aArc->GetStart(), aArc->GetMid(), aArc->GetEnd(), aArc->GetWidth() ),
1179 aArc->GetNetCode() );
1180
1181 arc->SetLayers( LAYER_RANGE( aArc->GetLayer() ) );
1182 arc->SetParent( aArc );
1183
1184 if( aArc->IsLocked() )
1185 arc->Mark( PNS::MK_LOCKED );
1186
1187 return arc;
1188}
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:180
virtual bool IsLocked() const
Definition: board_item.cpp:71
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:32
const VECTOR2I & GetMid() const
Definition: pcb_track.h:312
int GetWidth() const
Definition: pcb_track.h:107
const VECTOR2I & GetStart() const
Definition: pcb_track.h:113
const VECTOR2I & GetEnd() const
Definition: pcb_track.h:110
@ MK_LOCKED
Definition: pns_item.h:43

References PCB_TRACK::GetEnd(), BOARD_ITEM::GetLayer(), PCB_ARC::GetMid(), BOARD_CONNECTED_ITEM::GetNetCode(), PCB_TRACK::GetStart(), PCB_TRACK::GetWidth(), BOARD_ITEM::IsLocked(), and PNS::MK_LOCKED.

Referenced by SyncWorld().

◆ syncGraphicalItem()

bool PNS_KICAD_IFACE_BASE::syncGraphicalItem ( PNS::NODE aWorld,
PCB_SHAPE aItem 
)
protected

Definition at line 1348 of file pns_kicad_iface.cpp.

1349{
1350 if( aItem->GetLayer() == Edge_Cuts
1351 || aItem->GetLayer() == Margin
1352 || IsCopperLayer( aItem->GetLayer() ) )
1353 {
1354 std::vector<SHAPE*> shapes = aItem->MakeEffectiveShapes();
1355
1356 for( SHAPE* shape : shapes )
1357 {
1358 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1359
1360 if( aItem->GetLayer() == Edge_Cuts || aItem->GetLayer() == Margin )
1361 solid->SetLayers( LAYER_RANGE( F_Cu, B_Cu ) );
1362 else
1363 solid->SetLayer( aItem->GetLayer() );
1364
1365 if( aItem->GetLayer() == Edge_Cuts )
1366 {
1367 switch( shape->Type() )
1368 {
1369 case SH_SEGMENT: static_cast<SHAPE_SEGMENT*>( shape )->SetWidth( 0 ); break;
1370 case SH_ARC: static_cast<SHAPE_ARC*>( shape )->SetWidth( 0 ); break;
1371 case SH_LINE_CHAIN: static_cast<SHAPE_LINE_CHAIN*>( shape )->SetWidth( 0 ); break;
1372 default: /* remaining shapes don't have width */ break;
1373 }
1374 }
1375
1376 solid->SetNet( -1 );
1377 solid->SetParent( aItem );
1378 solid->SetShape( shape ); // takes ownership
1379
1380 if( shapes.size() > 1 )
1381 solid->SetIsCompoundShapePrimitive();
1382
1383 solid->SetRoutable( false );
1384
1385 aWorld->Add( std::move( solid ) );
1386 }
1387
1388 return true;
1389 }
1390
1391 return false;
1392}
virtual std::vector< SHAPE * > MakeEffectiveShapes(bool aEdgeOnly=false) const
Make a set of SHAPE objects representing the EDA_SHAPE.
Definition: eda_shape.h:289
bool Add(std::unique_ptr< SEGMENT > aSegment, bool aAllowRedundant=false)
Add an item to the current node.
Definition: pns_node.cpp:664
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
An abstract shape on 2D plane.
Definition: shape.h:123
bool IsCopperLayer(int aLayerId)
Tests whether a layer is a copper layer.
Definition: layer_ids.h:825
@ Edge_Cuts
Definition: layer_ids.h:113
@ B_Cu
Definition: layer_ids.h:95
@ Margin
Definition: layer_ids.h:114
@ F_Cu
Definition: layer_ids.h:64
void SetWidth(const wxString &aStr, const wxString &aDefaultMeasurementUnit, int *aWidth, const wxString &aActualConversion)
@ SH_SEGMENT
line segment
Definition: shape.h:45
@ SH_ARC
circular arc
Definition: shape.h:51
@ SH_LINE_CHAIN
line chain (polyline)
Definition: shape.h:46

References PNS::NODE::Add(), B_Cu, Edge_Cuts, F_Cu, BOARD_ITEM::GetLayer(), IsCopperLayer(), EDA_SHAPE::MakeEffectiveShapes(), Margin, PCAD2KICAD::SetWidth(), SH_ARC, SH_LINE_CHAIN, and SH_SEGMENT.

Referenced by SyncWorld().

◆ syncPad()

std::unique_ptr< PNS::SOLID > PNS_KICAD_IFACE_BASE::syncPad ( PAD aPad)
protected

Definition at line 1067 of file pns_kicad_iface.cpp.

1068{
1069 LAYER_RANGE layers( 0, MAX_CU_LAYERS - 1 );
1070
1071 // ignore non-copper pads except for those with holes
1072 if( ( aPad->GetLayerSet() & LSET::AllCuMask() ).none() && aPad->GetDrillSize().x == 0 )
1073 return nullptr;
1074
1075 switch( aPad->GetAttribute() )
1076 {
1077 case PAD_ATTRIB::PTH:
1078 case PAD_ATTRIB::NPTH:
1079 break;
1080
1081 case PAD_ATTRIB::CONN:
1082 case PAD_ATTRIB::SMD:
1083 {
1084 LSET lmsk = aPad->GetLayerSet();
1085 bool is_copper = false;
1086
1087 for( int i = 0; i < MAX_CU_LAYERS; i++ )
1088 {
1089 if( lmsk[i] )
1090 {
1091 is_copper = true;
1092
1093 if( aPad->GetAttribute() != PAD_ATTRIB::NPTH )
1094 layers = LAYER_RANGE( i );
1095
1096 break;
1097 }
1098 }
1099
1100 if( !is_copper )
1101 return nullptr;
1102
1103 break;
1104 }
1105
1106 default:
1107 wxLogTrace( wxT( "PNS" ), wxT( "unsupported pad type 0x%x" ), aPad->GetAttribute() );
1108 return nullptr;
1109 }
1110
1111 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1112
1113 if( aPad->GetAttribute() == PAD_ATTRIB::NPTH )
1114 solid->SetRoutable( false );
1115
1116 solid->SetLayers( layers );
1117 solid->SetNet( aPad->GetNetCode() );
1118 solid->SetParent( aPad );
1119 solid->SetPadToDie( aPad->GetPadToDieLength() );
1120 solid->SetOrientation( aPad->GetOrientation() );
1121
1122 if( aPad->IsFreePad() )
1123 solid->SetIsFreePad();
1124
1125 VECTOR2I wx_c = aPad->ShapePos();
1126 VECTOR2I offset = aPad->GetOffset();
1127
1128 VECTOR2I c( wx_c.x, wx_c.y );
1129
1130 RotatePoint( offset, aPad->GetOrientation() );
1131
1132 solid->SetPos( VECTOR2I( c.x - offset.x, c.y - offset.y ) );
1133 solid->SetOffset( VECTOR2I( offset.x, offset.y ) );
1134
1135 if( aPad->GetDrillSize().x > 0 )
1136 solid->SetHole( aPad->GetEffectiveHoleShape()->Clone() );
1137
1138 // We generate a single SOLID for a pad, so we have to treat it as ALWAYS_FLASHED and then
1139 // perform layer-specific flashing tests internally.
1140 std::shared_ptr<SHAPE> shape = aPad->GetEffectiveShape( UNDEFINED_LAYER,
1142
1143 if( shape->HasIndexableSubshapes() && shape->GetIndexableSubshapeCount() == 1 )
1144 {
1145 std::vector<const SHAPE*> subshapes;
1146 shape->GetIndexableSubshapes( subshapes );
1147
1148 solid->SetShape( subshapes[0]->Clone() );
1149 }
1150 else
1151 {
1152 solid->SetShape( shape->Clone() );
1153 }
1154
1155 return solid;
1156}
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:530
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:773
LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: pad.h:397
const VECTOR2I & GetDrillSize() const
Definition: pad.h:267
PAD_ATTRIB GetAttribute() const
Definition: pad.h:400
const VECTOR2I & GetOffset() const
Definition: pad.h:274
VECTOR2I ShapePos() const
Definition: pad.cpp:785
bool IsFreePad() const
Definition: pad.cpp:189
EDA_ANGLE GetOrientation() const
Return the rotation angle of the pad.
Definition: pad.h:370
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING flashPTHPads=FLASHING::DEFAULT) const override
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: pad.cpp:385
std::shared_ptr< SHAPE_SEGMENT > GetEffectiveHoleShape() const override
Return a SHAPE_SEGMENT object representing the pad's hole.
Definition: pad.cpp:422
int GetPadToDieLength() const
Definition: pad.h:413
@ ALWAYS_FLASHED
#define MAX_CU_LAYERS
Definition: layer_ids.h:140
std::unique_ptr< typename std::remove_const< T >::type > Clone(const T &aItem)
Definition: pns_item.h:279
@ NPTH
like PAD_PTH, but not plated
@ SMD
Smd pad, appears on the solder paste layer (default)
@ PTH
Plated through hole pad.
@ CONN
Like smd, does not appear on the solder paste layer (default)
void RotatePoint(int *pX, int *pY, const EDA_ANGLE &aAngle)
Definition: trigo.cpp:183
VECTOR2< int > VECTOR2I
Definition: vector2d.h:618

References LSET::AllCuMask(), ALWAYS_FLASHED, PNS::Clone(), CONN, PAD::GetAttribute(), PAD::GetDrillSize(), PAD::GetEffectiveHoleShape(), PAD::GetEffectiveShape(), PAD::GetLayerSet(), BOARD_CONNECTED_ITEM::GetNetCode(), PAD::GetOffset(), PAD::GetOrientation(), PAD::GetPadToDieLength(), PAD::IsFreePad(), MAX_CU_LAYERS, NPTH, PTH, RotatePoint(), PAD::ShapePos(), SMD, UNDEFINED_LAYER, VECTOR2< T >::x, and VECTOR2< T >::y.

Referenced by SyncWorld().

◆ syncTextItem()

bool PNS_KICAD_IFACE_BASE::syncTextItem ( PNS::NODE aWorld,
EDA_TEXT aText,
PCB_LAYER_ID  aLayer 
)
protected

Definition at line 1287 of file pns_kicad_iface.cpp.

1288{
1289 if( !IsCopperLayer( aLayer ) )
1290 return false;
1291
1292 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1293
1294 solid->SetLayer( aLayer );
1295 solid->SetNet( -1 );
1296 solid->SetParent( dynamic_cast<BOARD_ITEM*>( aText ) );
1297
1298 PCB_TEXT* pcb_text = dynamic_cast<PCB_TEXT*>( aText );
1299
1300 if( pcb_text && pcb_text->IsKnockout() )
1301 {
1302 TEXT_ATTRIBUTES attrs = pcb_text->GetAttributes();
1303 SHAPE_POLY_SET buffer;
1304 int margin = attrs.m_StrokeWidth * 1.5
1305 + GetKnockoutTextMargin( attrs.m_Size, attrs.m_StrokeWidth );
1306 pcb_text->TransformBoundingBoxToPolygon( &buffer, margin );
1307 // buffer should contain a single rectangular polygon
1308 SHAPE_SIMPLE* rectShape = new SHAPE_SIMPLE;
1309
1310 for( int ii = 0; ii < buffer.Outline(0).PointCount(); ii++ )
1311 {
1312 VECTOR2I point = buffer.Outline(0).CPoint(ii);
1313 rectShape->Append( point );
1314 }
1315
1316 solid->SetShape( rectShape );
1317 }
1318 else
1319 solid->SetShape( aText->GetEffectiveTextShape()->Clone() );
1320
1321 solid->SetRoutable( false );
1322
1323 aWorld->Add( std::move( solid ) );
1324
1325 return true;
1326
1327 /* A coarser (but faster) method:
1328 SHAPE_POLY_SET outline;
1329 SHAPE_SIMPLE* shape = new SHAPE_SIMPLE();
1330
1331 aText->TransformBoundingBoxToPolygon( &outline, 0 );
1332
1333 for( auto iter = outline.CIterate( 0 ); iter; iter++ )
1334 shape->Append( *iter );
1335
1336 solid->SetShape( shape );
1337
1338 solid->SetLayer( aLayer );
1339 solid->SetNet( -1 );
1340 solid->SetParent( nullptr );
1341 solid->SetRoutable( false );
1342 aWorld->Add( std::move( solid ) );
1343 return true;
1344 */
1345}
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:58
virtual bool IsKnockout() const
Definition: board_item.h:250
void TransformBoundingBoxToPolygon(SHAPE_POLY_SET *aBuffer, int aClearance) const
Convert the text bounding box to a rectangular polygon depending on the text orientation,...
Definition: eda_text.cpp:945
const TEXT_ATTRIBUTES & GetAttributes() const
Definition: eda_text.h:172
std::shared_ptr< SHAPE_COMPOUND > GetEffectiveTextShape(bool aTriangulate=true, bool aUseTextRotation=true) const
build a list of segments (SHAPE_SEGMENT) to describe a text shape.
Definition: eda_text.cpp:853
const VECTOR2I & CPoint(int aIndex) const
Return a reference to a given point in the line chain.
Represent a set of closed polygons.
SHAPE_LINE_CHAIN & Outline(int aIndex)
Represent a simple polygon consisting of a zero-thickness closed chain of connected line segments.
Definition: shape_simple.h:42
void Append(int aX, int aY)
Append a new point at the end of the polygon.
Definition: shape_simple.h:135
int GetKnockoutTextMargin(const VECTOR2I &aSize, int aThickness)
Returns the margin for knocking out text.
Definition: gr_text.h:97

References PNS::NODE::Add(), SHAPE_SIMPLE::Append(), SHAPE_LINE_CHAIN::CPoint(), EDA_TEXT::GetAttributes(), EDA_TEXT::GetEffectiveTextShape(), GetKnockoutTextMargin(), IsCopperLayer(), BOARD_ITEM::IsKnockout(), TEXT_ATTRIBUTES::m_Size, TEXT_ATTRIBUTES::m_StrokeWidth, SHAPE_POLY_SET::Outline(), and EDA_TEXT::TransformBoundingBoxToPolygon().

Referenced by SyncWorld().

◆ syncTrack()

std::unique_ptr< PNS::SEGMENT > PNS_KICAD_IFACE_BASE::syncTrack ( PCB_TRACK aTrack)
protected

Definition at line 1159 of file pns_kicad_iface.cpp.

1160{
1161 auto segment = std::make_unique<PNS::SEGMENT>( SEG( aTrack->GetStart(), aTrack->GetEnd() ),
1162 aTrack->GetNetCode() );
1163
1164 segment->SetWidth( aTrack->GetWidth() );
1165 segment->SetLayers( LAYER_RANGE( aTrack->GetLayer() ) );
1166 segment->SetParent( aTrack );
1167
1168 if( aTrack->IsLocked() )
1169 segment->Mark( PNS::MK_LOCKED );
1170
1171 return segment;
1172}
Definition: seg.h:42

References PCB_TRACK::GetEnd(), BOARD_ITEM::GetLayer(), BOARD_CONNECTED_ITEM::GetNetCode(), PCB_TRACK::GetStart(), PCB_TRACK::GetWidth(), BOARD_ITEM::IsLocked(), and PNS::MK_LOCKED.

Referenced by SyncWorld().

◆ syncVia()

std::unique_ptr< PNS::VIA > PNS_KICAD_IFACE_BASE::syncVia ( PCB_VIA aVia)
protected

Definition at line 1191 of file pns_kicad_iface.cpp.

1192{
1193 PCB_LAYER_ID top, bottom;
1194 aVia->LayerPair( &top, &bottom );
1195
1196 auto via = std::make_unique<PNS::VIA>( aVia->GetPosition(),
1197 LAYER_RANGE( aVia->TopLayer(), aVia->BottomLayer() ),
1198 aVia->GetWidth(),
1199 aVia->GetDrillValue(),
1200 aVia->GetNetCode(),
1201 aVia->GetViaType() );
1202
1203 via->SetParent( aVia );
1204
1205 if( aVia->IsLocked() )
1206 via->Mark( PNS::MK_LOCKED );
1207
1208 via->SetIsFree( aVia->GetIsFree() );
1209
1211 via->SetHole( SHAPE_CIRCLE( aVia->GetPosition(),
1212 aVia->GetDrillValue() / 2 ) );
1213
1214 return via;
1215}
bool GetIsFree() const
Checks if the via is a free via (as opposed to one created on a track by the router).
Definition: pcb_track.h:543
PCB_LAYER_ID BottomLayer() const
Definition: pcb_track.cpp:600
VECTOR2I GetPosition() const override
Definition: pcb_track.h:441
PCB_LAYER_ID TopLayer() const
Definition: pcb_track.cpp:594
int GetDrillValue() const
Function GetDrillValue "calculates" the drill value for vias (m-Drill if > 0, or default drill value ...
Definition: pcb_track.cpp:222
VIATYPE GetViaType() const
Definition: pcb_track.h:393
void LayerPair(PCB_LAYER_ID *top_layer, PCB_LAYER_ID *bottom_layer) const
Function LayerPair Return the 2 layers used by the via (the via actually uses all layers between thes...
Definition: pcb_track.cpp:572
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:59

References PCB_VIA::BottomLayer(), BOARD::GetDesignSettings(), PCB_VIA::GetDrillValue(), PCB_VIA::GetIsFree(), BOARD_CONNECTED_ITEM::GetNetCode(), PCB_VIA::GetPosition(), PCB_VIA::GetViaType(), PCB_TRACK::GetWidth(), BOARD_ITEM::IsLocked(), PCB_VIA::LayerPair(), m_board, PNS::MK_LOCKED, PCB_VIA::TopLayer(), and via.

Referenced by SyncWorld().

◆ SyncWorld()

void PNS_KICAD_IFACE_BASE::SyncWorld ( PNS::NODE aWorld)
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 1481 of file pns_kicad_iface.cpp.

1482{
1483 if( !m_board )
1484 {
1485 wxLogTrace( wxT( "PNS" ), wxT( "No board attached, aborting sync." ) );
1486 return;
1487 }
1488
1489 int worstClearance = m_board->GetDesignSettings().GetBiggestClearanceValue();
1490
1491 m_world = aWorld;
1492
1493 for( BOARD_ITEM* gitem : m_board->Drawings() )
1494 {
1495 if ( gitem->Type() == PCB_SHAPE_T || gitem->Type() == PCB_TEXTBOX_T )
1496 {
1497 syncGraphicalItem( aWorld, static_cast<PCB_SHAPE*>( gitem ) );
1498 }
1499 else if( gitem->Type() == PCB_TEXT_T )
1500 {
1501 syncTextItem( aWorld, static_cast<PCB_TEXT*>( gitem ), gitem->GetLayer() );
1502 }
1503 }
1504
1505 SHAPE_POLY_SET buffer;
1506 SHAPE_POLY_SET* boardOutline = nullptr;
1507
1508 if( m_board->GetBoardPolygonOutlines( buffer ) )
1509 boardOutline = &buffer;
1510
1511 for( ZONE* zone : m_board->Zones() )
1512 {
1513 syncZone( aWorld, zone, boardOutline );
1514 }
1515
1516 for( FOOTPRINT* footprint : m_board->Footprints() )
1517 {
1518 for( PAD* pad : footprint->Pads() )
1519 {
1520 if( std::unique_ptr<PNS::SOLID> solid = syncPad( pad ) )
1521 aWorld->Add( std::move( solid ) );
1522
1523 worstClearance = std::max( worstClearance, pad->GetLocalClearance() );
1524
1525 if( pad->GetProperty() == PAD_PROP::CASTELLATED )
1526 {
1527 std::unique_ptr<SHAPE> hole;
1528 hole.reset( pad->GetEffectiveHoleShape()->Clone() );
1529 aWorld->AddEdgeExclusion( std::move( hole ) );
1530 }
1531 }
1532
1533 syncTextItem( aWorld, &footprint->Reference(), footprint->Reference().GetLayer() );
1534 syncTextItem( aWorld, &footprint->Value(), footprint->Value().GetLayer() );
1535
1536 for( FP_ZONE* zone : footprint->Zones() )
1537 syncZone( aWorld, zone, boardOutline );
1538
1539 for( BOARD_ITEM* mgitem : footprint->GraphicalItems() )
1540 {
1541 if( mgitem->Type() == PCB_FP_SHAPE_T || mgitem->Type() == PCB_FP_TEXTBOX_T )
1542 {
1543 syncGraphicalItem( aWorld, static_cast<PCB_SHAPE*>( mgitem ) );
1544 }
1545 else if( mgitem->Type() == PCB_FP_TEXT_T )
1546 {
1547 syncTextItem( aWorld, static_cast<FP_TEXT*>( mgitem ), mgitem->GetLayer() );
1548 }
1549 }
1550 }
1551
1552 for( PCB_TRACK* t : m_board->Tracks() )
1553 {
1554 KICAD_T type = t->Type();
1555
1556 if( type == PCB_TRACE_T )
1557 {
1558 if( auto segment = syncTrack( t ) )
1559 aWorld->Add( std::move( segment ) );
1560 }
1561 else if( type == PCB_ARC_T )
1562 {
1563 if( auto arc = syncArc( static_cast<PCB_ARC*>( t ) ) )
1564 aWorld->Add( std::move( arc ) );
1565 }
1566 else if( type == PCB_VIA_T )
1567 {
1568 if( auto via = syncVia( static_cast<PCB_VIA*>( t ) ) )
1569 aWorld->Add( std::move( via ) );
1570 }
1571 }
1572
1573 // NB: if this were ever to become a long-lived object we would need to dirty its
1574 // clearance cache here....
1575 delete m_ruleResolver;
1577
1579 aWorld->SetMaxClearance( worstClearance + m_ruleResolver->ClearanceEpsilon() );
1580}
ZONES & Zones()
Definition: board.h:313
bool GetBoardPolygonOutlines(SHAPE_POLY_SET &aOutlines, OUTLINE_ERROR_HANDLER *aErrorHandler=nullptr)
Extract the board outlines and build a closed polygon from lines, arcs and circle items on edge cut l...
Definition: board.cpp:1950
FOOTPRINTS & Footprints()
Definition: board.h:307
TRACKS & Tracks()
Definition: board.h:304
DRAWINGS & Drawings()
Definition: board.h:310
A specialization of ZONE for use in footprints.
Definition: zone.h:910
void SetMaxClearance(int aClearance)
Assign a clearance resolution function object.
Definition: pns_node.h:186
void SetRuleResolver(RULE_RESOLVER *aFunc)
Definition: pns_node.h:192
void AddEdgeExclusion(std::unique_ptr< SHAPE > aShape)
Definition: pns_node.cpp:736
bool syncGraphicalItem(PNS::NODE *aWorld, PCB_SHAPE *aItem)
bool syncZone(PNS::NODE *aWorld, ZONE *aZone, SHAPE_POLY_SET *aBoardOutline)
std::unique_ptr< PNS::ARC > syncArc(PCB_ARC *aArc)
bool syncTextItem(PNS::NODE *aWorld, EDA_TEXT *aText, PCB_LAYER_ID aLayer)
std::unique_ptr< PNS::SOLID > syncPad(PAD *aPad)
std::unique_ptr< PNS::SEGMENT > syncTrack(PCB_TRACK *aTrack)
std::unique_ptr< PNS::VIA > syncVia(PCB_VIA *aVia)
Handle a list of polygons defining a copper zone.
Definition: zone.h:57
@ CASTELLATED
a pad with a castellated through hole
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:78
@ PCB_SHAPE_T
class PCB_SHAPE, a segment not on copper layers
Definition: typeinfo.h:88
@ PCB_FP_SHAPE_T
class FP_SHAPE, a footprint edge
Definition: typeinfo.h:94
@ PCB_FP_TEXTBOX_T
class FP_TEXTBOX, wrapped text in a footprint
Definition: typeinfo.h:93
@ PCB_TEXTBOX_T
class PCB_TEXTBOX, wrapped text on a layer
Definition: typeinfo.h:91
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
Definition: typeinfo.h:90
@ PCB_FP_TEXT_T
class FP_TEXT, text in a footprint
Definition: typeinfo.h:92
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:103
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:101

References PNS::NODE::Add(), PNS::NODE::AddEdgeExclusion(), CASTELLATED, PNS_PCBNEW_RULE_RESOLVER::ClearanceEpsilon(), BOARD::Drawings(), BOARD::Footprints(), BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue(), BOARD::GetBoardPolygonOutlines(), BOARD::GetDesignSettings(), BOARD_ITEM::GetLayer(), m_board, m_ruleResolver, m_world, pad, PCB_ARC_T, PCB_FP_SHAPE_T, PCB_FP_TEXT_T, PCB_FP_TEXTBOX_T, PCB_SHAPE_T, PCB_TEXT_T, PCB_TEXTBOX_T, PCB_TRACE_T, PCB_VIA_T, PNS::NODE::SetMaxClearance(), PNS::NODE::SetRuleResolver(), syncArc(), syncGraphicalItem(), syncPad(), syncTextItem(), syncTrack(), syncVia(), syncZone(), BOARD::Tracks(), via, and BOARD::Zones().

◆ syncZone()

bool PNS_KICAD_IFACE_BASE::syncZone ( PNS::NODE aWorld,
ZONE aZone,
SHAPE_POLY_SET aBoardOutline 
)
protected

Definition at line 1218 of file pns_kicad_iface.cpp.

1219{
1220 SHAPE_POLY_SET* poly;
1221
1222 if( !aZone->GetIsRuleArea() && aZone->GetZoneName().IsEmpty() )
1223 return false;
1224
1225 // TODO handle aZone->GetDoNotAllowVias()
1226 // TODO handle rules which disallow tracks & vias
1227 if( !aZone->GetIsRuleArea() || !aZone->GetDoNotAllowTracks() )
1228 return false;
1229
1230 LSET layers = aZone->GetLayerSet();
1231
1232 poly = aZone->Outline();
1233 poly->CacheTriangulation( false );
1234
1235 if( !poly->IsTriangulationUpToDate() )
1236 {
1237 UNITS_PROVIDER unitsProvider( pcbIUScale, GetUnits() );
1238 KIDIALOG dlg( nullptr, wxString::Format( _( "%s is malformed." ),
1239 aZone->GetItemDescription( &unitsProvider ) ),
1241 dlg.ShowDetailedText( wxString::Format( _( "This zone cannot be handled by the router.\n"
1242 "Please verify it is not a self-intersecting "
1243 "polygon." ) ) );
1244 dlg.DoNotShowCheckbox( __FILE__, __LINE__ );
1245 dlg.ShowModal();
1246
1247 return false;
1248 }
1249
1250 for( int layer = F_Cu; layer <= B_Cu; layer++ )
1251 {
1252 if( !layers[ layer ] )
1253 continue;
1254
1255 for( int outline = 0; outline < poly->OutlineCount(); outline++ )
1256 {
1257 const SHAPE_POLY_SET::TRIANGULATED_POLYGON* tri = poly->TriangulatedPolygon( outline );
1258
1259 for( size_t i = 0; i < tri->GetTriangleCount(); i++)
1260 {
1261 VECTOR2I a, b, c;
1262 tri->GetTriangle( i, a, b, c );
1263 SHAPE_SIMPLE* triShape = new SHAPE_SIMPLE;
1264
1265 triShape->Append( a );
1266 triShape->Append( b );
1267 triShape->Append( c );
1268
1269 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1270
1271 solid->SetLayer( layer );
1272 solid->SetNet( -1 );
1273 solid->SetParent( aZone );
1274 solid->SetShape( triShape );
1275 solid->SetIsCompoundShapePrimitive();
1276 solid->SetRoutable( false );
1277
1278 aWorld->Add( std::move( solid ) );
1279 }
1280 }
1281 }
1282
1283 return true;
1284}
constexpr EDA_IU_SCALE pcbIUScale
Definition: base_units.h:109
Helper class to create more flexible dialogs, including 'do not show again' checkbox handling.
Definition: confirm.h:46
@ KD_WARNING
Definition: confirm.h:49
virtual EDA_UNITS GetUnits() const
void GetTriangle(int index, VECTOR2I &a, VECTOR2I &b, VECTOR2I &c) const
bool IsTriangulationUpToDate() const
void CacheTriangulation(bool aPartition=true, bool aSimplify=false)
Build a polygon triangulation, needed to draw a polygon on OpenGL and in some other calculations.
const TRIANGULATED_POLYGON * TriangulatedPolygon(int aIndex) const
int OutlineCount() const
Return the number of vertices in a given outline/hole.
wxString GetItemDescription(UNITS_PROVIDER *aUnitsProvider) const override
Return a user-visible description string of this item.
Definition: zone.cpp:780
bool GetIsRuleArea() const
Accessors to parameters used in Rule Area zones:
Definition: zone.h:697
bool GetDoNotAllowTracks() const
Definition: zone.h:700
SHAPE_POLY_SET * Outline()
Definition: zone.h:312
wxString GetZoneName() const
Definition: zone.h:124
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: zone.h:122
void Format(OUTPUTFORMATTER *out, int aNestLevel, int aCtl, const CPTREE &aTree)
Output a PTREE into s-expression format via an OUTPUTFORMATTER derivative.
Definition: ptree.cpp:200

References _, PNS::NODE::Add(), SHAPE_SIMPLE::Append(), B_Cu, SHAPE_POLY_SET::CacheTriangulation(), KIDIALOG::DoNotShowCheckbox(), F_Cu, Format(), ZONE::GetDoNotAllowTracks(), ZONE::GetIsRuleArea(), ZONE::GetItemDescription(), ZONE::GetLayerSet(), SHAPE_POLY_SET::TRIANGULATED_POLYGON::GetTriangle(), SHAPE_POLY_SET::TRIANGULATED_POLYGON::GetTriangleCount(), GetUnits(), ZONE::GetZoneName(), SHAPE_POLY_SET::IsTriangulationUpToDate(), KIDIALOG::KD_WARNING, ZONE::Outline(), SHAPE_POLY_SET::OutlineCount(), pcbIUScale, KIDIALOG::ShowModal(), and SHAPE_POLY_SET::TriangulatedPolygon().

Referenced by SyncWorld().

◆ UpdateItem()

void PNS_KICAD_IFACE_BASE::UpdateItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1729 of file pns_kicad_iface.cpp.

1730{
1731}

◆ UpdateNet()

void PNS_KICAD_IFACE_BASE::UpdateNet ( int  aNetCode)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 71 of file pns_kicad_iface.h.

71{}

Member Data Documentation

◆ m_board

◆ m_debugDecorator

◆ m_ruleResolver

PNS_PCBNEW_RULE_RESOLVER* PNS_KICAD_IFACE_BASE::m_ruleResolver
protected

◆ m_startLayer

int PNS_KICAD_IFACE_BASE::m_startLayer
protected

Definition at line 102 of file pns_kicad_iface.h.

Referenced by ImportSizes(), PNS_KICAD_IFACE_BASE(), and SetStartLayer().

◆ m_world

PNS::NODE* PNS_KICAD_IFACE_BASE::m_world
protected

Definition at line 100 of file pns_kicad_iface.h.

Referenced by GetWorld(), PNS_KICAD_IFACE_BASE(), and SyncWorld().


The documentation for this class was generated from the following files: