KiCad PCB EDA Suite
PNS_KICAD_IFACE_BASE Class Reference

#include <pns_kicad_iface.h>

Inheritance diagram for PNS_KICAD_IFACE_BASE:
PNS::ROUTER_IFACE PNS_KICAD_IFACE

Public Member Functions

 PNS_KICAD_IFACE_BASE ()
 
 ~PNS_KICAD_IFACE_BASE ()
 
void EraseView () override
 
void SetBoard (BOARD *aBoard)
 
void SyncWorld (PNS::NODE *aWorld) override
 
bool IsAnyLayerVisible (const LAYER_RANGE &aLayer) const override
 
bool IsFlashedOnLayer (const PNS::ITEM *aItem, int aLayer) const override
 
bool IsItemVisible (const PNS::ITEM *aItem) const override
 
void HideItem (PNS::ITEM *aItem) override
 
void DisplayItem (const PNS::ITEM *aItem, int aClearance, bool aEdit=false) override
 
void DisplayRatline (const SHAPE_LINE_CHAIN &aRatline, int aColor=-1) override
 
void AddItem (PNS::ITEM *aItem) override
 
void UpdateItem (PNS::ITEM *aItem) override
 
void RemoveItem (PNS::ITEM *aItem) override
 
void Commit () override
 
bool ImportSizes (PNS::SIZES_SETTINGS &aSizes, PNS::ITEM *aStartItem, int aNet) override
 
int StackupHeight (int aFirstLayer, int aSecondLayer) const override
 
void UpdateNet (int aNetCode) override
 
void SetDebugDecorator (PNS::DEBUG_DECORATOR *aDec)
 
void SetStartLayer (int aLayer)
 
virtual PNS::NODEGetWorld () const override
 
BOARDGetBoard () const
 
PNS::RULE_RESOLVERGetRuleResolver () override
 
PNS::DEBUG_DECORATORGetDebugDecorator () override
 

Protected Member Functions

std::unique_ptr< PNS::SOLIDsyncPad (PAD *aPad)
 
std::unique_ptr< PNS::SEGMENTsyncTrack (PCB_TRACK *aTrack)
 
std::unique_ptr< PNS::ARCsyncArc (PCB_ARC *aArc)
 
std::unique_ptr< PNS::VIAsyncVia (PCB_VIA *aVia)
 
bool syncTextItem (PNS::NODE *aWorld, EDA_TEXT *aText, PCB_LAYER_ID aLayer)
 
bool syncGraphicalItem (PNS::NODE *aWorld, PCB_SHAPE *aItem)
 
bool syncZone (PNS::NODE *aWorld, ZONE *aZone, SHAPE_POLY_SET *aBoardOutline)
 
bool inheritTrackWidth (PNS::ITEM *aItem, int *aInheritedWidth)
 

Protected Attributes

PNS_PCBNEW_RULE_RESOLVERm_ruleResolver
 
PNS::DEBUG_DECORATORm_debugDecorator
 
PNS::NODEm_world
 
BOARDm_board
 
int m_startLayer
 

Detailed Description

Definition at line 49 of file pns_kicad_iface.h.

Constructor & Destructor Documentation

◆ PNS_KICAD_IFACE_BASE()

PNS_KICAD_IFACE_BASE::PNS_KICAD_IFACE_BASE ( )

Definition at line 841 of file pns_kicad_iface.cpp.

842 {
843  m_ruleResolver = nullptr;
844  m_board = nullptr;
845  m_world = nullptr;
846  m_debugDecorator = nullptr;
847  m_startLayer = -1;
848 }
PNS::DEBUG_DECORATOR * m_debugDecorator
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver

References m_board, m_debugDecorator, m_ruleResolver, m_startLayer, and m_world.

◆ ~PNS_KICAD_IFACE_BASE()

PNS_KICAD_IFACE_BASE::~PNS_KICAD_IFACE_BASE ( )

Definition at line 860 of file pns_kicad_iface.cpp.

861 {
862 }

Member Function Documentation

◆ AddItem()

void PNS_KICAD_IFACE_BASE::AddItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1568 of file pns_kicad_iface.cpp.

1569 {
1570 
1571 }

◆ Commit()

void PNS_KICAD_IFACE_BASE::Commit ( )
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 67 of file pns_kicad_iface.h.

67 {}

◆ DisplayItem()

void PNS_KICAD_IFACE_BASE::DisplayItem ( const PNS::ITEM aItem,
int  aClearance,
bool  aEdit = false 
)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 62 of file pns_kicad_iface.h.

62 {}

◆ DisplayRatline()

void PNS_KICAD_IFACE_BASE::DisplayRatline ( const SHAPE_LINE_CHAIN aRatline,
int  aColor = -1 
)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 63 of file pns_kicad_iface.h.

63 {}

◆ EraseView()

void PNS_KICAD_IFACE_BASE::EraseView ( )
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 55 of file pns_kicad_iface.h.

55 {};

◆ GetBoard()

BOARD* PNS_KICAD_IFACE_BASE::GetBoard ( ) const
inline

Definition at line 82 of file pns_kicad_iface.h.

83  {
84  return m_board;
85  }

References m_board.

Referenced by ROUTER_TOOL::saveRouterDebugLog().

◆ GetDebugDecorator()

PNS::DEBUG_DECORATOR * PNS_KICAD_IFACE_BASE::GetDebugDecorator ( )
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 835 of file pns_kicad_iface.cpp.

836 {
837  return m_debugDecorator;
838 }
PNS::DEBUG_DECORATOR * m_debugDecorator

References m_debugDecorator.

◆ GetRuleResolver()

PNS::RULE_RESOLVER * PNS_KICAD_IFACE_BASE::GetRuleResolver ( )
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 1710 of file pns_kicad_iface.cpp.

1711 {
1712  return m_ruleResolver;
1713 }
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver

References m_ruleResolver.

Referenced by ROUTER_TOOL::updateMessagePanel().

◆ GetWorld()

virtual PNS::NODE* PNS_KICAD_IFACE_BASE::GetWorld ( ) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 77 of file pns_kicad_iface.h.

78  {
79  return m_world;
80  };

References m_world.

◆ HideItem()

void PNS_KICAD_IFACE_BASE::HideItem ( PNS::ITEM aItem)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 61 of file pns_kicad_iface.h.

61 {}

◆ ImportSizes()

bool PNS_KICAD_IFACE_BASE::ImportSizes ( PNS::SIZES_SETTINGS aSizes,
PNS::ITEM aStartItem,
int  aNet 
)
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 455 of file pns_kicad_iface.cpp.

457 {
459  PNS::CONSTRAINT constraint;
460 
461  if( aStartItem && m_startLayer < 0 )
462  m_startLayer = aStartItem->Layer();
463 
464  aSizes.SetMinClearance( bds.m_MinClearance );
465 
466  int trackWidth = bds.m_TrackMinWidth;
467  bool found = false;
468 
469  if( bds.m_UseConnectedTrackWidth && aStartItem != nullptr )
470  {
471  found = inheritTrackWidth( aStartItem, &trackWidth );
472 
473  if( found )
474  aSizes.SetWidthSource( _( "existing track" ) );
475  }
476 
477  if( !found && bds.UseNetClassTrack() && aStartItem )
478  {
480  m_startLayer, &constraint ) )
481  {
482  trackWidth = std::max( trackWidth, constraint.m_Value.Opt() );
483  found = true;
484 
485  if( trackWidth == constraint.m_Value.Opt() )
486  aSizes.SetWidthSource( constraint.m_RuleName );
487  else
488  aSizes.SetWidthSource( _( "board minimum width" ) );
489  }
490  }
491 
492  if( !found )
493  {
494  trackWidth = std::max( trackWidth, bds.GetCurrentTrackWidth() );
495 
496  if( bds.UseNetClassTrack() )
497  aSizes.SetWidthSource( _( "netclass 'Default'" ) );
498  else if( trackWidth == bds.GetCurrentTrackWidth() )
499  aSizes.SetWidthSource( _( "user choice" ) );
500  else
501  aSizes.SetWidthSource( _( "board minimum width" ) );
502  }
503 
504  aSizes.SetTrackWidth( trackWidth );
506 
507  int viaDiameter = bds.m_ViasMinSize;
508  int viaDrill = bds.m_MinThroughDrill;
509 
510  if( bds.UseNetClassVia() && aStartItem ) // netclass value
511  {
513  nullptr, m_startLayer, &constraint ) )
514  {
515  viaDiameter = std::max( viaDiameter, constraint.m_Value.Opt() );
516  }
517 
519  m_startLayer, &constraint ) )
520  {
521  viaDrill = std::max( viaDrill, constraint.m_Value.Opt() );
522  }
523  }
524  else
525  {
526  viaDiameter = bds.GetCurrentViaSize();
527  viaDrill = bds.GetCurrentViaDrill();
528  }
529 
530  aSizes.SetViaDiameter( viaDiameter );
531  aSizes.SetViaDrill( viaDrill );
532 
533  int diffPairWidth = bds.m_TrackMinWidth;
534  int diffPairGap = bds.m_MinClearance;
535  int diffPairViaGap = bds.m_MinClearance;
536 
537  found = false;
538 
539  // First try to pick up diff pair width from starting track, if enabled
540  if( bds.m_UseConnectedTrackWidth && aStartItem )
541  found = inheritTrackWidth( aStartItem, &diffPairWidth );
542 
543  // Next, pick up gap from netclass, and width also if we didn't get a starting width above
544  if( bds.UseNetClassDiffPair() && aStartItem )
545  {
547  nullptr, m_startLayer, &constraint ) )
548  {
549  diffPairWidth = std::max( diffPairWidth, constraint.m_Value.Opt() );
550  }
551 
553  nullptr, m_startLayer, &constraint ) )
554  {
555  diffPairGap = std::max( diffPairGap, constraint.m_Value.Opt() );
556  diffPairViaGap = std::max( diffPairViaGap, constraint.m_Value.Opt() );
557  }
558  }
559  else
560  {
561  diffPairWidth = bds.GetCurrentDiffPairWidth();
562  diffPairGap = bds.GetCurrentDiffPairGap();
563  diffPairViaGap = bds.GetCurrentDiffPairViaGap();
564  }
565 
566  aSizes.SetDiffPairWidth( diffPairWidth );
567  aSizes.SetDiffPairGap( diffPairGap );
568  aSizes.SetDiffPairViaGap( diffPairViaGap );
569 
570  int holeToHoleMin = bds.m_HoleToHoleMin;
571  PNS::VIA dummyVia;
572 
574  &dummyVia, UNDEFINED_LAYER, &constraint ) )
575  {
576  holeToHoleMin = constraint.m_Value.Min();
577  }
578 
579  aSizes.SetHoleToHole( holeToHoleMin );
580 
581  aSizes.ClearLayerPairs();
582 
583  return true;
584 }
bool UseNetClassTrack() const
Return true if netclass values should be used to obtain appropriate track width.
virtual int Layer() const
Definition: pns_item.h:158
void SetTrackWidthIsExplicit(bool aIsExplicit)
void SetWidthSource(const wxString &aSource)
bool inheritTrackWidth(PNS::ITEM *aItem, int *aInheritedWidth)
bool UseNetClassDiffPair() const
Return true if netclass values should be used to obtain appropriate diff pair dimensions.
T Opt() const
Definition: minoptmax.h:35
wxString m_RuleName
Definition: pns_node.h:72
void SetViaDrill(int aDrill)
T Min() const
Definition: minoptmax.h:33
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:590
void SetTrackWidth(int aWidth)
void SetDiffPairViaGap(int aGap)
void SetMinClearance(int aClearance)
bool UseNetClassVia() const
Return true if netclass values should be used to obtain appropriate via size.
#define _(s)
void SetHoleToHole(int aHoleToHole)
void SetDiffPairGap(int aGap)
virtual bool QueryConstraint(PNS::CONSTRAINT_TYPE aType, const PNS::ITEM *aItemA, const PNS::ITEM *aItemB, int aLayer, PNS::CONSTRAINT *aConstraint) override
MINOPTMAX< int > m_Value
Definition: pns_node.h:70
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver
void SetViaDiameter(int aDiameter)
void SetDiffPairWidth(int aWidth)
Container for design settings for a BOARD object.

References _, PNS::SIZES_SETTINGS::ClearLayerPairs(), PNS::CT_DIFF_PAIR_GAP, PNS::CT_HOLE_TO_HOLE, PNS::CT_VIA_DIAMETER, PNS::CT_VIA_HOLE, PNS::CT_WIDTH, BOARD_DESIGN_SETTINGS::GetCurrentDiffPairGap(), BOARD_DESIGN_SETTINGS::GetCurrentDiffPairViaGap(), BOARD_DESIGN_SETTINGS::GetCurrentDiffPairWidth(), BOARD_DESIGN_SETTINGS::GetCurrentTrackWidth(), BOARD_DESIGN_SETTINGS::GetCurrentViaDrill(), BOARD_DESIGN_SETTINGS::GetCurrentViaSize(), BOARD::GetDesignSettings(), inheritTrackWidth(), PNS::ITEM::Layer(), m_board, BOARD_DESIGN_SETTINGS::m_HoleToHoleMin, BOARD_DESIGN_SETTINGS::m_MinClearance, BOARD_DESIGN_SETTINGS::m_MinThroughDrill, PNS::CONSTRAINT::m_RuleName, m_ruleResolver, m_startLayer, BOARD_DESIGN_SETTINGS::m_TrackMinWidth, BOARD_DESIGN_SETTINGS::m_UseConnectedTrackWidth, PNS::CONSTRAINT::m_Value, BOARD_DESIGN_SETTINGS::m_ViasMinSize, MINOPTMAX< T >::Min(), MINOPTMAX< T >::Opt(), PNS_PCBNEW_RULE_RESOLVER::QueryConstraint(), PNS::SIZES_SETTINGS::SetDiffPairGap(), PNS::SIZES_SETTINGS::SetDiffPairViaGap(), PNS::SIZES_SETTINGS::SetDiffPairWidth(), PNS::SIZES_SETTINGS::SetHoleToHole(), PNS::SIZES_SETTINGS::SetMinClearance(), PNS::SIZES_SETTINGS::SetTrackWidth(), PNS::SIZES_SETTINGS::SetTrackWidthIsExplicit(), PNS::SIZES_SETTINGS::SetViaDiameter(), PNS::SIZES_SETTINGS::SetViaDrill(), PNS::SIZES_SETTINGS::SetWidthSource(), UNDEFINED_LAYER, BOARD_DESIGN_SETTINGS::UseNetClassDiffPair(), BOARD_DESIGN_SETTINGS::UseNetClassTrack(), and BOARD_DESIGN_SETTINGS::UseNetClassVia().

Referenced by ROUTER_TOOL::onTrackViaSizeChanged(), and ROUTER_TOOL::prepareInteractive().

◆ inheritTrackWidth()

bool PNS_KICAD_IFACE_BASE::inheritTrackWidth ( PNS::ITEM aItem,
int *  aInheritedWidth 
)
protected

Definition at line 392 of file pns_kicad_iface.cpp.

393 {
394  VECTOR2I p;
395 
396  assert( aItem->Owner() != nullptr );
397 
398  auto tryGetTrackWidth =
399  []( PNS::ITEM* aPnsItem ) -> int
400  {
401  switch( aPnsItem->Kind() )
402  {
403  case PNS::ITEM::SEGMENT_T: return static_cast<PNS::SEGMENT*>( aPnsItem )->Width();
404  case PNS::ITEM::ARC_T: return static_cast<PNS::ARC*>( aPnsItem )->Width();
405  default: return -1;
406  }
407  };
408 
409  int itemTrackWidth = tryGetTrackWidth( aItem );
410 
411  if( itemTrackWidth > 0 )
412  {
413  *aInheritedWidth = itemTrackWidth;
414  return true;
415  }
416 
417  switch( aItem->Kind() )
418  {
419  case PNS::ITEM::VIA_T:
420  p = static_cast<PNS::VIA*>( aItem )->Pos();
421  break;
422 
423  case PNS::ITEM::SOLID_T:
424  p = static_cast<PNS::SOLID*>( aItem )->Pos();
425  break;
426 
427  default:
428  return false;
429  }
430 
431  PNS::JOINT* jt = static_cast<PNS::NODE*>( aItem->Owner() )->FindJoint( p, aItem );
432 
433  assert( jt != nullptr );
434 
435  int mval = INT_MAX;
436 
437  PNS::ITEM_SET linkedSegs = jt->Links();
439 
440  for( PNS::ITEM* item : linkedSegs.Items() )
441  {
442  int w = tryGetTrackWidth( item );
443  assert( w > 0 );
444  mval = std::min( w, mval );
445  }
446 
447  if( mval == INT_MAX )
448  return false;
449 
450  *aInheritedWidth = mval;
451  return true;
452 }
Base class for PNS router board items.
Definition: pns_item.h:55
ENTRIES & Items()
Definition: pns_itemset.h:135
ITEM_SET & FilterKinds(int aKindMask, bool aInvert=false)
Definition: pns_itemset.cpp:68
ITEM_SET & ExcludeItem(const ITEM *aItem)
ITEM_SET & Links()
Definition: pns_joint.h:205
A 2D point on a given set of layers and belonging to a certain net, that links together a number of b...
Definition: pns_joint.h:42
PnsKind Kind() const
Return the type (kind) of the item.
Definition: pns_item.h:130
NODE * Owner() const
Return the owner of this item, or NULL if there's none.
Definition: pns_item.h:171

References PNS::ITEM::ARC_T, PNS::ITEM_SET::ExcludeItem(), PNS::ITEM_SET::FilterKinds(), PNS::ITEM_SET::Items(), PNS::ITEM::Kind(), PNS::JOINT::Links(), PNS::ITEM::Owner(), PNS::ITEM::SEGMENT_T, PNS::ITEM::SOLID_T, and PNS::ITEM::VIA_T.

Referenced by ImportSizes().

◆ IsAnyLayerVisible()

bool PNS_KICAD_IFACE_BASE::IsAnyLayerVisible ( const LAYER_RANGE aLayer) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 58 of file pns_kicad_iface.h.

58 { return true; };

◆ IsFlashedOnLayer()

bool PNS_KICAD_IFACE_BASE::IsFlashedOnLayer ( const PNS::ITEM aItem,
int  aLayer 
) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 59 of file pns_kicad_iface.h.

59 { return true; };

◆ IsItemVisible()

bool PNS_KICAD_IFACE_BASE::IsItemVisible ( const PNS::ITEM aItem) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 60 of file pns_kicad_iface.h.

60 { return true; }

◆ RemoveItem()

void PNS_KICAD_IFACE_BASE::RemoveItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1476 of file pns_kicad_iface.cpp.

1477 {
1478 }

◆ SetBoard()

void PNS_KICAD_IFACE_BASE::SetBoard ( BOARD aBoard)

Definition at line 1207 of file pns_kicad_iface.cpp.

1208 {
1209  m_board = aBoard;
1210  wxLogTrace( "PNS", "m_board = %p", m_board );
1211 }

References m_board.

Referenced by PNS::TOOL_BASE::Reset().

◆ SetDebugDecorator()

void PNS_KICAD_IFACE_BASE::SetDebugDecorator ( PNS::DEBUG_DECORATOR aDec)

Definition at line 1406 of file pns_kicad_iface.cpp.

1407 {
1408  m_debugDecorator = aDec;
1409 }
PNS::DEBUG_DECORATOR * m_debugDecorator

References m_debugDecorator.

◆ SetStartLayer()

void PNS_KICAD_IFACE_BASE::SetStartLayer ( int  aLayer)
inline

Definition at line 75 of file pns_kicad_iface.h.

75 { m_startLayer = aLayer; }

References m_startLayer.

Referenced by ROUTER_TOOL::prepareInteractive().

◆ StackupHeight()

int PNS_KICAD_IFACE_BASE::StackupHeight ( int  aFirstLayer,
int  aSecondLayer 
) const
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 587 of file pns_kicad_iface.cpp.

588 {
590  return 0;
591 
593 
594  return stackup.GetLayerDistance( ToLAYER_ID( aFirstLayer ), ToLAYER_ID( aSecondLayer ) );
595 }
Manage layers needed to make a physical board.
int GetLayerDistance(PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer) const
Calculate the distance (height) between the two given copper layers.
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:590
BOARD_STACKUP & GetStackupDescriptor()
bool m_UseHeightForLengthCalcs
Enable inclusion of stackup height in track length measurements and length tuning.
PCB_LAYER_ID ToLAYER_ID(int aLayer)
Definition: lset.cpp:905

References BOARD::GetDesignSettings(), BOARD_STACKUP::GetLayerDistance(), BOARD_DESIGN_SETTINGS::GetStackupDescriptor(), m_board, BOARD_DESIGN_SETTINGS::m_UseHeightForLengthCalcs, and ToLAYER_ID().

◆ syncArc()

std::unique_ptr< PNS::ARC > PNS_KICAD_IFACE_BASE::syncArc ( PCB_ARC aArc)
protected

Definition at line 990 of file pns_kicad_iface.cpp.

991 {
992  auto arc = std::make_unique<PNS::ARC>(
993  SHAPE_ARC( aArc->GetStart(), aArc->GetMid(), aArc->GetEnd(), aArc->GetWidth() ),
994  aArc->GetNetCode() );
995 
996  arc->SetLayers( LAYER_RANGE( aArc->GetLayer() ) );
997  arc->SetParent( aArc );
998 
999  if( aArc->IsLocked() )
1000  arc->Mark( PNS::MK_LOCKED );
1001 
1002  return arc;
1003 }
const wxPoint & GetEnd() const
Definition: pcb_track.h:105
int GetWidth() const
Definition: pcb_track.h:102
virtual bool IsLocked() const
Definition: board_item.cpp:64
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:142
const wxPoint & GetMid() const
Definition: pcb_track.h:271
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:31
const wxPoint & GetStart() const
Definition: pcb_track.h:108

References PCB_TRACK::GetEnd(), BOARD_ITEM::GetLayer(), PCB_ARC::GetMid(), BOARD_CONNECTED_ITEM::GetNetCode(), PCB_TRACK::GetStart(), PCB_TRACK::GetWidth(), BOARD_ITEM::IsLocked(), and PNS::MK_LOCKED.

Referenced by SyncWorld().

◆ syncGraphicalItem()

bool PNS_KICAD_IFACE_BASE::syncGraphicalItem ( PNS::NODE aWorld,
PCB_SHAPE aItem 
)
protected

Definition at line 1156 of file pns_kicad_iface.cpp.

1157 {
1158  if( aItem->GetLayer() == Edge_Cuts
1159  || aItem->GetLayer() == Margin
1160  || IsCopperLayer( aItem->GetLayer() ) )
1161  {
1162  // TODO: where do we handle filled polygons on copper layers?
1163  if( aItem->GetShape() == SHAPE_T::POLY && aItem->IsFilled() )
1164  return false;
1165 
1166  std::vector<SHAPE*> shapes = aItem->MakeEffectiveShapes();
1167 
1168  for( SHAPE* shape : shapes )
1169  {
1170  std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1171 
1172  if( aItem->GetLayer() == Edge_Cuts || aItem->GetLayer() == Margin )
1173  solid->SetLayers( LAYER_RANGE( F_Cu, B_Cu ) );
1174  else
1175  solid->SetLayer( aItem->GetLayer() );
1176 
1177  if( aItem->GetLayer() == Edge_Cuts )
1178  {
1179  switch( shape->Type() )
1180  {
1181  case SH_SEGMENT: static_cast<SHAPE_SEGMENT*>( shape )->SetWidth( 0 ); break;
1182  case SH_ARC: static_cast<SHAPE_ARC*>( shape )->SetWidth( 0 ); break;
1183  case SH_LINE_CHAIN: static_cast<SHAPE_LINE_CHAIN*>( shape )->SetWidth( 0 ); break;
1184  default: /* remaining shapes don't have width */ break;
1185  }
1186  }
1187 
1188  solid->SetNet( -1 );
1189  solid->SetParent( aItem );
1190  solid->SetShape( shape ); // takes ownership
1191 
1192  if( shapes.size() > 1 )
1193  solid->SetIsCompoundShapePrimitive();
1194 
1195  solid->SetRoutable( false );
1196 
1197  aWorld->Add( std::move( solid ) );
1198  }
1199 
1200  return true;
1201  }
1202 
1203  return false;
1204 }
std::vector< SHAPE * > MakeEffectiveShapes() const
Make a set of SHAPE objects representing the EDA_SHAPE.
Definition: eda_shape.cpp:1057
bool IsFilled() const
Definition: eda_shape.h:81
circular arc
Definition: shape.h:50
An abstract shape on 2D plane.
Definition: shape.h:116
bool IsCopperLayer(LAYER_NUM aLayerId)
Tests whether a layer is a copper layer.
Definition: layer_ids.h:796
Definition: layer_ids.h:71
line chain (polyline)
Definition: shape.h:45
SHAPE_T GetShape() const
Definition: eda_shape.h:92
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:142
bool Add(std::unique_ptr< SEGMENT > aSegment, bool aAllowRedundant=false)
Add an item to the current node.
Definition: pns_node.cpp:638
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:31
line segment
Definition: shape.h:44

References PNS::NODE::Add(), B_Cu, Edge_Cuts, F_Cu, BOARD_ITEM::GetLayer(), EDA_SHAPE::GetShape(), IsCopperLayer(), EDA_SHAPE::IsFilled(), EDA_SHAPE::MakeEffectiveShapes(), Margin, POLY, SH_ARC, SH_LINE_CHAIN, and SH_SEGMENT.

Referenced by SyncWorld().

◆ syncPad()

std::unique_ptr< PNS::SOLID > PNS_KICAD_IFACE_BASE::syncPad ( PAD aPad)
protected

Definition at line 878 of file pns_kicad_iface.cpp.

879 {
880  LAYER_RANGE layers( 0, MAX_CU_LAYERS - 1 );
881 
882  // ignore non-copper pads except for those with holes
883  if( ( aPad->GetLayerSet() & LSET::AllCuMask() ).none() && aPad->GetDrillSize().x == 0 )
884  return nullptr;
885 
886  switch( aPad->GetAttribute() )
887  {
888  case PAD_ATTRIB::PTH:
889  case PAD_ATTRIB::NPTH:
890  break;
891 
892  case PAD_ATTRIB::CONN:
893  case PAD_ATTRIB::SMD:
894  {
895  LSET lmsk = aPad->GetLayerSet();
896  bool is_copper = false;
897 
898  for( int i = 0; i < MAX_CU_LAYERS; i++ )
899  {
900  if( lmsk[i] )
901  {
902  is_copper = true;
903 
904  if( aPad->GetAttribute() != PAD_ATTRIB::NPTH )
905  layers = LAYER_RANGE( i );
906 
907  break;
908  }
909  }
910 
911  if( !is_copper )
912  return nullptr;
913 
914  break;
915  }
916 
917  default:
918  wxLogTrace( "PNS", "unsupported pad type 0x%x", aPad->GetAttribute() );
919  return nullptr;
920  }
921 
922  std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
923 
924  if( aPad->GetAttribute() == PAD_ATTRIB::NPTH )
925  solid->SetRoutable( false );
926 
927  solid->SetLayers( layers );
928  solid->SetNet( aPad->GetNetCode() );
929  solid->SetParent( aPad );
930  solid->SetPadToDie( aPad->GetPadToDieLength() );
931  solid->SetOrientation( aPad->GetOrientation() );
932 
933  wxPoint wx_c = aPad->ShapePos();
934  wxPoint offset = aPad->GetOffset();
935 
936  VECTOR2I c( wx_c.x, wx_c.y );
937 
938  RotatePoint( &offset, aPad->GetOrientation() );
939 
940  solid->SetPos( VECTOR2I( c.x - offset.x, c.y - offset.y ) );
941  solid->SetOffset( VECTOR2I( offset.x, offset.y ) );
942 
943  if( aPad->GetDrillSize().x > 0 )
944  {
946 
947  if( aPad->GetAttribute() != PAD_ATTRIB::NPTH )
948  {
950  slot->SetWidth( slot->GetWidth() + bds.GetHolePlatingThickness() * 2 );
951  }
952 
953  solid->SetHole( slot );
954  }
955 
956  std::shared_ptr<SHAPE> shape = aPad->GetEffectiveShape();
957 
958  if( shape->HasIndexableSubshapes() && shape->GetIndexableSubshapeCount() == 1 )
959  {
960  std::vector<SHAPE*> subshapes;
961  shape->GetIndexableSubshapes( subshapes );
962 
963  solid->SetShape( subshapes[0]->Clone() );
964  }
965  else
966  {
967  solid->SetShape( shape->Clone() );
968  }
969 
970  return solid;
971 }
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:750
int GetHolePlatingThickness() const
Pad & via drills are finish size.
Like smd, does not appear on the solder paste layer (default)
Smd pad, appears on the solder paste layer (default)
const SHAPE_SEGMENT * GetEffectiveHoleShape() const
Return a SHAPE object representing the pad's hole.
Definition: pad.cpp:295
void RotatePoint(int *pX, int *pY, double angle)
Definition: trigo.cpp:229
VECTOR2< int > VECTOR2I
Definition: vector2d.h:623
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:590
Plated through hole pad.
const wxPoint & GetOffset() const
Definition: pad.h:250
const wxSize & GetDrillSize() const
Definition: pad.h:243
wxPoint ShapePos() const
Definition: pad.cpp:665
like PAD_PTH, but not plated
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:504
double GetOrientation() const
Return the rotation angle of the pad in a variety of units (the basic call returns tenths of degrees)...
Definition: pad.h:349
#define MAX_CU_LAYERS
Definition: layer_ids.h:147
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER) const override
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: pad.cpp:286
LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: pad.h:368
std::unique_ptr< typename std::remove_const< T >::type > Clone(const T &aItem)
Definition: pns_item.h:271
SHAPE * Clone() const override
Return a dynamically allocated copy of the shape.
Definition: shape_segment.h:57
PAD_ATTRIB GetAttribute() const
Definition: pad.h:371
int GetWidth() const
int GetPadToDieLength() const
Definition: pad.h:384
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:31
void SetWidth(int aWidth)
Container for design settings for a BOARD object.

References LSET::AllCuMask(), SHAPE_SEGMENT::Clone(), PNS::Clone(), CONN, PAD::GetAttribute(), BOARD::GetDesignSettings(), PAD::GetDrillSize(), PAD::GetEffectiveHoleShape(), PAD::GetEffectiveShape(), BOARD_DESIGN_SETTINGS::GetHolePlatingThickness(), PAD::GetLayerSet(), BOARD_CONNECTED_ITEM::GetNetCode(), PAD::GetOffset(), PAD::GetOrientation(), PAD::GetPadToDieLength(), SHAPE_SEGMENT::GetWidth(), m_board, MAX_CU_LAYERS, NPTH, PTH, RotatePoint(), SHAPE_SEGMENT::SetWidth(), PAD::ShapePos(), SMD, VECTOR2< T >::x, and VECTOR2< T >::y.

Referenced by SyncWorld().

◆ syncTextItem()

bool PNS_KICAD_IFACE_BASE::syncTextItem ( PNS::NODE aWorld,
EDA_TEXT aText,
PCB_LAYER_ID  aLayer 
)
protected

Definition at line 1105 of file pns_kicad_iface.cpp.

1106 {
1107  if( !IsCopperLayer( aLayer ) )
1108  return false;
1109 
1110  int textWidth = aText->GetEffectiveTextPenWidth();
1111  std::vector<wxPoint> textShape = aText->TransformToSegmentList();
1112 
1113  if( textShape.size() < 2 )
1114  return false;
1115 
1116  for( size_t jj = 0; jj < textShape.size(); jj += 2 )
1117  {
1118  VECTOR2I start( textShape[jj] );
1119  VECTOR2I end( textShape[jj+1] );
1120  std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1121 
1122  solid->SetLayer( aLayer );
1123  solid->SetNet( -1 );
1124  solid->SetParent( dynamic_cast<BOARD_ITEM*>( aText ) );
1125  solid->SetShape( new SHAPE_SEGMENT( start, end, textWidth ) );
1126  solid->SetIsCompoundShapePrimitive();
1127  solid->SetRoutable( false );
1128 
1129  aWorld->Add( std::move( solid ) );
1130  }
1131 
1132  return true;
1133 
1134  /* A coarser (but faster) method:
1135  *
1136  SHAPE_POLY_SET outline;
1137  SHAPE_SIMPLE* shape = new SHAPE_SIMPLE();
1138 
1139  aText->TransformBoundingBoxWithClearanceToPolygon( &outline, 0 );
1140 
1141  for( auto iter = outline.CIterate( 0 ); iter; iter++ )
1142  shape->Append( *iter );
1143 
1144  solid->SetShape( shape );
1145 
1146  solid->SetLayer( aLayer );
1147  solid->SetNet( -1 );
1148  solid->SetParent( nullptr );
1149  solid->SetRoutable( false );
1150  aWorld->Add( std::move( solid ) );
1151  return true;
1152  */
1153 }
std::vector< wxPoint > TransformToSegmentList() const
Convert the text shape to a list of segment.
Definition: eda_text.cpp:603
int GetEffectiveTextPenWidth(int aDefaultWidth=0) const
The EffectiveTextPenWidth uses the text thickness if > 1 or aDefaultWidth.
Definition: eda_text.cpp:159
bool IsCopperLayer(LAYER_NUM aLayerId)
Tests whether a layer is a copper layer.
Definition: layer_ids.h:796
bool Add(std::unique_ptr< SEGMENT > aSegment, bool aAllowRedundant=false)
Add an item to the current node.
Definition: pns_node.cpp:638

References PNS::NODE::Add(), EDA_TEXT::GetEffectiveTextPenWidth(), IsCopperLayer(), and EDA_TEXT::TransformToSegmentList().

Referenced by SyncWorld().

◆ syncTrack()

std::unique_ptr< PNS::SEGMENT > PNS_KICAD_IFACE_BASE::syncTrack ( PCB_TRACK aTrack)
protected

Definition at line 974 of file pns_kicad_iface.cpp.

975 {
976  auto segment = std::make_unique<PNS::SEGMENT>( SEG( aTrack->GetStart(), aTrack->GetEnd() ),
977  aTrack->GetNetCode() );
978 
979  segment->SetWidth( aTrack->GetWidth() );
980  segment->SetLayers( LAYER_RANGE( aTrack->GetLayer() ) );
981  segment->SetParent( aTrack );
982 
983  if( aTrack->IsLocked() )
984  segment->Mark( PNS::MK_LOCKED );
985 
986  return segment;
987 }
const wxPoint & GetEnd() const
Definition: pcb_track.h:105
int GetWidth() const
Definition: pcb_track.h:102
virtual bool IsLocked() const
Definition: board_item.cpp:64
Definition: seg.h:40
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:142
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:31
const wxPoint & GetStart() const
Definition: pcb_track.h:108

References PCB_TRACK::GetEnd(), BOARD_ITEM::GetLayer(), BOARD_CONNECTED_ITEM::GetNetCode(), PCB_TRACK::GetStart(), PCB_TRACK::GetWidth(), BOARD_ITEM::IsLocked(), and PNS::MK_LOCKED.

Referenced by SyncWorld().

◆ syncVia()

std::unique_ptr< PNS::VIA > PNS_KICAD_IFACE_BASE::syncVia ( PCB_VIA aVia)
protected

Definition at line 1006 of file pns_kicad_iface.cpp.

1007 {
1008  PCB_LAYER_ID top, bottom;
1009  aVia->LayerPair( &top, &bottom );
1010 
1011  auto via = std::make_unique<PNS::VIA>( aVia->GetPosition(),
1012  LAYER_RANGE( aVia->TopLayer(), aVia->BottomLayer() ),
1013  aVia->GetWidth(),
1014  aVia->GetDrillValue(),
1015  aVia->GetNetCode(),
1016  aVia->GetViaType() );
1017 
1018  via->SetParent( aVia );
1019 
1020  if( aVia->IsLocked() )
1021  via->Mark( PNS::MK_LOCKED );
1022 
1023  via->SetIsFree( aVia->GetIsFree() );
1024 
1026  via->SetHole( SHAPE_CIRCLE( aVia->GetPosition(),
1027  aVia->GetDrillValue() / 2 + bds.GetHolePlatingThickness() ) );
1028 
1029  return via;
1030 }
wxPoint GetPosition() const override
Definition: pcb_track.h:390
VIATYPE GetViaType() const
Definition: pcb_track.h:352
int GetHolePlatingThickness() const
Pad & via drills are finish size.
int GetWidth() const
Definition: pcb_track.h:102
PCB_LAYER_ID BottomLayer() const
Definition: pcb_track.cpp:462
virtual bool IsLocked() const
Definition: board_item.cpp:64
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:590
PCB_LAYER_ID TopLayer() const
Definition: pcb_track.cpp:456
void LayerPair(PCB_LAYER_ID *top_layer, PCB_LAYER_ID *bottom_layer) const
Function LayerPair Return the 2 layers used by the via (the via actually uses all layers between thes...
Definition: pcb_track.cpp:434
bool GetIsFree() const
Checks if the via is a free via (as opposed to one created on a track by the router).
Definition: pcb_track.h:481
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:65
int GetDrillValue() const
Function GetDrillValue "calculates" the drill value for vias (m-Drill if > 0, or default drill value ...
Definition: pcb_track.cpp:166
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:31
Container for design settings for a BOARD object.

References PCB_VIA::BottomLayer(), BOARD::GetDesignSettings(), PCB_VIA::GetDrillValue(), BOARD_DESIGN_SETTINGS::GetHolePlatingThickness(), PCB_VIA::GetIsFree(), BOARD_CONNECTED_ITEM::GetNetCode(), PCB_VIA::GetPosition(), PCB_VIA::GetViaType(), PCB_TRACK::GetWidth(), BOARD_ITEM::IsLocked(), PCB_VIA::LayerPair(), m_board, PNS::MK_LOCKED, PCB_VIA::TopLayer(), and via.

Referenced by SyncWorld().

◆ SyncWorld()

void PNS_KICAD_IFACE_BASE::SyncWorld ( PNS::NODE aWorld)
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 1290 of file pns_kicad_iface.cpp.

1291 {
1292  if( !m_board )
1293  {
1294  wxLogTrace( "PNS", "No board attached, aborting sync." );
1295  return;
1296  }
1297 
1298  int worstClearance = m_board->GetDesignSettings().GetBiggestClearanceValue();
1299 
1300  m_world = aWorld;
1301 
1302  for( BOARD_ITEM* gitem : m_board->Drawings() )
1303  {
1304  if ( gitem->Type() == PCB_SHAPE_T )
1305  {
1306  syncGraphicalItem( aWorld, static_cast<PCB_SHAPE*>( gitem ) );
1307  }
1308  else if( gitem->Type() == PCB_TEXT_T )
1309  {
1310  syncTextItem( aWorld, static_cast<PCB_TEXT*>( gitem ), gitem->GetLayer() );
1311  }
1312  }
1313 
1314  SHAPE_POLY_SET buffer;
1315  SHAPE_POLY_SET* boardOutline = nullptr;
1316 
1317  if( m_board->GetBoardPolygonOutlines( buffer ) )
1318  boardOutline = &buffer;
1319 
1320  for( ZONE* zone : m_board->Zones() )
1321  {
1322  syncZone( aWorld, zone, boardOutline );
1323  }
1324 
1325  for( FOOTPRINT* footprint : m_board->Footprints() )
1326  {
1327  for( PAD* pad : footprint->Pads() )
1328  {
1329  if( std::unique_ptr<PNS::SOLID> solid = syncPad( pad ) )
1330  aWorld->Add( std::move( solid ) );
1331 
1332  worstClearance = std::max( worstClearance, pad->GetLocalClearance() );
1333  }
1334 
1335  syncTextItem( aWorld, &footprint->Reference(), footprint->Reference().GetLayer() );
1336  syncTextItem( aWorld, &footprint->Value(), footprint->Value().GetLayer() );
1337 
1338  for( FP_ZONE* zone : footprint->Zones() )
1339  syncZone( aWorld, zone, boardOutline );
1340 
1341  if( footprint->IsNetTie() )
1342  continue;
1343 
1344  for( BOARD_ITEM* mgitem : footprint->GraphicalItems() )
1345  {
1346  if( mgitem->Type() == PCB_FP_SHAPE_T )
1347  {
1348  syncGraphicalItem( aWorld, static_cast<PCB_SHAPE*>( mgitem ) );
1349  }
1350  else if( mgitem->Type() == PCB_FP_TEXT_T )
1351  {
1352  syncTextItem( aWorld, static_cast<FP_TEXT*>( mgitem ), mgitem->GetLayer() );
1353  }
1354  }
1355  }
1356 
1357  for( PCB_TRACK* t : m_board->Tracks() )
1358  {
1359  KICAD_T type = t->Type();
1360 
1361  if( type == PCB_TRACE_T )
1362  {
1363  if( auto segment = syncTrack( t ) )
1364  aWorld->Add( std::move( segment ) );
1365  }
1366  else if( type == PCB_ARC_T )
1367  {
1368  if( auto arc = syncArc( static_cast<PCB_ARC*>( t ) ) )
1369  aWorld->Add( std::move( arc ) );
1370  }
1371  else if( type == PCB_VIA_T )
1372  {
1373  if( auto via = syncVia( static_cast<PCB_VIA*>( t ) ) )
1374  aWorld->Add( std::move( via ) );
1375  }
1376  }
1377 
1378  // NB: if this were ever to become a long-lived object we would need to dirty its
1379  // clearance cache here....
1380  delete m_ruleResolver;
1382 
1383  aWorld->SetRuleResolver( m_ruleResolver );
1384  aWorld->SetMaxClearance( worstClearance + m_ruleResolver->ClearanceEpsilon() );
1385 }
bool syncTextItem(PNS::NODE *aWorld, EDA_TEXT *aText, PCB_LAYER_ID aLayer)
std::unique_ptr< PNS::SEGMENT > syncTrack(PCB_TRACK *aTrack)
class FP_TEXT, text in a footprint
Definition: typeinfo.h:92
bool GetBoardPolygonOutlines(SHAPE_POLY_SET &aOutlines, OUTLINE_ERROR_HANDLER *aErrorHandler=nullptr)
Extract the board outlines and build a closed polygon from lines, arcs and circle items on edge cut l...
Definition: board.cpp:1880
ZONES & Zones()
Definition: board.h:240
bool syncGraphicalItem(PNS::NODE *aWorld, PCB_SHAPE *aItem)
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:49
class PCB_TEXT, text on a layer
Definition: typeinfo.h:91
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:97
class FP_SHAPE, a footprint edge
Definition: typeinfo.h:93
void SetRuleResolver(RULE_RESOLVER *aFunc)
Definition: pns_node.h:174
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:590
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:77
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:95
void SetMaxClearance(int aClearance)
Assign a clearance resolution function object.
Definition: pns_node.h:168
std::unique_ptr< PNS::VIA > syncVia(PCB_VIA *aVia)
Represent a set of closed polygons.
FOOTPRINTS & Footprints()
Definition: board.h:234
std::unique_ptr< PNS::ARC > syncArc(PCB_ARC *aArc)
Handle a list of polygons defining a copper zone.
Definition: zone.h:56
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:96
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver
Definition: pad.h:57
class PCB_SHAPE, a segment not on copper layers
Definition: typeinfo.h:90
DRAWINGS & Drawings()
Definition: board.h:237
bool Add(std::unique_ptr< SEGMENT > aSegment, bool aAllowRedundant=false)
Add an item to the current node.
Definition: pns_node.cpp:638
A specialization of ZONE for use in footprints.
Definition: zone.h:945
TRACKS & Tracks()
Definition: board.h:231
std::unique_ptr< PNS::SOLID > syncPad(PAD *aPad)
bool syncZone(PNS::NODE *aWorld, ZONE *aZone, SHAPE_POLY_SET *aBoardOutline)

References PNS::NODE::Add(), PNS_PCBNEW_RULE_RESOLVER::ClearanceEpsilon(), BOARD::Drawings(), BOARD::Footprints(), BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue(), BOARD::GetBoardPolygonOutlines(), BOARD::GetDesignSettings(), m_board, m_ruleResolver, m_world, pad, PCB_ARC_T, PCB_FP_SHAPE_T, PCB_FP_TEXT_T, PCB_SHAPE_T, PCB_TEXT_T, PCB_TRACE_T, PCB_VIA_T, PNS::NODE::SetMaxClearance(), PNS::NODE::SetRuleResolver(), syncArc(), syncGraphicalItem(), syncPad(), syncTextItem(), syncTrack(), syncVia(), syncZone(), BOARD::Tracks(), via, and BOARD::Zones().

◆ syncZone()

bool PNS_KICAD_IFACE_BASE::syncZone ( PNS::NODE aWorld,
ZONE aZone,
SHAPE_POLY_SET aBoardOutline 
)
protected

Definition at line 1033 of file pns_kicad_iface.cpp.

1034 {
1035  SHAPE_POLY_SET* poly;
1036 
1037  if( !aZone->GetIsRuleArea() && aZone->GetZoneName().IsEmpty() )
1038  return false;
1039 
1040  // Required by expression function insideArea()
1041  aZone->CacheBoundingBox();
1042 
1043  // TODO handle aZone->GetDoNotAllowVias()
1044  // TODO handle rules which disallow tracks & vias
1045  if( !aZone->GetIsRuleArea() || !aZone->GetDoNotAllowTracks() )
1046  return false;
1047 
1048  LSET layers = aZone->GetLayerSet();
1049  EDA_UNITS units = EDA_UNITS::MILLIMETRES; // TODO: get real units
1050 
1051  poly = aZone->Outline();
1052  poly->CacheTriangulation( false );
1053 
1054  if( !poly->IsTriangulationUpToDate() )
1055  {
1056  KIDIALOG dlg( nullptr, wxString::Format( _( "%s is malformed." ),
1057  aZone->GetSelectMenuText( units ) ),
1059  dlg.ShowDetailedText( wxString::Format( _( "This zone cannot be handled by the router.\n"
1060  "Please verify it is not a self-intersecting "
1061  "polygon." ) ) );
1062  dlg.DoNotShowCheckbox( __FILE__, __LINE__ );
1063  dlg.ShowModal();
1064 
1065  return false;
1066  }
1067 
1068  for( int layer = F_Cu; layer <= B_Cu; layer++ )
1069  {
1070  if( !layers[ layer ] )
1071  continue;
1072 
1073  for( int outline = 0; outline < poly->OutlineCount(); outline++ )
1074  {
1075  const SHAPE_POLY_SET::TRIANGULATED_POLYGON* tri = poly->TriangulatedPolygon( outline );
1076 
1077  for( size_t i = 0; i < tri->GetTriangleCount(); i++)
1078  {
1079  VECTOR2I a, b, c;
1080  tri->GetTriangle( i, a, b, c );
1081  SHAPE_SIMPLE* triShape = new SHAPE_SIMPLE;
1082 
1083  triShape->Append( a );
1084  triShape->Append( b );
1085  triShape->Append( c );
1086 
1087  std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1088 
1089  solid->SetLayer( layer );
1090  solid->SetNet( -1 );
1091  solid->SetParent( aZone );
1092  solid->SetShape( triShape );
1093  solid->SetIsCompoundShapePrimitive();
1094  solid->SetRoutable( false );
1095 
1096  aWorld->Add( std::move( solid ) );
1097  }
1098  }
1099  }
1100 
1101  return true;
1102 }
Represent a simple polygon consisting of a zero-thickness closed chain of connected line segments.
Definition: shape_simple.h:41
int OutlineCount() const
Return the number of vertices in a given outline/hole.
Helper class to create more flexible dialogs, including 'do not show again' checkbox handling.
Definition: confirm.h:45
bool GetIsRuleArea() const
Accessors to parameters used in Rule Area zones:
Definition: zone.h:733
void GetTriangle(int index, VECTOR2I &a, VECTOR2I &b, VECTOR2I &c) const
SHAPE_POLY_SET * Outline()
Definition: zone.h:320
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: zone.cpp:295
bool IsTriangulationUpToDate() const
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:504
Represent a set of closed polygons.
bool GetDoNotAllowTracks() const
Definition: zone.h:736
#define _(s)
void Format(OUTPUTFORMATTER *out, int aNestLevel, int aCtl, const CPTREE &aTree)
Output a PTREE into s-expression format via an OUTPUTFORMATTER derivative.
Definition: ptree.cpp:200
EDA_UNITS
Definition: eda_units.h:38
void CacheBoundingBox()
Definition: zone.h:146
Definition: layer_ids.h:71
void CacheTriangulation(bool aPartition=true)
wxString GetSelectMenuText(EDA_UNITS aUnits) const override
Return the text to display to be used in the selection clarification context menu when multiple items...
Definition: zone.cpp:870
wxString GetZoneName() const
Definition: zone.h:129
const TRIANGULATED_POLYGON * TriangulatedPolygon(int aIndex) const
bool Add(std::unique_ptr< SEGMENT > aSegment, bool aAllowRedundant=false)
Add an item to the current node.
Definition: pns_node.cpp:638
void Append(int aX, int aY)
Append a new point at the end of the polygon.
Definition: shape_simple.h:135

References _, PNS::NODE::Add(), SHAPE_SIMPLE::Append(), B_Cu, ZONE::CacheBoundingBox(), SHAPE_POLY_SET::CacheTriangulation(), KIDIALOG::DoNotShowCheckbox(), F_Cu, Format(), ZONE::GetDoNotAllowTracks(), ZONE::GetIsRuleArea(), ZONE::GetLayerSet(), ZONE::GetSelectMenuText(), SHAPE_POLY_SET::TRIANGULATED_POLYGON::GetTriangle(), SHAPE_POLY_SET::TRIANGULATED_POLYGON::GetTriangleCount(), ZONE::GetZoneName(), SHAPE_POLY_SET::IsTriangulationUpToDate(), KIDIALOG::KD_WARNING, MILLIMETRES, ZONE::Outline(), SHAPE_POLY_SET::OutlineCount(), KIDIALOG::ShowModal(), and SHAPE_POLY_SET::TriangulatedPolygon().

Referenced by SyncWorld().

◆ UpdateItem()

void PNS_KICAD_IFACE_BASE::UpdateItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1501 of file pns_kicad_iface.cpp.

1502 {
1503 }

◆ UpdateNet()

void PNS_KICAD_IFACE_BASE::UpdateNet ( int  aNetCode)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 71 of file pns_kicad_iface.h.

71 {}

Member Data Documentation

◆ m_board

BOARD* PNS_KICAD_IFACE_BASE::m_board
protected

◆ m_debugDecorator

◆ m_ruleResolver

PNS_PCBNEW_RULE_RESOLVER* PNS_KICAD_IFACE_BASE::m_ruleResolver
protected

◆ m_startLayer

int PNS_KICAD_IFACE_BASE::m_startLayer
protected

Definition at line 106 of file pns_kicad_iface.h.

Referenced by ImportSizes(), PNS_KICAD_IFACE_BASE(), and SetStartLayer().

◆ m_world

PNS::NODE* PNS_KICAD_IFACE_BASE::m_world
protected

Definition at line 104 of file pns_kicad_iface.h.

Referenced by GetWorld(), PNS_KICAD_IFACE_BASE(), and SyncWorld().


The documentation for this class was generated from the following files: