KiCad PCB EDA Suite
PNS_KICAD_IFACE_BASE Class Reference

#include <pns_kicad_iface.h>

Inheritance diagram for PNS_KICAD_IFACE_BASE:
PNS::ROUTER_IFACE PNS_KICAD_IFACE

Public Member Functions

 PNS_KICAD_IFACE_BASE ()
 
 ~PNS_KICAD_IFACE_BASE ()
 
void EraseView () override
 
void SetBoard (BOARD *aBoard)
 
void SyncWorld (PNS::NODE *aWorld) override
 
bool IsAnyLayerVisible (const LAYER_RANGE &aLayer) const override
 
bool IsFlashedOnLayer (const PNS::ITEM *aItem, int aLayer) const override
 
bool IsItemVisible (const PNS::ITEM *aItem) const override
 
void HideItem (PNS::ITEM *aItem) override
 
void DisplayItem (const PNS::ITEM *aItem, int aClearance, bool aEdit=false) override
 
void DisplayRatline (const SHAPE_LINE_CHAIN &aRatline, int aColor=-1) override
 
void AddItem (PNS::ITEM *aItem) override
 
void UpdateItem (PNS::ITEM *aItem) override
 
void RemoveItem (PNS::ITEM *aItem) override
 
void Commit () override
 
bool ImportSizes (PNS::SIZES_SETTINGS &aSizes, PNS::ITEM *aStartItem, int aNet) override
 
int StackupHeight (int aFirstLayer, int aSecondLayer) const override
 
void UpdateNet (int aNetCode) override
 
void SetDebugDecorator (PNS::DEBUG_DECORATOR *aDec)
 
virtual PNS::NODEGetWorld () const override
 
BOARDGetBoard () const
 
PNS::RULE_RESOLVERGetRuleResolver () override
 
PNS::DEBUG_DECORATORGetDebugDecorator () override
 

Protected Member Functions

std::unique_ptr< PNS::SOLIDsyncPad (PAD *aPad)
 
std::unique_ptr< PNS::SEGMENTsyncTrack (TRACK *aTrack)
 
std::unique_ptr< PNS::ARCsyncArc (ARC *aArc)
 
std::unique_ptr< PNS::VIAsyncVia (VIA *aVia)
 
bool syncTextItem (PNS::NODE *aWorld, EDA_TEXT *aText, PCB_LAYER_ID aLayer)
 
bool syncGraphicalItem (PNS::NODE *aWorld, PCB_SHAPE *aItem)
 
bool syncZone (PNS::NODE *aWorld, ZONE *aZone, SHAPE_POLY_SET *aBoardOutline)
 
bool inheritTrackWidth (PNS::ITEM *aItem, int *aInheritedWidth)
 

Protected Attributes

PNS_PCBNEW_RULE_RESOLVERm_ruleResolver
 
PNS::DEBUG_DECORATORm_debugDecorator
 
PNS::NODEm_world
 
BOARDm_board
 

Detailed Description

Definition at line 49 of file pns_kicad_iface.h.

Constructor & Destructor Documentation

◆ PNS_KICAD_IFACE_BASE()

PNS_KICAD_IFACE_BASE::PNS_KICAD_IFACE_BASE ( )

Definition at line 820 of file pns_kicad_iface.cpp.

821 {
822  m_ruleResolver = nullptr;
823  m_board = nullptr;
824  m_world = nullptr;
825  m_debugDecorator = nullptr;
826 }
PNS::DEBUG_DECORATOR * m_debugDecorator
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver

References m_board, m_debugDecorator, m_ruleResolver, and m_world.

◆ ~PNS_KICAD_IFACE_BASE()

PNS_KICAD_IFACE_BASE::~PNS_KICAD_IFACE_BASE ( )

Definition at line 838 of file pns_kicad_iface.cpp.

839 {
840 }

Member Function Documentation

◆ AddItem()

void PNS_KICAD_IFACE_BASE::AddItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1550 of file pns_kicad_iface.cpp.

1551 {
1552 
1553 }

◆ Commit()

void PNS_KICAD_IFACE_BASE::Commit ( )
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 67 of file pns_kicad_iface.h.

67 {}

◆ DisplayItem()

void PNS_KICAD_IFACE_BASE::DisplayItem ( const PNS::ITEM aItem,
int  aClearance,
bool  aEdit = false 
)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 62 of file pns_kicad_iface.h.

62 {}

◆ DisplayRatline()

void PNS_KICAD_IFACE_BASE::DisplayRatline ( const SHAPE_LINE_CHAIN aRatline,
int  aColor = -1 
)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 63 of file pns_kicad_iface.h.

63 {}

◆ EraseView()

void PNS_KICAD_IFACE_BASE::EraseView ( )
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 55 of file pns_kicad_iface.h.

55 {};

◆ GetBoard()

BOARD* PNS_KICAD_IFACE_BASE::GetBoard ( ) const
inline

Definition at line 80 of file pns_kicad_iface.h.

81  {
82  return m_board;
83  }

References m_board.

Referenced by ROUTER_TOOL::saveRouterDebugLog().

◆ GetDebugDecorator()

PNS::DEBUG_DECORATOR * PNS_KICAD_IFACE_BASE::GetDebugDecorator ( )
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 814 of file pns_kicad_iface.cpp.

815 {
816  return m_debugDecorator;
817 }
PNS::DEBUG_DECORATOR * m_debugDecorator

References m_debugDecorator.

◆ GetRuleResolver()

PNS::RULE_RESOLVER * PNS_KICAD_IFACE_BASE::GetRuleResolver ( )
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 1689 of file pns_kicad_iface.cpp.

1690 {
1691  return m_ruleResolver;
1692 }
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver

References m_ruleResolver.

◆ GetWorld()

virtual PNS::NODE* PNS_KICAD_IFACE_BASE::GetWorld ( ) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 75 of file pns_kicad_iface.h.

76  {
77  return m_world;
78  };

References m_world.

◆ HideItem()

void PNS_KICAD_IFACE_BASE::HideItem ( PNS::ITEM aItem)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 61 of file pns_kicad_iface.h.

61 {}

◆ ImportSizes()

bool PNS_KICAD_IFACE_BASE::ImportSizes ( PNS::SIZES_SETTINGS aSizes,
PNS::ITEM aStartItem,
int  aNet 
)
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 431 of file pns_kicad_iface.cpp.

432 {
434  PNS::CONSTRAINT constraint;
435 
436  aSizes.SetMinClearance( bds.m_MinClearance );
437 
438  int trackWidth = bds.m_TrackMinWidth;
439  bool found = false;
440 
441  if( bds.m_UseConnectedTrackWidth && aStartItem != nullptr )
442  {
443  found = inheritTrackWidth( aStartItem, &trackWidth );
444  }
445 
446  if( !found && bds.UseNetClassTrack() && aStartItem )
447  {
449  aStartItem->Layer(), &constraint ) )
450  {
451  trackWidth = constraint.m_Value.Opt();
452  found = true; // Note: allowed to override anything, including bds.m_TrackMinWidth
453  }
454  }
455 
456  if( !found )
457  {
458  trackWidth = bds.GetCurrentTrackWidth();
459  }
460 
461  aSizes.SetTrackWidth( trackWidth );
462 
463  int viaDiameter = bds.m_ViasMinSize;
464  int viaDrill = bds.m_MinThroughDrill;
465 
466  if( bds.UseNetClassVia() && aStartItem ) // netclass value
467  {
469  nullptr, aStartItem->Layer(), &constraint ) )
470  {
471  viaDiameter = constraint.m_Value.Opt();
472  }
473 
475  nullptr, aStartItem->Layer(), &constraint ) )
476  {
477  viaDrill = constraint.m_Value.Opt();
478  }
479  }
480  else
481  {
482  viaDiameter = bds.GetCurrentViaSize();
483  viaDrill = bds.GetCurrentViaDrill();
484  }
485 
486  aSizes.SetViaDiameter( viaDiameter );
487  aSizes.SetViaDrill( viaDrill );
488 
489  int diffPairWidth = bds.m_TrackMinWidth;
490  int diffPairGap = bds.m_MinClearance;
491  int diffPairViaGap = bds.m_MinClearance;
492 
493  found = false;
494 
495  // First try to pick up diff pair width from starting track, if enabled
496  if( bds.m_UseConnectedTrackWidth && aStartItem )
497  found = inheritTrackWidth( aStartItem, &diffPairWidth );
498 
499  // Next, pick up gap from netclass, and width also if we didn't get a starting width above
500  if( bds.UseNetClassDiffPair() && aStartItem )
501  {
503  nullptr, aStartItem->Layer(), &constraint ) )
504  {
505  diffPairWidth = constraint.m_Value.Opt();
506  }
507 
509  nullptr, aStartItem->Layer(), &constraint ) )
510  {
511  diffPairGap = constraint.m_Value.Opt();
512  diffPairViaGap = constraint.m_Value.Opt();
513  }
514  }
515  else
516  {
517  diffPairWidth = bds.GetCurrentDiffPairWidth();
518  diffPairGap = bds.GetCurrentDiffPairGap();
519  diffPairViaGap = bds.GetCurrentDiffPairViaGap();
520  }
521 
522  //printf( "DPWidth: %d gap %d\n", diffPairWidth, diffPairGap );
523 
524  aSizes.SetDiffPairWidth( diffPairWidth );
525  aSizes.SetDiffPairGap( diffPairGap );
526  aSizes.SetDiffPairViaGap( diffPairViaGap );
527 
528  int holeToHoleMin = bds.m_HoleToHoleMin;
529  PNS::VIA dummyVia;
530 
532  &dummyVia, UNDEFINED_LAYER, &constraint ) )
533  {
534  holeToHoleMin = constraint.m_Value.Min();
535  }
536 
537  aSizes.SetHoleToHole( holeToHoleMin );
538 
539  aSizes.ClearLayerPairs();
540 
541  return true;
542 }
bool UseNetClassTrack() const
Return true if netclass values should be used to obtain appropriate track width.
virtual int Layer() const
Definition: pns_item.h:154
bool inheritTrackWidth(PNS::ITEM *aItem, int *aInheritedWidth)
bool UseNetClassDiffPair() const
Return true if netclass values should be used to obtain appropriate diff pair dimensions.
T Opt() const
Definition: minoptmax.h:35
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.h:593
void SetViaDrill(int aDrill)
T Min() const
Definition: minoptmax.h:33
void SetTrackWidth(int aWidth)
void SetDiffPairViaGap(int aGap)
void SetMinClearance(int aClearance)
bool UseNetClassVia() const
Return true if netclass values should be used to obtain appropriate via size.
void SetHoleToHole(int aHoleToHole)
void SetDiffPairGap(int aGap)
virtual bool QueryConstraint(PNS::CONSTRAINT_TYPE aType, const PNS::ITEM *aItemA, const PNS::ITEM *aItemB, int aLayer, PNS::CONSTRAINT *aConstraint) override
MINOPTMAX< int > m_Value
Definition: pns_node.h:70
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver
void SetViaDiameter(int aDiameter)
void SetDiffPairWidth(int aWidth)
Container for design settings for a BOARD object.

References PNS::SIZES_SETTINGS::ClearLayerPairs(), PNS::CT_DIFF_PAIR_GAP, PNS::CT_HOLE_TO_HOLE, PNS::CT_VIA_DIAMETER, PNS::CT_VIA_HOLE, PNS::CT_WIDTH, BOARD_DESIGN_SETTINGS::GetCurrentDiffPairGap(), BOARD_DESIGN_SETTINGS::GetCurrentDiffPairViaGap(), BOARD_DESIGN_SETTINGS::GetCurrentDiffPairWidth(), BOARD_DESIGN_SETTINGS::GetCurrentTrackWidth(), BOARD_DESIGN_SETTINGS::GetCurrentViaDrill(), BOARD_DESIGN_SETTINGS::GetCurrentViaSize(), BOARD::GetDesignSettings(), inheritTrackWidth(), PNS::ITEM::Layer(), m_board, BOARD_DESIGN_SETTINGS::m_HoleToHoleMin, BOARD_DESIGN_SETTINGS::m_MinClearance, BOARD_DESIGN_SETTINGS::m_MinThroughDrill, m_ruleResolver, BOARD_DESIGN_SETTINGS::m_TrackMinWidth, BOARD_DESIGN_SETTINGS::m_UseConnectedTrackWidth, PNS::CONSTRAINT::m_Value, BOARD_DESIGN_SETTINGS::m_ViasMinSize, MINOPTMAX< T >::Min(), MINOPTMAX< T >::Opt(), PNS_PCBNEW_RULE_RESOLVER::QueryConstraint(), PNS::SIZES_SETTINGS::SetDiffPairGap(), PNS::SIZES_SETTINGS::SetDiffPairViaGap(), PNS::SIZES_SETTINGS::SetDiffPairWidth(), PNS::SIZES_SETTINGS::SetHoleToHole(), PNS::SIZES_SETTINGS::SetMinClearance(), PNS::SIZES_SETTINGS::SetTrackWidth(), PNS::SIZES_SETTINGS::SetViaDiameter(), PNS::SIZES_SETTINGS::SetViaDrill(), UNDEFINED_LAYER, BOARD_DESIGN_SETTINGS::UseNetClassDiffPair(), BOARD_DESIGN_SETTINGS::UseNetClassTrack(), and BOARD_DESIGN_SETTINGS::UseNetClassVia().

Referenced by ROUTER_TOOL::onTrackViaSizeChanged(), and ROUTER_TOOL::prepareInteractive().

◆ inheritTrackWidth()

bool PNS_KICAD_IFACE_BASE::inheritTrackWidth ( PNS::ITEM aItem,
int *  aInheritedWidth 
)
protected

Definition at line 368 of file pns_kicad_iface.cpp.

369 {
370  VECTOR2I p;
371 
372  assert( aItem->Owner() != NULL );
373 
374  auto tryGetTrackWidth =
375  []( PNS::ITEM* aPnsItem ) -> int
376  {
377  switch( aPnsItem->Kind() )
378  {
379  case PNS::ITEM::SEGMENT_T: return static_cast<PNS::SEGMENT*>( aPnsItem )->Width();
380  case PNS::ITEM::ARC_T: return static_cast<PNS::ARC*>( aPnsItem )->Width();
381  default: return -1;
382  }
383  };
384 
385  int itemTrackWidth = tryGetTrackWidth( aItem );
386 
387  if( itemTrackWidth > 0 )
388  {
389  *aInheritedWidth = itemTrackWidth;
390  return true;
391  }
392 
393  switch( aItem->Kind() )
394  {
395  case PNS::ITEM::VIA_T:
396  p = static_cast<PNS::VIA*>( aItem )->Pos();
397  break;
398 
399  case PNS::ITEM::SOLID_T:
400  p = static_cast<PNS::SOLID*>( aItem )->Pos();
401  break;
402 
403  default:
404  return false;
405  }
406 
407  PNS::JOINT* jt = static_cast<PNS::NODE*>( aItem->Owner() )->FindJoint( p, aItem );
408 
409  assert( jt != NULL );
410 
411  int mval = INT_MAX;
412 
413  PNS::ITEM_SET linkedSegs = jt->Links();
415 
416  for( PNS::ITEM* item : linkedSegs.Items() )
417  {
418  int w = tryGetTrackWidth( item );
419  assert( w > 0 );
420  mval = std::min( w, mval );
421  }
422 
423  if( mval == INT_MAX )
424  return false;
425 
426  *aInheritedWidth = mval;
427  return true;
428 }
Base class for PNS router board items.
Definition: pns_item.h:55
ENTRIES & Items()
Definition: pns_itemset.h:138
ITEM_SET & FilterKinds(int aKindMask, bool aInvert=false)
Definition: pns_itemset.cpp:68
ITEM_SET & ExcludeItem(const ITEM *aItem)
ITEM_SET & Links()
Definition: pns_joint.h:205
Represents a 2D point on a given set of layers and belonging to a certain net, that links together a ...
Definition: pns_joint.h:42
#define NULL
PnsKind Kind() const
Return the type (kind) of the item.
Definition: pns_item.h:126
NODE * Owner() const
Return the owner of this item, or NULL if there's none.
Definition: pns_item.h:167

References PNS::ITEM::ARC_T, PNS::ITEM_SET::ExcludeItem(), PNS::ITEM_SET::FilterKinds(), PNS::ITEM_SET::Items(), PNS::ITEM::Kind(), PNS::JOINT::Links(), NULL, PNS::ITEM::Owner(), PNS::ITEM::SEGMENT_T, PNS::ITEM::SOLID_T, and PNS::ITEM::VIA_T.

Referenced by ImportSizes().

◆ IsAnyLayerVisible()

bool PNS_KICAD_IFACE_BASE::IsAnyLayerVisible ( const LAYER_RANGE aLayer) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 58 of file pns_kicad_iface.h.

58 { return true; };

◆ IsFlashedOnLayer()

bool PNS_KICAD_IFACE_BASE::IsFlashedOnLayer ( const PNS::ITEM aItem,
int  aLayer 
) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 59 of file pns_kicad_iface.h.

59 { return true; };

◆ IsItemVisible()

bool PNS_KICAD_IFACE_BASE::IsItemVisible ( const PNS::ITEM aItem) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 60 of file pns_kicad_iface.h.

60 { return true; }

◆ RemoveItem()

void PNS_KICAD_IFACE_BASE::RemoveItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1456 of file pns_kicad_iface.cpp.

1457 {
1458 
1459 }

◆ SetBoard()

void PNS_KICAD_IFACE_BASE::SetBoard ( BOARD aBoard)

Definition at line 1193 of file pns_kicad_iface.cpp.

1194 {
1195  m_board = aBoard;
1196  wxLogTrace( "PNS", "m_board = %p", m_board );
1197 }

References m_board.

Referenced by PNS::TOOL_BASE::Reset().

◆ SetDebugDecorator()

void PNS_KICAD_IFACE_BASE::SetDebugDecorator ( PNS::DEBUG_DECORATOR aDec)

Definition at line 1389 of file pns_kicad_iface.cpp.

1390 {
1391  m_debugDecorator = aDec;
1392 }
PNS::DEBUG_DECORATOR * m_debugDecorator

References m_debugDecorator.

◆ StackupHeight()

int PNS_KICAD_IFACE_BASE::StackupHeight ( int  aFirstLayer,
int  aSecondLayer 
) const
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 545 of file pns_kicad_iface.cpp.

546 {
547  if( !m_board )
548  return 0;
549 
551 
552  return stackup.GetLayerDistance( ToLAYER_ID( aFirstLayer ), ToLAYER_ID( aSecondLayer ) );
553 }
Manage layers needed to make a physical board.
int GetLayerDistance(PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer) const
Calculate the distance (height) between the two given copper layers.
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.h:593
BOARD_STACKUP & GetStackupDescriptor()
PCB_LAYER_ID ToLAYER_ID(int aLayer)
Definition: lset.cpp:905

References BOARD::GetDesignSettings(), BOARD_STACKUP::GetLayerDistance(), BOARD_DESIGN_SETTINGS::GetStackupDescriptor(), m_board, and ToLAYER_ID().

◆ syncArc()

std::unique_ptr< PNS::ARC > PNS_KICAD_IFACE_BASE::syncArc ( ARC aArc)
protected

Definition at line 984 of file pns_kicad_iface.cpp.

985 {
986  auto arc = std::make_unique<PNS::ARC>( SHAPE_ARC( aArc->GetStart(), aArc->GetMid(), aArc->GetEnd(),
987  aArc->GetWidth() ),
988  aArc->GetNetCode() );
989 
990  arc->SetLayers( LAYER_RANGE( aArc->GetLayer() ) );
991  arc->SetParent( aArc );
992 
993  if( aArc->IsLocked() )
994  arc->Mark( PNS::MK_LOCKED );
995 
996  return arc;
997 }
const wxPoint & GetStart() const
Definition: track.h:116
const wxPoint & GetMid() const
Definition: track.h:292
virtual bool IsLocked() const
Definition: board_item.h:249
int GetWidth() const
Definition: track.h:110
const wxPoint & GetEnd() const
Definition: track.h:113
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:173
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:31

References TRACK::GetEnd(), BOARD_ITEM::GetLayer(), ARC::GetMid(), BOARD_CONNECTED_ITEM::GetNetCode(), TRACK::GetStart(), TRACK::GetWidth(), BOARD_ITEM::IsLocked(), and PNS::MK_LOCKED.

Referenced by SyncWorld().

◆ syncGraphicalItem()

bool PNS_KICAD_IFACE_BASE::syncGraphicalItem ( PNS::NODE aWorld,
PCB_SHAPE aItem 
)
protected

Definition at line 1148 of file pns_kicad_iface.cpp.

1149 {
1150  if( aItem->GetLayer() == Edge_Cuts
1151  || aItem->GetLayer() == Margin
1152  || IsCopperLayer( aItem->GetLayer() ) )
1153  {
1154  // TODO: where do we handle filled polygons on copper layers?
1155  if( aItem->GetShape() == S_POLYGON && aItem->IsFilled() )
1156  return false;
1157 
1158  for( SHAPE* shape : aItem->MakeEffectiveShapes() )
1159  {
1160  std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1161 
1162  if( aItem->GetLayer() == Edge_Cuts || aItem->GetLayer() == Margin )
1163  solid->SetLayers( LAYER_RANGE( F_Cu, B_Cu ) );
1164  else
1165  solid->SetLayer( aItem->GetLayer() );
1166 
1167  if( aItem->GetLayer() == Edge_Cuts )
1168  {
1169  switch( shape->Type() )
1170  {
1171  case SH_SEGMENT: static_cast<SHAPE_SEGMENT*>( shape )->SetWidth( 0 ); break;
1172  case SH_ARC: static_cast<SHAPE_ARC*>( shape )->SetWidth( 0 ); break;
1173  case SH_LINE_CHAIN: static_cast<SHAPE_LINE_CHAIN*>( shape )->SetWidth( 0 ); break;
1174  default: /* remaining shapes don't have width */ break;
1175  }
1176  }
1177 
1178  solid->SetNet( -1 );
1179  solid->SetParent( aItem );
1180  solid->SetShape( shape );
1181  solid->SetRoutable( false );
1182 
1183  aWorld->Add( std::move( solid ) );
1184  }
1185 
1186  return true;
1187  }
1188 
1189  return false;
1190 }
bool IsFilled() const
Definition: pcb_shape.h:96
polygon (not yet used for tracks, but could be in microwave apps)
Definition: board_item.h:54
circular arc
Definition: shape.h:50
An abstract shape on 2D plane.
Definition: shape.h:116
std::vector< SHAPE * > MakeEffectiveShapes() const
Makes a set of SHAPE objects representing the PCB_SHAPE.
Definition: pcb_shape.cpp:1086
line chain (polyline)
Definition: shape.h:45
bool IsCopperLayer(LAYER_NUM aLayerId)
Tests whether a layer is a copper layer.
PCB_SHAPE_TYPE_T GetShape() const
Definition: pcb_shape.h:130
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:173
bool Add(std::unique_ptr< SEGMENT > aSegment, bool aAllowRedundant=false)
Add an item to the current node.
Definition: pns_node.cpp:613
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:31
line segment
Definition: shape.h:44

References PNS::NODE::Add(), B_Cu, Edge_Cuts, F_Cu, BOARD_ITEM::GetLayer(), PCB_SHAPE::GetShape(), IsCopperLayer(), PCB_SHAPE::IsFilled(), PCB_SHAPE::MakeEffectiveShapes(), Margin, S_POLYGON, SH_ARC, SH_LINE_CHAIN, and SH_SEGMENT.

Referenced by SyncWorld().

◆ syncPad()

std::unique_ptr< PNS::SOLID > PNS_KICAD_IFACE_BASE::syncPad ( PAD aPad)
protected

Definition at line 856 of file pns_kicad_iface.cpp.

857 {
858  LAYER_RANGE layers( 0, MAX_CU_LAYERS - 1 );
859 
860  // ignore non-copper pads except for those with holes
861  if( ( aPad->GetLayerSet() & LSET::AllCuMask() ).none() && aPad->GetDrillSize().x == 0 )
862  return NULL;
863 
864  switch( aPad->GetAttribute() )
865  {
866  case PAD_ATTRIB_PTH:
867  case PAD_ATTRIB_NPTH:
868  break;
869 
870  case PAD_ATTRIB_CONN:
871  case PAD_ATTRIB_SMD:
872  {
873  LSET lmsk = aPad->GetLayerSet();
874  bool is_copper = false;
875 
876  for( int i = 0; i < MAX_CU_LAYERS; i++ )
877  {
878  if( lmsk[i] )
879  {
880  is_copper = true;
881 
882  if( aPad->GetAttribute() != PAD_ATTRIB_NPTH )
883  layers = LAYER_RANGE( i );
884 
885  break;
886  }
887  }
888 
889  if( !is_copper )
890  return NULL;
891  }
892  break;
893 
894  default:
895  wxLogTrace( "PNS", "unsupported pad type 0x%x", aPad->GetAttribute() );
896  return NULL;
897  }
898 
899  std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
900 
901  if( aPad->GetDrillSize().x > 0 )
902  {
904 
905  if( aPad->GetAttribute() != PAD_ATTRIB_NPTH )
906  {
908  slot->SetWidth( slot->GetWidth() + bds.GetHolePlatingThickness() * 2 );
909  }
910 
911  solid->SetHole( slot );
912  }
913 
914  if( aPad->GetAttribute() == PAD_ATTRIB_NPTH )
915  solid->SetRoutable( false );
916 
917  solid->SetLayers( layers );
918  solid->SetNet( aPad->GetNetCode() );
919  solid->SetParent( aPad );
920  solid->SetPadToDie( aPad->GetPadToDieLength() );
921  solid->SetOrientation( aPad->GetOrientation() );
922 
923  wxPoint wx_c = aPad->ShapePos();
924  wxPoint offset = aPad->GetOffset();
925 
926  VECTOR2I c( wx_c.x, wx_c.y );
927 
928  RotatePoint( &offset, aPad->GetOrientation() );
929 
930  solid->SetPos( VECTOR2I( c.x - offset.x, c.y - offset.y ) );
931  solid->SetOffset( VECTOR2I( offset.x, offset.y ) );
932 
933 
934  auto shapes = std::dynamic_pointer_cast<SHAPE_COMPOUND>( aPad->GetEffectiveShape() );
935 
936  if( shapes && shapes->Size() == 1 )
937  {
938  solid->SetShape( shapes->Shapes()[0]->Clone() );
939  }
940  else
941  {
942  // Fixme (but not urgent). For complex pad shapes, we pass a single simple polygon to the
943  // router, otherwise it won't know how to correctly build walkaround 'hulls' for the pad
944  // primitives - it can recognize only simple shapes, but not COMPOUNDs made of multiple shapes.
945  // The proper way to fix this would be to implement SHAPE_COMPOUND::ConvertToSimplePolygon(),
946  // but the complexity of pad polygonization code (see PAD::GetEffectivePolygon), including
947  // approximation error handling makes me slightly scared to do it right now.
948 
949  // NOTE: PAD::GetEffectivePolygon puts the error on the inside, but we want the error on
950  // the outside so that the collision hull is larger than the pad
951 
952  SHAPE_POLY_SET outline;
953  aPad->TransformShapeWithClearanceToPolygon( outline, UNDEFINED_LAYER, 0, ARC_HIGH_DEF,
954  ERROR_OUTSIDE );
955 
956  SHAPE_SIMPLE* shape = new SHAPE_SIMPLE();
957 
958  for( auto iter = outline.CIterate( 0 ); iter; iter++ )
959  shape->Append( *iter );
960 
961  solid->SetShape( shape );
962  }
963 
964  return solid;
965 }
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:750
SHAPE_SIMPLE.
Definition: shape_simple.h:43
int GetHolePlatingThickness() const
Pad & via drills are finish size.
Smd pad, appears on the solder paste layer (default)
Definition: pad_shapes.h:81
const SHAPE_SEGMENT * GetEffectiveHoleShape() const
Return a SHAPE object representing the pad's hole.
Definition: pad.cpp:286
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.h:593
void RotatePoint(int *pX, int *pY, double angle)
Definition: trigo.cpp:228
like PAD_PTH, but not plated mechanical use only, no connection allowed
Definition: pad_shapes.h:85
VECTOR2< int > VECTOR2I
Definition: vector2d.h:623
PAD_ATTR_T GetAttribute() const
Definition: pad.h:371
const wxPoint & GetOffset() const
Definition: pad.h:249
const wxSize & GetDrillSize() const
Definition: pad.h:242
wxPoint ShapePos() const
Definition: pad.cpp:657
LSET is a set of PCB_LAYER_IDs.
#define NULL
double GetOrientation() const
Return the rotation angle of the pad in a variety of units (the basic call returns tenths of degrees)...
Definition: pad.h:349
Represent a set of closed polygons.
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER) const override
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: pad.cpp:277
LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: pad.h:368
Like smd, does not appear on the solder paste layer (default) note also has a special attribute in Ge...
Definition: pad_shapes.h:82
CONST_ITERATOR CIterate(int aFirst, int aLast, bool aIterateHoles=false) const
void TransformShapeWithClearanceToPolygon(SHAPE_POLY_SET &aCornerBuffer, PCB_LAYER_ID aLayer, int aClearanceValue, int aMaxError, ERROR_LOC aErrorLoc, bool ignoreLineWidth=false) const override
Convert the pad shape to a closed polygon.
SHAPE * Clone() const override
Return a dynamically allocated copy of the shape.
Definition: shape_segment.h:57
Plated through hole pad.
Definition: pad_shapes.h:80
int GetWidth() const
int GetPadToDieLength() const
Definition: pad.h:384
void Append(int aX, int aY)
Function Append()
Definition: shape_simple.h:145
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:31
void SetWidth(int aWidth)
Container for design settings for a BOARD object.

References LSET::AllCuMask(), SHAPE_SIMPLE::Append(), SHAPE_POLY_SET::CIterate(), SHAPE_SEGMENT::Clone(), ERROR_OUTSIDE, PAD::GetAttribute(), BOARD::GetDesignSettings(), PAD::GetDrillSize(), PAD::GetEffectiveHoleShape(), PAD::GetEffectiveShape(), BOARD_DESIGN_SETTINGS::GetHolePlatingThickness(), PAD::GetLayerSet(), BOARD_CONNECTED_ITEM::GetNetCode(), PAD::GetOffset(), PAD::GetOrientation(), PAD::GetPadToDieLength(), SHAPE_SEGMENT::GetWidth(), m_board, MAX_CU_LAYERS, NULL, PAD_ATTRIB_CONN, PAD_ATTRIB_NPTH, PAD_ATTRIB_PTH, PAD_ATTRIB_SMD, RotatePoint(), SHAPE_SEGMENT::SetWidth(), PAD::ShapePos(), PAD::TransformShapeWithClearanceToPolygon(), UNDEFINED_LAYER, VECTOR2< T >::x, and VECTOR2< T >::y.

Referenced by SyncWorld().

◆ syncTextItem()

bool PNS_KICAD_IFACE_BASE::syncTextItem ( PNS::NODE aWorld,
EDA_TEXT aText,
PCB_LAYER_ID  aLayer 
)
protected

Definition at line 1098 of file pns_kicad_iface.cpp.

1099 {
1100  if( !IsCopperLayer( aLayer ) )
1101  return false;
1102 
1103  int textWidth = aText->GetEffectiveTextPenWidth();
1104  std::vector<wxPoint> textShape = aText->TransformToSegmentList();
1105 
1106  if( textShape.size() < 2 )
1107  return false;
1108 
1109  for( size_t jj = 0; jj < textShape.size(); jj += 2 )
1110  {
1111  VECTOR2I start( textShape[jj] );
1112  VECTOR2I end( textShape[jj+1] );
1113  std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1114 
1115  solid->SetLayer( aLayer );
1116  solid->SetNet( -1 );
1117  solid->SetParent( dynamic_cast<BOARD_ITEM*>( aText ) );
1118  solid->SetShape( new SHAPE_SEGMENT( start, end, textWidth ) );
1119  solid->SetRoutable( false );
1120 
1121  aWorld->Add( std::move( solid ) );
1122  }
1123 
1124  return true;
1125 
1126  /* A coarser (but faster) method:
1127  *
1128  SHAPE_POLY_SET outline;
1129  SHAPE_SIMPLE* shape = new SHAPE_SIMPLE();
1130 
1131  aText->TransformBoundingBoxWithClearanceToPolygon( &outline, 0 );
1132 
1133  for( auto iter = outline.CIterate( 0 ); iter; iter++ )
1134  shape->Append( *iter );
1135 
1136  solid->SetShape( shape );
1137 
1138  solid->SetLayer( aLayer );
1139  solid->SetNet( -1 );
1140  solid->SetParent( nullptr );
1141  solid->SetRoutable( false );
1142  aWorld->Add( std::move( solid ) );
1143  return true;
1144  */
1145 }
std::vector< wxPoint > TransformToSegmentList() const
Convert the text shape to a list of segment.
Definition: eda_text.cpp:580
int GetEffectiveTextPenWidth(int aDefaultWidth=0) const
The EffectiveTextPenWidth uses the text thickness if > 1 or aDefaultWidth.
Definition: eda_text.cpp:157
bool IsCopperLayer(LAYER_NUM aLayerId)
Tests whether a layer is a copper layer.
bool Add(std::unique_ptr< SEGMENT > aSegment, bool aAllowRedundant=false)
Add an item to the current node.
Definition: pns_node.cpp:613

References PNS::NODE::Add(), EDA_TEXT::GetEffectiveTextPenWidth(), IsCopperLayer(), and EDA_TEXT::TransformToSegmentList().

Referenced by SyncWorld().

◆ syncTrack()

std::unique_ptr< PNS::SEGMENT > PNS_KICAD_IFACE_BASE::syncTrack ( TRACK aTrack)
protected

Definition at line 968 of file pns_kicad_iface.cpp.

969 {
970  auto segment = std::make_unique<PNS::SEGMENT>( SEG( aTrack->GetStart(), aTrack->GetEnd() ),
971  aTrack->GetNetCode() );
972 
973  segment->SetWidth( aTrack->GetWidth() );
974  segment->SetLayers( LAYER_RANGE( aTrack->GetLayer() ) );
975  segment->SetParent( aTrack );
976 
977  if( aTrack->IsLocked() )
978  segment->Mark( PNS::MK_LOCKED );
979 
980  return segment;
981 }
const wxPoint & GetStart() const
Definition: track.h:116
Definition: seg.h:41
virtual bool IsLocked() const
Definition: board_item.h:249
int GetWidth() const
Definition: track.h:110
const wxPoint & GetEnd() const
Definition: track.h:113
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:173
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:31

References TRACK::GetEnd(), BOARD_ITEM::GetLayer(), BOARD_CONNECTED_ITEM::GetNetCode(), TRACK::GetStart(), TRACK::GetWidth(), BOARD_ITEM::IsLocked(), and PNS::MK_LOCKED.

Referenced by SyncWorld().

◆ syncVia()

std::unique_ptr< PNS::VIA > PNS_KICAD_IFACE_BASE::syncVia ( VIA aVia)
protected

Definition at line 1000 of file pns_kicad_iface.cpp.

1001 {
1002  PCB_LAYER_ID top, bottom;
1003  aVia->LayerPair( &top, &bottom );
1004 
1005  auto via = std::make_unique<PNS::VIA>( aVia->GetPosition(),
1006  LAYER_RANGE( aVia->TopLayer(), aVia->BottomLayer() ),
1007  aVia->GetWidth(),
1008  aVia->GetDrillValue(),
1009  aVia->GetNetCode(),
1010  aVia->GetViaType() );
1011 
1012  via->SetParent( aVia );
1013 
1014  if( aVia->IsLocked() )
1015  via->Mark( PNS::MK_LOCKED );
1016 
1017  via->SetIsFree( aVia->GetIsFree() );
1018 
1020  via->SetHole( SHAPE_CIRCLE( aVia->GetPosition(),
1021  aVia->GetDrill() / 2 + bds.GetHolePlatingThickness() ) );
1022 
1023  return via;
1024 }
void LayerPair(PCB_LAYER_ID *top_layer, PCB_LAYER_ID *bottom_layer) const
Function LayerPair Return the 2 layers used by the via (the via actually uses all layers between thes...
Definition: track.cpp:435
int GetHolePlatingThickness() const
Pad & via drills are finish size.
bool GetIsFree() const
Checks if the via is a free via (as opposed to one created on a track by the router).
Definition: track.h:502
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.h:593
PCB_LAYER_ID
A quick note on layer IDs:
int GetDrillValue() const
Function GetDrillValue "calculates" the drill value for vias (m-Drill if > 0, or default drill value ...
Definition: track.cpp:173
int GetDrill() const
Function GetDrill returns the local drill setting for this VIA.
Definition: track.h:481
virtual bool IsLocked() const
Definition: board_item.h:249
int GetWidth() const
Definition: track.h:110
VIATYPE GetViaType() const
Definition: track.h:373
PCB_LAYER_ID TopLayer() const
Definition: track.cpp:457
wxPoint GetPosition() const override
Definition: track.h:411
PCB_LAYER_ID BottomLayer() const
Definition: track.cpp:463
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:31
Container for design settings for a BOARD object.

References VIA::BottomLayer(), BOARD::GetDesignSettings(), VIA::GetDrill(), VIA::GetDrillValue(), BOARD_DESIGN_SETTINGS::GetHolePlatingThickness(), VIA::GetIsFree(), BOARD_CONNECTED_ITEM::GetNetCode(), VIA::GetPosition(), VIA::GetViaType(), TRACK::GetWidth(), BOARD_ITEM::IsLocked(), VIA::LayerPair(), m_board, PNS::MK_LOCKED, VIA::TopLayer(), and via.

Referenced by SyncWorld().

◆ SyncWorld()

void PNS_KICAD_IFACE_BASE::SyncWorld ( PNS::NODE aWorld)
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 1274 of file pns_kicad_iface.cpp.

1275 {
1276  if( !m_board )
1277  {
1278  wxLogTrace( "PNS", "No board attached, aborting sync." );
1279  return;
1280  }
1281 
1282  int worstClearance = m_board->GetDesignSettings().GetBiggestClearanceValue();
1283 
1284  m_world = aWorld;
1285 
1286  for( BOARD_ITEM* gitem : m_board->Drawings() )
1287  {
1288  if ( gitem->Type() == PCB_SHAPE_T )
1289  {
1290  syncGraphicalItem( aWorld, static_cast<PCB_SHAPE*>( gitem ) );
1291  }
1292  else if( gitem->Type() == PCB_TEXT_T )
1293  {
1294  syncTextItem( aWorld, static_cast<PCB_TEXT*>( gitem ), gitem->GetLayer() );
1295  }
1296  }
1297 
1298  SHAPE_POLY_SET buffer;
1299  SHAPE_POLY_SET* boardOutline = nullptr;
1300 
1301  if( m_board->GetBoardPolygonOutlines( buffer ) )
1302  boardOutline = &buffer;
1303 
1304  for( ZONE* zone : m_board->Zones() )
1305  {
1306  syncZone( aWorld, zone, boardOutline );
1307  }
1308 
1309  for( FOOTPRINT* footprint : m_board->Footprints() )
1310  {
1311  for( PAD* pad : footprint->Pads() )
1312  {
1313  if( std::unique_ptr<PNS::SOLID> solid = syncPad( pad ) )
1314  aWorld->Add( std::move( solid ) );
1315 
1316  worstClearance = std::max( worstClearance, pad->GetLocalClearance() );
1317  }
1318 
1319  syncTextItem( aWorld, &footprint->Reference(), footprint->Reference().GetLayer() );
1320  syncTextItem( aWorld, &footprint->Value(), footprint->Value().GetLayer() );
1321 
1322  for( FP_ZONE* zone : footprint->Zones() )
1323  syncZone( aWorld, zone, boardOutline );
1324 
1325  if( footprint->IsNetTie() )
1326  continue;
1327 
1328  for( BOARD_ITEM* mgitem : footprint->GraphicalItems() )
1329  {
1330  if( mgitem->Type() == PCB_FP_SHAPE_T )
1331  {
1332  syncGraphicalItem( aWorld, static_cast<PCB_SHAPE*>( mgitem ) );
1333  }
1334  else if( mgitem->Type() == PCB_FP_TEXT_T )
1335  {
1336  syncTextItem( aWorld, static_cast<FP_TEXT*>( mgitem ), mgitem->GetLayer() );
1337  }
1338  }
1339  }
1340 
1341  for( TRACK* t : m_board->Tracks() )
1342  {
1343  KICAD_T type = t->Type();
1344 
1345  if( type == PCB_TRACE_T )
1346  {
1347  if( auto segment = syncTrack( t ) )
1348  aWorld->Add( std::move( segment ) );
1349  }
1350  else if( type == PCB_ARC_T )
1351  {
1352  if( auto arc = syncArc( static_cast<ARC*>( t ) ) )
1353  aWorld->Add( std::move( arc ) );
1354  }
1355  else if( type == PCB_VIA_T )
1356  {
1357  if( auto via = syncVia( static_cast<VIA*>( t ) ) )
1358  aWorld->Add( std::move( via ) );
1359  }
1360  }
1361 
1362  // NB: if this were ever to become a long-lived object we would need to dirty its
1363  // clearance cache here....
1364  delete m_ruleResolver;
1366 
1367  aWorld->SetRuleResolver( m_ruleResolver );
1368  aWorld->SetMaxClearance( worstClearance + m_ruleResolver->ClearanceEpsilon() );
1369 }
std::unique_ptr< PNS::VIA > syncVia(VIA *aVia)
bool syncTextItem(PNS::NODE *aWorld, EDA_TEXT *aText, PCB_LAYER_ID aLayer)
class FP_TEXT, text in a footprint
Definition: typeinfo.h:92
bool GetBoardPolygonOutlines(SHAPE_POLY_SET &aOutlines, OUTLINE_ERROR_HANDLER *aErrorHandler=nullptr)
Extract the board outlines and build a closed polygon from lines, arcs and circle items on edge cut l...
Definition: board.cpp:1922
ZONES & Zones()
Definition: board.h:311
bool syncGraphicalItem(PNS::NODE *aWorld, PCB_SHAPE *aItem)
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:82
class PCB_TEXT, text on a layer
Definition: typeinfo.h:91
class ARC, an arc track segment on a copper layer
Definition: typeinfo.h:97
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.h:593
class FP_SHAPE, a footprint edge
Definition: typeinfo.h:93
void SetRuleResolver(RULE_RESOLVER *aFunc)
Definition: pns_node.h:173
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:77
class TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:95
void SetMaxClearance(int aClearance)
Assign a clearance resolution function object.
Definition: pns_node.h:167
Represent a set of closed polygons.
FOOTPRINTS & Footprints()
Definition: board.h:305
Handle a list of polygons defining a copper zone.
Definition: zone.h:57
std::unique_ptr< PNS::ARC > syncArc(ARC *aArc)
class VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:96
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver
Definition: pad.h:60
class PCB_SHAPE, a segment not on copper layers
Definition: typeinfo.h:90
DRAWINGS & Drawings()
Definition: board.h:308
bool Add(std::unique_ptr< SEGMENT > aSegment, bool aAllowRedundant=false)
Add an item to the current node.
Definition: pns_node.cpp:613
A specialization of ZONE for use in footprints.
Definition: zone.h:943
TRACKS & Tracks()
Definition: board.h:302
std::unique_ptr< PNS::SEGMENT > syncTrack(TRACK *aTrack)
Definition: track.h:83
std::unique_ptr< PNS::SOLID > syncPad(PAD *aPad)
bool syncZone(PNS::NODE *aWorld, ZONE *aZone, SHAPE_POLY_SET *aBoardOutline)

References PNS::NODE::Add(), PNS_PCBNEW_RULE_RESOLVER::ClearanceEpsilon(), BOARD::Drawings(), BOARD::Footprints(), BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue(), BOARD::GetBoardPolygonOutlines(), BOARD::GetDesignSettings(), m_board, m_ruleResolver, m_world, pad, PCB_ARC_T, PCB_FP_SHAPE_T, PCB_FP_TEXT_T, PCB_SHAPE_T, PCB_TEXT_T, PCB_TRACE_T, PCB_VIA_T, PNS::NODE::SetMaxClearance(), PNS::NODE::SetRuleResolver(), syncArc(), syncGraphicalItem(), syncPad(), syncTextItem(), syncTrack(), syncVia(), syncZone(), BOARD::Tracks(), via, and BOARD::Zones().

◆ syncZone()

bool PNS_KICAD_IFACE_BASE::syncZone ( PNS::NODE aWorld,
ZONE aZone,
SHAPE_POLY_SET aBoardOutline 
)
protected

Definition at line 1027 of file pns_kicad_iface.cpp.

1028 {
1029  SHAPE_POLY_SET* poly;
1030 
1031  if( !aZone->GetIsRuleArea() && aZone->GetZoneName().IsEmpty() )
1032  return false;
1033 
1034  // Required by expression function insideArea()
1035  aZone->CacheBoundingBox();
1036 
1037  // TODO handle aZone->GetDoNotAllowVias()
1038  // TODO handle rules which disallow tracks & vias
1039  if( !aZone->GetIsRuleArea() || !aZone->GetDoNotAllowTracks() )
1040  return false;
1041 
1042  LSET layers = aZone->GetLayerSet();
1043  EDA_UNITS units = EDA_UNITS::MILLIMETRES; // TODO: get real units
1044 
1045  poly = aZone->Outline();
1046  poly->CacheTriangulation( false );
1047 
1048  if( !poly->IsTriangulationUpToDate() )
1049  {
1050  KIDIALOG dlg( nullptr, wxString::Format( _( "%s is malformed." ),
1051  aZone->GetSelectMenuText( units ) ),
1053  dlg.ShowDetailedText( wxString::Format( _( "This zone cannot be handled by the router.\n"
1054  "Please verify it is not a self-intersecting "
1055  "polygon." ) ) );
1056  dlg.DoNotShowCheckbox( __FILE__, __LINE__ );
1057  dlg.ShowModal();
1058 
1059  return false;
1060  }
1061 
1062  for( int layer = F_Cu; layer <= B_Cu; layer++ )
1063  {
1064  if( !layers[ layer ] )
1065  continue;
1066 
1067  for( int outline = 0; outline < poly->OutlineCount(); outline++ )
1068  {
1069  const SHAPE_POLY_SET::TRIANGULATED_POLYGON* tri = poly->TriangulatedPolygon( outline );
1070 
1071  for( size_t i = 0; i < tri->GetTriangleCount(); i++)
1072  {
1073  VECTOR2I a, b, c;
1074  tri->GetTriangle( i, a, b, c );
1075  SHAPE_SIMPLE* triShape = new SHAPE_SIMPLE;
1076 
1077  triShape->Append( a );
1078  triShape->Append( b );
1079  triShape->Append( c );
1080 
1081  std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1082 
1083  solid->SetLayer( layer );
1084  solid->SetNet( -1 );
1085  solid->SetParent( aZone );
1086  solid->SetShape( triShape );
1087  solid->SetRoutable( false );
1088 
1089  aWorld->Add( std::move( solid ) );
1090  }
1091  }
1092  }
1093 
1094  return true;
1095 }
SHAPE_SIMPLE.
Definition: shape_simple.h:43
int OutlineCount() const
Return the number of vertices in a given outline/hole.
Helper class to create more flexible dialogs, including 'do not show again' checkbox handling.
Definition: confirm.h:45
bool GetIsRuleArea() const
Accessors to parameters used in Rule Area zones:
Definition: zone.h:730
void GetTriangle(int index, VECTOR2I &a, VECTOR2I &b, VECTOR2I &c) const
SHAPE_POLY_SET * Outline()
Definition: zone.h:317
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: zone.cpp:289
bool IsTriangulationUpToDate() const
LSET is a set of PCB_LAYER_IDs.
Represent a set of closed polygons.
bool GetDoNotAllowTracks() const
Definition: zone.h:733
void Format(OUTPUTFORMATTER *out, int aNestLevel, int aCtl, const CPTREE &aTree)
Output a PTREE into s-expression format via an OUTPUTFORMATTER derivative.
Definition: ptree.cpp:200
EDA_UNITS
Definition: eda_units.h:38
void CacheBoundingBox()
Definition: zone.h:146
#define _(s)
Definition: 3d_actions.cpp:33
void CacheTriangulation(bool aPartition=true)
wxString GetSelectMenuText(EDA_UNITS aUnits) const override
Return the text to display to be used in the selection clarification context menu when multiple items...
Definition: zone.cpp:853
wxString GetZoneName() const
Definition: zone.h:129
const TRIANGULATED_POLYGON * TriangulatedPolygon(int aIndex) const
bool Add(std::unique_ptr< SEGMENT > aSegment, bool aAllowRedundant=false)
Add an item to the current node.
Definition: pns_node.cpp:613
void Append(int aX, int aY)
Function Append()
Definition: shape_simple.h:145

References _, PNS::NODE::Add(), SHAPE_SIMPLE::Append(), B_Cu, ZONE::CacheBoundingBox(), SHAPE_POLY_SET::CacheTriangulation(), KIDIALOG::DoNotShowCheckbox(), F_Cu, Format(), ZONE::GetDoNotAllowTracks(), ZONE::GetIsRuleArea(), ZONE::GetLayerSet(), ZONE::GetSelectMenuText(), SHAPE_POLY_SET::TRIANGULATED_POLYGON::GetTriangle(), SHAPE_POLY_SET::TRIANGULATED_POLYGON::GetTriangleCount(), ZONE::GetZoneName(), SHAPE_POLY_SET::IsTriangulationUpToDate(), KIDIALOG::KD_WARNING, MILLIMETRES, ZONE::Outline(), SHAPE_POLY_SET::OutlineCount(), KIDIALOG::ShowModal(), and SHAPE_POLY_SET::TriangulatedPolygon().

Referenced by SyncWorld().

◆ UpdateItem()

void PNS_KICAD_IFACE_BASE::UpdateItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1482 of file pns_kicad_iface.cpp.

1483 {
1484 
1485 }

◆ UpdateNet()

void PNS_KICAD_IFACE_BASE::UpdateNet ( int  aNetCode)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 71 of file pns_kicad_iface.h.

71 {}

Member Data Documentation

◆ m_board

BOARD* PNS_KICAD_IFACE_BASE::m_board
protected

◆ m_debugDecorator

◆ m_ruleResolver

PNS_PCBNEW_RULE_RESOLVER* PNS_KICAD_IFACE_BASE::m_ruleResolver
protected

◆ m_world

PNS::NODE* PNS_KICAD_IFACE_BASE::m_world
protected

Definition at line 102 of file pns_kicad_iface.h.

Referenced by GetWorld(), PNS_KICAD_IFACE_BASE(), and SyncWorld().


The documentation for this class was generated from the following files: