KiCad PCB EDA Suite
PNS_KICAD_IFACE_BASE Class Reference

#include <pns_kicad_iface.h>

Inheritance diagram for PNS_KICAD_IFACE_BASE:
PNS::ROUTER_IFACE PNS_KICAD_IFACE PNS_LOG_PLAYER_KICAD_IFACE

Public Member Functions

 PNS_KICAD_IFACE_BASE ()
 
 ~PNS_KICAD_IFACE_BASE ()
 
void EraseView () override
 
void SetBoard (BOARD *aBoard)
 
void SyncWorld (PNS::NODE *aWorld) override
 
bool IsAnyLayerVisible (const LAYER_RANGE &aLayer) const override
 
bool IsFlashedOnLayer (const PNS::ITEM *aItem, int aLayer) const override
 
bool IsItemVisible (const PNS::ITEM *aItem) const override
 
void HideItem (PNS::ITEM *aItem) override
 
void DisplayItem (const PNS::ITEM *aItem, int aClearance, bool aEdit=false) override
 
void DisplayRatline (const SHAPE_LINE_CHAIN &aRatline, int aColor=-1) override
 
void AddItem (PNS::ITEM *aItem) override
 
void UpdateItem (PNS::ITEM *aItem) override
 
void RemoveItem (PNS::ITEM *aItem) override
 
void Commit () override
 
bool ImportSizes (PNS::SIZES_SETTINGS &aSizes, PNS::ITEM *aStartItem, int aNet) override
 
int StackupHeight (int aFirstLayer, int aSecondLayer) const override
 
void UpdateNet (int aNetCode) override
 
void SetDebugDecorator (PNS::DEBUG_DECORATOR *aDec)
 
void SetStartLayer (int aLayer)
 
virtual PNS::NODEGetWorld () const override
 
BOARDGetBoard () const
 
virtual EDA_UNITS GetUnits () const
 
PNS::RULE_RESOLVERGetRuleResolver () override
 
PNS::DEBUG_DECORATORGetDebugDecorator () override
 

Protected Member Functions

std::unique_ptr< PNS::SOLIDsyncPad (PAD *aPad)
 
std::unique_ptr< PNS::SEGMENTsyncTrack (PCB_TRACK *aTrack)
 
std::unique_ptr< PNS::ARCsyncArc (PCB_ARC *aArc)
 
std::unique_ptr< PNS::VIAsyncVia (PCB_VIA *aVia)
 
bool syncTextItem (PNS::NODE *aWorld, EDA_TEXT *aText, PCB_LAYER_ID aLayer)
 
bool syncGraphicalItem (PNS::NODE *aWorld, PCB_SHAPE *aItem)
 
bool syncZone (PNS::NODE *aWorld, ZONE *aZone, SHAPE_POLY_SET *aBoardOutline)
 
bool inheritTrackWidth (PNS::ITEM *aItem, int *aInheritedWidth)
 

Protected Attributes

PNS_PCBNEW_RULE_RESOLVERm_ruleResolver
 
PNS::DEBUG_DECORATORm_debugDecorator
 
PNS::NODEm_world
 
BOARDm_board
 
int m_startLayer
 

Detailed Description

Definition at line 49 of file pns_kicad_iface.h.

Constructor & Destructor Documentation

◆ PNS_KICAD_IFACE_BASE()

PNS_KICAD_IFACE_BASE::PNS_KICAD_IFACE_BASE ( )

Definition at line 848 of file pns_kicad_iface.cpp.

849{
850 m_ruleResolver = nullptr;
851 m_board = nullptr;
852 m_world = nullptr;
853 m_debugDecorator = nullptr;
854 m_startLayer = -1;
855}
PNS::DEBUG_DECORATOR * m_debugDecorator
PNS_PCBNEW_RULE_RESOLVER * m_ruleResolver

References m_board, m_debugDecorator, m_ruleResolver, m_startLayer, and m_world.

◆ ~PNS_KICAD_IFACE_BASE()

PNS_KICAD_IFACE_BASE::~PNS_KICAD_IFACE_BASE ( )

Definition at line 866 of file pns_kicad_iface.cpp.

867{
868}

Member Function Documentation

◆ AddItem()

void PNS_KICAD_IFACE_BASE::AddItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1567 of file pns_kicad_iface.cpp.

1568{
1569
1570}

◆ Commit()

void PNS_KICAD_IFACE_BASE::Commit ( )
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 67 of file pns_kicad_iface.h.

67{}

◆ DisplayItem()

void PNS_KICAD_IFACE_BASE::DisplayItem ( const PNS::ITEM aItem,
int  aClearance,
bool  aEdit = false 
)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE, and PNS_LOG_PLAYER_KICAD_IFACE.

Definition at line 62 of file pns_kicad_iface.h.

62{}

◆ DisplayRatline()

void PNS_KICAD_IFACE_BASE::DisplayRatline ( const SHAPE_LINE_CHAIN aRatline,
int  aColor = -1 
)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 63 of file pns_kicad_iface.h.

63{}

◆ EraseView()

void PNS_KICAD_IFACE_BASE::EraseView ( )
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 55 of file pns_kicad_iface.h.

55{};

◆ GetBoard()

BOARD * PNS_KICAD_IFACE_BASE::GetBoard ( ) const
inline

Definition at line 79 of file pns_kicad_iface.h.

79{ return m_board; }

References m_board.

Referenced by ROUTER_TOOL::saveRouterDebugLog().

◆ GetDebugDecorator()

PNS::DEBUG_DECORATOR * PNS_KICAD_IFACE_BASE::GetDebugDecorator ( )
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 842 of file pns_kicad_iface.cpp.

843{
844 return m_debugDecorator;
845}

References m_debugDecorator.

◆ GetRuleResolver()

PNS::RULE_RESOLVER * PNS_KICAD_IFACE_BASE::GetRuleResolver ( )
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 1714 of file pns_kicad_iface.cpp.

1715{
1716 return m_ruleResolver;
1717}

References m_ruleResolver.

Referenced by ROUTER_TOOL::UpdateMessagePanel().

◆ GetUnits()

virtual EDA_UNITS PNS_KICAD_IFACE_BASE::GetUnits ( ) const
inlinevirtual

Reimplemented in PNS_KICAD_IFACE.

Definition at line 81 of file pns_kicad_iface.h.

81{ return EDA_UNITS::MILLIMETRES; };

References MILLIMETRES.

Referenced by syncZone().

◆ GetWorld()

virtual PNS::NODE * PNS_KICAD_IFACE_BASE::GetWorld ( ) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 77 of file pns_kicad_iface.h.

77{ return m_world; };

References m_world.

◆ HideItem()

void PNS_KICAD_IFACE_BASE::HideItem ( PNS::ITEM aItem)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE, and PNS_LOG_PLAYER_KICAD_IFACE.

Definition at line 61 of file pns_kicad_iface.h.

61{}

◆ ImportSizes()

bool PNS_KICAD_IFACE_BASE::ImportSizes ( PNS::SIZES_SETTINGS aSizes,
PNS::ITEM aStartItem,
int  aNet 
)
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 507 of file pns_kicad_iface.cpp.

509{
511 PNS::CONSTRAINT constraint;
512
513 if( aStartItem && m_startLayer < 0 )
514 m_startLayer = aStartItem->Layer();
515
516 aSizes.SetMinClearance( bds.m_MinClearance );
517
518 int trackWidth = bds.m_TrackMinWidth;
519 bool found = false;
520
521 if( bds.m_UseConnectedTrackWidth && !bds.m_TempOverrideTrackWidth && aStartItem != nullptr )
522 {
523 found = inheritTrackWidth( aStartItem, &trackWidth );
524
525 if( found )
526 aSizes.SetWidthSource( _( "existing track" ) );
527 }
528
529 if( !found && bds.UseNetClassTrack() && aStartItem )
530 {
532 m_startLayer, &constraint ) )
533 {
534 trackWidth = std::max( trackWidth, constraint.m_Value.Opt() );
535 found = true;
536
537 if( trackWidth == constraint.m_Value.Opt() )
538 aSizes.SetWidthSource( constraint.m_RuleName );
539 else
540 aSizes.SetWidthSource( _( "board minimum width" ) );
541 }
542 }
543
544 if( !found )
545 {
546 trackWidth = std::max( trackWidth, bds.GetCurrentTrackWidth() );
547
548 if( bds.UseNetClassTrack() )
549 aSizes.SetWidthSource( _( "netclass 'Default'" ) );
550 else if( trackWidth == bds.GetCurrentTrackWidth() )
551 aSizes.SetWidthSource( _( "user choice" ) );
552 else
553 aSizes.SetWidthSource( _( "board minimum width" ) );
554 }
555
556 aSizes.SetTrackWidth( trackWidth );
558
559 int viaDiameter = bds.m_ViasMinSize;
560 int viaDrill = bds.m_MinThroughDrill;
561
562 if( bds.UseNetClassVia() && aStartItem ) // netclass value
563 {
565 nullptr, m_startLayer, &constraint ) )
566 {
567 viaDiameter = std::max( viaDiameter, constraint.m_Value.Opt() );
568 }
569
571 m_startLayer, &constraint ) )
572 {
573 viaDrill = std::max( viaDrill, constraint.m_Value.Opt() );
574 }
575 }
576 else
577 {
578 viaDiameter = bds.GetCurrentViaSize();
579 viaDrill = bds.GetCurrentViaDrill();
580 }
581
582 aSizes.SetViaDiameter( viaDiameter );
583 aSizes.SetViaDrill( viaDrill );
584
585 int diffPairWidth = bds.m_TrackMinWidth;
586 int diffPairGap = bds.m_MinClearance;
587 int diffPairViaGap = bds.m_MinClearance;
588
589 found = false;
590
591 // First try to pick up diff pair width from starting track, if enabled
592 if( bds.m_UseConnectedTrackWidth && aStartItem )
593 found = inheritTrackWidth( aStartItem, &diffPairWidth );
594
595 // Next, pick up gap from netclass, and width also if we didn't get a starting width above
596 if( bds.UseNetClassDiffPair() && aStartItem )
597 {
599 nullptr, m_startLayer, &constraint ) )
600 {
601 diffPairWidth = std::max( diffPairWidth, constraint.m_Value.Opt() );
602 }
603
605 nullptr, m_startLayer, &constraint ) )
606 {
607 diffPairGap = std::max( diffPairGap, constraint.m_Value.Opt() );
608 diffPairViaGap = std::max( diffPairViaGap, constraint.m_Value.Opt() );
609 }
610 }
611 else
612 {
613 diffPairWidth = bds.GetCurrentDiffPairWidth();
614 diffPairGap = bds.GetCurrentDiffPairGap();
615 diffPairViaGap = bds.GetCurrentDiffPairViaGap();
616 }
617
618 aSizes.SetDiffPairWidth( diffPairWidth );
619 aSizes.SetDiffPairGap( diffPairGap );
620 aSizes.SetDiffPairViaGap( diffPairViaGap );
621
622 int holeToHoleMin = bds.m_HoleToHoleMin;
623 PNS::VIA dummyVia;
624
626 &dummyVia, UNDEFINED_LAYER, &constraint ) )
627 {
628 holeToHoleMin = constraint.m_Value.Min();
629 }
630
631 aSizes.SetHoleToHole( holeToHoleMin );
632
633 return true;
634}
Container for design settings for a BOARD object.
bool UseNetClassVia() const
Return true if netclass values should be used to obtain appropriate via size.
bool UseNetClassTrack() const
Return true if netclass values should be used to obtain appropriate track width.
bool UseNetClassDiffPair() const
Return true if netclass values should be used to obtain appropriate diff pair dimensions.
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:620
T Min() const
Definition: minoptmax.h:33
T Opt() const
Definition: minoptmax.h:35
virtual int Layer() const
Definition: pns_item.h:158
void SetTrackWidth(int aWidth)
void SetDiffPairWidth(int aWidth)
void SetDiffPairGap(int aGap)
void SetHoleToHole(int aHoleToHole)
void SetViaDrill(int aDrill)
void SetDiffPairViaGap(int aGap)
void SetMinClearance(int aClearance)
void SetViaDiameter(int aDiameter)
void SetWidthSource(const wxString &aSource)
void SetTrackWidthIsExplicit(bool aIsExplicit)
bool inheritTrackWidth(PNS::ITEM *aItem, int *aInheritedWidth)
virtual bool QueryConstraint(PNS::CONSTRAINT_TYPE aType, const PNS::ITEM *aItemA, const PNS::ITEM *aItemB, int aLayer, PNS::CONSTRAINT *aConstraint) override
#define _(s)
@ UNDEFINED_LAYER
Definition: layer_ids.h:60
wxString m_RuleName
Definition: pns_node.h:72
MINOPTMAX< int > m_Value
Definition: pns_node.h:70

References _, PNS::CT_DIFF_PAIR_GAP, PNS::CT_HOLE_TO_HOLE, PNS::CT_VIA_DIAMETER, PNS::CT_VIA_HOLE, PNS::CT_WIDTH, BOARD_DESIGN_SETTINGS::GetCurrentDiffPairGap(), BOARD_DESIGN_SETTINGS::GetCurrentDiffPairViaGap(), BOARD_DESIGN_SETTINGS::GetCurrentDiffPairWidth(), BOARD_DESIGN_SETTINGS::GetCurrentTrackWidth(), BOARD_DESIGN_SETTINGS::GetCurrentViaDrill(), BOARD_DESIGN_SETTINGS::GetCurrentViaSize(), BOARD::GetDesignSettings(), inheritTrackWidth(), PNS::ITEM::Layer(), m_board, BOARD_DESIGN_SETTINGS::m_HoleToHoleMin, BOARD_DESIGN_SETTINGS::m_MinClearance, BOARD_DESIGN_SETTINGS::m_MinThroughDrill, PNS::CONSTRAINT::m_RuleName, m_ruleResolver, m_startLayer, BOARD_DESIGN_SETTINGS::m_TempOverrideTrackWidth, BOARD_DESIGN_SETTINGS::m_TrackMinWidth, BOARD_DESIGN_SETTINGS::m_UseConnectedTrackWidth, PNS::CONSTRAINT::m_Value, BOARD_DESIGN_SETTINGS::m_ViasMinSize, MINOPTMAX< T >::Min(), MINOPTMAX< T >::Opt(), PNS_PCBNEW_RULE_RESOLVER::QueryConstraint(), PNS::SIZES_SETTINGS::SetDiffPairGap(), PNS::SIZES_SETTINGS::SetDiffPairViaGap(), PNS::SIZES_SETTINGS::SetDiffPairWidth(), PNS::SIZES_SETTINGS::SetHoleToHole(), PNS::SIZES_SETTINGS::SetMinClearance(), PNS::SIZES_SETTINGS::SetTrackWidth(), PNS::SIZES_SETTINGS::SetTrackWidthIsExplicit(), PNS::SIZES_SETTINGS::SetViaDiameter(), PNS::SIZES_SETTINGS::SetViaDrill(), PNS::SIZES_SETTINGS::SetWidthSource(), UNDEFINED_LAYER, BOARD_DESIGN_SETTINGS::UseNetClassDiffPair(), BOARD_DESIGN_SETTINGS::UseNetClassTrack(), and BOARD_DESIGN_SETTINGS::UseNetClassVia().

Referenced by ROUTER_TOOL::onTrackViaSizeChanged(), and ROUTER_TOOL::prepareInteractive().

◆ inheritTrackWidth()

bool PNS_KICAD_IFACE_BASE::inheritTrackWidth ( PNS::ITEM aItem,
int *  aInheritedWidth 
)
protected

Definition at line 444 of file pns_kicad_iface.cpp.

445{
446 VECTOR2I p;
447
448 assert( aItem->Owner() != nullptr );
449
450 auto tryGetTrackWidth =
451 []( PNS::ITEM* aPnsItem ) -> int
452 {
453 switch( aPnsItem->Kind() )
454 {
455 case PNS::ITEM::SEGMENT_T: return static_cast<PNS::SEGMENT*>( aPnsItem )->Width();
456 case PNS::ITEM::ARC_T: return static_cast<PNS::ARC*>( aPnsItem )->Width();
457 default: return -1;
458 }
459 };
460
461 int itemTrackWidth = tryGetTrackWidth( aItem );
462
463 if( itemTrackWidth > 0 )
464 {
465 *aInheritedWidth = itemTrackWidth;
466 return true;
467 }
468
469 switch( aItem->Kind() )
470 {
471 case PNS::ITEM::VIA_T:
472 p = static_cast<PNS::VIA*>( aItem )->Pos();
473 break;
474
476 p = static_cast<PNS::SOLID*>( aItem )->Pos();
477 break;
478
479 default:
480 return false;
481 }
482
483 PNS::JOINT* jt = static_cast<PNS::NODE*>( aItem->Owner() )->FindJoint( p, aItem );
484
485 assert( jt != nullptr );
486
487 int mval = INT_MAX;
488
489 PNS::ITEM_SET linkedSegs = jt->Links();
491
492 for( PNS::ITEM* item : linkedSegs.Items() )
493 {
494 int w = tryGetTrackWidth( item );
495 assert( w > 0 );
496 mval = std::min( w, mval );
497 }
498
499 if( mval == INT_MAX )
500 return false;
501
502 *aInheritedWidth = mval;
503 return true;
504}
ITEM_SET & ExcludeItem(const ITEM *aItem)
ITEM_SET & FilterKinds(int aKindMask, bool aInvert=false)
Definition: pns_itemset.cpp:68
ENTRIES & Items()
Definition: pns_itemset.h:135
Base class for PNS router board items.
Definition: pns_item.h:56
PnsKind Kind() const
Return the type (kind) of the item.
Definition: pns_item.h:130
NODE * Owner() const
Return the owner of this item, or NULL if there's none.
Definition: pns_item.h:171
@ SOLID_T
Definition: pns_item.h:63
@ SEGMENT_T
Definition: pns_item.h:66
A 2D point on a given set of layers and belonging to a certain net, that links together a number of b...
Definition: pns_joint.h:43
ITEM_SET & Links()
Definition: pns_joint.h:251
Keep the router "world" - i.e.
Definition: pns_node.h:150

References PNS::ITEM::ARC_T, PNS::ITEM_SET::ExcludeItem(), PNS::ITEM_SET::FilterKinds(), PNS::ITEM_SET::Items(), PNS::ITEM::Kind(), PNS::JOINT::Links(), PNS::ITEM::Owner(), PNS::ITEM::SEGMENT_T, PNS::ITEM::SOLID_T, and PNS::ITEM::VIA_T.

Referenced by ImportSizes().

◆ IsAnyLayerVisible()

bool PNS_KICAD_IFACE_BASE::IsAnyLayerVisible ( const LAYER_RANGE aLayer) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 58 of file pns_kicad_iface.h.

58{ return true; };

◆ IsFlashedOnLayer()

bool PNS_KICAD_IFACE_BASE::IsFlashedOnLayer ( const PNS::ITEM aItem,
int  aLayer 
) const
overridevirtual

Default is all layers

Implements PNS::ROUTER_IFACE.

Definition at line 1215 of file pns_kicad_iface.cpp.

1216{
1218 if( aLayer < 0 )
1219 return true;
1220
1221 if( aItem->Parent() )
1222 {
1223 switch( aItem->Parent()->Type() )
1224 {
1225 case PCB_VIA_T:
1226 {
1227 const PCB_VIA* via = static_cast<const PCB_VIA*>( aItem->Parent() );
1228
1229 return via->FlashLayer( static_cast<PCB_LAYER_ID>( aLayer ) );
1230 }
1231
1232 case PCB_PAD_T:
1233 {
1234 const PAD* pad = static_cast<const PAD*>( aItem->Parent() );
1235
1236 return pad->FlashLayer( static_cast<PCB_LAYER_ID>( aLayer ) );
1237 }
1238
1239 default:
1240 break;
1241 }
1242 }
1243
1244 return aItem->Layers().Overlaps( aLayer );
1245}
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:112
bool Overlaps(const LAYER_RANGE &aOther) const
Definition: pns_layerset.h:67
Definition: pad.h:59
BOARD_ITEM * Parent() const
Definition: pns_item.h:149
const LAYER_RANGE & Layers() const
Definition: pns_item.h:154
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:59
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:104
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:89

References PNS::ITEM::Layers(), LAYER_RANGE::Overlaps(), pad, PNS::ITEM::Parent(), PCB_PAD_T, PCB_VIA_T, EDA_ITEM::Type(), and via.

◆ IsItemVisible()

bool PNS_KICAD_IFACE_BASE::IsItemVisible ( const PNS::ITEM aItem) const
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 60 of file pns_kicad_iface.h.

60{ return true; };

◆ RemoveItem()

void PNS_KICAD_IFACE_BASE::RemoveItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1475 of file pns_kicad_iface.cpp.

1476{
1477}

◆ SetBoard()

void PNS_KICAD_IFACE_BASE::SetBoard ( BOARD aBoard)

Definition at line 1193 of file pns_kicad_iface.cpp.

1194{
1195 m_board = aBoard;
1196 wxLogTrace( wxT( "PNS" ), wxT( "m_board = %p" ), m_board );
1197}

References m_board.

Referenced by PNS::TOOL_BASE::Reset().

◆ SetDebugDecorator()

void PNS_KICAD_IFACE_BASE::SetDebugDecorator ( PNS::DEBUG_DECORATOR aDec)

Definition at line 1402 of file pns_kicad_iface.cpp.

1403{
1404 m_debugDecorator = aDec;
1405}

References m_debugDecorator.

◆ SetStartLayer()

void PNS_KICAD_IFACE_BASE::SetStartLayer ( int  aLayer)
inline

Definition at line 75 of file pns_kicad_iface.h.

75{ m_startLayer = aLayer; }

References m_startLayer.

Referenced by ROUTER_TOOL::prepareInteractive().

◆ StackupHeight()

int PNS_KICAD_IFACE_BASE::StackupHeight ( int  aFirstLayer,
int  aSecondLayer 
) const
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 637 of file pns_kicad_iface.cpp.

638{
640 return 0;
641
643
644 return stackup.GetLayerDistance( ToLAYER_ID( aFirstLayer ), ToLAYER_ID( aSecondLayer ) );
645}
BOARD_STACKUP & GetStackupDescriptor()
bool m_UseHeightForLengthCalcs
Enable inclusion of stackup height in track length measurements and length tuning.
Manage layers needed to make a physical board.
int GetLayerDistance(PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer) const
Calculate the distance (height) between the two given copper layers.
PCB_LAYER_ID ToLAYER_ID(int aLayer)
Definition: lset.cpp:926

References BOARD::GetDesignSettings(), BOARD_STACKUP::GetLayerDistance(), BOARD_DESIGN_SETTINGS::GetStackupDescriptor(), m_board, BOARD_DESIGN_SETTINGS::m_UseHeightForLengthCalcs, and ToLAYER_ID().

◆ syncArc()

std::unique_ptr< PNS::ARC > PNS_KICAD_IFACE_BASE::syncArc ( PCB_ARC aArc)
protected

Definition at line 996 of file pns_kicad_iface.cpp.

997{
998 auto arc = std::make_unique<PNS::ARC>(
999 SHAPE_ARC( aArc->GetStart(), aArc->GetMid(), aArc->GetEnd(), aArc->GetWidth() ),
1000 aArc->GetNetCode() );
1001
1002 arc->SetLayers( LAYER_RANGE( aArc->GetLayer() ) );
1003 arc->SetParent( aArc );
1004
1005 if( aArc->IsLocked() )
1006 arc->Mark( PNS::MK_LOCKED );
1007
1008 return arc;
1009}
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:170
virtual bool IsLocked() const
Definition: board_item.cpp:65
Represent a contiguous set of PCB layers.
Definition: pns_layerset.h:32
const VECTOR2I & GetMid() const
Definition: pcb_track.h:277
int GetWidth() const
Definition: pcb_track.h:103
const VECTOR2I & GetStart() const
Definition: pcb_track.h:109
const VECTOR2I & GetEnd() const
Definition: pcb_track.h:106
@ MK_LOCKED
Definition: pns_item.h:43

References PCB_TRACK::GetEnd(), BOARD_ITEM::GetLayer(), PCB_ARC::GetMid(), BOARD_CONNECTED_ITEM::GetNetCode(), PCB_TRACK::GetStart(), PCB_TRACK::GetWidth(), BOARD_ITEM::IsLocked(), and PNS::MK_LOCKED.

Referenced by SyncWorld().

◆ syncGraphicalItem()

bool PNS_KICAD_IFACE_BASE::syncGraphicalItem ( PNS::NODE aWorld,
PCB_SHAPE aItem 
)
protected

Definition at line 1146 of file pns_kicad_iface.cpp.

1147{
1148 if( aItem->GetLayer() == Edge_Cuts
1149 || aItem->GetLayer() == Margin
1150 || IsCopperLayer( aItem->GetLayer() ) )
1151 {
1152 std::vector<SHAPE*> shapes = aItem->MakeEffectiveShapes();
1153
1154 for( SHAPE* shape : shapes )
1155 {
1156 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1157
1158 if( aItem->GetLayer() == Edge_Cuts || aItem->GetLayer() == Margin )
1159 solid->SetLayers( LAYER_RANGE( F_Cu, B_Cu ) );
1160 else
1161 solid->SetLayer( aItem->GetLayer() );
1162
1163 if( aItem->GetLayer() == Edge_Cuts )
1164 {
1165 switch( shape->Type() )
1166 {
1167 case SH_SEGMENT: static_cast<SHAPE_SEGMENT*>( shape )->SetWidth( 0 ); break;
1168 case SH_ARC: static_cast<SHAPE_ARC*>( shape )->SetWidth( 0 ); break;
1169 case SH_LINE_CHAIN: static_cast<SHAPE_LINE_CHAIN*>( shape )->SetWidth( 0 ); break;
1170 default: /* remaining shapes don't have width */ break;
1171 }
1172 }
1173
1174 solid->SetNet( -1 );
1175 solid->SetParent( aItem );
1176 solid->SetShape( shape ); // takes ownership
1177
1178 if( shapes.size() > 1 )
1179 solid->SetIsCompoundShapePrimitive();
1180
1181 solid->SetRoutable( false );
1182
1183 aWorld->Add( std::move( solid ) );
1184 }
1185
1186 return true;
1187 }
1188
1189 return false;
1190}
virtual std::vector< SHAPE * > MakeEffectiveShapes(bool aEdgeOnly=false) const
Make a set of SHAPE objects representing the EDA_SHAPE.
Definition: eda_shape.h:284
bool Add(std::unique_ptr< SEGMENT > aSegment, bool aAllowRedundant=false)
Add an item to the current node.
Definition: pns_node.cpp:656
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
An abstract shape on 2D plane.
Definition: shape.h:123
bool IsCopperLayer(int aLayerId)
Tests whether a layer is a copper layer.
Definition: layer_ids.h:822
@ Edge_Cuts
Definition: layer_ids.h:113
@ B_Cu
Definition: layer_ids.h:95
@ Margin
Definition: layer_ids.h:114
@ F_Cu
Definition: layer_ids.h:64
void SetWidth(const wxString &aStr, const wxString &aDefaultMeasurementUnit, int *aWidth, const wxString &aActualConversion)
@ SH_SEGMENT
line segment
Definition: shape.h:45
@ SH_ARC
circular arc
Definition: shape.h:51
@ SH_LINE_CHAIN
line chain (polyline)
Definition: shape.h:46

References PNS::NODE::Add(), B_Cu, Edge_Cuts, F_Cu, BOARD_ITEM::GetLayer(), IsCopperLayer(), EDA_SHAPE::MakeEffectiveShapes(), Margin, PCAD2KICAD::SetWidth(), SH_ARC, SH_LINE_CHAIN, and SH_SEGMENT.

Referenced by SyncWorld().

◆ syncPad()

std::unique_ptr< PNS::SOLID > PNS_KICAD_IFACE_BASE::syncPad ( PAD aPad)
protected

Definition at line 884 of file pns_kicad_iface.cpp.

885{
886 LAYER_RANGE layers( 0, MAX_CU_LAYERS - 1 );
887
888 // ignore non-copper pads except for those with holes
889 if( ( aPad->GetLayerSet() & LSET::AllCuMask() ).none() && aPad->GetDrillSize().x == 0 )
890 return nullptr;
891
892 switch( aPad->GetAttribute() )
893 {
894 case PAD_ATTRIB::PTH:
895 case PAD_ATTRIB::NPTH:
896 break;
897
898 case PAD_ATTRIB::CONN:
899 case PAD_ATTRIB::SMD:
900 {
901 LSET lmsk = aPad->GetLayerSet();
902 bool is_copper = false;
903
904 for( int i = 0; i < MAX_CU_LAYERS; i++ )
905 {
906 if( lmsk[i] )
907 {
908 is_copper = true;
909
910 if( aPad->GetAttribute() != PAD_ATTRIB::NPTH )
911 layers = LAYER_RANGE( i );
912
913 break;
914 }
915 }
916
917 if( !is_copper )
918 return nullptr;
919
920 break;
921 }
922
923 default:
924 wxLogTrace( wxT( "PNS" ), wxT( "unsupported pad type 0x%x" ), aPad->GetAttribute() );
925 return nullptr;
926 }
927
928 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
929
930 if( aPad->GetAttribute() == PAD_ATTRIB::NPTH )
931 solid->SetRoutable( false );
932
933 solid->SetLayers( layers );
934 solid->SetNet( aPad->GetNetCode() );
935 solid->SetParent( aPad );
936 solid->SetPadToDie( aPad->GetPadToDieLength() );
937 solid->SetOrientation( aPad->GetOrientation() );
938
939 VECTOR2I wx_c = aPad->ShapePos();
940 VECTOR2I offset = aPad->GetOffset();
941
942 VECTOR2I c( wx_c.x, wx_c.y );
943
944 RotatePoint( offset, aPad->GetOrientation() );
945
946 solid->SetPos( VECTOR2I( c.x - offset.x, c.y - offset.y ) );
947 solid->SetOffset( VECTOR2I( offset.x, offset.y ) );
948
949 if( aPad->GetDrillSize().x > 0 )
950 {
951 SHAPE_SEGMENT* slot = (SHAPE_SEGMENT*) aPad->GetEffectiveHoleShape()->Clone();
952
953 if( aPad->GetAttribute() != PAD_ATTRIB::NPTH )
954 {
956 slot->SetWidth( slot->GetWidth() + bds.GetHolePlatingThickness() * 2 );
957 }
958
959 solid->SetHole( slot );
960 }
961
962 std::shared_ptr<SHAPE> shape = aPad->GetEffectiveShape();
963
964 if( shape->HasIndexableSubshapes() && shape->GetIndexableSubshapeCount() == 1 )
965 {
966 std::vector<const SHAPE*> subshapes;
967 shape->GetIndexableSubshapes( subshapes );
968
969 solid->SetShape( subshapes[0]->Clone() );
970 }
971 else
972 {
973 solid->SetShape( shape->Clone() );
974 }
975
976 return solid;
977}
int GetHolePlatingThickness() const
Pad & via drills are finish size.
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:529
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:773
LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: pad.h:375
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const override
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: pad.cpp:326
const VECTOR2I & GetDrillSize() const
Definition: pad.h:250
PAD_ATTRIB GetAttribute() const
Definition: pad.h:378
const VECTOR2I & GetOffset() const
Definition: pad.h:257
VECTOR2I ShapePos() const
Definition: pad.cpp:710
EDA_ANGLE GetOrientation() const
Return the rotation angle of the pad.
Definition: pad.h:348
std::shared_ptr< SHAPE_SEGMENT > GetEffectiveHoleShape() const override
Return a SHAPE_SEGMENT object representing the pad's hole.
Definition: pad.cpp:344
int GetPadToDieLength() const
Definition: pad.h:391
int GetWidth() const
void SetWidth(int aWidth)
#define MAX_CU_LAYERS
Definition: layer_ids.h:140
std::unique_ptr< typename std::remove_const< T >::type > Clone(const T &aItem)
Definition: pns_item.h:271
@ NPTH
like PAD_PTH, but not plated
@ SMD
Smd pad, appears on the solder paste layer (default)
@ PTH
Plated through hole pad.
@ CONN
Like smd, does not appear on the solder paste layer (default)
void RotatePoint(int *pX, int *pY, const EDA_ANGLE &aAngle)
Definition: trigo.cpp:183
VECTOR2< int > VECTOR2I
Definition: vector2d.h:607

References LSET::AllCuMask(), PNS::Clone(), CONN, PAD::GetAttribute(), BOARD::GetDesignSettings(), PAD::GetDrillSize(), PAD::GetEffectiveHoleShape(), PAD::GetEffectiveShape(), BOARD_DESIGN_SETTINGS::GetHolePlatingThickness(), PAD::GetLayerSet(), BOARD_CONNECTED_ITEM::GetNetCode(), PAD::GetOffset(), PAD::GetOrientation(), PAD::GetPadToDieLength(), SHAPE_SEGMENT::GetWidth(), m_board, MAX_CU_LAYERS, NPTH, PTH, RotatePoint(), SHAPE_SEGMENT::SetWidth(), PAD::ShapePos(), SMD, VECTOR2< T >::x, and VECTOR2< T >::y.

Referenced by SyncWorld().

◆ syncTextItem()

bool PNS_KICAD_IFACE_BASE::syncTextItem ( PNS::NODE aWorld,
EDA_TEXT aText,
PCB_LAYER_ID  aLayer 
)
protected

Definition at line 1107 of file pns_kicad_iface.cpp.

1108{
1109 if( !IsCopperLayer( aLayer ) )
1110 return false;
1111
1112 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1113
1114 solid->SetLayer( aLayer );
1115 solid->SetNet( -1 );
1116 solid->SetParent( dynamic_cast<BOARD_ITEM*>( aText ) );
1117 solid->SetShape( aText->GetEffectiveTextShape()->Clone() );
1118 solid->SetRoutable( false );
1119
1120 aWorld->Add( std::move( solid ) );
1121
1122 return true;
1123
1124 /* A coarser (but faster) method:
1125 *
1126 SHAPE_POLY_SET outline;
1127 SHAPE_SIMPLE* shape = new SHAPE_SIMPLE();
1128
1129 aText->TransformBoundingBoxWithClearanceToPolygon( &outline, 0 );
1130
1131 for( auto iter = outline.CIterate( 0 ); iter; iter++ )
1132 shape->Append( *iter );
1133
1134 solid->SetShape( shape );
1135
1136 solid->SetLayer( aLayer );
1137 solid->SetNet( -1 );
1138 solid->SetParent( nullptr );
1139 solid->SetRoutable( false );
1140 aWorld->Add( std::move( solid ) );
1141 return true;
1142 */
1143}
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:53
std::shared_ptr< SHAPE_COMPOUND > GetEffectiveTextShape(bool aTriangulate=true, bool aUseTextRotation=true) const
build a list of segments (SHAPE_SEGMENT) to describe a text shape.
Definition: eda_text.cpp:878

References PNS::NODE::Add(), EDA_TEXT::GetEffectiveTextShape(), and IsCopperLayer().

Referenced by SyncWorld().

◆ syncTrack()

std::unique_ptr< PNS::SEGMENT > PNS_KICAD_IFACE_BASE::syncTrack ( PCB_TRACK aTrack)
protected

Definition at line 980 of file pns_kicad_iface.cpp.

981{
982 auto segment = std::make_unique<PNS::SEGMENT>( SEG( aTrack->GetStart(), aTrack->GetEnd() ),
983 aTrack->GetNetCode() );
984
985 segment->SetWidth( aTrack->GetWidth() );
986 segment->SetLayers( LAYER_RANGE( aTrack->GetLayer() ) );
987 segment->SetParent( aTrack );
988
989 if( aTrack->IsLocked() )
990 segment->Mark( PNS::MK_LOCKED );
991
992 return segment;
993}
Definition: seg.h:42

References PCB_TRACK::GetEnd(), BOARD_ITEM::GetLayer(), BOARD_CONNECTED_ITEM::GetNetCode(), PCB_TRACK::GetStart(), PCB_TRACK::GetWidth(), BOARD_ITEM::IsLocked(), and PNS::MK_LOCKED.

Referenced by SyncWorld().

◆ syncVia()

std::unique_ptr< PNS::VIA > PNS_KICAD_IFACE_BASE::syncVia ( PCB_VIA aVia)
protected

Definition at line 1012 of file pns_kicad_iface.cpp.

1013{
1014 PCB_LAYER_ID top, bottom;
1015 aVia->LayerPair( &top, &bottom );
1016
1017 auto via = std::make_unique<PNS::VIA>( aVia->GetPosition(),
1018 LAYER_RANGE( aVia->TopLayer(), aVia->BottomLayer() ),
1019 aVia->GetWidth(),
1020 aVia->GetDrillValue(),
1021 aVia->GetNetCode(),
1022 aVia->GetViaType() );
1023
1024 via->SetParent( aVia );
1025
1026 if( aVia->IsLocked() )
1027 via->Mark( PNS::MK_LOCKED );
1028
1029 via->SetIsFree( aVia->GetIsFree() );
1030
1032 via->SetHole( SHAPE_CIRCLE( aVia->GetPosition(),
1033 aVia->GetDrillValue() / 2 + bds.GetHolePlatingThickness() ) );
1034
1035 return via;
1036}
bool GetIsFree() const
Checks if the via is a free via (as opposed to one created on a track by the router).
Definition: pcb_track.h:495
PCB_LAYER_ID BottomLayer() const
Definition: pcb_track.cpp:529
VECTOR2I GetPosition() const override
Definition: pcb_track.h:404
PCB_LAYER_ID TopLayer() const
Definition: pcb_track.cpp:523
int GetDrillValue() const
Function GetDrillValue "calculates" the drill value for vias (m-Drill if > 0, or default drill value ...
Definition: pcb_track.cpp:184
VIATYPE GetViaType() const
Definition: pcb_track.h:356
void LayerPair(PCB_LAYER_ID *top_layer, PCB_LAYER_ID *bottom_layer) const
Function LayerPair Return the 2 layers used by the via (the via actually uses all layers between thes...
Definition: pcb_track.cpp:501

References PCB_VIA::BottomLayer(), BOARD::GetDesignSettings(), PCB_VIA::GetDrillValue(), BOARD_DESIGN_SETTINGS::GetHolePlatingThickness(), PCB_VIA::GetIsFree(), BOARD_CONNECTED_ITEM::GetNetCode(), PCB_VIA::GetPosition(), PCB_VIA::GetViaType(), PCB_TRACK::GetWidth(), BOARD_ITEM::IsLocked(), PCB_VIA::LayerPair(), m_board, PNS::MK_LOCKED, PCB_VIA::TopLayer(), and via.

Referenced by SyncWorld().

◆ SyncWorld()

void PNS_KICAD_IFACE_BASE::SyncWorld ( PNS::NODE aWorld)
overridevirtual

Implements PNS::ROUTER_IFACE.

Definition at line 1279 of file pns_kicad_iface.cpp.

1280{
1281 if( !m_board )
1282 {
1283 wxLogTrace( wxT( "PNS" ), wxT( "No board attached, aborting sync." ) );
1284 return;
1285 }
1286
1287 int worstClearance = m_board->GetDesignSettings().GetBiggestClearanceValue();
1288
1289 m_world = aWorld;
1290
1291 for( BOARD_ITEM* gitem : m_board->Drawings() )
1292 {
1293 if ( gitem->Type() == PCB_SHAPE_T || gitem->Type() == PCB_TEXTBOX_T )
1294 {
1295 syncGraphicalItem( aWorld, static_cast<PCB_SHAPE*>( gitem ) );
1296 }
1297 else if( gitem->Type() == PCB_TEXT_T )
1298 {
1299 syncTextItem( aWorld, static_cast<PCB_TEXT*>( gitem ), gitem->GetLayer() );
1300 }
1301 }
1302
1303 SHAPE_POLY_SET buffer;
1304 SHAPE_POLY_SET* boardOutline = nullptr;
1305
1306 if( m_board->GetBoardPolygonOutlines( buffer ) )
1307 boardOutline = &buffer;
1308
1309 for( ZONE* zone : m_board->Zones() )
1310 {
1311 syncZone( aWorld, zone, boardOutline );
1312 }
1313
1314 for( FOOTPRINT* footprint : m_board->Footprints() )
1315 {
1316 for( PAD* pad : footprint->Pads() )
1317 {
1318 if( std::unique_ptr<PNS::SOLID> solid = syncPad( pad ) )
1319 aWorld->Add( std::move( solid ) );
1320
1321 worstClearance = std::max( worstClearance, pad->GetLocalClearance() );
1322
1323 if( pad->GetProperty() == PAD_PROP::CASTELLATED )
1324 {
1325 std::unique_ptr<SHAPE> hole;
1326 hole.reset( pad->GetEffectiveHoleShape()->Clone() );
1327 aWorld->AddEdgeExclusion( std::move( hole ) );
1328 }
1329 }
1330
1331 syncTextItem( aWorld, &footprint->Reference(), footprint->Reference().GetLayer() );
1332 syncTextItem( aWorld, &footprint->Value(), footprint->Value().GetLayer() );
1333
1334 for( FP_ZONE* zone : footprint->Zones() )
1335 syncZone( aWorld, zone, boardOutline );
1336
1337 if( footprint->IsNetTie() )
1338 continue;
1339
1340 for( BOARD_ITEM* mgitem : footprint->GraphicalItems() )
1341 {
1342 if( mgitem->Type() == PCB_FP_SHAPE_T || mgitem->Type() == PCB_FP_TEXTBOX_T )
1343 {
1344 syncGraphicalItem( aWorld, static_cast<PCB_SHAPE*>( mgitem ) );
1345 }
1346 else if( mgitem->Type() == PCB_FP_TEXT_T )
1347 {
1348 syncTextItem( aWorld, static_cast<FP_TEXT*>( mgitem ), mgitem->GetLayer() );
1349 }
1350 }
1351 }
1352
1353 for( PCB_TRACK* t : m_board->Tracks() )
1354 {
1355 KICAD_T type = t->Type();
1356
1357 if( type == PCB_TRACE_T )
1358 {
1359 if( auto segment = syncTrack( t ) )
1360 aWorld->Add( std::move( segment ) );
1361 }
1362 else if( type == PCB_ARC_T )
1363 {
1364 if( auto arc = syncArc( static_cast<PCB_ARC*>( t ) ) )
1365 aWorld->Add( std::move( arc ) );
1366 }
1367 else if( type == PCB_VIA_T )
1368 {
1369 if( auto via = syncVia( static_cast<PCB_VIA*>( t ) ) )
1370 aWorld->Add( std::move( via ) );
1371 }
1372 }
1373
1374 // NB: if this were ever to become a long-lived object we would need to dirty its
1375 // clearance cache here....
1376 delete m_ruleResolver;
1378
1380 aWorld->SetMaxClearance( worstClearance + m_ruleResolver->ClearanceEpsilon() );
1381}
ZONES & Zones()
Definition: board.h:288
bool GetBoardPolygonOutlines(SHAPE_POLY_SET &aOutlines, OUTLINE_ERROR_HANDLER *aErrorHandler=nullptr)
Extract the board outlines and build a closed polygon from lines, arcs and circle items on edge cut l...
Definition: board.cpp:1936
FOOTPRINTS & Footprints()
Definition: board.h:282
TRACKS & Tracks()
Definition: board.h:279
DRAWINGS & Drawings()
Definition: board.h:285
A specialization of ZONE for use in footprints.
Definition: zone.h:904
void SetMaxClearance(int aClearance)
Assign a clearance resolution function object.
Definition: pns_node.h:180
void SetRuleResolver(RULE_RESOLVER *aFunc)
Definition: pns_node.h:186
void AddEdgeExclusion(std::unique_ptr< SHAPE > aShape)
Definition: pns_node.cpp:720
bool syncGraphicalItem(PNS::NODE *aWorld, PCB_SHAPE *aItem)
bool syncZone(PNS::NODE *aWorld, ZONE *aZone, SHAPE_POLY_SET *aBoardOutline)
std::unique_ptr< PNS::ARC > syncArc(PCB_ARC *aArc)
bool syncTextItem(PNS::NODE *aWorld, EDA_TEXT *aText, PCB_LAYER_ID aLayer)
std::unique_ptr< PNS::SOLID > syncPad(PAD *aPad)
std::unique_ptr< PNS::SEGMENT > syncTrack(PCB_TRACK *aTrack)
std::unique_ptr< PNS::VIA > syncVia(PCB_VIA *aVia)
Represent a set of closed polygons.
Handle a list of polygons defining a copper zone.
Definition: zone.h:58
@ CASTELLATED
a pad with a castellated through hole
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:78
@ PCB_SHAPE_T
class PCB_SHAPE, a segment not on copper layers
Definition: typeinfo.h:90
@ PCB_FP_SHAPE_T
class FP_SHAPE, a footprint edge
Definition: typeinfo.h:96
@ PCB_FP_TEXTBOX_T
class FP_TEXTBOX, wrapped text in a footprint
Definition: typeinfo.h:95
@ PCB_TEXTBOX_T
class PCB_TEXTBOX, wrapped text on a layer
Definition: typeinfo.h:93
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
Definition: typeinfo.h:92
@ PCB_FP_TEXT_T
class FP_TEXT, text in a footprint
Definition: typeinfo.h:94
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:105
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:103

References PNS::NODE::Add(), PNS::NODE::AddEdgeExclusion(), CASTELLATED, PNS_PCBNEW_RULE_RESOLVER::ClearanceEpsilon(), BOARD::Drawings(), BOARD::Footprints(), BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue(), BOARD::GetBoardPolygonOutlines(), BOARD::GetDesignSettings(), BOARD_ITEM::GetLayer(), m_board, m_ruleResolver, m_world, pad, PCB_ARC_T, PCB_FP_SHAPE_T, PCB_FP_TEXT_T, PCB_FP_TEXTBOX_T, PCB_SHAPE_T, PCB_TEXT_T, PCB_TEXTBOX_T, PCB_TRACE_T, PCB_VIA_T, PNS::NODE::SetMaxClearance(), PNS::NODE::SetRuleResolver(), syncArc(), syncGraphicalItem(), syncPad(), syncTextItem(), syncTrack(), syncVia(), syncZone(), BOARD::Tracks(), via, and BOARD::Zones().

◆ syncZone()

bool PNS_KICAD_IFACE_BASE::syncZone ( PNS::NODE aWorld,
ZONE aZone,
SHAPE_POLY_SET aBoardOutline 
)
protected

Definition at line 1039 of file pns_kicad_iface.cpp.

1040{
1041 SHAPE_POLY_SET* poly;
1042
1043 if( !aZone->GetIsRuleArea() && aZone->GetZoneName().IsEmpty() )
1044 return false;
1045
1046 // TODO handle aZone->GetDoNotAllowVias()
1047 // TODO handle rules which disallow tracks & vias
1048 if( !aZone->GetIsRuleArea() || !aZone->GetDoNotAllowTracks() )
1049 return false;
1050
1051 LSET layers = aZone->GetLayerSet();
1052
1053 poly = aZone->Outline();
1054 poly->CacheTriangulation( false );
1055
1056 if( !poly->IsTriangulationUpToDate() )
1057 {
1058 KIDIALOG dlg( nullptr, wxString::Format( _( "%s is malformed." ),
1059 aZone->GetSelectMenuText( GetUnits() ) ),
1061 dlg.ShowDetailedText( wxString::Format( _( "This zone cannot be handled by the router.\n"
1062 "Please verify it is not a self-intersecting "
1063 "polygon." ) ) );
1064 dlg.DoNotShowCheckbox( __FILE__, __LINE__ );
1065 dlg.ShowModal();
1066
1067 return false;
1068 }
1069
1070 for( int layer = F_Cu; layer <= B_Cu; layer++ )
1071 {
1072 if( !layers[ layer ] )
1073 continue;
1074
1075 for( int outline = 0; outline < poly->OutlineCount(); outline++ )
1076 {
1077 const SHAPE_POLY_SET::TRIANGULATED_POLYGON* tri = poly->TriangulatedPolygon( outline );
1078
1079 for( size_t i = 0; i < tri->GetTriangleCount(); i++)
1080 {
1081 VECTOR2I a, b, c;
1082 tri->GetTriangle( i, a, b, c );
1083 SHAPE_SIMPLE* triShape = new SHAPE_SIMPLE;
1084
1085 triShape->Append( a );
1086 triShape->Append( b );
1087 triShape->Append( c );
1088
1089 std::unique_ptr<PNS::SOLID> solid = std::make_unique<PNS::SOLID>();
1090
1091 solid->SetLayer( layer );
1092 solid->SetNet( -1 );
1093 solid->SetParent( aZone );
1094 solid->SetShape( triShape );
1095 solid->SetIsCompoundShapePrimitive();
1096 solid->SetRoutable( false );
1097
1098 aWorld->Add( std::move( solid ) );
1099 }
1100 }
1101 }
1102
1103 return true;
1104}
Helper class to create more flexible dialogs, including 'do not show again' checkbox handling.
Definition: confirm.h:46
@ KD_WARNING
Definition: confirm.h:49
virtual EDA_UNITS GetUnits() const
void GetTriangle(int index, VECTOR2I &a, VECTOR2I &b, VECTOR2I &c) const
bool IsTriangulationUpToDate() const
void CacheTriangulation(bool aPartition=true)
Build a polygon triangulation, needed to draw a polygon on OpenGL and in some other calculations.
const TRIANGULATED_POLYGON * TriangulatedPolygon(int aIndex) const
int OutlineCount() const
Return the number of vertices in a given outline/hole.
Represent a simple polygon consisting of a zero-thickness closed chain of connected line segments.
Definition: shape_simple.h:42
void Append(int aX, int aY)
Append a new point at the end of the polygon.
Definition: shape_simple.h:135
bool GetIsRuleArea() const
Accessors to parameters used in Rule Area zones:
Definition: zone.h:698
bool GetDoNotAllowTracks() const
Definition: zone.h:701
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: zone.cpp:282
SHAPE_POLY_SET * Outline()
Definition: zone.h:311
wxString GetZoneName() const
Definition: zone.h:118
wxString GetSelectMenuText(EDA_UNITS aUnits) const override
Return the text to display to be used in the selection clarification context menu when multiple items...
Definition: zone.cpp:726
void Format(OUTPUTFORMATTER *out, int aNestLevel, int aCtl, const CPTREE &aTree)
Output a PTREE into s-expression format via an OUTPUTFORMATTER derivative.
Definition: ptree.cpp:200

References _, PNS::NODE::Add(), SHAPE_SIMPLE::Append(), B_Cu, SHAPE_POLY_SET::CacheTriangulation(), KIDIALOG::DoNotShowCheckbox(), F_Cu, Format(), ZONE::GetDoNotAllowTracks(), ZONE::GetIsRuleArea(), ZONE::GetLayerSet(), ZONE::GetSelectMenuText(), SHAPE_POLY_SET::TRIANGULATED_POLYGON::GetTriangle(), SHAPE_POLY_SET::TRIANGULATED_POLYGON::GetTriangleCount(), GetUnits(), ZONE::GetZoneName(), SHAPE_POLY_SET::IsTriangulationUpToDate(), KIDIALOG::KD_WARNING, ZONE::Outline(), SHAPE_POLY_SET::OutlineCount(), KIDIALOG::ShowModal(), and SHAPE_POLY_SET::TriangulatedPolygon().

Referenced by SyncWorld().

◆ UpdateItem()

void PNS_KICAD_IFACE_BASE::UpdateItem ( PNS::ITEM aItem)
overridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 1500 of file pns_kicad_iface.cpp.

1501{
1502}

◆ UpdateNet()

void PNS_KICAD_IFACE_BASE::UpdateNet ( int  aNetCode)
inlineoverridevirtual

Implements PNS::ROUTER_IFACE.

Reimplemented in PNS_KICAD_IFACE.

Definition at line 71 of file pns_kicad_iface.h.

71{}

Member Data Documentation

◆ m_board

BOARD* PNS_KICAD_IFACE_BASE::m_board
protected

◆ m_debugDecorator

◆ m_ruleResolver

PNS_PCBNEW_RULE_RESOLVER* PNS_KICAD_IFACE_BASE::m_ruleResolver
protected

◆ m_startLayer

int PNS_KICAD_IFACE_BASE::m_startLayer
protected

Definition at line 102 of file pns_kicad_iface.h.

Referenced by ImportSizes(), PNS_KICAD_IFACE_BASE(), and SetStartLayer().

◆ m_world

PNS::NODE* PNS_KICAD_IFACE_BASE::m_world
protected

Definition at line 100 of file pns_kicad_iface.h.

Referenced by GetWorld(), PNS_KICAD_IFACE_BASE(), and SyncWorld().


The documentation for this class was generated from the following files: