KiCad PCB EDA Suite
DRC_TEST_PROVIDER_COPPER_CLEARANCE Class Reference
Inheritance diagram for DRC_TEST_PROVIDER_COPPER_CLEARANCE:
DRC_TEST_PROVIDER_CLEARANCE_BASE DRC_TEST_PROVIDER

Public Member Functions

 DRC_TEST_PROVIDER_COPPER_CLEARANCE ()
 
virtual ~DRC_TEST_PROVIDER_COPPER_CLEARANCE ()
 
virtual bool Run () override
 Run this provider against the given PCB with configured options (if any). More...
 
virtual const wxString GetName () const override
 
virtual const wxString GetDescription () const override
 
virtual std::set< DRC_CONSTRAINT_TGetConstraintTypes () const override
 
int GetNumPhases () const override
 
void SetDRCEngine (DRC_ENGINE *engine)
 
virtual bool IsRuleDriven () const
 
bool IsEnabled () const
 
void Enable (bool aEnable)
 

Protected Member Functions

int forEachGeometryItem (const std::vector< KICAD_T > &aTypes, LSET aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
 
virtual void reportAux (wxString fmt,...)
 
virtual void reportViolation (std::shared_ptr< DRC_ITEM > &item, const wxPoint &aMarkerPos)
 
virtual bool reportProgress (int aCount, int aSize, int aDelta)
 
virtual bool reportPhase (const wxString &aStageName)
 
virtual void reportRuleStatistics ()
 
virtual void accountCheck (const DRC_RULE *ruleToTest)
 
virtual void accountCheck (const DRC_CONSTRAINT &constraintToTest)
 
bool isInvisibleText (const BOARD_ITEM *aItem) const
 
EDA_UNITS userUnits () const
 

Protected Attributes

BOARDm_board
 
int m_largestClearance
 
bool m_boardOutlineValid
 
DRC_ENGINEm_drcEngine
 
std::unordered_map< const DRC_RULE *, int > m_stats
 
bool m_isRuleDriven = true
 
bool m_enabled = true
 

Static Protected Attributes

static std::vector< KICAD_Ts_allBasicItems
 
static std::vector< KICAD_Ts_allBasicItemsButZones
 

Private Member Functions

bool testTrackAgainstItem (PCB_TRACK *track, SHAPE *trackShape, PCB_LAYER_ID layer, BOARD_ITEM *other)
 
void testTrackClearances ()
 
bool testPadAgainstItem (PAD *pad, SHAPE *padShape, PCB_LAYER_ID layer, BOARD_ITEM *other)
 
void testPadClearances ()
 
void testZonesToZones ()
 
void testItemAgainstZones (BOARD_ITEM *aItem, PCB_LAYER_ID aLayer)
 

Private Attributes

DRC_RTREE m_copperTree
 
int m_drcEpsilon
 
std::vector< ZONE * > m_zones
 

Detailed Description

Definition at line 56 of file drc_test_provider_copper_clearance.cpp.

Constructor & Destructor Documentation

◆ DRC_TEST_PROVIDER_COPPER_CLEARANCE()

DRC_TEST_PROVIDER_COPPER_CLEARANCE::DRC_TEST_PROVIDER_COPPER_CLEARANCE ( )
inline

◆ ~DRC_TEST_PROVIDER_COPPER_CLEARANCE()

virtual DRC_TEST_PROVIDER_COPPER_CLEARANCE::~DRC_TEST_PROVIDER_COPPER_CLEARANCE ( )
inlinevirtual

Definition at line 65 of file drc_test_provider_copper_clearance.cpp.

66  {
67  }

Member Function Documentation

◆ accountCheck() [1/2]

void DRC_TEST_PROVIDER::accountCheck ( const DRC_RULE ruleToTest)
protectedvirtualinherited

Definition at line 103 of file drc_test_provider.cpp.

104 {
105  auto it = m_stats.find( ruleToTest );
106 
107  if( it == m_stats.end() )
108  m_stats[ ruleToTest ] = 1;
109  else
110  m_stats[ ruleToTest ] += 1;
111 }
std::unordered_map< const DRC_RULE *, int > m_stats

References DRC_TEST_PROVIDER::m_stats.

Referenced by DRC_TEST_PROVIDER::accountCheck(), and DRC_TEST_PROVIDER::reportViolation().

◆ accountCheck() [2/2]

void DRC_TEST_PROVIDER::accountCheck ( const DRC_CONSTRAINT constraintToTest)
protectedvirtualinherited

Definition at line 114 of file drc_test_provider.cpp.

115 {
116  accountCheck( constraintToTest.GetParentRule() );
117 }
DRC_RULE * GetParentRule() const
Definition: drc_rule.h:126
virtual void accountCheck(const DRC_RULE *ruleToTest)

References DRC_TEST_PROVIDER::accountCheck(), and DRC_CONSTRAINT::GetParentRule().

◆ Enable()

void DRC_TEST_PROVIDER::Enable ( bool  aEnable)
inlineinherited

Definition at line 106 of file drc_test_provider.h.

107  {
108  m_enabled = aEnable;
109  }

References DRC_TEST_PROVIDER::m_enabled.

◆ forEachGeometryItem()

int DRC_TEST_PROVIDER::forEachGeometryItem ( const std::vector< KICAD_T > &  aTypes,
LSET  aLayers,
const std::function< bool(BOARD_ITEM *)> &  aFunc 
)
protectedinherited

Definition at line 139 of file drc_test_provider.cpp.

141 {
142  BOARD *brd = m_drcEngine->GetBoard();
143  std::bitset<MAX_STRUCT_TYPE_ID> typeMask;
144  int n = 0;
145 
146  if( s_allBasicItems.size() == 0 )
147  {
148  for( int i = 0; i < MAX_STRUCT_TYPE_ID; i++ )
149  {
150  if( i != PCB_FOOTPRINT_T && i != PCB_GROUP_T )
151  {
152  s_allBasicItems.push_back( (KICAD_T) i );
153 
154  if( i != PCB_ZONE_T && i != PCB_FP_ZONE_T )
155  s_allBasicItemsButZones.push_back( (KICAD_T) i );
156  }
157  }
158  }
159 
160  if( aTypes.size() == 0 )
161  {
162  for( int i = 0; i < MAX_STRUCT_TYPE_ID; i++ )
163  typeMask[ i ] = true;
164  }
165  else
166  {
167  for( KICAD_T aType : aTypes )
168  typeMask[ aType ] = true;
169  }
170 
171  for( PCB_TRACK* item : brd->Tracks() )
172  {
173  if( (item->GetLayerSet() & aLayers).any() )
174  {
175  if( typeMask[ PCB_TRACE_T ] && item->Type() == PCB_TRACE_T )
176  {
177  aFunc( item );
178  n++;
179  }
180  else if( typeMask[ PCB_VIA_T ] && item->Type() == PCB_VIA_T )
181  {
182  aFunc( item );
183  n++;
184  }
185  else if( typeMask[ PCB_ARC_T ] && item->Type() == PCB_ARC_T )
186  {
187  aFunc( item );
188  n++;
189  }
190  }
191  }
192 
193  for( BOARD_ITEM* item : brd->Drawings() )
194  {
195  if( (item->GetLayerSet() & aLayers).any() )
196  {
197  if( typeMask[PCB_DIMENSION_T] && BaseType( item->Type() ) == PCB_DIMENSION_T )
198  {
199  if( !aFunc( item ) )
200  return n;
201 
202  n++;
203  }
204  else if( typeMask[ PCB_SHAPE_T ] && item->Type() == PCB_SHAPE_T )
205  {
206  if( !aFunc( item ) )
207  return n;
208 
209  n++;
210  }
211  else if( typeMask[ PCB_TEXT_T ] && item->Type() == PCB_TEXT_T )
212  {
213  if( !aFunc( item ) )
214  return n;
215 
216  n++;
217  }
218  else if( typeMask[ PCB_TARGET_T ] && item->Type() == PCB_TARGET_T )
219  {
220  if( !aFunc( item ) )
221  return n;
222 
223  n++;
224  }
225  }
226  }
227 
228  if( typeMask[ PCB_ZONE_T ] )
229  {
230  for( ZONE* item : brd->Zones() )
231  {
232  if( ( item->GetLayerSet() & aLayers ).any() )
233  {
234  if( !aFunc( item ) )
235  return n;
236 
237  n++;
238  }
239  }
240  }
241 
242  for( FOOTPRINT* footprint : brd->Footprints() )
243  {
244  if( typeMask[ PCB_FP_TEXT_T ] )
245  {
246  if( ( footprint->Reference().GetLayerSet() & aLayers ).any() )
247  {
248  if( !aFunc( &footprint->Reference() ) )
249  return n;
250 
251  n++;
252  }
253 
254  if( ( footprint->Value().GetLayerSet() & aLayers ).any() )
255  {
256  if( !aFunc( &footprint->Value() ) )
257  return n;
258 
259  n++;
260  }
261  }
262 
263  if( typeMask[ PCB_PAD_T ] )
264  {
265  for( PAD* pad : footprint->Pads() )
266  {
267  // Careful: if a pad has a hole then it pierces all layers
268  if( ( pad->GetDrillSizeX() > 0 && pad->GetDrillSizeY() > 0 )
269  || ( pad->GetLayerSet() & aLayers ).any() )
270  {
271  if( !aFunc( pad ) )
272  return n;
273 
274  n++;
275  }
276  }
277  }
278 
279  for( BOARD_ITEM* dwg : footprint->GraphicalItems() )
280  {
281  if( (dwg->GetLayerSet() & aLayers).any() )
282  {
283  if( typeMask[ PCB_FP_TEXT_T ] && dwg->Type() == PCB_FP_TEXT_T )
284  {
285  if( !aFunc( dwg ) )
286  return n;
287 
288  n++;
289  }
290  else if( typeMask[ PCB_FP_SHAPE_T ] && dwg->Type() == PCB_FP_SHAPE_T )
291  {
292  if( !aFunc( dwg ) )
293  return n;
294 
295  n++;
296  }
297  }
298  }
299 
300  if( typeMask[ PCB_FP_ZONE_T ] )
301  {
302  for( ZONE* zone : footprint->Zones() )
303  {
304  if( (zone->GetLayerSet() & aLayers).any() )
305  {
306  if( !aFunc( zone ) )
307  return n;
308 
309  n++;
310  }
311  }
312  }
313 
314  if( typeMask[ PCB_FOOTPRINT_T ] )
315  {
316  if( !aFunc( footprint ) )
317  return n;
318 
319  n++;
320  }
321  }
322 
323  return n;
324 }
class FP_TEXT, text in a footprint
Definition: typeinfo.h:92
ZONES & Zones()
Definition: board.h:240
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:49
class PCB_GROUP, a set of BOARD_ITEMs
Definition: typeinfo.h:108
constexpr KICAD_T BaseType(const KICAD_T aType)
Return the underlying type of the given type.
Definition: typeinfo.h:231
class PCB_TEXT, text on a layer
Definition: typeinfo.h:91
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:97
class FP_SHAPE, a footprint edge
Definition: typeinfo.h:93
class PAD, a pad in a footprint
Definition: typeinfo.h:89
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:77
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:95
BOARD * GetBoard() const
Definition: drc_engine.h:88
FOOTPRINTS & Footprints()
Definition: board.h:234
Handle a list of polygons defining a copper zone.
Definition: zone.h:56
class ZONE, a copper pour area
Definition: typeinfo.h:105
class PCB_DIMENSION_BASE: abstract dimension meta-type
Definition: typeinfo.h:99
class PCB_TARGET, a target (graphic item)
Definition: typeinfo.h:104
class FOOTPRINT, a footprint
Definition: typeinfo.h:88
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:191
static std::vector< KICAD_T > s_allBasicItems
static std::vector< KICAD_T > s_allBasicItemsButZones
DRC_ENGINE * m_drcEngine
class ZONE, managed by a footprint
Definition: typeinfo.h:94
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:96
Definition: pad.h:57
class PCB_SHAPE, a segment not on copper layers
Definition: typeinfo.h:90
DRAWINGS & Drawings()
Definition: board.h:237
TRACKS & Tracks()
Definition: board.h:231

References BaseType(), BOARD::Drawings(), BOARD::Footprints(), DRC_ENGINE::GetBoard(), DRC_TEST_PROVIDER::m_drcEngine, MAX_STRUCT_TYPE_ID, pad, PCB_ARC_T, PCB_DIMENSION_T, PCB_FOOTPRINT_T, PCB_FP_SHAPE_T, PCB_FP_TEXT_T, PCB_FP_ZONE_T, PCB_GROUP_T, PCB_PAD_T, PCB_SHAPE_T, PCB_TARGET_T, PCB_TEXT_T, PCB_TRACE_T, PCB_VIA_T, PCB_ZONE_T, DRC_TEST_PROVIDER::s_allBasicItems, DRC_TEST_PROVIDER::s_allBasicItemsButZones, BOARD::Tracks(), and BOARD::Zones().

Referenced by DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_SILK_TO_MASK::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), Run(), DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal(), DRC_TEST_PROVIDER_MISC::testDisabledLayers(), and DRC_TEST_PROVIDER_MISC::testTextVars().

◆ GetConstraintTypes()

std::set< DRC_CONSTRAINT_T > DRC_TEST_PROVIDER_COPPER_CLEARANCE::GetConstraintTypes ( ) const
overridevirtual

◆ GetDescription()

virtual const wxString DRC_TEST_PROVIDER_COPPER_CLEARANCE::GetDescription ( ) const
inlineoverridevirtual

Reimplemented from DRC_TEST_PROVIDER.

Definition at line 76 of file drc_test_provider_copper_clearance.cpp.

77  {
78  return wxT( "Tests copper item clearance" );
79  }

◆ GetName()

virtual const wxString DRC_TEST_PROVIDER_COPPER_CLEARANCE::GetName ( void  ) const
inlineoverridevirtual

Reimplemented from DRC_TEST_PROVIDER.

Definition at line 71 of file drc_test_provider_copper_clearance.cpp.

72  {
73  return wxT( "clearance" );
74  };

◆ GetNumPhases()

int DRC_TEST_PROVIDER_COPPER_CLEARANCE::GetNumPhases ( ) const
overridevirtual

Implements DRC_TEST_PROVIDER.

Definition at line 1020 of file drc_test_provider_copper_clearance.cpp.

1021 {
1022  return 4;
1023 }

◆ IsEnabled()

bool DRC_TEST_PROVIDER::IsEnabled ( ) const
inlineinherited

Definition at line 101 of file drc_test_provider.h.

102  {
103  return m_enabled;
104  }

References DRC_TEST_PROVIDER::m_enabled.

◆ isInvisibleText()

bool DRC_TEST_PROVIDER::isInvisibleText ( const BOARD_ITEM aItem) const
protectedinherited

Definition at line 327 of file drc_test_provider.cpp.

328 {
329 
330  if( const FP_TEXT* text = dyn_cast<const FP_TEXT*>( aItem ) )
331  {
332  if( !text->IsVisible() )
333  return true;
334  }
335 
336  if( const PCB_TEXT* text = dyn_cast<const PCB_TEXT*>( aItem ) )
337  {
338  if( !text->IsVisible() )
339  return true;
340  }
341 
342  return false;
343 }

References text.

Referenced by DRC_TEST_PROVIDER_SILK_TO_MASK::Run(), DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run(), and DRC_TEST_PROVIDER_SILK_CLEARANCE::Run().

◆ IsRuleDriven()

virtual bool DRC_TEST_PROVIDER::IsRuleDriven ( ) const
inlinevirtualinherited

Definition at line 96 of file drc_test_provider.h.

97  {
98  return m_isRuleDriven;
99  }

References DRC_TEST_PROVIDER::m_isRuleDriven.

◆ reportAux()

◆ reportPhase()

◆ reportProgress()

◆ reportRuleStatistics()

void DRC_TEST_PROVIDER::reportRuleStatistics ( )
protectedvirtualinherited

Definition at line 120 of file drc_test_provider.cpp.

121 {
122  if( !m_isRuleDriven )
123  return;
124 
125  m_drcEngine->ReportAux( wxT( "Rule hit statistics: " ) );
126 
127  for( const std::pair<const DRC_RULE* const, int>& stat : m_stats )
128  {
129  if( stat.first )
130  {
131  m_drcEngine->ReportAux( wxString::Format( wxT( " - rule '%s': %d hits " ),
132  stat.first->m_Name,
133  stat.second ) );
134  }
135  }
136 }
std::unordered_map< const DRC_RULE *, int > m_stats
void Format(OUTPUTFORMATTER *out, int aNestLevel, int aCtl, const CPTREE &aTree)
Output a PTREE into s-expression format via an OUTPUTFORMATTER derivative.
Definition: ptree.cpp:200
void ReportAux(const wxString &aStr)
DRC_ENGINE * m_drcEngine

References Format(), DRC_TEST_PROVIDER::m_drcEngine, DRC_TEST_PROVIDER::m_isRuleDriven, DRC_TEST_PROVIDER::m_stats, and DRC_ENGINE::ReportAux().

Referenced by DRC_TEST_PROVIDER_VIA_DIAMETER::Run(), DRC_TEST_PROVIDER_TRACK_WIDTH::Run(), DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_HOLE_SIZE::Run(), DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTIVITY::Run(), DRC_TEST_PROVIDER_SILK_TO_MASK::Run(), DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), DRC_TEST_PROVIDER_LVS::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), Run(), and DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal().

◆ reportViolation()

void DRC_TEST_PROVIDER::reportViolation ( std::shared_ptr< DRC_ITEM > &  item,
const wxPoint &  aMarkerPos 
)
protectedvirtualinherited

Definition at line 56 of file drc_test_provider.cpp.

58 {
59  if( item->GetViolatingRule() )
60  accountCheck( item->GetViolatingRule() );
61 
62  item->SetViolatingTest( this );
63  m_drcEngine->ReportViolation( item, aMarkerPos );
64 }
virtual void accountCheck(const DRC_RULE *ruleToTest)
DRC_ENGINE * m_drcEngine
void ReportViolation(const std::shared_ptr< DRC_ITEM > &aItem, const wxPoint &aPos)

References DRC_TEST_PROVIDER::accountCheck(), DRC_TEST_PROVIDER::m_drcEngine, and DRC_ENGINE::ReportViolation().

Referenced by DRC_TEST_PROVIDER_MATCHED_LENGTH::checkLengths(), DRC_TEST_PROVIDER_HOLE_SIZE::checkPad(), DRC_TEST_PROVIDER_MATCHED_LENGTH::checkSkews(), DRC_TEST_PROVIDER_HOLE_SIZE::checkVia(), DRC_TEST_PROVIDER_MATCHED_LENGTH::checkViaCounts(), DRC_TEST_PROVIDER_VIA_DIAMETER::Run(), DRC_TEST_PROVIDER_TRACK_WIDTH::Run(), DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTIVITY::Run(), DRC_TEST_PROVIDER_SILK_TO_MASK::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), DRC_TEST_PROVIDER_EDGE_CLEARANCE::testAgainstEdge(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testCourtyardClearances(), DRC_TEST_PROVIDER_MISC::testDisabledLayers(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testFootprintCourtyardDefinitions(), DRC_TEST_PROVIDER_LVS::testFootprints(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::testHoleAgainstHole(), testItemAgainstZones(), DRC_TEST_PROVIDER_MISC::testOutline(), testPadAgainstItem(), DRC_TEST_PROVIDER_MISC::testTextVars(), testTrackAgainstItem(), and testZonesToZones().

◆ Run()

bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::Run ( )
overridevirtual

Run this provider against the given PCB with configured options (if any).

Implements DRC_TEST_PROVIDER.

Definition at line 107 of file drc_test_provider_copper_clearance.cpp.

108 {
110  DRC_CONSTRAINT worstConstraint;
111 
112  if( m_drcEngine->QueryWorstConstraint( CLEARANCE_CONSTRAINT, worstConstraint ) )
113  m_largestClearance = worstConstraint.GetValue().Min();
114 
116  m_largestClearance = std::max( m_largestClearance, worstConstraint.GetValue().Min() );
117 
118  if( m_largestClearance <= 0 )
119  {
120  reportAux( "No Clearance constraints found. Tests not run." );
121  return true; // continue with other tests
122  }
123 
125 
126  m_zones.clear();
127 
128  for( ZONE* zone : m_board->Zones() )
129  {
130  if( !zone->GetIsRuleArea() )
131  {
132  m_zones.push_back( zone );
133  m_largestClearance = std::max( m_largestClearance, zone->GetLocalClearance() );
134  }
135  }
136 
137  for( FOOTPRINT* footprint : m_board->Footprints() )
138  {
139  for( PAD* pad : footprint->Pads() )
140  m_largestClearance = std::max( m_largestClearance, pad->GetLocalClearance() );
141 
142  for( ZONE* zone : footprint->Zones() )
143  {
144  if( !zone->GetIsRuleArea() )
145  {
146  m_zones.push_back( zone );
147  m_largestClearance = std::max( m_largestClearance, zone->GetLocalClearance() );
148  }
149  }
150  }
151 
152  reportAux( wxT( "Worst clearance : %d nm" ), m_largestClearance );
153 
154  // This is the number of tests between 2 calls to the progress bar
155  size_t delta = 50;
156  size_t count = 0;
157  size_t ii = 0;
158 
160 
161  auto countItems =
162  [&]( BOARD_ITEM* item ) -> bool
163  {
164  ++count;
165  return true;
166  };
167 
168  auto addToCopperTree =
169  [&]( BOARD_ITEM* item ) -> bool
170  {
171  if( !reportProgress( ii++, count, delta ) )
172  return false;
173 
174  LSET layers = item->GetLayerSet();
175 
176  // Special-case pad holes which pierce all the copper layers
177  if( item->Type() == PCB_PAD_T )
178  {
179  PAD* pad = static_cast<PAD*>( item );
180 
181  if( pad->GetDrillSizeX() > 0 && pad->GetDrillSizeY() > 0 )
182  layers |= LSET::AllCuMask();
183  }
184 
185  for( PCB_LAYER_ID layer : layers.Seq() )
186  {
187  if( IsCopperLayer( layer ) )
188  m_copperTree.Insert( item, layer, m_largestClearance );
189  }
190 
191  return true;
192  };
193 
194  if( !reportPhase( _( "Gathering copper items..." ) ) )
195  return false; // DRC cancelled
196 
197  static const std::vector<KICAD_T> itemTypes = {
201  };
202 
203  forEachGeometryItem( itemTypes, LSET::AllCuMask(), countItems );
204  forEachGeometryItem( itemTypes, LSET::AllCuMask(), addToCopperTree );
205 
206  reportAux( wxT( "Testing %d copper items and %d zones..." ), count, m_zones.size() );
207 
209  {
210  if( !reportPhase( _( "Checking track & via clearances..." ) ) )
211  return false; // DRC cancelled
212 
214  }
216  {
217  if( !reportPhase( _( "Checking hole clearances..." ) ) )
218  return false; // DRC cancelled
219 
221  }
222 
224  {
225  if( !reportPhase( _( "Checking pad clearances..." ) ) )
226  return false; // DRC cancelled
227 
229  }
232  {
233  if( !reportPhase( _( "Checking pads..." ) ) )
234  return false; // DRC cancelled
235 
237  }
238 
240  {
241  if( !reportPhase( _( "Checking copper zone clearances..." ) ) )
242  return false; // DRC cancelled
243 
245  }
247  {
248  if( !reportPhase( _( "Checking zones..." ) ) )
249  return false; // DRC cancelled
250 
252  }
253 
255 
256  return true;
257 }
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:759
class PCB_DIM_ALIGNED, a linear dimension (graphic item)
Definition: typeinfo.h:100
class PCB_DIM_LEADER, a leader dimension (graphic item)
Definition: typeinfo.h:101
class FP_TEXT, text in a footprint
Definition: typeinfo.h:92
ZONES & Zones()
Definition: board.h:240
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:49
class PCB_DIM_CENTER, a center point marking (graphic item)
Definition: typeinfo.h:102
bool IsErrorLimitExceeded(int error_code)
class PCB_TEXT, text on a layer
Definition: typeinfo.h:91
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:97
virtual bool reportProgress(int aCount, int aSize, int aDelta)
class FP_SHAPE, a footprint edge
Definition: typeinfo.h:93
class PAD, a pad in a footprint
Definition: typeinfo.h:89
T Min() const
Definition: minoptmax.h:33
LSEQ Seq(const PCB_LAYER_ID *aWishListSequence, unsigned aCount) const
Return an LSEQ from the union of this LSET and a desired sequence.
Definition: lset.cpp:411
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:590
virtual void reportRuleStatistics()
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:95
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:516
bool QueryWorstConstraint(DRC_CONSTRAINT_T aRuleId, DRC_CONSTRAINT &aConstraint)
BOARD * GetBoard() const
Definition: drc_engine.h:88
virtual bool reportPhase(const wxString &aStageName)
FOOTPRINTS & Footprints()
Definition: board.h:234
void clear()
Remove all items from the RTree.
Definition: drc_rtree.h:138
#define _(s)
Handle a list of polygons defining a copper zone.
Definition: zone.h:56
class PCB_DIMENSION_BASE: abstract dimension meta-type
Definition: typeinfo.h:99
bool IsCopperLayer(LAYER_NUM aLayerId)
Tests whether a layer is a copper layer.
Definition: layer_ids.h:808
int forEachGeometryItem(const std::vector< KICAD_T > &aTypes, LSET aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
const MINOPTMAX< int > & GetValue() const
Definition: drc_rule.h:122
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:65
DRC_ENGINE * m_drcEngine
void Insert(BOARD_ITEM *aItem, PCB_LAYER_ID aLayer, int aWorstClearance=0)
Insert an item into the tree on a particular layer with an optional worst clearance.
Definition: drc_rtree.h:93
constexpr int delta
class PCB_DIM_ORTHOGONAL, a linear dimension constrained to x/y
Definition: typeinfo.h:103
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:96
Definition: pad.h:57
class PCB_SHAPE, a segment not on copper layers
Definition: typeinfo.h:90
virtual void reportAux(wxString fmt,...)

References _, LSET::AllCuMask(), DRC_RTREE::clear(), CLEARANCE_CONSTRAINT, delta, DRCE_CLEARANCE, DRCE_HOLE_CLEARANCE, DRCE_SHORTING_ITEMS, DRCE_ZONES_INTERSECT, BOARD::Footprints(), DRC_TEST_PROVIDER::forEachGeometryItem(), DRC_ENGINE::GetBoard(), BOARD::GetDesignSettings(), BOARD_DESIGN_SETTINGS::GetDRCEpsilon(), DRC_CONSTRAINT::GetValue(), HOLE_CLEARANCE_CONSTRAINT, DRC_RTREE::Insert(), IsCopperLayer(), DRC_ENGINE::IsErrorLimitExceeded(), DRC_TEST_PROVIDER_CLEARANCE_BASE::m_board, m_copperTree, DRC_TEST_PROVIDER::m_drcEngine, m_drcEpsilon, DRC_TEST_PROVIDER_CLEARANCE_BASE::m_largestClearance, m_zones, MINOPTMAX< T >::Min(), pad, PCB_ARC_T, PCB_DIM_ALIGNED_T, PCB_DIM_CENTER_T, PCB_DIM_LEADER_T, PCB_DIM_ORTHOGONAL_T, PCB_DIMENSION_T, PCB_FP_SHAPE_T, PCB_FP_TEXT_T, PCB_PAD_T, PCB_SHAPE_T, PCB_TEXT_T, PCB_TRACE_T, PCB_VIA_T, DRC_ENGINE::QueryWorstConstraint(), DRC_TEST_PROVIDER::reportAux(), DRC_TEST_PROVIDER::reportPhase(), DRC_TEST_PROVIDER::reportProgress(), DRC_TEST_PROVIDER::reportRuleStatistics(), LSET::Seq(), testPadClearances(), testTrackClearances(), testZonesToZones(), and BOARD::Zones().

◆ SetDRCEngine()

void DRC_TEST_PROVIDER::SetDRCEngine ( DRC_ENGINE engine)
inlineinherited

Definition at line 78 of file drc_test_provider.h.

79  {
80  m_drcEngine = engine;
81  m_stats.clear();
82  }
std::unordered_map< const DRC_RULE *, int > m_stats
DRC_ENGINE * m_drcEngine

References DRC_TEST_PROVIDER::m_drcEngine, and DRC_TEST_PROVIDER::m_stats.

◆ testItemAgainstZones()

void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testItemAgainstZones ( BOARD_ITEM aItem,
PCB_LAYER_ID  aLayer 
)
private

Definition at line 382 of file drc_test_provider_copper_clearance.cpp.

384 {
385  for( ZONE* zone : m_zones )
386  {
387  if( !zone->GetLayerSet().test( aLayer ) )
388  continue;
389 
390  if( zone->GetNetCode() && aItem->IsConnected() )
391  {
392  if( zone->GetNetCode() == static_cast<BOARD_CONNECTED_ITEM*>( aItem )->GetNetCode() )
393  continue;
394  }
395 
396  if( aItem->GetBoundingBox().Intersects( zone->GetCachedBoundingBox() ) )
397  {
398  bool testClearance = !m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE );
400 
401  if( !testClearance && !testHoles )
402  return;
403 
404  DRC_RTREE* zoneTree = m_board->m_CopperZoneRTrees[ zone ].get();
405  EDA_RECT itemBBox = aItem->GetBoundingBox();
406  DRC_CONSTRAINT constraint;
407  int clearance = -1;
408  int actual;
409  VECTOR2I pos;
410 
411  if( zoneTree && testClearance )
412  {
413  constraint = m_drcEngine->EvalRules( CLEARANCE_CONSTRAINT, aItem, zone, aLayer );
414  clearance = constraint.GetValue().Min();
415  }
416 
417  if( clearance >= 0 )
418  {
419  std::shared_ptr<SHAPE> itemShape = aItem->GetEffectiveShape( aLayer );
420 
421  if( aItem->Type() == PCB_PAD_T )
422  {
423  PAD* pad = static_cast<PAD*>( aItem );
424 
425  if( !pad->FlashLayer( aLayer ) )
426  {
427  if( pad->GetDrillSize().x == 0 && pad->GetDrillSize().y == 0 )
428  continue;
429 
430  const SHAPE_SEGMENT* hole = pad->GetEffectiveHoleShape();
431  int size = hole->GetWidth();
432 
433  // Note: drill size represents finish size, which means the actual hole
434  // size is 2x the plating thickness larger.
435  if( pad->GetAttribute() == PAD_ATTRIB::PTH )
437 
438  itemShape = std::make_shared<SHAPE_SEGMENT>( hole->GetSeg(), size );
439  }
440  }
441 
442  if( zoneTree && zoneTree->QueryColliding( itemBBox, itemShape.get(), aLayer,
443  std::max( 0, clearance - m_drcEpsilon ),
444  &actual, &pos ) )
445  {
446  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_CLEARANCE );
447  wxString msg;
448 
449  msg.Printf( _( "(%s clearance %s; actual %s)" ),
450  constraint.GetName(),
451  MessageTextFromValue( userUnits(), clearance ),
452  MessageTextFromValue( userUnits(), actual ) );
453 
454  drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
455  drce->SetItems( aItem, zone );
456  drce->SetViolatingRule( constraint.GetParentRule() );
457 
458  reportViolation( drce, (wxPoint) pos );
459  }
460  }
461 
462  if( testHoles && ( aItem->Type() == PCB_VIA_T || aItem->Type() == PCB_PAD_T ) )
463  {
464  std::unique_ptr<SHAPE_SEGMENT> holeShape;
465 
466  if( aItem->Type() == PCB_VIA_T )
467  {
468  PCB_VIA* via = static_cast<PCB_VIA*>( aItem );
469  pos = via->GetPosition();
470 
471  if( via->GetLayerSet().Contains( aLayer ) )
472  holeShape.reset( new SHAPE_SEGMENT( pos, pos, via->GetDrill() ) );
473  }
474  else if( aItem->Type() == PCB_PAD_T )
475  {
476  PAD* pad = static_cast<PAD*>( aItem );
477 
478  if( pad->GetDrillSize().x )
479  holeShape.reset( new SHAPE_SEGMENT( *pad->GetEffectiveHoleShape() ) );
480  }
481 
482  if( holeShape )
483  {
484  constraint = m_drcEngine->EvalRules( HOLE_CLEARANCE_CONSTRAINT, aItem, zone,
485  aLayer );
486  clearance = constraint.GetValue().Min();
487 
488  if( zoneTree && zoneTree->QueryColliding( itemBBox, holeShape.get(), aLayer,
489  std::max( 0, clearance - m_drcEpsilon ),
490  &actual, &pos ) )
491  {
492  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_HOLE_CLEARANCE );
493  wxString msg;
494 
495  msg.Printf( _( "(%s clearance %s; actual %s)" ),
496  constraint.GetName(),
497  MessageTextFromValue( userUnits(), clearance ),
498  MessageTextFromValue( userUnits(), actual ) );
499 
500  drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
501  drce->SetItems( aItem, zone );
502  drce->SetViolatingRule( constraint.GetParentRule() );
503 
504  reportViolation( drce, (wxPoint) pos );
505  }
506  }
507  }
508  }
509  }
510 }
wxString MessageTextFromValue(EDA_UNITS aUnits, int aValue, bool aAddUnitLabel, EDA_DATA_TYPE aType)
Convert a value to a string using double notation.
Definition: base_units.cpp:104
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition: drc_item.cpp:266
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const wxPoint &aMarkerPos)
int GetHolePlatingThickness() const
Pad & via drills are finish size.
bool IsErrorLimitExceeded(int error_code)
class PAD, a pad in a footprint
Definition: typeinfo.h:89
T Min() const
Definition: minoptmax.h:33
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:590
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: board_item.cpp:181
wxString GetName() const
Definition: drc_rule.h:130
const SEG & GetSeg() const
Plated through hole pad.
DRC_RULE * GetParentRule() const
Definition: drc_rule.h:126
#define _(s)
Handle a list of polygons defining a copper zone.
Definition: zone.h:56
EDA_UNITS userUnits() const
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
Definition: drc_engine.cpp:759
const MINOPTMAX< int > & GetValue() const
Definition: drc_rule.h:122
DRC_ENGINE * m_drcEngine
Handle the component boundary box.
Definition: eda_rect.h:42
bool Intersects(const EDA_RECT &aRect) const
Test for a common area between rectangles.
Definition: eda_rect.cpp:150
std::map< ZONE *, std::unique_ptr< DRC_RTREE > > m_CopperZoneRTrees
Definition: board.h:1072
virtual bool IsConnected() const
Returns information if the object is derived from BOARD_CONNECTED_ITEM.
Definition: board_item.h:103
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:96
virtual const EDA_RECT GetBoundingBox() const
Return the orthogonal bounding box of this object for display purposes.
Definition: eda_item.cpp:75
Definition: pad.h:57
Implement an R-tree for fast spatial and layer indexing of connectable items.
Definition: drc_rtree.h:46
int GetWidth() const
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:112
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
Definition: drc_rtree.h:183

References _, CLEARANCE_CONSTRAINT, DRC_ITEM::Create(), DRCE_CLEARANCE, DRCE_HOLE_CLEARANCE, DRC_ENGINE::EvalRules(), EDA_ITEM::GetBoundingBox(), BOARD::GetDesignSettings(), BOARD_ITEM::GetEffectiveShape(), BOARD_DESIGN_SETTINGS::GetHolePlatingThickness(), DRC_CONSTRAINT::GetName(), DRC_CONSTRAINT::GetParentRule(), SHAPE_SEGMENT::GetSeg(), DRC_CONSTRAINT::GetValue(), SHAPE_SEGMENT::GetWidth(), HOLE_CLEARANCE_CONSTRAINT, EDA_RECT::Intersects(), BOARD_ITEM::IsConnected(), DRC_ENGINE::IsErrorLimitExceeded(), DRC_TEST_PROVIDER_CLEARANCE_BASE::m_board, BOARD::m_CopperZoneRTrees, DRC_TEST_PROVIDER::m_drcEngine, m_drcEpsilon, m_zones, MessageTextFromValue(), MINOPTMAX< T >::Min(), pad, PCB_PAD_T, PCB_VIA_T, PTH, DRC_RTREE::QueryColliding(), DRC_TEST_PROVIDER::reportViolation(), EDA_ITEM::Type(), DRC_TEST_PROVIDER::userUnits(), and via.

Referenced by testPadClearances(), and testTrackClearances().

◆ testPadAgainstItem()

bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem ( PAD pad,
SHAPE padShape,
PCB_LAYER_ID  layer,
BOARD_ITEM other 
)
private

Definition at line 577 of file drc_test_provider_copper_clearance.cpp.

580 {
581  bool testClearance = !m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE );
582  bool testShorting = !m_drcEngine->IsErrorLimitExceeded( DRCE_SHORTING_ITEMS );
584 
585  // Disable some tests *within* a single footprint
586  if( other->GetParent() == pad->GetParent() )
587  {
588  FOOTPRINT* fp = static_cast<FOOTPRINT*>( pad->GetParent() );
589 
590  // Graphic items are allowed to act as net-ties within their own footprint
591  if( fp->IsNetTie() && ( other->Type() == PCB_FP_SHAPE_T || other->Type() == PCB_PAD_T ) )
592  testClearance = false;
593 
594  // No hole testing within a footprint
595  testHoles = false;
596  }
597 
598  PAD* otherPad = nullptr;
599  PCB_VIA* otherVia = nullptr;
600 
601  if( other->Type() == PCB_PAD_T )
602  otherPad = static_cast<PAD*>( other );
603 
604  if( other->Type() == PCB_VIA_T )
605  otherVia = static_cast<PCB_VIA*>( other );
606 
607  if( !IsCopperLayer( layer ) )
608  testClearance = false;
609 
610  // A NPTH has no cylinder, but it may still have pads on some layers
611  if( pad->GetAttribute() == PAD_ATTRIB::NPTH && !pad->FlashLayer( layer ) )
612  testClearance = false;
613 
614  if( otherPad && otherPad->GetAttribute() == PAD_ATTRIB::NPTH && !otherPad->FlashLayer( layer ) )
615  testClearance = false;
616 
617  // Track clearances are tested in testTrackClearances()
618  if( dynamic_cast<PCB_TRACK*>( other) )
619  testClearance = false;
620 
621  int padNet = pad->GetNetCode();
622  int otherPadNet = otherPad ? otherPad->GetNetCode() : 0;
623  int otherViaNet = otherVia ? otherVia->GetNetCode() : 0;
624 
625  // Pads and vias of the same (defined) net get a waiver on clearance and hole tests
626  if( ( otherPadNet && otherPadNet == padNet ) || ( otherViaNet && otherViaNet == padNet ) )
627  {
628  testClearance = false;
629  testHoles = false;
630  }
631 
632  if( !( pad->GetDrillSize().x > 0 )
633  && !( otherPad && otherPad->GetDrillSize().x > 0 )
634  && !( otherVia && otherVia->GetDrill() > 0 ) )
635  {
636  testHoles = false;
637  }
638 
639  if( !testClearance && !testShorting && !testHoles )
640  return false;
641 
642  std::shared_ptr<SHAPE> otherShape = DRC_ENGINE::GetShape( other, layer );
643  DRC_CONSTRAINT constraint;
644  int clearance;
645  int actual;
646  VECTOR2I pos;
647 
648  if( otherPad && pad->SameLogicalPadAs( otherPad ) )
649  {
650  // If pads are equivalent (ie: from the same footprint with the same pad number)...
651  // ... and have nets...
652  // then they must be the same net
653  if( pad->GetNetCode() && otherPad->GetNetCode()
654  && pad->GetNetCode() != otherPad->GetNetCode()
655  && testShorting )
656  {
657  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_SHORTING_ITEMS );
658  wxString msg;
659 
660  msg.Printf( _( "(nets %s and %s)" ),
661  pad->GetNetname(),
662  otherPad->GetNetname() );
663 
664  drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
665  drce->SetItems( pad, otherPad );
666 
667  reportViolation( drce, otherPad->GetPosition() );
668  }
669 
670  return true;
671  }
672 
673  if( testClearance )
674  {
675  constraint = m_drcEngine->EvalRules( CLEARANCE_CONSTRAINT, pad, other, layer );
676  clearance = constraint.GetValue().Min();
677 
678  if( clearance > 0 && padShape->Collide( otherShape.get(),
679  std::max( 0, clearance - m_drcEpsilon ),
680  &actual, &pos ) )
681  {
682  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_CLEARANCE );
683  wxString msg;
684 
685  msg.Printf( _( "(%s clearance %s; actual %s)" ),
686  constraint.GetName(),
687  MessageTextFromValue( userUnits(), clearance ),
688  MessageTextFromValue( userUnits(), actual ) );
689 
690  drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
691  drce->SetItems( pad, other );
692  drce->SetViolatingRule( constraint.GetParentRule() );
693 
694  reportViolation( drce, (wxPoint) pos );
695  testHoles = false; // No need for multiple violations
696  }
697  }
698 
699  if( testHoles )
700  {
701  constraint = m_drcEngine->EvalRules( HOLE_CLEARANCE_CONSTRAINT, pad, other, layer );
702  clearance = constraint.GetValue().Min();
703  }
704 
705  if( testHoles && otherPad && pad->FlashLayer( layer ) && otherPad->GetDrillSize().x )
706  {
707  if( clearance > 0 && padShape->Collide( otherPad->GetEffectiveHoleShape(),
708  std::max( 0, clearance - m_drcEpsilon ),
709  &actual, &pos ) )
710  {
711  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_HOLE_CLEARANCE );
712  wxString msg;
713 
714  msg.Printf( _( "(%s clearance %s; actual %s)" ),
715  constraint.GetName(),
716  MessageTextFromValue( userUnits(), clearance ),
717  MessageTextFromValue( userUnits(), actual ) );
718 
719  drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
720  drce->SetItems( pad, other );
721  drce->SetViolatingRule( constraint.GetParentRule() );
722 
723  reportViolation( drce, (wxPoint) pos );
724  testHoles = false; // No need for multiple violations
725  }
726  }
727 
728  if( testHoles && otherPad && otherPad->FlashLayer( layer ) && pad->GetDrillSize().x )
729  {
730  if( clearance >= 0 && otherShape->Collide( pad->GetEffectiveHoleShape(),
731  std::max( 0, clearance - m_drcEpsilon ),
732  &actual, &pos ) )
733  {
734  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_HOLE_CLEARANCE );
735  wxString msg;
736 
737  msg.Printf( _( "(%s clearance %s; actual %s)" ),
738  constraint.GetName(),
739  MessageTextFromValue( userUnits(), clearance ),
740  MessageTextFromValue( userUnits(), actual ) );
741 
742  drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
743  drce->SetItems( pad, other );
744  drce->SetViolatingRule( constraint.GetParentRule() );
745 
746  reportViolation( drce, (wxPoint) pos );
747  testHoles = false; // No need for multiple violations
748  }
749  }
750 
751  if( testHoles && otherVia && otherVia->IsOnLayer( layer ) )
752  {
753  pos = otherVia->GetPosition();
754  otherShape.reset( new SHAPE_SEGMENT( pos, pos, otherVia->GetDrill() ) );
755 
756  if( clearance > 0 && padShape->Collide( otherShape.get(),
757  std::max( 0, clearance - m_drcEpsilon ),
758  &actual, &pos ) )
759  {
760  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_HOLE_CLEARANCE );
761  wxString msg;
762 
763  msg.Printf( _( "(%s clearance %s; actual %s)" ),
764  constraint.GetName(),
765  MessageTextFromValue( userUnits(), clearance ),
766  MessageTextFromValue( userUnits(), actual ) );
767 
768  drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
769  drce->SetItems( pad, otherVia );
770  drce->SetViolatingRule( constraint.GetParentRule() );
771 
772  reportViolation( drce, (wxPoint) pos );
773  }
774  }
775 
776  return true;
777 }
bool IsOnLayer(PCB_LAYER_ID aLayer) const override
Test to see if this object is on the given layer.
Definition: pcb_track.cpp:360
wxString MessageTextFromValue(EDA_UNITS aUnits, int aValue, bool aAddUnitLabel, EDA_DATA_TYPE aType)
Convert a value to a string using double notation.
Definition: base_units.cpp:104
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition: drc_item.cpp:266
wxPoint GetPosition() const override
Definition: pcb_track.h:392
static std::shared_ptr< SHAPE > GetShape(BOARD_ITEM *aItem, PCB_LAYER_ID aLayer)
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const wxPoint &aMarkerPos)
bool IsErrorLimitExceeded(int error_code)
const SHAPE_SEGMENT * GetEffectiveHoleShape() const
Return a SHAPE object representing the pad's hole.
Definition: pad.cpp:336
class FP_SHAPE, a footprint edge
Definition: typeinfo.h:93
class PAD, a pad in a footprint
Definition: typeinfo.h:89
T Min() const
Definition: minoptmax.h:33
virtual bool Collide(const VECTOR2I &aP, int aClearance=0, int *aActual=nullptr, VECTOR2I *aLocation=nullptr) const
Check if the boundary of shape (this) lies closer to the point aP than aClearance,...
Definition: shape.h:165
wxString GetName() const
Definition: drc_rule.h:130
DRC_RULE * GetParentRule() const
Definition: drc_rule.h:126
const wxSize & GetDrillSize() const
Definition: pad.h:243
like PAD_PTH, but not plated
bool FlashLayer(int aLayer) const
Check to see whether the pad should be flashed on the specific layer.
Definition: pad.cpp:214
int GetDrill() const
Function GetDrill returns the local drill setting for this PCB_VIA.
Definition: pcb_track.h:462
bool IsNetTie() const
Definition: footprint.h:247
#define _(s)
EDA_UNITS userUnits() const
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
Definition: drc_engine.cpp:759
bool IsCopperLayer(LAYER_NUM aLayerId)
Tests whether a layer is a copper layer.
Definition: layer_ids.h:808
const MINOPTMAX< int > & GetValue() const
Definition: drc_rule.h:122
wxPoint GetPosition() const override
Definition: pad.h:178
PAD_ATTRIB GetAttribute() const
Definition: pad.h:371
DRC_ENGINE * m_drcEngine
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:96
Definition: pad.h:57
BOARD_ITEM_CONTAINER * GetParent() const
Definition: board_item.h:136
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:112

References _, CLEARANCE_CONSTRAINT, SHAPE::Collide(), DRC_ITEM::Create(), DRCE_CLEARANCE, DRCE_HOLE_CLEARANCE, DRCE_SHORTING_ITEMS, DRC_ENGINE::EvalRules(), PAD::FlashLayer(), PAD::GetAttribute(), PCB_VIA::GetDrill(), PAD::GetDrillSize(), PAD::GetEffectiveHoleShape(), DRC_CONSTRAINT::GetName(), BOARD_CONNECTED_ITEM::GetNetCode(), BOARD_CONNECTED_ITEM::GetNetname(), BOARD_ITEM::GetParent(), DRC_CONSTRAINT::GetParentRule(), PAD::GetPosition(), PCB_VIA::GetPosition(), DRC_ENGINE::GetShape(), DRC_CONSTRAINT::GetValue(), HOLE_CLEARANCE_CONSTRAINT, IsCopperLayer(), DRC_ENGINE::IsErrorLimitExceeded(), FOOTPRINT::IsNetTie(), PCB_VIA::IsOnLayer(), DRC_TEST_PROVIDER::m_drcEngine, m_drcEpsilon, MessageTextFromValue(), MINOPTMAX< T >::Min(), NPTH, pad, PCB_FP_SHAPE_T, PCB_PAD_T, PCB_VIA_T, DRC_TEST_PROVIDER::reportViolation(), EDA_ITEM::Type(), and DRC_TEST_PROVIDER::userUnits().

Referenced by testPadClearances().

◆ testPadClearances()

void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances ( )
private

Definition at line 780 of file drc_test_provider_copper_clearance.cpp.

781 {
782  const int delta = 50; // This is the number of tests between 2 calls to the progress bar
783 
784  size_t count = 0;
785 
786  for( FOOTPRINT* footprint : m_board->Footprints() )
787  count += footprint->Pads().size();
788 
789  reportAux( wxT( "Testing %d pads..." ), count );
790 
791  int ii = 0;
792  std::map< std::pair<BOARD_ITEM*, BOARD_ITEM*>, int> checkedPairs;
793 
794  for( FOOTPRINT* footprint : m_board->Footprints() )
795  {
796  for( PAD* pad : footprint->Pads() )
797  {
798  if( !reportProgress( ii++, count, delta ) )
799  break;
800 
801  for( PCB_LAYER_ID layer : pad->GetLayerSet().Seq() )
802  {
803  std::shared_ptr<SHAPE> padShape = DRC_ENGINE::GetShape( pad, layer );
804 
805  m_copperTree.QueryColliding( pad, layer, layer,
806  // Filter:
807  [&]( BOARD_ITEM* other ) -> bool
808  {
809  BOARD_ITEM* a = pad;
810  BOARD_ITEM* b = other;
811 
812  // store canonical order so we don't collide in both directions
813  // (a:b and b:a)
814  if( static_cast<void*>( a ) > static_cast<void*>( b ) )
815  std::swap( a, b );
816 
817  if( checkedPairs.count( { a, b } ) )
818  {
819  return false;
820  }
821  else
822  {
823  checkedPairs[ { a, b } ] = 1;
824  return true;
825  }
826  },
827  // Visitor
828  [&]( BOARD_ITEM* other ) -> bool
829  {
830  return testPadAgainstItem( pad, padShape.get(), layer, other );
831  },
833 
834  testItemAgainstZones( pad, layer );
835  }
836  }
837  }
838 }
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:49
static std::shared_ptr< SHAPE > GetShape(BOARD_ITEM *aItem, PCB_LAYER_ID aLayer)
void testItemAgainstZones(BOARD_ITEM *aItem, PCB_LAYER_ID aLayer)
virtual bool reportProgress(int aCount, int aSize, int aDelta)
FOOTPRINTS & Footprints()
Definition: board.h:234
bool testPadAgainstItem(PAD *pad, SHAPE *padShape, PCB_LAYER_ID layer, BOARD_ITEM *other)
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:65
constexpr int delta
Definition: pad.h:57
virtual void reportAux(wxString fmt,...)
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
Definition: drc_rtree.h:183

References delta, BOARD::Footprints(), DRC_ENGINE::GetShape(), DRC_TEST_PROVIDER_CLEARANCE_BASE::m_board, m_copperTree, DRC_TEST_PROVIDER_CLEARANCE_BASE::m_largestClearance, pad, DRC_RTREE::QueryColliding(), DRC_TEST_PROVIDER::reportAux(), DRC_TEST_PROVIDER::reportProgress(), testItemAgainstZones(), and testPadAgainstItem().

Referenced by Run().

◆ testTrackAgainstItem()

bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem ( PCB_TRACK track,
SHAPE trackShape,
PCB_LAYER_ID  layer,
BOARD_ITEM other 
)
private

Definition at line 260 of file drc_test_provider_copper_clearance.cpp.

263 {
264  bool testClearance = !m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE );
266  DRC_CONSTRAINT constraint;
267  int clearance = -1;
268  int actual;
269  VECTOR2I pos;
270 
271  if( other->Type() == PCB_PAD_T )
272  {
273  PAD* pad = static_cast<PAD*>( other );
274 
275  if( pad->GetAttribute() == PAD_ATTRIB::NPTH && !pad->FlashLayer( layer ) )
276  testClearance = false;
277  }
278 
279  if( testClearance )
280  {
281  constraint = m_drcEngine->EvalRules( CLEARANCE_CONSTRAINT, track, other, layer );
282  clearance = constraint.GetValue().Min();
283  }
284 
285  if( clearance >= 0 )
286  {
287  // Special processing for track:track intersections
288  if( track->Type() == PCB_TRACE_T && other->Type() == PCB_TRACE_T )
289  {
290  SEG trackSeg( track->GetStart(), track->GetEnd() );
291  SEG otherSeg( track->GetStart(), track->GetEnd() );
292 
293  if( OPT_VECTOR2I intersection = trackSeg.Intersect( otherSeg ) )
294  {
295  std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_TRACKS_CROSSING );
296  drcItem->SetItems( track, other );
297  drcItem->SetViolatingRule( constraint.GetParentRule() );
298 
299  reportViolation( drcItem, (wxPoint) intersection.get() );
300 
302  }
303  }
304 
305  std::shared_ptr<SHAPE> otherShape = DRC_ENGINE::GetShape( other, layer );
306 
307  if( trackShape->Collide( otherShape.get(), clearance - m_drcEpsilon, &actual, &pos ) )
308  {
309  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_CLEARANCE );
310  wxString msg;
311 
312  msg.Printf( _( "(%s clearance %s; actual %s)" ),
313  constraint.GetName(),
314  MessageTextFromValue( userUnits(), clearance ),
315  MessageTextFromValue( userUnits(), actual ) );
316 
317  drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
318  drce->SetItems( track, other );
319  drce->SetViolatingRule( constraint.GetParentRule() );
320 
321  reportViolation( drce, (wxPoint) pos );
322 
324  return false;
325  }
326  }
327 
328  if( testHoles && ( other->Type() == PCB_VIA_T || other->Type() == PCB_PAD_T ) )
329  {
330  std::unique_ptr<SHAPE_SEGMENT> holeShape;
331 
332  if( other->Type() == PCB_VIA_T )
333  {
334  PCB_VIA* via = static_cast<PCB_VIA*>( other );
335  pos = via->GetPosition();
336 
337  if( via->GetLayerSet().Contains( layer ) )
338  holeShape.reset( new SHAPE_SEGMENT( pos, pos, via->GetDrill() ) );
339  }
340  else if( other->Type() == PCB_PAD_T )
341  {
342  PAD* pad = static_cast<PAD*>( other );
343 
344  if( pad->GetDrillSize().x )
345  holeShape.reset( new SHAPE_SEGMENT( *pad->GetEffectiveHoleShape() ) );
346  }
347 
348  if( holeShape )
349  {
350  constraint = m_drcEngine->EvalRules( HOLE_CLEARANCE_CONSTRAINT, other, track, layer );
351  clearance = constraint.GetValue().Min();
352 
353  if( clearance > 0 && trackShape->Collide( holeShape.get(),
354  std::max( 0, clearance - m_drcEpsilon ),
355  &actual, &pos ) )
356  {
357 
358  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_HOLE_CLEARANCE );
359  wxString msg;
360 
361  msg.Printf( _( "(%s clearance %s; actual %s)" ),
362  constraint.GetName(),
363  MessageTextFromValue( userUnits(), clearance ),
364  MessageTextFromValue( userUnits(), actual ) );
365 
366  drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
367  drce->SetItems( track, other );
368  drce->SetViolatingRule( constraint.GetParentRule() );
369 
370  reportViolation( drce, (wxPoint) pos );
371 
373  return false;
374  }
375  }
376  }
377 
378  return true;
379 }
wxString MessageTextFromValue(EDA_UNITS aUnits, int aValue, bool aAddUnitLabel, EDA_DATA_TYPE aType)
Convert a value to a string using double notation.
Definition: base_units.cpp:104
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition: drc_item.cpp:266
const wxPoint & GetEnd() const
Definition: pcb_track.h:105
static std::shared_ptr< SHAPE > GetShape(BOARD_ITEM *aItem, PCB_LAYER_ID aLayer)
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const wxPoint &aMarkerPos)
bool IsErrorLimitExceeded(int error_code)
class PAD, a pad in a footprint
Definition: typeinfo.h:89
T Min() const
Definition: minoptmax.h:33
virtual bool Collide(const VECTOR2I &aP, int aClearance=0, int *aActual=nullptr, VECTOR2I *aLocation=nullptr) const
Check if the boundary of shape (this) lies closer to the point aP than aClearance,...
Definition: shape.h:165
wxString GetName() const
Definition: drc_rule.h:130
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:95
DRC_RULE * GetParentRule() const
Definition: drc_rule.h:126
like PAD_PTH, but not plated
OPT< VECTOR2I > OPT_VECTOR2I
Definition: seg.h:38
bool GetReportAllTrackErrors() const
Definition: drc_engine.h:156
#define _(s)
EDA_UNITS userUnits() const
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
Definition: drc_engine.cpp:759
Definition: seg.h:40
const MINOPTMAX< int > & GetValue() const
Definition: drc_rule.h:122
DRC_ENGINE * m_drcEngine
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:96
Definition: pad.h:57
const wxPoint & GetStart() const
Definition: pcb_track.h:108
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:112

References _, CLEARANCE_CONSTRAINT, SHAPE::Collide(), DRC_ITEM::Create(), DRCE_CLEARANCE, DRCE_HOLE_CLEARANCE, DRCE_TRACKS_CROSSING, DRC_ENGINE::EvalRules(), PCB_TRACK::GetEnd(), DRC_CONSTRAINT::GetName(), DRC_CONSTRAINT::GetParentRule(), DRC_ENGINE::GetReportAllTrackErrors(), DRC_ENGINE::GetShape(), PCB_TRACK::GetStart(), DRC_CONSTRAINT::GetValue(), HOLE_CLEARANCE_CONSTRAINT, DRC_ENGINE::IsErrorLimitExceeded(), DRC_TEST_PROVIDER::m_drcEngine, m_drcEpsilon, MessageTextFromValue(), MINOPTMAX< T >::Min(), NPTH, pad, PCB_PAD_T, PCB_TRACE_T, PCB_VIA_T, DRC_TEST_PROVIDER::reportViolation(), EDA_ITEM::Type(), DRC_TEST_PROVIDER::userUnits(), and via.

Referenced by testTrackClearances().

◆ testTrackClearances()

void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances ( )
private

Definition at line 513 of file drc_test_provider_copper_clearance.cpp.

514 {
515  // This is the number of tests between 2 calls to the progress bar
516  const int delta = 100;
517  int ii = 0;
518 
519  reportAux( wxT( "Testing %d tracks & vias..." ), m_board->Tracks().size() );
520 
521  std::map< std::pair<BOARD_ITEM*, BOARD_ITEM*>, int> checkedPairs;
522 
523  for( PCB_TRACK* track : m_board->Tracks() )
524  {
525  if( !reportProgress( ii++, m_board->Tracks().size(), delta ) )
526  break;
527 
528  for( PCB_LAYER_ID layer : track->GetLayerSet().Seq() )
529  {
530  std::shared_ptr<SHAPE> trackShape = track->GetEffectiveShape( layer );
531 
532  m_copperTree.QueryColliding( track, layer, layer,
533  // Filter:
534  [&]( BOARD_ITEM* other ) -> bool
535  {
536  // It would really be better to know what particular nets a nettie
537  // should allow, but for now it is what it is.
538  if( DRC_ENGINE::IsNetTie( other ) )
539  return false;
540 
541  auto otherCItem = dynamic_cast<BOARD_CONNECTED_ITEM*>( other );
542 
543  if( otherCItem && otherCItem->GetNetCode() == track->GetNetCode() )
544  return false;
545 
546  BOARD_ITEM* a = track;
547  BOARD_ITEM* b = other;
548 
549  // store canonical order so we don't collide in both directions
550  // (a:b and b:a)
551  if( static_cast<void*>( a ) > static_cast<void*>( b ) )
552  std::swap( a, b );
553 
554  if( checkedPairs.count( { a, b } ) )
555  {
556  return false;
557  }
558  else
559  {
560  checkedPairs[ { a, b } ] = 1;
561  return true;
562  }
563  },
564  // Visitor:
565  [&]( BOARD_ITEM* other ) -> bool
566  {
567  return testTrackAgainstItem( track, trackShape.get(), layer, other );
568  },
570 
571  testItemAgainstZones( track, layer );
572  }
573  }
574 }
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:49
void testItemAgainstZones(BOARD_ITEM *aItem, PCB_LAYER_ID aLayer)
virtual bool reportProgress(int aCount, int aSize, int aDelta)
static bool IsNetTie(BOARD_ITEM *aItem)
bool testTrackAgainstItem(PCB_TRACK *track, SHAPE *trackShape, PCB_LAYER_ID layer, BOARD_ITEM *other)
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:65
constexpr int delta
TRACKS & Tracks()
Definition: board.h:231
virtual void reportAux(wxString fmt,...)
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
Definition: drc_rtree.h:183

References delta, DRC_ENGINE::IsNetTie(), DRC_TEST_PROVIDER_CLEARANCE_BASE::m_board, m_copperTree, DRC_TEST_PROVIDER_CLEARANCE_BASE::m_largestClearance, DRC_RTREE::QueryColliding(), DRC_TEST_PROVIDER::reportAux(), DRC_TEST_PROVIDER::reportProgress(), testItemAgainstZones(), testTrackAgainstItem(), and BOARD::Tracks().

Referenced by Run().

◆ testZonesToZones()

void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones ( )
private

Definition at line 841 of file drc_test_provider_copper_clearance.cpp.

842 {
843  const int delta = 50; // This is the number of tests between 2 calls to the progress bar
844 
845  SHAPE_POLY_SET buffer;
846  SHAPE_POLY_SET* boardOutline = nullptr;
847 
848  if( m_board->GetBoardPolygonOutlines( buffer ) )
849  boardOutline = &buffer;
850 
851  for( int layer_id = F_Cu; layer_id <= B_Cu; ++layer_id )
852  {
853  PCB_LAYER_ID layer = static_cast<PCB_LAYER_ID>( layer_id );
854  std::vector<SHAPE_POLY_SET> smoothed_polys;
855  smoothed_polys.resize( m_zones.size() );
856 
857  // Skip over layers not used on the current board
858  if( !m_board->IsLayerEnabled( layer ) )
859  continue;
860 
861  for( size_t ii = 0; ii < m_zones.size(); ii++ )
862  {
863  if( m_zones[ii]->IsOnLayer( layer ) )
864  m_zones[ii]->BuildSmoothedPoly( smoothed_polys[ii], layer, boardOutline );
865  }
866 
867  // iterate through all areas
868  for( size_t ia = 0; ia < m_zones.size(); ia++ )
869  {
870  if( !reportProgress( layer_id * m_zones.size() + ia, B_Cu * m_zones.size(), delta ) )
871  break;
872 
873  ZONE* zoneRef = m_zones[ia];
874 
875  if( !zoneRef->IsOnLayer( layer ) )
876  continue;
877 
878  // If we are testing a single zone, then iterate through all other zones
879  // Otherwise, we have already tested the zone combination
880  for( size_t ia2 = ia + 1; ia2 < m_zones.size(); ia2++ )
881  {
882  ZONE* zoneToTest = m_zones[ia2];
883 
884  if( zoneRef == zoneToTest )
885  continue;
886 
887  // test for same layer
888  if( !zoneToTest->IsOnLayer( layer ) )
889  continue;
890 
891  // Test for same net
892  if( zoneRef->GetNetCode() == zoneToTest->GetNetCode()
893  && zoneRef->GetNetCode() >= 0 )
894  continue;
895 
896  // test for different priorities
897  if( zoneRef->GetPriority() != zoneToTest->GetPriority() )
898  continue;
899 
900  // rule areas may overlap at will
901  if( zoneRef->GetIsRuleArea() || zoneToTest->GetIsRuleArea() )
902  continue;
903 
904  // Examine a candidate zone: compare zoneToTest to zoneRef
905 
906  // Get clearance used in zone to zone test.
907  auto constraint = m_drcEngine->EvalRules( CLEARANCE_CONSTRAINT, zoneRef, zoneToTest,
908  layer );
909  int zone2zoneClearance = constraint.GetValue().Min();
910 
911  // test for some corners of zoneRef inside zoneToTest
912  for( auto iterator = smoothed_polys[ia].IterateWithHoles(); iterator; iterator++ )
913  {
914  VECTOR2I currentVertex = *iterator;
915  wxPoint pt( currentVertex.x, currentVertex.y );
916 
917  if( smoothed_polys[ia2].Contains( currentVertex ) )
918  {
919  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_ZONES_INTERSECT );
920  drce->SetItems( zoneRef, zoneToTest );
921  drce->SetViolatingRule( constraint.GetParentRule() );
922 
923  reportViolation( drce, pt );
924  }
925  }
926 
927  // test for some corners of zoneToTest inside zoneRef
928  for( auto iterator = smoothed_polys[ia2].IterateWithHoles(); iterator; iterator++ )
929  {
930  VECTOR2I currentVertex = *iterator;
931  wxPoint pt( currentVertex.x, currentVertex.y );
932 
933  if( smoothed_polys[ia].Contains( currentVertex ) )
934  {
935  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_ZONES_INTERSECT );
936  drce->SetItems( zoneToTest, zoneRef );
937  drce->SetViolatingRule( constraint.GetParentRule() );
938 
939  reportViolation( drce, pt );
940  }
941  }
942 
943  // Iterate through all the segments of refSmoothedPoly
944  std::map<wxPoint, int> conflictPoints;
945 
946  for( auto refIt = smoothed_polys[ia].IterateSegmentsWithHoles(); refIt; refIt++ )
947  {
948  // Build ref segment
949  SEG refSegment = *refIt;
950 
951  // Iterate through all the segments in smoothed_polys[ia2]
952  for( auto testIt = smoothed_polys[ia2].IterateSegmentsWithHoles(); testIt; testIt++ )
953  {
954  // Build test segment
955  SEG testSegment = *testIt;
956  wxPoint pt;
957 
958  int ax1, ay1, ax2, ay2;
959  ax1 = refSegment.A.x;
960  ay1 = refSegment.A.y;
961  ax2 = refSegment.B.x;
962  ay2 = refSegment.B.y;
963 
964  int bx1, by1, bx2, by2;
965  bx1 = testSegment.A.x;
966  by1 = testSegment.A.y;
967  bx2 = testSegment.B.x;
968  by2 = testSegment.B.y;
969 
970  int d = GetClearanceBetweenSegments( bx1, by1, bx2, by2,
971  0,
972  ax1, ay1, ax2, ay2,
973  0,
974  zone2zoneClearance,
975  &pt.x, &pt.y );
976 
977  if( d < zone2zoneClearance )
978  {
979  if( conflictPoints.count( pt ) )
980  conflictPoints[ pt ] = std::min( conflictPoints[ pt ], d );
981  else
982  conflictPoints[ pt ] = d;
983  }
984  }
985  }
986 
987  for( const std::pair<const wxPoint, int>& conflict : conflictPoints )
988  {
989  int actual = conflict.second;
990  std::shared_ptr<DRC_ITEM> drce;
991 
992  if( actual <= 0 )
993  {
995  }
996  else
997  {
999  wxString msg;
1000 
1001  msg.Printf( _( "(%s clearance %s; actual %s)" ),
1002  constraint.GetName(),
1003  MessageTextFromValue( userUnits(), zone2zoneClearance ),
1004  MessageTextFromValue( userUnits(), conflict.second ) );
1005 
1006  drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
1007  }
1008 
1009  drce->SetItems( zoneRef, zoneToTest );
1010  drce->SetViolatingRule( constraint.GetParentRule() );
1011 
1012  reportViolation( drce, conflict.first );
1013  }
1014  }
1015  }
1016  }
1017 }
wxString MessageTextFromValue(EDA_UNITS aUnits, int aValue, bool aAddUnitLabel, EDA_DATA_TYPE aType)
Convert a value to a string using double notation.
Definition: base_units.cpp:104
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition: drc_item.cpp:266
bool GetBoardPolygonOutlines(SHAPE_POLY_SET &aOutlines, OUTLINE_ERROR_HANDLER *aErrorHandler=nullptr)
Extract the board outlines and build a closed polygon from lines, arcs and circle items on edge cut l...
Definition: board.cpp:1835
unsigned GetPriority() const
Definition: zone.h:122
bool GetIsRuleArea() const
Accessors to parameters used in Rule Area zones:
Definition: zone.h:735
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const wxPoint &aMarkerPos)
virtual bool reportProgress(int aCount, int aSize, int aDelta)
virtual bool IsOnLayer(PCB_LAYER_ID) const override
Test to see if this object is on the given layer.
Definition: zone.cpp:314
T Min() const
Definition: minoptmax.h:33
bool IsLayerEnabled(PCB_LAYER_ID aLayer) const
A proxy function that calls the correspondent function in m_BoardSettings tests whether a given layer...
Definition: board.cpp:493
Represent a set of closed polygons.
#define _(s)
Handle a list of polygons defining a copper zone.
Definition: zone.h:56
EDA_UNITS userUnits() const
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
Definition: drc_engine.cpp:759
Definition: seg.h:40
const MINOPTMAX< int > & GetValue() const
Definition: drc_rule.h:122
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:65
DRC_ENGINE * m_drcEngine
Definition: layer_ids.h:71
VECTOR2I A
Definition: seg.h:48
constexpr int delta
VECTOR2I B
Definition: seg.h:49

References _, SEG::A, SEG::B, B_Cu, CLEARANCE_CONSTRAINT, DRC_ITEM::Create(), delta, DRCE_CLEARANCE, DRCE_ZONES_INTERSECT, DRC_ENGINE::EvalRules(), F_Cu, BOARD::GetBoardPolygonOutlines(), ZONE::GetIsRuleArea(), BOARD_CONNECTED_ITEM::GetNetCode(), ZONE::GetPriority(), DRC_CONSTRAINT::GetValue(), BOARD::IsLayerEnabled(), ZONE::IsOnLayer(), DRC_TEST_PROVIDER_CLEARANCE_BASE::m_board, DRC_TEST_PROVIDER::m_drcEngine, m_zones, MessageTextFromValue(), MINOPTMAX< T >::Min(), DRC_TEST_PROVIDER::reportProgress(), DRC_TEST_PROVIDER::reportViolation(), DRC_TEST_PROVIDER::userUnits(), VECTOR2< T >::x, and VECTOR2< T >::y.

Referenced by Run().

◆ userUnits()

Member Data Documentation

◆ m_board

◆ m_boardOutlineValid

bool DRC_TEST_PROVIDER_CLEARANCE_BASE::m_boardOutlineValid
protectedinherited

Definition at line 53 of file drc_test_provider_clearance_base.h.

◆ m_copperTree

DRC_RTREE DRC_TEST_PROVIDER_COPPER_CLEARANCE::m_copperTree
private

◆ m_drcEngine

DRC_ENGINE* DRC_TEST_PROVIDER::m_drcEngine
protectedinherited

Definition at line 131 of file drc_test_provider.h.

Referenced by DRC_TEST_PROVIDER_HOLE_SIZE::checkPad(), DRC_TEST_PROVIDER_HOLE_SIZE::checkVia(), DRC_TEST_PROVIDER::forEachGeometryItem(), DRC_TEST_PROVIDER_LVS::GetNumPhases(), DRC_TEST_PROVIDER::reportAux(), DRC_TEST_PROVIDER::reportPhase(), DRC_TEST_PROVIDER::reportProgress(), DRC_TEST_PROVIDER::reportRuleStatistics(), DRC_TEST_PROVIDER::reportViolation(), DRC_TEST_PROVIDER_VIA_DIAMETER::Run(), DRC_TEST_PROVIDER_TRACK_WIDTH::Run(), DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_HOLE_SIZE::Run(), DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTIVITY::Run(), DRC_TEST_PROVIDER_SILK_TO_MASK::Run(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::Run(), DRC_TEST_PROVIDER_MISC::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::Run(), DRC_TEST_PROVIDER_LVS::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), Run(), DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal(), DRC_TEST_PROVIDER::SetDRCEngine(), DRC_TEST_PROVIDER_EDGE_CLEARANCE::testAgainstEdge(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testCourtyardClearances(), DRC_TEST_PROVIDER_MISC::testDisabledLayers(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testFootprintCourtyardDefinitions(), DRC_TEST_PROVIDER_LVS::testFootprints(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::testHoleAgainstHole(), testItemAgainstZones(), testPadAgainstItem(), DRC_TEST_PROVIDER_MISC::testTextVars(), testTrackAgainstItem(), testZonesToZones(), and DRC_TEST_PROVIDER::userUnits().

◆ m_drcEpsilon

int DRC_TEST_PROVIDER_COPPER_CLEARANCE::m_drcEpsilon
private

◆ m_enabled

bool DRC_TEST_PROVIDER::m_enabled = true
protectedinherited

Definition at line 134 of file drc_test_provider.h.

Referenced by DRC_TEST_PROVIDER::Enable(), and DRC_TEST_PROVIDER::IsEnabled().

◆ m_isRuleDriven

◆ m_largestClearance

◆ m_stats

std::unordered_map<const DRC_RULE*, int> DRC_TEST_PROVIDER::m_stats
protectedinherited

◆ m_zones

std::vector<ZONE*> DRC_TEST_PROVIDER_COPPER_CLEARANCE::m_zones
private

◆ s_allBasicItems

std::vector< KICAD_T > DRC_TEST_PROVIDER::s_allBasicItems
staticprotectedinherited

◆ s_allBasicItemsButZones

std::vector< KICAD_T > DRC_TEST_PROVIDER::s_allBasicItemsButZones
staticprotectedinherited

The documentation for this class was generated from the following file: