62 virtual bool Run()
override;
64 virtual const wxString
GetName()
const override {
return wxT(
"solder_mask_issues" ); };
110 ZONE* zone =
static_cast<ZONE*
>( aItem );
160 text->TransformTextToPolySet( *solderMask->
GetFill( layer ),
188 const size_t progressDelta = 500;
246 const size_t progressDelta = 250;
277 item,
nullptr, maskLayer );
278 int clearance = constraint.GetValue().Min();
290 std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_SILK_MASK_CLEARANCE );
294 wxString msg = formatMsg( _(
"(%s clearance %s; actual %s)" ),
295 constraint.GetName(),
299 drce->SetErrorMessage( drce->GetErrorText() + wxS(
" " ) + msg );
302 drce->SetItems( item );
303 drce->SetViolatingRule( constraint.GetParentRule() );
351 return maskLayers.count() > 0 && copperLayers.count() == 0;
385 auto& [cacheKey, cacheEntry] = *ii;
386 auto& [alreadyEncounteredItem, encounteredItemNet] = cacheEntry;
388 if( encounteredItemNet == aTestNet && aTestNet >= 0 )
400 if( alreadyEncounteredItem->Type() ==
PCB_PAD_T )
401 padA =
static_cast<PAD*
>( alreadyEncounteredItem );
404 padB =
static_cast<PAD*
>( aTestItem );
412 if( padToNetTieGroupMap.contains( padA->
GetNumber() ) )
417 if( padToNetTieGroupMap.contains( padB->
GetNumber() ) )
422 *aCollidingItem = alreadyEncounteredItem;
432 if( fp->AllowSolderMaskBridges() )
437 if( aTestNet < 0 && aMaskItem->Type() ==
PCB_PAD_T && fp->IsNetTie() )
439 std::map<wxString, int> padNumberToGroupIdxMap = fp->MapPadNumbersToNetTieGroups();
441 if( padNumberToGroupIdxMap[
static_cast<PAD*
>( aMaskItem )->GetNumber() ] >= 0 )
463 m_itemTree->QueryColliding( aItem, aRefLayer, aTargetLayer,
475 if( otherNet > 0 && otherNet == itemNet )
486 if( board->GetDesignSettings().m_AllowSoldermaskBridgesInFPs )
495 if(
pad && otherPad && (
pad->SameLogicalPadAs( otherPad )
496 ||
pad->SharesNetTieGroup( otherPad ) ) )
505 if(
static_cast<void*
>( a ) >
static_cast<void*
>( b ) )
512 if( it !=
m_checkedPairs.end() && it->second.test( aTargetLayer ) )
553 else if(
via && !
via->IsTented( aRefLayer ) )
558 else if( otherVia && !otherVia->IsTented( aRefLayer ) )
559 clearance += otherVia->GetSolderMaskExpansion();
566 if( aTargetLayer ==
F_Mask )
567 msg =
_(
"Front solder mask aperture bridges items with different nets" );
569 msg =
_(
"Rear solder mask aperture bridges items with different nets" );
580 drce->SetErrorMessage( msg );
581 drce->SetItems( aItem, colliding, other );
592 drce->SetErrorMessage( msg );
593 drce->SetItems( other, colliding, aItem );
602 drce->SetErrorMessage( msg );
603 drce->SetItems( aItem, other );
616 const BOX2I& aItemBBox,
631 if( zoneNet == connectedItem->
GetNetCode() && zoneNet > 0 )
635 BOX2I inflatedBBox( aItemBBox );
654 if( zoneTree && zoneTree->
QueryColliding( aItemBBox, itemShape.get(), aTargetLayer,
660 if( aMaskLayer ==
F_Mask )
661 msg =
_(
"Front solder mask aperture bridges items with different nets" );
663 msg =
_(
"Rear solder mask aperture bridges items with different nets" );
673 drce->SetErrorMessage( msg );
674 drce->SetItems( aItem, colliding, zone );
683 drce->SetErrorMessage( msg );
684 drce->SetItems( aItem, zone );
699 std::atomic<int> count = 0;
700 std::vector<BOARD_ITEM*> test_items;
705 test_items.push_back( item );
711 auto returns =
tp.parallelize_loop( test_items.size(), [&](
size_t a,
size_t b ) ->
bool
713 for( size_t i = a; i < b; ++i )
715 BOARD_ITEM* item = test_items[ i ];
717 if( m_drcEngine->IsErrorLimitExceeded( DRCE_SOLDERMASK_BRIDGE ) )
720 BOX2I itemBBox = item->GetBoundingBox();
722 if( item->IsOnLayer( F_Mask ) && !isNullAperture( item ) )
725 testItemAgainstItems( item, itemBBox, F_Mask, F_Mask );
728 testMaskItemAgainstZones( item, itemBBox, F_Mask, F_Cu );
730 else if( item->IsOnLayer( PADSTACK::ALL_LAYERS ) )
733 testItemAgainstItems( item, itemBBox, F_Cu, F_Mask );
736 if( item->IsOnLayer( B_Mask ) && !isNullAperture( item ) )
739 testItemAgainstItems( item, itemBBox, B_Mask, B_Mask );
742 testMaskItemAgainstZones( item, itemBBox, B_Mask, B_Cu );
744 else if( item->IsOnLayer( B_Cu ) )
747 testItemAgainstItems( item, itemBBox, B_Cu, B_Mask );
756 for(
size_t i = 0; i < returns.size(); ++i )
758 auto& ret = returns[ i ];
763 while( ret.wait_for( std::chrono::milliseconds( 100 ) ) == std::future_status::timeout )
765 reportProgress( count, test_items.size() );
776 REPORT_AUX( wxT(
"Solder mask violations ignored. Tests not run." ) );
787 for(
PAD*
pad : footprint->Pads() )
808 if( !
reportPhase(
_(
"Checking solder mask to silk clearance..." ) ) )
813 if( !
reportPhase(
_(
"Checking solder mask web integrity..." ) ) )
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
int m_SolderMaskToCopperClearance
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
virtual bool IsConnected() const
Returns information if the object is derived from BOARD_CONNECTED_ITEM.
virtual void TransformShapeToPolygon(SHAPE_POLY_SET &aBuffer, PCB_LAYER_ID aLayer, int aClearance, int aError, ERROR_LOC aErrorLoc, bool ignoreLineWidth=false) const
Convert the item shape to a closed polygon.
virtual bool IsOnLayer(PCB_LAYER_ID aLayer) const
Test to see if this object is on the given layer.
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
virtual const BOARD * GetBoard() const
Return the BOARD in which this BOARD_ITEM resides, or NULL if none.
FOOTPRINT * GetParentFootprint() const
virtual LSET GetLayerSet() const
Return a std::bitset of all layers on which the item physically resides.
Information pertinent to a Pcbnew printed circuit board.
ZONE * m_SolderMaskBridges
std::vector< ZONE * > m_DRCCopperZones
const FOOTPRINTS & Footprints() const
std::unordered_map< ZONE *, std::unique_ptr< DRC_RTREE > > m_CopperZoneRTreeCache
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
constexpr BOX2< Vec > & Inflate(coord_type dx, coord_type dy)
Inflates the rectangle horizontally by dx and vertically by dy.
constexpr bool Intersects(const BOX2< Vec > &aRect) const
bool IsErrorLimitExceeded(int error_code)
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
bool QueryWorstConstraint(DRC_CONSTRAINT_T aRuleId, DRC_CONSTRAINT &aConstraint)
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Implement an R-tree for fast spatial and layer indexing of connectable items.
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
virtual const wxString GetName() const override
void testMaskItemAgainstZones(BOARD_ITEM *item, const BOX2I &itemBBox, PCB_LAYER_ID refLayer, PCB_LAYER_ID targetLayer)
virtual ~DRC_TEST_PROVIDER_SOLDER_MASK()=default
bool checkMaskAperture(BOARD_ITEM *aMaskItem, BOARD_ITEM *aTestItem, PCB_LAYER_ID aTestLayer, int aTestNet, BOARD_ITEM **aCollidingItem)
std::unique_ptr< DRC_RTREE > m_itemTree
void addItemToRTrees(BOARD_ITEM *aItem)
std::unique_ptr< DRC_RTREE > m_fullSolderMaskRTree
void testSilkToMaskClearance()
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
std::unordered_map< PTR_PTR_CACHE_KEY, LSET > m_checkedPairs
bool checkItemMask(BOARD_ITEM *aMaskItem, int aTestNet)
std::mutex m_checkedPairsMutex
DRC_TEST_PROVIDER_SOLDER_MASK()
std::unordered_map< PTR_LAYER_CACHE_KEY, std::pair< BOARD_ITEM *, int > > m_maskApertureNetMap
void testItemAgainstItems(BOARD_ITEM *aItem, const BOX2I &aItemBBox, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer)
Represent a DRC "provider" which runs some DRC functions over a BOARD and spits out DRC_ITEM and posi...
static std::vector< KICAD_T > s_allBasicItemsButZones
virtual bool reportPhase(const wxString &aStageName)
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const VECTOR2I &aMarkerPos, int aMarkerLayer, DRC_CUSTOM_MARKER_HANDLER *aCustomHandler=nullptr)
int forEachGeometryItem(const std::vector< KICAD_T > &aTypes, const LSET &aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
static std::vector< KICAD_T > s_allBasicItems
bool isInvisibleText(const BOARD_ITEM *aItem) const
virtual bool reportProgress(size_t aCount, size_t aSize, size_t aDelta=1)
virtual const BOX2I GetBoundingBox() const
Return the orthogonal bounding box of this object for display purposes.
KICAD_T Type() const
Returns the type of object.
LSET is a set of PCB_LAYER_IDs.
static LSET AllCuMask()
return AllCuMask( MAX_CU_LAYERS );
static constexpr PCB_LAYER_ID ALL_LAYERS
! Temporary layer identifier to identify code that is not padstack-aware
const wxString & GetNumber() const
bool SameLogicalPadAs(const PAD *aOther) const
Before we had custom pad shapes it was common to have multiple overlapping pads to represent a more c...
int GetSolderMaskExpansion(PCB_LAYER_ID aLayer) const
bool SharesNetTieGroup(const PAD *aOther) const
int GetSolderMaskExpansion() const
void RemoveAllContours()
Remove all outlines & holes (clears) the polygon set.
void BooleanAdd(const SHAPE_POLY_SET &b)
Perform boolean polyset union.
void Simplify()
Simplify the polyset (merges overlapping polys, eliminates degeneracy/self-intersections)
void Deflate(int aAmount, CORNER_STRATEGY aCornerStrategy, int aMaxError)
Handle a list of polygons defining a copper zone.
const std::shared_ptr< SHAPE_POLY_SET > & GetFilledPolysList(PCB_LAYER_ID aLayer) const
void CacheTriangulation(PCB_LAYER_ID aLayer=UNDEFINED_LAYER)
Create a list of triangles that "fill" the solid areas used for instance to draw these solid areas on...
const BOX2I GetBoundingBox() const override
void SetFillFlag(PCB_LAYER_ID aLayer, bool aFlag)
SHAPE_POLY_SET * GetFill(PCB_LAYER_ID aLayer)
void SetIsFilled(bool isFilled)
virtual bool IsOnLayer(PCB_LAYER_ID) const override
Test to see if this object is on the given layer.
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
@ DRCE_SILK_MASK_CLEARANCE
@ SILK_CLEARANCE_CONSTRAINT
bool isMaskAperture(BOARD_ITEM *aItem)
bool isNullAperture(BOARD_ITEM *aItem)
bool IsFrontLayer(PCB_LAYER_ID aLayerId)
Layer classification: check if it's a front layer.
PCB_LAYER_ID
A quick note on layer IDs:
static DRC_REGISTER_TEST_PROVIDER< DRC_TEST_PROVIDER_ANNULAR_WIDTH > dummy
@ NPTH
like PAD_PTH, but not plated mechanical use only, no connection allowed
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
BS::thread_pool thread_pool
@ PCB_SHAPE_T
class PCB_SHAPE, a segment not on copper layers
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
@ PCB_ZONE_T
class ZONE, a copper pour area
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
@ PCB_FIELD_T
class PCB_FIELD, text associated with a footprint property
@ PCB_PAD_T
class PAD, a pad in a footprint