KiCad PCB EDA Suite
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drc_test_provider_annular_width.cpp
Go to the documentation of this file.
1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you may find one here:
18 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19 * or you may search the http://www.gnu.org website for the version 2 license,
20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
24#include <common.h>
25#include <pcb_track.h>
26#include <pad.h>
27#include <footprint.h>
28#include <drc/drc_engine.h>
29#include <drc/drc_item.h>
31#include <macros.h>
34
35/*
36 Via/pad annular ring width test. Checks if there's sufficient copper ring around
37 PTH/NPTH holes (vias/pads)
38 Errors generated:
39 - DRCE_ANNULAR_WIDTH
40
41 Todo:
42 - check pad holes too.
43*/
44
45
47{
48public:
51
53
54 virtual bool Run() override;
55
56 virtual const wxString GetName() const override { return wxT( "annular_width" ); };
57};
58
59
61{
62 if( m_drcEngine->IsErrorLimitExceeded( DRCE_ANNULAR_WIDTH ) )
63 {
64 REPORT_AUX( wxT( "Annular width violations ignored. Skipping check." ) );
65 return true; // continue with other tests
66 }
67
68 const int progressDelta = 500;
69
70 if( !m_drcEngine->HasRulesForConstraintType( ANNULAR_WIDTH_CONSTRAINT ) )
71 {
72 REPORT_AUX( wxT( "No annular width constraints found. Tests not run." ) );
73 return true; // continue with other tests
74 }
75
76 if( !reportPhase( _( "Checking pad & via annular rings..." ) ) )
77 return false; // DRC cancelled
78
79 auto calcEffort =
80 []( BOARD_ITEM* item ) -> size_t
81 {
82 switch( item->Type() )
83 {
84 case PCB_VIA_T:
85 return 1;
86
87 case PCB_PAD_T:
88 {
89 PAD* pad = static_cast<PAD*>( item );
90
91 if( !pad->HasHole() || pad->GetAttribute() != PAD_ATTRIB::PTH )
92 return 0;
93
94 size_t effort = 0;
95
96 pad->Padstack().ForEachUniqueLayer(
97 [&pad, &effort]( PCB_LAYER_ID aLayer )
98 {
99 if( pad->GetOffset( aLayer ) == VECTOR2I( 0, 0 ) )
100 {
101 switch( pad->GetShape( aLayer ) )
102 {
104 if( pad->GetChamferRectRatio( aLayer ) > 0.30 )
105 break;
106
108
110 case PAD_SHAPE::OVAL:
113 effort += 1;
114 break;
115
116 default:
117 break;
118 }
119 }
120
121 effort += 5;
122 } );
123
124 return effort;
125 }
126
127 default:
128 return 0;
129 }
130 };
131
132 auto getPadAnnulusPts =
133 []( PAD* pad, PCB_LAYER_ID aLayer, DRC_CONSTRAINT& constraint,
134 const std::vector<const PAD*>& sameNumPads, VECTOR2I* ptA, VECTOR2I* ptB )
135 {
136 bool handled = false;
137
138 if( pad->GetOffset( aLayer ) == VECTOR2I( 0, 0 ) )
139 {
140 int xDist = KiROUND( ( pad->GetSizeX() - pad->GetDrillSizeX() ) / 2.0 );
141 int yDist = KiROUND( ( pad->GetSizeY() - pad->GetDrillSizeY() ) / 2.0 );
142
143 if( yDist < xDist )
144 {
145 *ptA = pad->GetPosition() - VECTOR2I( 0, pad->GetDrillSizeY() / 2 );
146 *ptB = pad->GetPosition() - VECTOR2I( 0, pad->GetSizeY() / 2 );
147 }
148 else
149 {
150 *ptA = pad->GetPosition() - VECTOR2I( pad->GetDrillSizeX() / 2, 0 );
151 *ptB = pad->GetPosition() - VECTOR2I( pad->GetSizeX() / 2, 0 );
152 }
153
154 RotatePoint( *ptA, pad->GetPosition(), pad->GetOrientation() );
155 RotatePoint( *ptB, pad->GetPosition(), pad->GetOrientation() );
156
157 switch( pad->GetShape( aLayer ) )
158 {
160 handled = pad->GetChamferRectRatio( aLayer ) <= 0.30;
161 break;
162
164 case PAD_SHAPE::OVAL:
167 handled = true;
168
169 break;
170
171 default:
172 break;
173 }
174 }
175
176 if( !handled || !sameNumPads.empty() )
177 {
178 // Slow (but general purpose) method.
179 SHAPE_POLY_SET padOutline;
180 std::shared_ptr<SHAPE_SEGMENT> slot = pad->GetEffectiveHoleShape();
181
182 pad->TransformShapeToPolygon( padOutline, aLayer, 0, pad->GetMaxError(), ERROR_INSIDE );
183
184 if( sameNumPads.empty() )
185 {
186 if( !padOutline.Collide( pad->GetPosition() ) )
187 {
188 // Hole outside pad
189 *ptA = pad->GetPosition();
190 *ptB = pad->GetPosition();
191 }
192 else
193 {
194 padOutline.NearestPoints( slot.get(), *ptA, *ptB );
195 }
196 }
197 else if( constraint.Value().HasMin() )
198 {
199 SHAPE_POLY_SET aggregatePadOutline = padOutline;
200 SHAPE_POLY_SET otherPadHoles;
201 SHAPE_POLY_SET slotPolygon;
202
203 slot->TransformToPolygon( slotPolygon, 0, ERROR_INSIDE );
204
205 for( const PAD* sameNumPad : sameNumPads )
206 {
207 // Construct the full pad with outline and hole.
208 sameNumPad->TransformShapeToPolygon( aggregatePadOutline, aLayer, 0,
209 pad->GetMaxError(), ERROR_OUTSIDE );
210
211 sameNumPad->TransformHoleToPolygon( otherPadHoles, 0, pad->GetMaxError(),
212 ERROR_INSIDE );
213 }
214
215 aggregatePadOutline.BooleanSubtract( otherPadHoles );
216
217 if( !aggregatePadOutline.Collide( pad->GetPosition() ) )
218 {
219 // Hole outside pad
220 *ptA = pad->GetPosition();
221 *ptB = pad->GetPosition();
222 }
223 else
224 {
225 aggregatePadOutline.NearestPoints( slot.get(), *ptA, *ptB );
226 }
227 }
228 }
229 };
230
231 auto checkConstraint =
232 [&]( DRC_CONSTRAINT& constraint, BOARD_ITEM* item, const VECTOR2I& ptA, const VECTOR2I& ptB,
233 PCB_LAYER_ID aLayer )
234 {
235 if( constraint.GetSeverity() == RPT_SEVERITY_IGNORE )
236 return;
237
238 int v_min = 0;
239 int v_max = 0;
240 bool fail_min = false;
241 bool fail_max = false;
242 int width = ( ptA - ptB ).EuclideanNorm();
243
244 if( constraint.Value().HasMin() )
245 {
246 v_min = constraint.Value().Min();
247 fail_min = width < v_min;
248 }
249
250 if( constraint.Value().HasMax() )
251 {
252 v_max = constraint.Value().Max();
253 fail_max = width > v_max;
254 }
255
256 if( fail_min || fail_max )
257 {
258 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_ANNULAR_WIDTH );
259 wxString msg;
260
261 if( fail_min )
262 {
263 msg = formatMsg( _( "(%s min annular width %s; actual %s)" ),
264 constraint.GetName(),
265 v_min,
266 width );
267 }
268
269 if( fail_max )
270 {
271 msg = formatMsg( _( "(%s max annular width %s; actual %s)" ),
272 constraint.GetName(),
273 v_max,
274 width );
275 }
276
277 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
278 drcItem->SetItems( item );
279 drcItem->SetViolatingRule( constraint.GetParentRule() );
280 reportTwoPointGeometry( drcItem, item->GetPosition(), ptA, ptB, aLayer );
281 }
282 };
283
284 auto checkAnnularWidth =
285 [&]( BOARD_ITEM* item ) -> bool
286 {
287 if( m_drcEngine->IsErrorLimitExceeded( DRCE_ANNULAR_WIDTH ) )
288 return false;
289
290 if( item->Type() == PCB_VIA_T )
291 {
292 PCB_VIA* via = static_cast<PCB_VIA*>( item );
293
294 via->Padstack().ForEachUniqueLayer(
295 [&]( PCB_LAYER_ID aLayer )
296 {
297 auto constraint = m_drcEngine->EvalRules( ANNULAR_WIDTH_CONSTRAINT, item,
298 nullptr, aLayer );
299
300 VECTOR2I ptA = via->GetPosition() - VECTOR2I( via->GetDrillValue() / 2, 0 );
301 VECTOR2I ptB = via->GetPosition() - VECTOR2I( via->GetWidth( aLayer ) / 2, 0 );
302 checkConstraint( constraint, via, ptA, ptB, aLayer );
303 } );
304 }
305 else if( item->Type() == PCB_PAD_T )
306 {
307 PAD* pad = static_cast<PAD*>( item );
308
309 if( !pad->HasHole() || pad->GetAttribute() != PAD_ATTRIB::PTH )
310 return true;
311
312 std::vector<const PAD*> sameNumPads;
313
314 if( const FOOTPRINT* fp = static_cast<const FOOTPRINT*>( pad->GetParent() ) )
315 sameNumPads = fp->GetPads( pad->GetNumber(), pad );
316
317 pad->Padstack().ForEachUniqueLayer(
318 [&]( PCB_LAYER_ID aLayer )
319 {
320 auto constraint = m_drcEngine->EvalRules( ANNULAR_WIDTH_CONSTRAINT, item,
321 nullptr, aLayer );
322
323 VECTOR2I ptA;
324 VECTOR2I ptB;
325 getPadAnnulusPts( pad, aLayer, constraint, sameNumPads, &ptA, &ptB );
326 checkConstraint( constraint, pad, ptA, ptB, aLayer );
327 } );
328 }
329
330 return true;
331 };
332
333 BOARD* board = m_drcEngine->GetBoard();
334 size_t ii = 0;
335 size_t total = 0;
336
337 for( PCB_TRACK* item : board->Tracks() )
338 total += calcEffort( item );
339
340 for( FOOTPRINT* footprint : board->Footprints() )
341 {
342 for( PAD* pad : footprint->Pads() )
343 total += calcEffort( pad );
344 }
345
346 for( PCB_TRACK* item : board->Tracks() )
347 {
348 ii += calcEffort( item );
349
350 if( !reportProgress( ii, total, progressDelta ) )
351 return false; // DRC cancelled
352
353 if( !checkAnnularWidth( item ) )
354 break;
355 }
356
357 for( FOOTPRINT* footprint : board->Footprints() )
358 {
359 for( PAD* pad : footprint->Pads() )
360 {
361 ii += calcEffort( pad );
362
363 if( !reportProgress( ii, total, progressDelta ) )
364 return false; // DRC cancelled
365
366 if( !checkAnnularWidth( pad ) )
367 break;
368 }
369 }
370
371 return !m_drcEngine->IsCancelled();
372}
373
374
375namespace detail
376{
378}
@ ERROR_OUTSIDE
@ ERROR_INSIDE
constexpr BOX2I KiROUND(const BOX2D &aBoxD)
Definition box2.h:990
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition board_item.h:79
Information pertinent to a Pcbnew printed circuit board.
Definition board.h:322
const FOOTPRINTS & Footprints() const
Definition board.h:363
const TRACKS & Tracks() const
Definition board.h:361
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition drc_item.cpp:381
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
virtual ~DRC_TEST_PROVIDER_ANNULAR_WIDTH()=default
virtual const wxString GetName() const override
virtual bool reportPhase(const wxString &aStageName)
void reportTwoPointGeometry(std::shared_ptr< DRC_ITEM > &aDrcItem, const VECTOR2I &aMarkerPos, const VECTOR2I &ptA, const VECTOR2I &ptB, PCB_LAYER_ID aLayer)
wxString formatMsg(const wxString &aFormatString, const wxString &aSource, double aConstraint, double aActual, EDA_DATA_TYPE aDataType=EDA_DATA_TYPE::DISTANCE)
virtual bool reportProgress(size_t aCount, size_t aSize, size_t aDelta=1)
Definition pad.h:54
Represent a set of closed polygons.
bool Collide(const SHAPE *aShape, int aClearance=0, int *aActual=nullptr, VECTOR2I *aLocation=nullptr) const override
Check if the boundary of shape (this) lies closer to the shape aShape than aClearance,...
void BooleanSubtract(const SHAPE_POLY_SET &b)
Perform boolean polyset difference.
bool NearestPoints(const SHAPE *aOther, VECTOR2I &aPtThis, VECTOR2I &aPtOther) const
Return the two points that mark the closest distance between this shape and aOther.
The common library.
@ DRCE_ANNULAR_WIDTH
Definition drc_item.h:58
@ ANNULAR_WIDTH_CONSTRAINT
Definition drc_rule.h:61
#define REPORT_AUX(s)
#define _(s)
PCB_LAYER_ID
A quick note on layer IDs:
Definition layer_ids.h:60
This file contains miscellaneous commonly used macros and functions.
#define KI_FALLTHROUGH
The KI_FALLTHROUGH macro is to be used when switch statement cases should purposely fallthrough from ...
Definition macros.h:83
static DRC_REGISTER_TEST_PROVIDER< DRC_TEST_PROVIDER_ANNULAR_WIDTH > dummy
@ PTH
Plated through hole pad.
Definition padstack.h:82
@ CHAMFERED_RECT
Definition padstack.h:60
@ ROUNDRECT
Definition padstack.h:57
@ RECTANGLE
Definition padstack.h:54
@ RPT_SEVERITY_IGNORE
void RotatePoint(int *pX, int *pY, const EDA_ANGLE &aAngle)
Calculate the new point of coord coord pX, pY, for a rotation center 0, 0.
Definition trigo.cpp:229
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition typeinfo.h:97
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition typeinfo.h:87
VECTOR2< int32_t > VECTOR2I
Definition vector2d.h:695