48#define ERROR_LIMIT 199
49#define EXTENDED_ERROR_LIMIT 499
56 if( wxGetEnv( wxT(
"DRC_DEBUG" ), &valueStr ) )
58 int setLevel = wxAtoi( valueStr );
60 if( level <= setLevel )
61 printf(
"%-30s:%d | %s\n", function, line, (
const char *) msg.c_str() );
68 m_designSettings ( aSettings ),
70 m_drawingSheet( nullptr ),
71 m_schematicNetlist( nullptr ),
72 m_rulesValid( false ),
73 m_reportAllTrackErrors( false ),
74 m_testFootprints( false ),
75 m_reporter( nullptr ),
76 m_progressReporter( nullptr )
104 const ZONE* zone =
static_cast<const ZONE*
>( aItem );
130 std::shared_ptr<DRC_RULE> rule = std::make_shared<DRC_RULE>();
133 rule->m_Implicit =
true;
143 ReportAux( wxString::Format( wxT(
"Building implicit rules (per-item/class overrides, etc...)" ) ) );
153 rule->AddConstraint( widthConstraint );
157 rule->AddConstraint( connectionConstraint );
161 rule->AddConstraint( drillConstraint );
165 rule->AddConstraint( annulusConstraint );
169 rule->AddConstraint( diameterConstraint );
173 rule->AddConstraint( holeToHoleConstraint );
178 rule->AddConstraint( thermalSpokeCountConstraint );
184 rule->AddConstraint( silkClearanceConstraint );
190 rule->AddConstraint( silkTextHeightConstraint );
196 rule->AddConstraint( silkTextThicknessConstraint );
201 rule->AddConstraint( holeClearanceConstraint );
206 rule->AddConstraint( edgeClearanceConstraint );
211 rule->AddConstraint( courtyardClearanceConstraint );
215 std::shared_ptr<DRC_RULE> uViaRule =
createImplicitRule(
_(
"board setup micro-via constraints" ) );
221 uViaRule->AddConstraint( uViaDrillConstraint );
225 uViaRule->AddConstraint( uViaDiameterConstraint );
229 std::vector<std::shared_ptr<DRC_RULE>> netclassClearanceRules;
230 std::vector<std::shared_ptr<DRC_RULE>> netclassItemSpecificRules;
232 auto makeNetclassRules =
233 [&](
const std::shared_ptr<NETCLASS>& nc,
bool isDefault )
235 wxString ncName = nc->GetVariableSubstitutionName();
236 wxString friendlyName = nc->GetName();
239 ncName.Replace(
"'",
"\\'" );
241 if( nc->HasClearance())
243 std::shared_ptr<DRC_RULE> netclassRule = std::make_shared<DRC_RULE>();
244 netclassRule->m_Name = wxString::Format(
_(
"netclass '%s'" ),
245 nc->GetClearanceParent()->GetName() );
246 netclassRule->m_Implicit =
true;
248 expr = wxString::Format( wxT(
"A.NetClass == '%s'" ), ncName );
250 netclassClearanceRules.push_back( netclassRule );
254 netclassRule->AddConstraint( constraint );
257 if( nc->HasTrackWidth() )
259 std::shared_ptr<DRC_RULE> netclassRule = std::make_shared<DRC_RULE>();
260 netclassRule->m_Name = wxString::Format(
_(
"netclass '%s'" ),
261 nc->GetTrackWidthParent()->GetName() );
262 netclassRule->m_Implicit =
true;
264 expr = wxString::Format( wxT(
"A.NetClass == '%s'" ), ncName );
266 netclassClearanceRules.push_back( netclassRule );
271 netclassRule->AddConstraint( constraint );
274 if( nc->HasDiffPairWidth() )
276 std::shared_ptr<DRC_RULE> netclassRule = std::make_shared<DRC_RULE>();
277 netclassRule->m_Name = wxString::Format(
_(
"netclass '%s' (diff pair)" ),
278 nc->GetDiffPairWidthParent()->GetName() );
279 netclassRule->m_Implicit =
true;
281 expr = wxString::Format( wxT(
"A.NetClass == '%s' && A.inDiffPair('*')" ),
284 netclassItemSpecificRules.push_back( netclassRule );
288 constraint.
Value().
SetOpt( nc->GetDiffPairWidth() );
289 netclassRule->AddConstraint( constraint );
292 if( nc->HasDiffPairGap() )
294 std::shared_ptr<DRC_RULE> netclassRule = std::make_shared<DRC_RULE>();
295 netclassRule->m_Name = wxString::Format(
_(
"netclass '%s' (diff pair)" ),
296 nc->GetDiffPairGapParent()->GetName() );
297 netclassRule->m_Implicit =
true;
299 expr = wxString::Format( wxT(
"A.NetClass == '%s'" ), ncName );
301 netclassItemSpecificRules.push_back( netclassRule );
306 netclassRule->AddConstraint( constraint );
309 if( nc->GetDiffPairGap() < nc->GetClearance() )
311 netclassRule = std::make_shared<DRC_RULE>();
312 netclassRule->m_Name = wxString::Format(
_(
"netclass '%s' (diff pair)" ),
313 nc->GetDiffPairGapParent()->GetName() );
314 netclassRule->m_Implicit =
true;
316 expr = wxString::Format( wxT(
"A.NetClass == '%s' && AB.isCoupledDiffPair()" ),
319 netclassItemSpecificRules.push_back( netclassRule );
322 min_clearanceConstraint.
Value().
SetMin( nc->GetDiffPairGap() );
323 netclassRule->AddConstraint( min_clearanceConstraint );
327 if( nc->HasViaDiameter() )
329 std::shared_ptr<DRC_RULE> netclassRule = std::make_shared<DRC_RULE>();
330 netclassRule->m_Name = wxString::Format(
_(
"netclass '%s'" ),
331 nc->GetViaDiameterParent()->GetName() );
332 netclassRule->m_Implicit =
true;
334 expr = wxString::Format( wxT(
"A.NetClass == '%s' && A.Via_Type != 'Micro'" ),
337 netclassItemSpecificRules.push_back( netclassRule );
342 netclassRule->AddConstraint( constraint );
345 if( nc->HasViaDrill() )
347 std::shared_ptr<DRC_RULE> netclassRule = std::make_shared<DRC_RULE>();
348 netclassRule->m_Name = wxString::Format(
_(
"netclass '%s'" ),
349 nc->GetViaDrillParent()->GetName() );
350 netclassRule->m_Implicit =
true;
352 expr = wxString::Format( wxT(
"A.NetClass == '%s' && A.Via_Type != 'Micro'" ),
355 netclassItemSpecificRules.push_back( netclassRule );
360 netclassRule->AddConstraint( constraint );
363 if( nc->HasuViaDiameter() )
365 std::shared_ptr<DRC_RULE> netclassRule = std::make_shared<DRC_RULE>();
366 netclassRule->m_Name = wxString::Format(
_(
"netclass '%s' (uvia)" ),
367 nc->GetuViaDiameterParent()->GetName() );
368 netclassRule->m_Implicit =
true;
370 expr = wxString::Format( wxT(
"A.NetClass == '%s' && A.Via_Type == 'Micro'" ),
373 netclassItemSpecificRules.push_back( netclassRule );
377 constraint.
Value().
SetMin( nc->GetuViaDiameter() );
378 netclassRule->AddConstraint( constraint );
381 if( nc->HasuViaDrill() )
383 std::shared_ptr<DRC_RULE> netclassRule = std::make_shared<DRC_RULE>();
384 netclassRule->m_Name = wxString::Format(
_(
"netclass '%s' (uvia)" ),
385 nc->GetuViaDrillParent()->GetName() );
386 netclassRule->m_Implicit =
true;
388 expr = wxString::Format( wxT(
"A.NetClass == '%s' && A.Via_Type == 'Micro'" ),
391 netclassItemSpecificRules.push_back( netclassRule );
396 netclassRule->AddConstraint( constraint );
401 makeNetclassRules( bds.
m_NetSettings->GetDefaultNetclass(),
true );
404 makeNetclassRules( netclass,
false );
406 for(
const auto& [
name, netclass] : bds.
m_NetSettings->GetCompositeNetclasses() )
407 makeNetclassRules( netclass,
false );
414 std::sort( netclassClearanceRules.begin(), netclassClearanceRules.end(),
415 [](
const std::shared_ptr<DRC_RULE>& lhs,
const std::shared_ptr<DRC_RULE>& rhs )
417 return lhs->m_Constraints[0].m_Value.Min()
418 < rhs->m_Constraints[0].m_Value.Min();
421 for( std::shared_ptr<DRC_RULE>& ncRule : netclassClearanceRules )
424 for( std::shared_ptr<DRC_RULE>& ncRule : netclassItemSpecificRules )
429 std::vector<ZONE*> keepoutZones;
434 keepoutZones.push_back( zone );
439 for(
ZONE* zone : footprint->Zones() )
442 keepoutZones.push_back( zone );
446 for(
ZONE* zone : keepoutZones )
448 wxString
name = zone->GetZoneName();
455 rule->m_ImplicitItemId = zone->m_Uuid;
457 rule->m_Condition =
new DRC_RULE_CONDITION( wxString::Format( wxT(
"A.intersectsArea('%s')" ),
458 zone->m_Uuid.AsString() ) );
460 rule->m_LayerCondition = zone->GetLayerSet();
462 int disallowFlags = 0;
464 if( zone->GetDoNotAllowTracks() )
467 if( zone->GetDoNotAllowVias() )
470 if( zone->GetDoNotAllowPads() )
473 if( zone->GetDoNotAllowCopperPour() )
476 if( zone->GetDoNotAllowFootprints() )
481 rule->AddConstraint( disallowConstraint );
484 ReportAux( wxString::Format( wxT(
"Building %d implicit netclass rules" ),
485 (
int) netclassClearanceRules.size() ) );
491 if( aPath.FileExists() )
493 std::vector<std::shared_ptr<DRC_RULE>> rules;
495 FILE* fp = wxFopen( aPath.GetFullPath(), wxT(
"rt" ) );
506 for( std::shared_ptr<DRC_RULE>& rule : rules )
514 ReportAux( wxString::Format( wxT(
"Compiling Rules (%d rules): " ), (
int)
m_rules.size() ) );
516 for( std::shared_ptr<DRC_RULE>& rule :
m_rules )
520 if( rule->m_Condition && !rule->m_Condition->GetExpression().IsEmpty() )
522 condition = rule->m_Condition;
533 engineConstraint->
layerTest = rule->m_LayerCondition;
549 ReportAux( wxString::Format( wxT(
"Create DRC provider: '%s'" ), provider->GetName() ) );
550 provider->SetDRCEngine(
this );
583 wxFAIL_MSG( wxT(
"Compiling implicit rules failed." ) );
586 throw original_parse_error;
620 if( !cacheGenerator.
Run() )
627 ReportAux( wxString::Format( wxT(
"Run DRC provider: '%s'" ), provider->GetName() ) );
629 if( !provider->RunTests( aUnits ) )
639#define REPORT( s ) { if( aReporter ) { aReporter->Report( s ); } }
647 REPORT( wxString::Format(
_(
"Resolved zone connection type: %s." ),
655 pad =
static_cast<const PAD*
>( a );
657 pad =
static_cast<const PAD*
>( b );
659 if(
pad &&
pad->GetAttribute() == PAD_ATTRIB::PTH )
665 REPORT( wxString::Format(
_(
"Pad is not a through hole pad; connection will be: %s." ),
693 const ZONE* zone =
nullptr;
694 const FOOTPRINT* parentFootprint =
nullptr;
701 pad =
static_cast<const PAD*
>( a );
703 zone =
static_cast<const ZONE*
>( a );
706 pad =
static_cast<const PAD*
>( b );
708 zone =
static_cast<const ZONE*
>( b );
711 parentFootprint =
pad->GetParentFootprint();
715 constraint.
m_Type = aConstraintType;
717 auto applyConstraint =
720 if( c->constraint.m_Value.HasMin() )
723 if( c->constraint.m_Value.HasOpt() )
726 if( c->constraint.m_Value.HasMax() )
727 constraint .m_Value.SetMax( c->constraint.m_Value.Max() );
742 int override_val = 0;
743 std::optional<int> overrideA;
744 std::optional<int> overrideB;
746 if( ac && !b_is_non_copper )
749 if( bc && !a_is_non_copper )
752 if( overrideA.has_value() || overrideB.has_value() )
756 if( overrideA.has_value() )
759 REPORT( wxString::Format(
_(
"Local override on %s; clearance: %s." ),
766 if( overrideB.has_value() )
769 REPORT( wxString::Format(
_(
"Local override on %s; clearance: %s." ),
773 if( overrideB > override_val )
781 if( override_val < m_designSettings->m_MinClearance )
784 msg =
_(
"board minimum" );
787 REPORT( wxString::Format(
_(
"Board minimum clearance: %s." ),
793 if( override_val < m_designSettings->m_HoleClearance )
796 msg =
_(
"board minimum hole" );
799 REPORT( wxString::Format(
_(
"Board minimum hole clearance: %s." ),
812 if(
pad &&
pad->GetLocalZoneConnection() != ZONE_CONNECTION::INHERITED )
818 REPORT( wxString::Format(
_(
"Local override on %s; zone connection: %s." ),
829 if(
pad &&
pad->GetLocalThermalGapOverride(
nullptr ) > 0 )
832 int gap_override =
pad->GetLocalThermalGapOverride( &msg );
835 REPORT( wxString::Format(
_(
"Local override on %s; thermal relief gap: %s." ),
846 if(
pad &&
pad->GetLocalSpokeWidthOverride(
nullptr ) > 0 )
849 int spoke_override =
pad->GetLocalSpokeWidthOverride( &msg );
852 REPORT( wxString::Format(
_(
"Local override on %s; thermal spoke width: %s." ),
861 REPORT( wxString::Format(
_(
"%s min thickness: %s." ),
875 REPORT( wxString::Format(
_(
"Checking assertion \"%s\"." ),
876 EscapeHTML( c->constraint.m_Test->GetExpression() ) ) )
878 if( c->constraint.m_Test->EvaluateFor( a, b, c->constraint.m_Type, aLayer,
881 REPORT(
_(
"Assertion passed." ) )
889 auto processConstraint =
892 bool implicit = c->parentRule && c->parentRule->m_Implicit;
896 switch( c->constraint.m_Type )
905 REPORT( wxString::Format(
_(
"Checking %s clearance: %s." ),
911 REPORT( wxString::Format(
_(
"Checking %s max uncoupled length: %s." ),
917 REPORT( wxString::Format(
_(
"Checking %s max skew: %s." ),
923 REPORT( wxString::Format(
_(
"Checking %s gap: %s." ),
929 REPORT( wxString::Format(
_(
"Checking %s thermal spoke width: %s." ),
935 REPORT( wxString::Format(
_(
"Checking %s min spoke count: %s." ),
938 c->constraint.m_Value.Min() ) ) )
942 REPORT( wxString::Format(
_(
"Checking %s zone connection: %s." ),
960 wxString min = wxT(
"<i>" ) +
_(
"undefined" ) + wxT(
"</i>" );
961 wxString opt = wxT(
"<i>" ) +
_(
"undefined" ) + wxT(
"</i>" );
962 wxString max = wxT(
"<i>" ) +
_(
"undefined" ) + wxT(
"</i>" );
969 switch( c->constraint.m_Type )
972 if( c->constraint.m_Value.HasOpt() )
974 REPORT( wxString::Format(
_(
"Checking %s track width: opt %s." ),
978 else if( c->constraint.m_Value.HasMin() )
980 REPORT( wxString::Format(
_(
"Checking %s track width: min %s." ),
988 REPORT( wxString::Format(
_(
"Checking %s annular width: min %s." ),
994 if( c->constraint.m_Value.HasOpt() )
996 REPORT( wxString::Format(
_(
"Checking %s via diameter: opt %s." ),
1000 else if( c->constraint.m_Value.HasMin() )
1002 REPORT( wxString::Format(
_(
"Checking %s via diameter: min %s." ),
1009 if( c->constraint.m_Value.HasOpt() )
1011 REPORT( wxString::Format(
_(
"Checking %s hole size: opt %s." ),
1015 else if( c->constraint.m_Value.HasMin() )
1017 REPORT( wxString::Format(
_(
"Checking %s hole size: min %s." ),
1027 REPORT( wxString::Format(
_(
"Checking %s: min %s." ),
1033 if( c->constraint.m_Value.HasOpt() )
1035 REPORT( wxString::Format(
_(
"Checking %s diff pair gap: opt %s." ),
1039 else if( c->constraint.m_Value.HasMin() )
1041 REPORT( wxString::Format(
_(
"Checking %s clearance: min %s." ),
1049 REPORT( wxString::Format(
_(
"Checking %s hole to hole: min %s." ),
1055 REPORT( wxString::Format(
_(
"Checking %s." ),
1061 if( c->constraint.m_Value.HasMin() )
1064 if( c->constraint.m_Value.HasOpt() )
1067 if( c->constraint.m_Value.HasMax() )
1070 REPORT( wxString::Format(
_(
"Checking %s: min %s; opt %s; max %s." ),
1081 REPORT( wxString::Format(
_(
"Checking %s." ),
1087 if( a_is_non_copper || b_is_non_copper )
1091 REPORT(
_(
"Netclass clearances apply only between copper items." ) )
1093 else if( a_is_non_copper )
1095 REPORT( wxString::Format(
_(
"%s contains no copper. Rule ignored." ),
1098 else if( b_is_non_copper )
1100 REPORT( wxString::Format(
_(
"%s contains no copper. Rule ignored." ),
1119 switch(
static_cast<const PCB_VIA*
>( a )->GetViaType() )
1142 if(
static_cast<const ZONE*
>( a )->IsTeardropArea() )
1150 default: mask = 0;
break;
1154 if( ( c->constraint.m_DisallowFlags & mask ) == 0 )
1157 REPORT(
_(
"Keepout constraint not met." ) )
1159 REPORT(
_(
"Disallow constraint not met." ) )
1177 if( !( c->layerTest & itemLayers ).any() )
1181 REPORT(
_(
"Keepout layer(s) not matched." ) )
1183 else if( c->parentRule )
1185 REPORT( wxString::Format(
_(
"Rule layer '%s' not matched; rule ignored." ),
1186 EscapeHTML( c->parentRule->m_LayerSource ) ) )
1190 REPORT(
_(
"Rule layer not matched; rule ignored." ) )
1202 REPORT(
_(
"Constraint layer not matched." ) )
1204 else if( c->parentRule )
1206 REPORT( wxString::Format(
_(
"Rule layer '%s' not matched; rule ignored." ),
1207 EscapeHTML( c->parentRule->m_LayerSource ) ) )
1211 REPORT(
_(
"Rule layer not matched; rule ignored." ) )
1218 REPORT( wxString::Format(
_(
"%s is not a drilled hole; rule ignored." ),
1221 else if( !c->condition || c->condition->GetExpression().IsEmpty() )
1227 REPORT(
_(
"Unconditional constraint applied." ) )
1231 REPORT(
_(
"Unconditional rule applied." ) )
1236 REPORT(
_(
"Unconditional rule applied; overrides previous constraints." ) )
1240 applyConstraint( c );
1250 REPORT( wxString::Format(
_(
"Checking rule condition \"%s\"." ),
1251 EscapeHTML( c->condition->GetExpression() ) ) )
1254 if( c->condition->EvaluateFor( a, b, c->constraint.m_Type, aLayer, aReporter ) )
1260 REPORT(
_(
"Constraint applied." ) )
1264 REPORT(
_(
"Rule applied." ) )
1269 REPORT(
_(
"Rule applied; overrides previous constraints." ) )
1273 applyConstraint( c );
1277 REPORT( implicit ?
_(
"Membership not satisfied; constraint ignored." )
1278 :
_(
"Condition not satisfied; rule ignored." ) )
1285 std::vector<DRC_ENGINE_CONSTRAINT*>* ruleset =
m_constraintMap[ aConstraintType ];
1287 for(
int ii = 0; ii < (int) ruleset->size(); ++ii )
1288 processConstraint( ruleset->at( ii ) );
1303 a = parentFootprint;
1305 b = parentFootprint;
1309 std::vector<DRC_ENGINE_CONSTRAINT*>* ruleset =
m_constraintMap[ aConstraintType ];
1311 for(
int ii = 0; ii < (int) ruleset->size(); ++ii )
1312 processConstraint( ruleset->at( ii ) );
1325 int clearance = global;
1326 bool needBlankLine =
true;
1335 needBlankLine =
false;
1338 REPORT( wxString::Format(
_(
"Local clearance on %s: %s." ),
1342 if( localA > clearance )
1359 needBlankLine =
false;
1362 REPORT( wxString::Format(
_(
"Local clearance on %s: %s." ),
1366 if( localB > clearance )
1376 if( !a_is_non_copper && !b_is_non_copper )
1381 needBlankLine =
false;
1384 REPORT( wxString::Format(
_(
"Board minimum clearance: %s." ),
1387 if( clearance < m_designSettings->m_MinClearance )
1390 constraint.
SetName(
_(
"board minimum" ) );
1400 REPORT( wxString::Format(
_(
"Board minimum clearance: %s." ),
1406 constraint.
SetName(
_(
"board minimum" ) );
1414 if(
pad && parentFootprint )
1418 if( local != ZONE_CONNECTION::INHERITED )
1421 REPORT( wxString::Format(
_(
"%s zone connection: %s." ),
1426 constraint.
SetName(
_(
"footprint" ) );
1437 REPORT( wxString::Format(
_(
"%s pad connection: %s." ),
1454 REPORT( wxString::Format(
_(
"%s thermal relief gap: %s." ),
1471 REPORT( wxString::Format(
_(
"%s thermal spoke width: %s." ),
1501 auto testAssertion =
1504 REPORT( wxString::Format(
_(
"Checking rule assertion \"%s\"." ),
1505 EscapeHTML( c->constraint.m_Test->GetExpression() ) ) )
1507 if( c->constraint.m_Test->EvaluateFor( a,
nullptr, c->constraint.m_Type,
1510 REPORT(
_(
"Assertion passed." ) )
1515 aFailureHandler( &c->constraint );
1519 auto processConstraint =
1523 REPORT( wxString::Format(
_(
"Checking %s." ), c->constraint.GetName() ) )
1527 REPORT( wxString::Format(
_(
"Rule layer '%s' not matched; rule ignored." ),
1528 EscapeHTML( c->parentRule->m_LayerSource ) ) )
1531 if( !c->condition || c->condition->GetExpression().IsEmpty() )
1533 REPORT(
_(
"Unconditional rule applied." ) )
1538 REPORT( wxString::Format(
_(
"Checking rule condition \"%s\"." ),
1539 EscapeHTML( c->condition->GetExpression() ) ) )
1541 if( c->condition->EvaluateFor( a,
nullptr, c->constraint.m_Type,
1544 REPORT(
_(
"Rule applied." ) )
1549 REPORT(
_(
"Condition not satisfied; rule ignored." ) )
1558 for(
int ii = 0; ii < (int) ruleset->size(); ++ii )
1559 processConstraint( ruleset->at( ii ) );
1569 assert( error_code >= 0 && error_code <=
DRCE_LAST );
1577 static std::mutex globalLock;
1583 std::lock_guard<std::mutex> guard( globalLock );
1589 wxString msg = wxString::Format( wxT(
"Test '%s': %s (code %d)" ),
1590 aItem->GetViolatingTest()->GetName(),
1591 aItem->GetErrorMessage(),
1592 aItem->GetErrorCode() );
1594 DRC_RULE* rule = aItem->GetViolatingRule();
1597 msg += wxString::Format( wxT(
", violating rule: '%s'" ), rule->
m_Name );
1601 wxString violatingItemsStr = wxT(
"Violating items: " );
1603 m_reporter->
Report( wxString::Format( wxT(
" |- violating position (%d, %d)" ),
1686 int current = c->constraint.GetValue().Min();
1688 if( current > worst )
1691 aConstraint = c->constraint;
1702 std::set<int> distinctMinimums;
1707 distinctMinimums.emplace( c->constraint.GetValue().Min() );
1710 return distinctMinimums;
1716 wxString& aBaseDpName )
1721 for(
auto it = aNetName.rbegin(); it != aNetName.rend() && rv == 0; ++it, ++count )
1725 if( ( ch >=
'0' && ch <=
'9' ) || ch ==
'_' )
1729 else if( ch ==
'+' )
1731 aComplementNet = wxT(
"-" );
1734 else if( ch ==
'-' )
1736 aComplementNet = wxT(
"+" );
1739 else if( ch ==
'N' )
1741 aComplementNet = wxT(
"P" );
1744 else if ( ch ==
'P' )
1746 aComplementNet = wxT(
"N" );
1755 if( rv != 0 && count >= 1 )
1757 aBaseDpName = aNetName.Left( aNetName.Length() - count );
1758 aComplementNet = wxString( aBaseDpName ) << aComplementNet << aNetName.Right( count - 1 );
1768 wxString
dummy, coupledNetName;
1804 if( parentFootprint && parentFootprint->
IsNetTie() )
1811 if( padToNetTieGroupMap[
pad->GetNumber() ] >= 0 && aTrackNetCode ==
pad->GetNetCode() )
1813 if(
pad->GetEffectiveShape( aTrackLayer )->Collide( aCollisionPos,
epsilon ) )
1827 if(
name == prov->GetName() )
constexpr EDA_IU_SCALE pcbIUScale
constexpr EDA_IU_SCALE unityScale
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
virtual std::optional< int > GetClearanceOverrides(wxString *aSource) const
Return any clearance overrides set in the "classic" (ie: pre-rule) system.
virtual std::optional< int > GetLocalClearance() const
Return any local clearances set in the "classic" (ie: pre-rule) system.
Container for design settings for a BOARD object.
std::shared_ptr< NET_SETTINGS > m_NetSettings
int m_CopperEdgeClearance
int m_MinSilkTextThickness
bool Ignore(int aDRCErrorCode)
Return true if the DRC error code's severity is SEVERITY_IGNORE.
int GetDRCEpsilon() const
int m_ViasMinAnnularWidth
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
virtual bool IsConnected() const
Returns information if the object is derived from BOARD_CONNECTED_ITEM.
FOOTPRINT * GetParentFootprint() const
virtual LSET GetLayerSet() const
Return a std::bitset of all layers on which the item physically resides.
virtual bool HasDrilledHole() const
virtual bool IsOnCopperLayer() const
Information pertinent to a Pcbnew printed circuit board.
LSET GetEnabledLayers() const
A proxy function that calls the corresponding function in m_BoardSettings.
NETINFO_ITEM * FindNet(int aNetcode) const
Search for a net with the given netcode.
const ZONES & Zones() const
void SynchronizeNetsAndNetClasses(bool aResetTrackAndViaSizes)
Copy NETCLASS info to each NET, based on NET membership in a NETCLASS.
void IncrementTimeStamp()
const FOOTPRINTS & Footprints() const
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
void SetParentRule(DRC_RULE *aParentRule)
MINOPTMAX< int > & Value()
ZONE_CONNECTION m_ZoneConnection
void SetName(const wxString &aName)
DRC_RULE * GetParentRule() const
std::map< DRC_CONSTRAINT_T, std::vector< DRC_ENGINE_CONSTRAINT * > * > m_constraintMap
void addRule(std::shared_ptr< DRC_RULE > &rule)
PROGRESS_REPORTER * m_progressReporter
void loadRules(const wxFileName &aPath)
Load and parse a rule set from an sexpr text file.
std::vector< DRC_TEST_PROVIDER * > m_testProviders
std::set< int > QueryDistinctConstraints(DRC_CONSTRAINT_T aConstraintId)
bool KeepRefreshing(bool aWait=false)
bool m_reportAllTrackErrors
bool ReportProgress(double aProgress)
DRC_TEST_PROVIDER * GetTestProvider(const wxString &name) const
bool HasRulesForConstraintType(DRC_CONSTRAINT_T constraintID)
BOARD_DESIGN_SETTINGS * GetDesignSettings() const
void RunTests(EDA_UNITS aUnits, bool aReportAllTrackErrors, bool aTestFootprints)
Run the DRC tests.
void ReportViolation(const std::shared_ptr< DRC_ITEM > &aItem, const VECTOR2I &aPos, int aMarkerLayer)
void SetMaxProgress(int aSize)
void ReportAux(const wxString &aStr)
DRC_ENGINE(BOARD *aBoard=nullptr, BOARD_DESIGN_SETTINGS *aSettings=nullptr)
std::vector< int > m_errorLimits
bool IsErrorLimitExceeded(int error_code)
void ProcessAssertions(const BOARD_ITEM *a, std::function< void(const DRC_CONSTRAINT *)> aFailureHandler, REPORTER *aReporter=nullptr)
DRC_VIOLATION_HANDLER m_violationHandler
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
std::vector< std::shared_ptr< DRC_RULE > > m_rules
std::shared_ptr< DRC_RULE > createImplicitRule(const wxString &name)
static bool IsNetADiffPair(BOARD *aBoard, NETINFO_ITEM *aNet, int &aNetP, int &aNetN)
bool IsNetTieExclusion(int aTrackNetCode, PCB_LAYER_ID aTrackLayer, const VECTOR2I &aCollisionPos, BOARD_ITEM *aCollidingItem)
Check if the given collision between a track and another item occurs during the track's entry into a ...
bool QueryWorstConstraint(DRC_CONSTRAINT_T aRuleId, DRC_CONSTRAINT &aConstraint)
void InitEngine(const wxFileName &aRulePath)
Initialize the DRC engine.
DRC_CONSTRAINT EvalZoneConnection(const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
static int MatchDpSuffix(const wxString &aNetName, wxString &aComplementNet, wxString &aBaseDpName)
Check if the given net is a diff pair, returning its polarity and complement if so.
bool ReportPhase(const wxString &aMessage)
BOARD_DESIGN_SETTINGS * m_designSettings
void Parse(std::vector< std::shared_ptr< DRC_RULE > > &aRules, REPORTER *aReporter)
bool Compile(REPORTER *aReporter, int aSourceLine=0, int aSourceOffset=0)
std::vector< DRC_TEST_PROVIDER * > GetTestProviders() const
static DRC_TEST_PROVIDER_REGISTRY & Instance()
Represent a DRC "provider" which runs some DRC functions over a BOARD and spits out DRC_ITEM and posi...
void SetDRCEngine(DRC_ENGINE *engine)
virtual wxString GetItemDescription(UNITS_PROVIDER *aUnitsProvider, bool aFull) const
Return a user-visible description string of this item.
KICAD_T Type() const
Returns the type of object.
EDA_ITEM_FLAGS GetFlags() const
LSET is a set of PCB_LAYER_IDs.
static LSET FrontMask()
Return a mask holding all technical layers and the external CU layer on front side.
static LSET BackMask()
Return a mask holding all technical layers and the external CU layer on back side.
Handle the data for a net.
const wxString & GetNetname() const
virtual bool IsCancelled() const =0
virtual bool KeepRefreshing(bool aWait=false)=0
Update the UI (if any).
virtual void AdvancePhase()=0
Use the next available virtual zone of the dialog progress bar.
virtual void AdvanceProgress()=0
Increment the progress bar length (inside the current virtual zone).
virtual void SetCurrentProgress(double aProgress)=0
Set the progress value to aProgress (0..1).
virtual void SetMaxProgress(int aMaxProgress)=0
Fix the value that gives the 100 percent progress bar length (inside the current virtual zone).
A pure virtual class used to derive REPORTER objects from.
virtual REPORTER & Report(const wxString &aText, SEVERITY aSeverity=RPT_SEVERITY_UNDEFINED)=0
Report a string with a given severity.
bool IsEmpty() const
Return true if the set is empty (no polygons at all)
wxString MessageTextFromValue(double aValue, bool aAddUnitLabel=true, EDA_DATA_TYPE aType=EDA_DATA_TYPE::DISTANCE) const
A lower-precision version of StringFromValue().
void SetUserUnits(EDA_UNITS aUnits)
Handle a list of polygons defining a copper zone.
wxString GetItemDescription(UNITS_PROVIDER *aUnitsProvider, bool aFull) const override
Return a user-visible description string of this item.
bool GetIsRuleArea() const
Accessors to parameters used in Rule Area zones:
bool GetDoNotAllowVias() const
bool GetDoNotAllowPads() const
bool GetDoNotAllowTracks() const
int GetMinThickness() const
ZONE_CONNECTION GetPadConnection() const
int GetThermalReliefSpokeWidth() const
bool GetDoNotAllowFootprints() const
bool GetDoNotAllowCopperPour() const
bool HasKeepoutParametersSet() const
Accessor to determine if any keepout parameters are set.
int GetThermalReliefGap() const
void drcPrintDebugMessage(int level, const wxString &msg, const char *function, int line)
#define EXTENDED_ERROR_LIMIT
static bool isKeepoutZone(const BOARD_ITEM *aItem, bool aCheckFlags)
@ DRC_DISALLOW_FOOTPRINTS
@ DRC_DISALLOW_MICRO_VIAS
@ ANNULAR_WIDTH_CONSTRAINT
@ COURTYARD_CLEARANCE_CONSTRAINT
@ VIA_DIAMETER_CONSTRAINT
@ ZONE_CONNECTION_CONSTRAINT
@ DIFF_PAIR_GAP_CONSTRAINT
@ SILK_CLEARANCE_CONSTRAINT
@ EDGE_CLEARANCE_CONSTRAINT
@ MIN_RESOLVED_SPOKES_CONSTRAINT
@ TEXT_THICKNESS_CONSTRAINT
@ PHYSICAL_HOLE_CLEARANCE_CONSTRAINT
@ THERMAL_SPOKE_WIDTH_CONSTRAINT
@ CONNECTION_WIDTH_CONSTRAINT
@ THERMAL_RELIEF_GAP_CONSTRAINT
@ MAX_UNCOUPLED_CONSTRAINT
@ HOLE_CLEARANCE_CONSTRAINT
@ PHYSICAL_CLEARANCE_CONSTRAINT
@ HOLE_TO_HOLE_CONSTRAINT
#define HOLE_PROXY
Indicates the BOARD_ITEM is a proxy for its hole.
PCB_LAYER_ID
A quick note on layer IDs:
KICOMMON_API wxString MessageTextFromValue(const EDA_IU_SCALE &aIuScale, EDA_UNITS aUnits, double aValue, bool aAddUnitsText=true, EDA_DATA_TYPE aType=EDA_DATA_TYPE::DISTANCE)
A helper to convert the double length aValue to a string in inches, millimeters, or unscaled units.
std::vector< FAB_LAYER_COLOR > dummy
wxString EscapeHTML(const wxString &aString)
Return a new wxString escaped for embedding in HTML.
std::shared_ptr< DRC_RULE > parentRule
DRC_RULE_CONDITION * condition
DRC_CONSTRAINT constraint
A filename or source description, a problem input line, a line number, a byte offset,...
@ PCB_SHAPE_T
class PCB_SHAPE, a segment not on copper layers
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
@ PCB_TEXTBOX_T
class PCB_TEXTBOX, wrapped text on a layer
@ PCB_ZONE_T
class ZONE, a copper pour area
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
@ PCB_FIELD_T
class PCB_FIELD, text associated with a footprint property
@ PCB_FOOTPRINT_T
class FOOTPRINT, a footprint
@ PCB_PAD_T
class PAD, a pad in a footprint
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
@ PCB_TABLE_T
class PCB_TABLE, table of PCB_TABLECELLs
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
wxString PrintZoneConnection(ZONE_CONNECTION aConnection)
ZONE_CONNECTION
How pads are covered by copper in zone.