KiCad PCB EDA Suite
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drc_cache_generator.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you may find one here:
18 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19 * or you may search the http://www.gnu.org website for the version 2 license,
20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
24#include <common.h>
26#include <footprint.h>
27#include <thread_pool.h>
28#include <zone.h>
30#include <drc/drc_engine.h>
31#include <drc/drc_rtree.h>
33#include <mutex>
34
36{
37 m_board = m_drcEngine->GetBoard();
38
39 int& largestClearance = m_board->m_DRCMaxClearance;
40 int& largestPhysicalClearance = m_board->m_DRCMaxPhysicalClearance;
41 DRC_CONSTRAINT worstConstraint;
42 LSET boardCopperLayers = LSET::AllCuMask( m_board->GetCopperLayerCount() );
44
45 largestClearance = std::max( largestClearance, m_board->GetMaxClearanceValue() );
46
47 if( m_drcEngine->QueryWorstConstraint( PHYSICAL_CLEARANCE_CONSTRAINT, worstConstraint ) )
48 largestPhysicalClearance = worstConstraint.GetValue().Min();
49
50 if( m_drcEngine->QueryWorstConstraint( PHYSICAL_HOLE_CLEARANCE_CONSTRAINT, worstConstraint ) )
51 largestPhysicalClearance = std::max( largestPhysicalClearance, worstConstraint.GetValue().Min() );
52
53 // Ensure algorithmic safety
54 largestClearance = std::min( largestClearance, INT_MAX / 3 );
55 largestPhysicalClearance = std::min( largestPhysicalClearance, INT_MAX / 3 );
56
57 std::set<ZONE*> allZones;
58
59 auto cacheBBoxes =
60 []( ZONE* zone, const LSET& copperLayers )
61 {
62 zone->Outline()->BuildBBoxCaches();
63
64 for( PCB_LAYER_ID layer : copperLayers )
65 {
66 if( SHAPE_POLY_SET* fill = zone->GetFill( layer ) )
67 fill->BuildBBoxCaches();
68 }
69 };
70
71 for( ZONE* zone : m_board->Zones() )
72 {
73 allZones.insert( zone );
74
75 if( !zone->GetIsRuleArea() )
76 {
77 m_board->m_DRCZones.push_back( zone );
78
79 LSET zoneCopperLayers = zone->GetLayerSet() & boardCopperLayers;
80
81 if( zoneCopperLayers.any() )
82 {
83 cacheBBoxes( zone, zoneCopperLayers );
84 m_board->m_DRCCopperZones.push_back( zone );
85 }
86 }
87 }
88
89 for( FOOTPRINT* footprint : m_board->Footprints() )
90 {
91 for( ZONE* zone : footprint->Zones() )
92 {
93 allZones.insert( zone );
94
95 if( !zone->GetIsRuleArea() )
96 {
97 m_board->m_DRCZones.push_back( zone );
98
99 LSET zoneCopperLayers = zone->GetLayerSet() & boardCopperLayers;
100
101 if( zoneCopperLayers.any() )
102 {
103 cacheBBoxes( zone, zoneCopperLayers );
104 m_board->m_DRCCopperZones.push_back( zone );
105 }
106 }
107 }
108 }
109
110 size_t count = 0;
111 std::atomic<size_t> done( 1 );
112
113 auto countItems =
114 [&]( BOARD_ITEM* item ) -> bool
115 {
116 ++count;
117 return true;
118 };
119
120 auto addToCopperTree =
121 [&]( BOARD_ITEM* item ) -> bool
122 {
123 if( m_drcEngine->IsCancelled() )
124 return false;
125
126 LSET copperLayers = item->GetLayerSet() & boardCopperLayers;
127
128 // Special-case pad holes which pierce all the copper layers
129 if( item->Type() == PCB_PAD_T )
130 {
131 PAD* pad = static_cast<PAD*>( item );
132
133 if( pad->HasHole() )
134 copperLayers = boardCopperLayers;
135 }
136
137 copperLayers.RunOnLayers(
138 [&]( PCB_LAYER_ID layer )
139 {
140 m_board->m_CopperItemRTreeCache->Insert( item, layer, largestClearance );
141 } );
142
143 done.fetch_add( 1 );
144 return true;
145 };
146
147 if( !reportPhase( _( "Gathering copper items..." ) ) )
148 return false; // DRC cancelled
149
150 static const std::vector<KICAD_T> itemTypes = {
152 PCB_PAD_T,
158 };
159
160 forEachGeometryItem( itemTypes, boardCopperLayers, countItems );
161
162 std::future<void> retn = tp.submit_task(
163 [&]()
164 {
165 std::unique_lock<std::shared_mutex> writeLock( m_board->m_CachesMutex );
166
167 if( !m_board->m_CopperItemRTreeCache )
168 m_board->m_CopperItemRTreeCache = std::make_shared<DRC_RTREE>();
169
170 forEachGeometryItem( itemTypes, boardCopperLayers, addToCopperTree );
171 } );
172
173 std::future_status status = retn.wait_for( std::chrono::milliseconds( 250 ) );
174
175 while( status != std::future_status::ready )
176 {
177 reportProgress( done, count );
178 status = retn.wait_for( std::chrono::milliseconds( 250 ) );
179 }
180
181 if( !reportPhase( _( "Tessellating copper zones..." ) ) )
182 return false; // DRC cancelled
183
184 // Cache zone bounding boxes, triangulation, copper zone rtrees, and footprint courtyards
185 // before we start.
186
187 for( FOOTPRINT* footprint : m_board->Footprints() )
188 {
189 footprint->BuildCourtyardCaches();
190 footprint->BuildNetTieCache();
191 }
192
193 std::vector<std::future<size_t>> returns;
194
195 returns.reserve( allZones.size() );
196
197 auto cache_zones =
198 [this, &done]( ZONE* aZone ) -> size_t
199 {
200 if( m_drcEngine->IsCancelled() )
201 return 0;
202
203 aZone->CacheBoundingBox();
204 aZone->CacheTriangulation();
205
206 if( !aZone->GetIsRuleArea() && aZone->IsOnCopperLayer() )
207 {
208 std::unique_ptr<DRC_RTREE> rtree = std::make_unique<DRC_RTREE>();
209
210 aZone->GetLayerSet().RunOnLayers(
211 [&]( PCB_LAYER_ID layer )
212 {
213 if( IsCopperLayer( layer ) )
214 rtree->Insert( aZone, layer );
215 } );
216
217 {
218 std::unique_lock<std::shared_mutex> writeLock( m_board->m_CachesMutex );
219 m_board->m_CopperZoneRTreeCache[ aZone ] = std::move( rtree );
220 }
221
222 done.fetch_add( 1 );
223 }
224
225 return 1;
226 };
227
228 for( ZONE* zone : allZones )
229 {
230 returns.emplace_back( tp.submit_task(
231 [cache_zones, zone]
232 {
233 return cache_zones( zone );
234 } ) );
235 }
236
237 done.store( 1 );
238
239 for( const std::future<size_t>& ret : returns )
240 {
241 status = ret.wait_for( std::chrono::milliseconds( 250 ) );
242
243 while( status != std::future_status::ready )
244 {
245 reportProgress( done, allZones.size() );
246 status = ret.wait_for( std::chrono::milliseconds( 250 ) );
247 }
248 }
249
250 m_board->m_ZoneIsolatedIslandsMap.clear();
251
252 for( ZONE* zone : m_board->Zones() )
253 {
254 if( !zone->GetIsRuleArea() && !zone->IsTeardropArea() )
255 {
256 zone->GetLayerSet().RunOnLayers(
257 [&]( PCB_LAYER_ID layer )
258 {
259 m_board->m_ZoneIsolatedIslandsMap[ zone ][ layer ] = ISOLATED_ISLANDS();
260 } );
261 }
262 }
263
264 std::shared_ptr<CONNECTIVITY_DATA> connectivity = m_board->GetConnectivity();
265
266 connectivity->ClearRatsnest();
267 connectivity->Build( m_board, m_drcEngine->GetProgressReporter() );
268 connectivity->FillIsolatedIslandsMap( m_board->m_ZoneIsolatedIslandsMap, true );
269
270 return !m_drcEngine->IsCancelled();
271}
272
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition board_item.h:79
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
const MINOPTMAX< int > & GetValue() const
Definition drc_rule.h:166
virtual bool reportPhase(const wxString &aStageName)
int forEachGeometryItem(const std::vector< KICAD_T > &aTypes, const LSET &aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
virtual bool reportProgress(size_t aCount, size_t aSize, size_t aDelta=1)
LSET is a set of PCB_LAYER_IDs.
Definition lset.h:37
void RunOnLayers(const std::function< void(PCB_LAYER_ID)> &aFunction) const
Execute a function on each layer of the LSET.
Definition lset.h:252
static LSET AllCuMask()
return AllCuMask( MAX_CU_LAYERS );
Definition lset.cpp:591
T Min() const
Definition minoptmax.h:33
Definition pad.h:54
Represent a set of closed polygons.
void BuildBBoxCaches() const
Construct BBoxCaches for Contains(), below.
Handle a list of polygons defining a copper zone.
Definition zone.h:74
bool GetIsRuleArea() const
Accessors to parameters used in Rule Area zones:
Definition zone.h:704
SHAPE_POLY_SET * Outline()
Definition zone.h:335
SHAPE_POLY_SET * GetFill(PCB_LAYER_ID aLayer)
Definition zone.h:606
bool IsTeardropArea() const
Definition zone.h:679
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition zone.h:136
The common library.
@ PHYSICAL_HOLE_CLEARANCE_CONSTRAINT
Definition drc_rule.h:78
@ PHYSICAL_CLEARANCE_CONSTRAINT
Definition drc_rule.h:77
#define _(s)
bool IsCopperLayer(int aLayerId)
Test whether a layer is a copper layer.
Definition layer_ids.h:676
PCB_LAYER_ID
A quick note on layer IDs:
Definition layer_ids.h:60
A struct recording the isolated and single-pad islands within a zone.
Definition zone.h:61
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
static thread_pool * tp
BS::thread_pool< 0 > thread_pool
Definition thread_pool.h:31
@ PCB_SHAPE_T
class PCB_SHAPE, a segment not on copper layers
Definition typeinfo.h:88
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition typeinfo.h:97
@ PCB_TEXTBOX_T
class PCB_TEXTBOX, wrapped text on a layer
Definition typeinfo.h:93
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
Definition typeinfo.h:92
@ PCB_FIELD_T
class PCB_FIELD, text associated with a footprint property
Definition typeinfo.h:90
@ PCB_BARCODE_T
class PCB_BARCODE, a barcode (graphic item)
Definition typeinfo.h:101
@ PCB_TABLECELL_T
class PCB_TABLECELL, PCB_TEXTBOX for use in tables
Definition typeinfo.h:95
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition typeinfo.h:87
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition typeinfo.h:98
@ PCB_DIMENSION_T
class PCB_DIMENSION_BASE: abstract dimension meta-type
Definition typeinfo.h:100
@ PCB_TABLE_T
class PCB_TABLE, table of PCB_TABLECELLs
Definition typeinfo.h:94
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition typeinfo.h:96