KiCad PCB EDA Suite
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drc_test_provider_track_segment_length.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you may find one here:
18 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19 * or you may search the http://www.gnu.org website for the version 2 license,
20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
24#include <thread_pool.h>
25#include <pcb_track.h>
26#include <drc/drc_engine.h>
27#include <drc/drc_item.h>
28#include <drc/drc_rule.h>
30
31
32/*
33 Track segment length test. As the name says, checks segment length of the tracks (including segments and arcs)
34 Errors generated:
35 - DRCE_TRACK_SEGMENT_LENGTH
36*/
37
39{
40public:
43
45
46 virtual bool Run() override;
47
48 virtual const wxString GetName() const override { return wxT( "segment_length" ); };
49};
50
51
53{
54 if( m_drcEngine->IsErrorLimitExceeded( DRCE_TRACK_SEGMENT_LENGTH ) )
55 {
56 REPORT_AUX( wxT( "Track segment length violations ignored. Tests not run." ) );
57 return true; // continue with other tests
58 }
59
60 if( !m_drcEngine->HasRulesForConstraintType( TRACK_SEGMENT_LENGTH_CONSTRAINT ) )
61 {
62 REPORT_AUX( wxT( "No track segment length constraints found. Tests not run." ) );
63 return true; // continue with other tests
64 }
65
66 if( !reportPhase( _( "Checking track segment lengths..." ) ) )
67 return false; // DRC cancelled
68
69 auto checkTrackSegmentLength =
70 [&]( const int idx ) -> bool
71 {
72 BOARD_ITEM* item = m_drcEngine->GetBoard()->Tracks()[idx];
73 if( m_drcEngine->IsErrorLimitExceeded( DRCE_TRACK_SEGMENT_LENGTH ) )
74 return false;
75
76 int actual;
77 VECTOR2I p0;
78
79 if( item->Type() == PCB_ARC_T )
80 {
81 PCB_ARC* arc = static_cast<PCB_ARC*>( item );
82
83 actual = arc->GetLength();
84 p0 = arc->GetStart();
85 }
86 else if( item->Type() == PCB_TRACE_T )
87 {
88 PCB_TRACK* track = static_cast<PCB_TRACK*>( item );
89
90 actual = track->GetLength();
91 p0 = ( track->GetStart() + track->GetEnd() ) / 2;
92 }
93 else
94 {
95 return true;
96 }
97
98 auto constraint = m_drcEngine->EvalRules( TRACK_SEGMENT_LENGTH_CONSTRAINT, item, nullptr,
99 item->GetLayer() );
100 bool fail_min = false;
101 bool fail_max = false;
102 int constraintLength = 0;
103
104 if( constraint.GetSeverity() != RPT_SEVERITY_IGNORE )
105 {
106 if( constraint.Value().HasMin() && actual < constraint.Value().Min() )
107 {
108 fail_min = true;
109 constraintLength = constraint.Value().Min();
110 }
111
112 if( constraint.Value().HasMax() && actual > constraint.Value().Max() )
113 {
114 fail_max = true;
115 constraintLength = constraint.Value().Max();
116 }
117 }
118
119 if( fail_min || fail_max )
120 {
121 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_TRACK_SEGMENT_LENGTH );
122 wxString constraintName = constraint.GetName();
123 wxString msg;
124
125 if( fail_min )
126 {
127 if( constraint.m_ImplicitMin )
128 constraintName = _( "board setup constraints" );
129
130 msg = formatMsg( _( "(%s min length %s; actual %s)" ),
131 constraintName,
132 constraintLength,
133 actual );
134 }
135 else
136 {
137 msg = formatMsg( _( "(%s max length %s; actual %s)" ),
138 constraintName,
139 constraintLength,
140 actual );
141 }
142
143 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
144 drcItem->SetItems( item );
145 drcItem->SetViolatingRule( constraint.GetParentRule() );
146
147 reportViolation( drcItem, p0, item->GetLayer() );
148 }
149
150 return true;
151 };
152
153 const int progressDelta = 250;
154 int ii = 0;
155
157 auto futures = tp.submit_loop( 0, m_drcEngine->GetBoard()->Tracks().size(), checkTrackSegmentLength );
158
159 for( auto& ret : futures )
160 {
161 std::future_status status = ret.wait_for( std::chrono::milliseconds( 250 ) );
162
163 while( status != std::future_status::ready )
164 {
165 reportProgress( ii++, m_drcEngine->GetBoard()->Tracks().size(), progressDelta );
166 status = ret.wait_for( std::chrono::milliseconds( 250 ) );
167 }
168 }
169
170 return !m_drcEngine->IsCancelled();
171}
172
173
174namespace detail
175{
177}
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition board_item.h:79
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition board_item.h:232
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition drc_item.cpp:381
virtual ~DRC_TEST_PROVIDER_TRACK_SEGMENT_LENGTH()=default
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
virtual bool reportPhase(const wxString &aStageName)
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const VECTOR2I &aMarkerPos, int aMarkerLayer, const std::vector< PCB_SHAPE > &aShapes={})
wxString formatMsg(const wxString &aFormatString, const wxString &aSource, double aConstraint, double aActual, EDA_DATA_TYPE aDataType=EDA_DATA_TYPE::DISTANCE)
virtual bool reportProgress(size_t aCount, size_t aSize, size_t aDelta=1)
KICAD_T Type() const
Returns the type of object.
Definition eda_item.h:110
virtual double GetLength() const override
Return the length of the arc track.
Definition pcb_track.h:379
virtual double GetLength() const
Get the length of the track using the hypotenuse calculation.
const VECTOR2I & GetStart() const
Definition pcb_track.h:152
const VECTOR2I & GetEnd() const
Definition pcb_track.h:149
@ DRCE_TRACK_SEGMENT_LENGTH
Definition drc_item.h:57
@ TRACK_SEGMENT_LENGTH_CONSTRAINT
Definition drc_rule.h:60
#define REPORT_AUX(s)
#define _(s)
static DRC_REGISTER_TEST_PROVIDER< DRC_TEST_PROVIDER_ANNULAR_WIDTH > dummy
@ RPT_SEVERITY_IGNORE
int actual
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
static thread_pool * tp
BS::thread_pool< 0 > thread_pool
Definition thread_pool.h:31
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition typeinfo.h:98
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition typeinfo.h:96
VECTOR2< int32_t > VECTOR2I
Definition vector2d.h:695