58 virtual bool Run()
override;
60 virtual const wxString
GetName()
const override
62 return wxT(
"hole_to_hole_clearance" );
67 return wxT(
"Tests hole to hole spacing" );
84 return std::make_shared<SHAPE_CIRCLE>(
via->GetCenter(),
via->GetDrillValue() / 2 );
89 return std::make_shared<SHAPE_CIRCLE>(
pad->GetPosition(),
pad->GetDrillSize().x / 2 );
92 return std::make_shared<SHAPE_CIRCLE>(
VECTOR2I( 0, 0 ), 0 );
101 reportAux( wxT(
"Hole to hole violations ignored. Tests not run." ) );
116 reportAux( wxT(
"No hole to hole constraints found. Skipping check." ) );
120 if( !
reportPhase(
_(
"Checking hole to hole clearances..." ) ) )
123 const size_t progressDelta = 200;
149 if(
pad->GetDrillSize().x &&
pad->GetDrillSize().x ==
pad->GetDrillSize().y )
162 std::unordered_map<PTR_PTR_CACHE_KEY, int> checkedPairs;
177 if(
via->GetViaType() != VIATYPE::MICROVIA )
190 if(
static_cast<void*
>( a ) >
static_cast<void*
>( b ) )
193 if( checkedPairs.find( { a, b } ) != checkedPairs.end() )
199 checkedPairs[ { a, b } ] = 1;
212 checkedPairs.clear();
214 for(
FOOTPRINT* footprint : m_board->Footprints() )
216 for(
PAD*
pad : footprint->Pads() )
218 if( !reportProgress( ii++, count, progressDelta ) )
222 if(
pad->HasDrilledHole() )
235 if(
static_cast<void*
>( a ) >
static_cast<void*
>( b ) )
238 if( checkedPairs.find( { a, b } ) != checkedPairs.end() )
244 checkedPairs[ { a, b } ] = 1;
251 return testHoleAgainstHole(
pad, holeShape.get(), other );
253 m_largestHoleToHoleClearance );
257 if( m_drcEngine->IsCancelled() )
261 reportRuleStatistics();
263 return !m_drcEngine->IsCancelled();
273 if( !reportCoLocation && !reportHole2Hole )
276 std::shared_ptr<SHAPE_CIRCLE> otherHole =
getHoleShape( aOther );
285 if( ( viaHoleLayers &
static_cast<PCB_VIA*
>( aOther )->GetLayerSet() ).none() )
290 if( ( aHole->
GetCenter() - otherHole->GetCenter() ).SquaredEuclideanNorm() < epsilon_sq )
292 if( reportCoLocation )
297 std::swap( aItem, aOther );
300 drce->SetItems( aItem, aOther );
304 else if( reportHole2Hole )
306 int actual = ( aHole->
GetCenter() - otherHole->GetCenter() ).EuclideanNorm();
307 actual = std::max( 0, actual - aHole->
GetRadius() - otherHole->GetRadius() );
311 int minClearance = std::max( 0, constraint.GetValue().Min() -
epsilon );
315 && actual < minClearance )
320 std::swap( aItem, aOther );
323 wxString msg =
formatMsg(
_(
"(%s min %s; actual %s)" ),
324 constraint.GetName(),
328 drce->SetErrorMessage( drce->GetErrorText() + wxS(
" " ) + msg );
329 drce->SetItems( aItem, aOther );
330 drce->SetViolatingRule( constraint.GetParentRule() );
int GetDRCEpsilon() const
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Information pertinent to a Pcbnew printed circuit board.
const TRACKS & Tracks() const
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
const MINOPTMAX< int > & GetValue() const
bool IsErrorLimitExceeded(int error_code)
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
bool QueryWorstConstraint(DRC_CONSTRAINT_T aRuleId, DRC_CONSTRAINT &aConstraint)
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Implement an R-tree for fast spatial and layer indexing of connectable items.
void Insert(BOARD_ITEM *aItem, PCB_LAYER_ID aLayer, int aWorstClearance=0)
Insert an item into the tree on a particular layer with an optional worst clearance.
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
void clear()
Remove all items from the RTree.
DRC_TEST_PROVIDER_HOLE_TO_HOLE()
int m_largestHoleToHoleClearance
virtual const wxString GetName() const override
bool testHoleAgainstHole(BOARD_ITEM *aItem, SHAPE_CIRCLE *aHole, BOARD_ITEM *aOther)
virtual ~DRC_TEST_PROVIDER_HOLE_TO_HOLE()
virtual const wxString GetDescription() const override
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
wxString formatMsg(const wxString &aFormatString, const wxString &aSource, double aConstraint, double aActual)
virtual bool reportPhase(const wxString &aStageName)
int forEachGeometryItem(const std::vector< KICAD_T > &aTypes, LSET aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const VECTOR2I &aMarkerPos, int aMarkerLayer)
void reportAux(const wxString &aMsg)
virtual bool reportProgress(size_t aCount, size_t aSize, size_t aDelta=1)
KICAD_T Type() const
Returns the type of object.
LSET is a set of PCB_LAYER_IDs.
static LSET AllLayersMask()
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
VECTOR2I::extended_type ecoord
static SEG::ecoord Square(int a)
const VECTOR2I GetCenter() const
@ DRCE_DRILLED_HOLES_TOO_CLOSE
@ DRCE_DRILLED_HOLES_COLOCATED
@ HOLE_TO_HOLE_CONSTRAINT
static std::shared_ptr< SHAPE_CIRCLE > getHoleShape(BOARD_ITEM *aItem)
static DRC_REGISTER_TEST_PROVIDER< DRC_TEST_PROVIDER_ANNULAR_WIDTH > dummy
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
@ PCB_PAD_T
class PAD, a pad in a footprint
VECTOR2< int32_t > VECTOR2I