KiCad PCB EDA Suite
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drc_test_provider_disallow.cpp
Go to the documentation of this file.
1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you may find one here:
18 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19 * or you may search the http://www.gnu.org website for the version 2 license,
20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
24#include <atomic>
25#include <common.h>
27#include <drc/drc_rtree.h>
28#include <drc/drc_engine.h>
29#include <drc/drc_item.h>
30#include <drc/drc_rule.h>
32#include <pad.h>
33#include <progress_reporter.h>
34#include <thread_pool.h>
35#include <zone.h>
36#include <pcb_track.h>
37#include <mutex>
38
39
40/*
41 "Disallow" test. Goes through all items, matching types/conditions drop errors.
42 Errors generated:
43 - DRCE_ALLOWED_ITEMS
44 - DRCE_TEXT_ON_EDGECUTS
45*/
46
48{
49public:
51 {}
52
53 virtual ~DRC_TEST_PROVIDER_DISALLOW() = default;
54
55 virtual bool Run() override;
56
57 virtual const wxString GetName() const override { return wxT( "disallow" ); };
58};
59
60
62{
63 if( !reportPhase( _( "Checking keepouts & disallow constraints..." ) ) )
64 return false; // DRC cancelled
65
66 BOARD* board = m_drcEngine->GetBoard();
68
69 // First build out the board's cache of copper-keepout to copper-zone caches. This is where
70 // the bulk of the time is spent, and we can do this in parallel.
71 //
72 std::vector<ZONE*> antiCopperKeepouts;
73 std::vector<ZONE*> copperZones;
74 std::vector<std::pair<ZONE*, ZONE*>> toCache;
75 std::atomic<size_t> done( 1 );
76 int totalCount = 0;
77 std::unique_ptr<DRC_RTREE> antiTrackKeepouts = std::make_unique<DRC_RTREE>();
78
80 [&]( BOARD_ITEM* item ) -> bool
81 {
82 ZONE* zone = static_cast<ZONE*>( item );
83
84 if( zone->GetIsRuleArea() && zone->GetDoNotAllowZoneFills() )
85 {
86 antiCopperKeepouts.push_back( zone );
87 }
88 else if( zone->GetIsRuleArea() && zone->GetDoNotAllowTracks() )
89 {
90 for( PCB_LAYER_ID layer : zone->GetLayerSet() )
91 antiTrackKeepouts->Insert( zone, layer );
92 }
93 else if( zone->IsOnCopperLayer() )
94 {
95 copperZones.push_back( zone );
96 }
97
98 totalCount++;
99
100 return true;
101 } );
102
103 for( ZONE* ruleArea : antiCopperKeepouts )
104 {
105 for( ZONE* copperZone : copperZones )
106 {
107 toCache.push_back( { ruleArea, copperZone } );
108 totalCount++;
109 }
110 }
111
112 auto query_areas =
113 [&]( std::pair<ZONE* /* rule area */, ZONE* /* copper zone */> areaZonePair ) -> size_t
114 {
115 if( m_drcEngine->IsCancelled() )
116 return 0;
117
118 ZONE* ruleArea = areaZonePair.first;
119 ZONE* copperZone = areaZonePair.second;
120 BOX2I areaBBox = ruleArea->GetBoundingBox();
121 BOX2I copperBBox = copperZone->GetBoundingBox();
122 bool isInside = false;
123
124 if( copperZone->IsFilled() && areaBBox.Intersects( copperBBox ) )
125 {
126 // Collisions include touching, so we need to deflate outline by enough to
127 // exclude it. This is particularly important for detecting copper fills as
128 // they will be exactly touching along the entire exclusion border.
129 SHAPE_POLY_SET areaPoly = ruleArea->Outline()->CloneDropTriangulation();
130 areaPoly.Fracture();
131 areaPoly.Deflate( epsilon, CORNER_STRATEGY::ALLOW_ACUTE_CORNERS, ARC_LOW_DEF );
132
133 DRC_RTREE* zoneRTree = board->m_CopperZoneRTreeCache[ copperZone ].get();
134
135 if( zoneRTree )
136 {
137 for( size_t ii = 0; ii < ruleArea->GetLayerSet().size(); ++ii )
138 {
139 if( ruleArea->GetLayerSet().test( ii ) )
140 {
141 PCB_LAYER_ID layer = PCB_LAYER_ID( ii );
142
143 if( zoneRTree->QueryColliding( areaBBox, &areaPoly, layer ) )
144 {
145 isInside = true;
146 break;
147 }
148
149 if( m_drcEngine->IsCancelled() )
150 return 0;
151 }
152 }
153 }
154 }
155
156 if( m_drcEngine->IsCancelled() )
157 return 0;
158
159 PTR_PTR_LAYER_CACHE_KEY key = { ruleArea, copperZone, UNDEFINED_LAYER };
160
161 {
162 std::unique_lock<std::shared_mutex> writeLock( board->m_CachesMutex );
163 board->m_IntersectsAreaCache[ key ] = isInside;
164 }
165
166 done.fetch_add( 1 );
167
168 return 1;
169 };
170
172 std::vector<std::future<size_t>> returns;
173
174 returns.reserve( toCache.size() );
175
176 for( const std::pair<ZONE*, ZONE*>& areaZonePair : toCache )
177 returns.emplace_back( tp.submit( query_areas, areaZonePair ) );
178
179 for( const std::future<size_t>& ret : returns )
180 {
181 std::future_status status = ret.wait_for( std::chrono::milliseconds( 250 ) );
182
183 while( status != std::future_status::ready )
184 {
185 reportProgress( done, toCache.size() );
186 status = ret.wait_for( std::chrono::milliseconds( 250 ) );
187 }
188 }
189
190 if( m_drcEngine->IsCancelled() )
191 return false;
192
193 // Now go through all the board objects calling the DRC_ENGINE to run the actual disallow
194 // tests. These should be reasonably quick using the caches generated above.
195 //
196 const int progressDelta = 250;
197 int ii = static_cast<int>( toCache.size() );
198
199 auto checkTextOnEdgeCuts =
200 [&]( BOARD_ITEM* item )
201 {
202 if( item->Type() == PCB_FIELD_T
203 || item->Type() == PCB_TEXT_T
204 || item->Type() == PCB_TEXTBOX_T
205 || BaseType( item->Type() ) == PCB_DIMENSION_T )
206 {
207 if( item->GetLayer() == Edge_Cuts )
208 {
209 std::shared_ptr<DRC_ITEM> drc = DRC_ITEM::Create( DRCE_TEXT_ON_EDGECUTS );
210 drc->SetItems( item );
211 reportViolation( drc, item->GetPosition(), Edge_Cuts );
212 }
213 }
214 };
215
216 auto checkAntiTrackKeepout =
217 [&]( PCB_TRACK* track, ZONE* keepout )
218 {
219 std::shared_ptr<SHAPE> shape = track->GetEffectiveShape();
220 int dummyActual;
221 VECTOR2I pos;
222
223 if( keepout->Outline()->Collide( shape.get(), board->m_DRCMaxClearance,
224 &dummyActual, &pos ) )
225 {
226 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_ALLOWED_ITEMS );
227
228 drcItem->SetItems( track );
229 reportViolation( drcItem, pos, track->GetLayerSet().ExtractLayer() );
230 }
231 };
232
233 auto checkDisallow =
234 [&]( BOARD_ITEM* item )
235 {
237 nullptr, UNDEFINED_LAYER );
238
239 if( constraint.m_DisallowFlags && constraint.GetSeverity() != RPT_SEVERITY_IGNORE )
240 {
241 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_ALLOWED_ITEMS );
242 PCB_LAYER_ID layer = item->GetLayerSet().ExtractLayer();
243 wxString msg;
244
245 // Implicit rules reported in checkAntiTrackKeepout
246 if( constraint.GetParentRule()->m_Implicit )
247 return;
248
249 msg.Printf( drcItem->GetErrorText() + wxS( " (%s)" ), constraint.GetName() );
250
251 drcItem->SetErrorMessage( msg );
252 drcItem->SetItems( item );
253 drcItem->SetViolatingRule( constraint.GetParentRule() );
254
255 reportViolation( drcItem, item->GetPosition(), layer );
256 }
257 };
258
260 [&]( BOARD_ITEM* item ) -> bool
261 {
263 checkTextOnEdgeCuts( item );
264
266 {
267 if( ZONE* zone = dynamic_cast<ZONE*>( item ) )
268 {
269 if( zone->GetIsRuleArea() && zone->HasKeepoutParametersSet() )
270 return true;
271 }
272
273 item->ClearFlags( HOLE_PROXY ); // Just in case
274
275 if( item->Type() == PCB_TRACE_T || item->Type() == PCB_ARC_T )
276 {
277 PCB_TRACK* track = static_cast<PCB_TRACK*>( item );
278 PCB_LAYER_ID layer = track->GetLayer();
279
280 antiTrackKeepouts->QueryColliding( track, layer, layer,
281 // Filter:
282 [&]( BOARD_ITEM* other ) -> bool
283 {
284 return true;
285 },
286 // Visitor:
287 [&]( BOARD_ITEM* other ) -> bool
288 {
289 checkAntiTrackKeepout( track, static_cast<ZONE*>( other ) );
290 return !m_drcEngine->IsCancelled();
291 },
293 }
294
295 checkDisallow( item );
296
297 if( item->HasHole() )
298 {
299 item->SetFlags( HOLE_PROXY );
300 checkDisallow( item );
301 item->ClearFlags( HOLE_PROXY );
302 }
303 }
304
305 if( !reportProgress( ii++, totalCount, progressDelta ) )
306 return false;
307
308 return true;
309 } );
310
311 return !m_drcEngine->IsCancelled();
312}
313
314
315namespace detail
316{
318}
constexpr int ARC_LOW_DEF
Definition: base_units.h:128
int GetDRCEpsilon() const
Return an epsilon which accounts for rounding errors, etc.
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:79
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:232
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:317
int m_DRCMaxPhysicalClearance
Definition: board.h:1357
int m_DRCMaxClearance
Definition: board.h:1356
std::unordered_map< ZONE *, std::unique_ptr< DRC_RTREE > > m_CopperZoneRTreeCache
Definition: board.h:1348
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:1011
std::shared_mutex m_CachesMutex
Definition: board.h:1341
std::unordered_map< PTR_PTR_LAYER_CACHE_KEY, bool > m_IntersectsAreaCache
Definition: board.h:1345
constexpr bool Intersects(const BOX2< Vec > &aRect) const
Definition: box2.h:311
wxString GetName() const
Definition: drc_rule.h:168
int m_DisallowFlags
Definition: drc_rule.h:203
SEVERITY GetSeverity() const
Definition: drc_rule.h:181
DRC_RULE * GetParentRule() const
Definition: drc_rule.h:164
BOARD * GetBoard() const
Definition: drc_engine.h:95
bool IsErrorLimitExceeded(int error_code)
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
Definition: drc_engine.cpp:706
bool IsCancelled() const
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition: drc_item.cpp:393
Implement an R-tree for fast spatial and layer indexing of connectable items.
Definition: drc_rtree.h:48
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
Definition: drc_rtree.h:214
bool m_Implicit
Definition: drc_rule.h:118
virtual ~DRC_TEST_PROVIDER_DISALLOW()=default
virtual const wxString GetName() const override
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
Represent a DRC "provider" which runs some DRC functions over a BOARD and spits out DRC_ITEM and posi...
virtual bool reportPhase(const wxString &aStageName)
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const VECTOR2I &aMarkerPos, int aMarkerLayer, DRC_CUSTOM_MARKER_HANDLER *aCustomHandler=nullptr)
int forEachGeometryItem(const std::vector< KICAD_T > &aTypes, const LSET &aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
DRC_ENGINE * m_drcEngine
virtual bool reportProgress(size_t aCount, size_t aSize, size_t aDelta=1)
PCB_LAYER_ID ExtractLayer() const
Find the first set PCB_LAYER_ID.
Definition: lset.cpp:525
static const LSET & AllLayersMask()
Definition: lset.cpp:624
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: pcb_track.cpp:1243
std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const override
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: pcb_track.cpp:2201
Represent a set of closed polygons.
void Fracture()
Convert a set of polygons with holes to a single outline with "slits"/"fractures" connecting the oute...
void Deflate(int aAmount, CORNER_STRATEGY aCornerStrategy, int aMaxError)
SHAPE_POLY_SET CloneDropTriangulation() const
Handle a list of polygons defining a copper zone.
Definition: zone.h:74
bool GetIsRuleArea() const
Accessors to parameters used in Rule Area zones:
Definition: zone.h:699
const BOX2I GetBoundingBox() const override
Definition: zone.cpp:622
bool GetDoNotAllowTracks() const
Definition: zone.h:716
bool IsFilled() const
Definition: zone.h:292
SHAPE_POLY_SET * Outline()
Definition: zone.h:335
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: zone.h:136
bool GetDoNotAllowZoneFills() const
Definition: zone.h:714
bool IsOnCopperLayer() const override
Definition: zone.cpp:500
The common library.
@ DRCE_TEXT_ON_EDGECUTS
Definition: drc_item.h:42
@ DRCE_ALLOWED_ITEMS
Definition: drc_item.h:41
@ DISALLOW_CONSTRAINT
Definition: drc_rule.h:69
#define _(s)
#define HOLE_PROXY
Indicates the BOARD_ITEM is a proxy for its hole.
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
@ Edge_Cuts
Definition: layer_ids.h:112
@ UNDEFINED_LAYER
Definition: layer_ids.h:61
static DRC_REGISTER_TEST_PROVIDER< DRC_TEST_PROVIDER_ANNULAR_WIDTH > dummy
@ RPT_SEVERITY_IGNORE
const double epsilon
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
Definition: thread_pool.cpp:30
static thread_pool * tp
Definition: thread_pool.cpp:28
BS::thread_pool thread_pool
Definition: thread_pool.h:31
constexpr KICAD_T BaseType(const KICAD_T aType)
Return the underlying type of the given type.
Definition: typeinfo.h:251
@ PCB_TEXTBOX_T
class PCB_TEXTBOX, wrapped text on a layer
Definition: typeinfo.h:93
@ PCB_ZONE_T
class ZONE, a copper pour area
Definition: typeinfo.h:107
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
Definition: typeinfo.h:92
@ PCB_FIELD_T
class PCB_FIELD, text associated with a footprint property
Definition: typeinfo.h:90
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:98
@ PCB_DIMENSION_T
class PCB_DIMENSION_BASE: abstract dimension meta-type
Definition: typeinfo.h:100
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:96