KiCad PCB EDA Suite
drc_test_provider_disallow.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2004-2022 KiCad Developers.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
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11 * This program is distributed in the hope that it will be useful,
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
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20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
24#include <atomic>
25#include <common.h>
27#include <drc/drc_rtree.h>
28#include <drc/drc_engine.h>
29#include <drc/drc_item.h>
30#include <drc/drc_rule.h>
32#include <pad.h>
33#include <progress_reporter.h>
34#include <thread_pool.h>
35#include <zone.h>
36
37
38/*
39 "Disallow" test. Goes through all items, matching types/conditions drop errors.
40 Errors generated:
41 - DRCE_ALLOWED_ITEMS
42 - DRCE_TEXT_ON_EDGECUTS
43*/
44
46{
47public:
49 {
50 }
51
53 {
54 }
55
56 virtual bool Run() override;
57
58 virtual const wxString GetName() const override
59 {
60 return wxT( "disallow" );
61 };
62
63 virtual const wxString GetDescription() const override
64 {
65 return wxT( "Tests for disallowed items (e.g. keepouts)" );
66 }
67};
68
69
71{
72 if( !reportPhase( _( "Checking keepouts & disallow constraints..." ) ) )
73 return false; // DRC cancelled
74
75 BOARD* board = m_drcEngine->GetBoard();
76 int epsilon = board->GetDesignSettings().GetDRCEpsilon();
77
78 // First build out the board's cache of copper-keepout to copper-zone caches. This is where
79 // the bulk of the time is spent, and we can do this in parallel.
80 //
81 std::vector<ZONE*> antiCopperKeepouts;
82 std::vector<ZONE*> copperZones;
83 std::vector<std::pair<ZONE*, ZONE*>> toCache;
84 std::atomic<size_t> done( 1 );
85 int totalCount = 0;
86
88 [&]( BOARD_ITEM* item ) -> bool
89 {
90 ZONE* zone = dynamic_cast<ZONE*>( item );
91
92 if( zone && zone->GetIsRuleArea() && zone->GetDoNotAllowCopperPour() )
93 antiCopperKeepouts.push_back( zone );
94 else if( zone && zone->IsOnCopperLayer() )
95 copperZones.push_back( zone );
96
97 totalCount++;
98
99 return true;
100 } );
101
102 for( ZONE* ruleArea : antiCopperKeepouts )
103 {
104 for( ZONE* copperZone : copperZones )
105 {
106 toCache.push_back( { ruleArea, copperZone } );
107 totalCount++;
108 }
109 }
110
111 auto query_areas =
112 [&]( std::pair<ZONE* /* rule area */, ZONE* /* copper zone */> areaZonePair ) -> size_t
113 {
114 if( m_drcEngine->IsCancelled() )
115 return 0;
116
117 ZONE* ruleArea = areaZonePair.first;
118 ZONE* copperZone = areaZonePair.second;
119 BOX2I areaBBox = ruleArea->GetCachedBoundingBox();
120 BOX2I copperBBox = copperZone->GetCachedBoundingBox();
121 bool isInside = false;
122
123 if( copperZone->IsFilled() && areaBBox.Intersects( copperBBox ) )
124 {
125 // Collisions include touching, so we need to deflate outline by
126 // enough to exclude it. This is particularly important for detecting
127 // copper fills as they will be exactly touching along the entire
128 // exclusion border.
129 SHAPE_POLY_SET areaPoly = ruleArea->Outline()->CloneDropTriangulation();
130 areaPoly.Deflate( epsilon, 0, SHAPE_POLY_SET::ALLOW_ACUTE_CORNERS );
131
132 DRC_RTREE* zoneRTree = board->m_CopperZoneRTreeCache[ copperZone ].get();
133
134 if( zoneRTree )
135 {
136 for( PCB_LAYER_ID layer : ruleArea->GetLayerSet().Seq() )
137 {
138 if( zoneRTree->QueryColliding( areaBBox, &areaPoly, layer ) )
139 {
140 isInside = true;
141 break;
142 }
143
144 if( m_drcEngine->IsCancelled() )
145 return 0;
146 }
147 }
148 }
149
150 if( m_drcEngine->IsCancelled() )
151 return 0;
152
153 PTR_PTR_LAYER_CACHE_KEY key = { ruleArea, copperZone, UNDEFINED_LAYER };
154
155 {
156 std::unique_lock<std::mutex> cacheLock( board->m_CachesMutex );
157 board->m_IntersectsAreaCache[ key ] = isInside;
158 }
159
160 done.fetch_add( 1 );
161
162 return 1;
163 };
164
166 std::vector<std::future<size_t>> returns;
167
168 returns.reserve( toCache.size() );
169
170 for( const std::pair<ZONE*, ZONE*>& areaZonePair : toCache )
171 returns.emplace_back( tp.submit( query_areas, areaZonePair ) );
172
173 for( const std::future<size_t>& ret : returns )
174 {
175 std::future_status status = ret.wait_for( std::chrono::milliseconds( 250 ) );
176
177 while( status != std::future_status::ready )
178 {
179 m_drcEngine->ReportProgress( static_cast<double>( done ) / toCache.size() );
180 status = ret.wait_for( std::chrono::milliseconds( 250 ) );
181 }
182 }
183
184 if( m_drcEngine->IsCancelled() )
185 return false;
186
187 // Now go through all the board objects calling the DRC_ENGINE to run the actual disallow
188 // tests. These should be reasonably quick using the caches generated above.
189 //
190 const int progressDelta = 250;
191 int ii = static_cast<int>( toCache.size() );
192
193 auto checkTextOnEdgeCuts =
194 [&]( BOARD_ITEM* item )
195 {
196 if( item->Type() == PCB_TEXT_T || item->Type() == PCB_TEXTBOX_T
197 || BaseType( item->Type() ) == PCB_DIMENSION_T )
198 {
199 if( item->GetLayer() == Edge_Cuts )
200 {
201 std::shared_ptr<DRC_ITEM> drc = DRC_ITEM::Create( DRCE_TEXT_ON_EDGECUTS );
202 drc->SetItems( item );
203 reportViolation( drc, item->GetPosition(), Edge_Cuts );
204 }
205 }
206 };
207
208 auto checkDisallow =
209 [&]( BOARD_ITEM* item )
210 {
212 nullptr, UNDEFINED_LAYER );
213
214 if( constraint.m_DisallowFlags && constraint.GetSeverity() != RPT_SEVERITY_IGNORE )
215 {
216 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_ALLOWED_ITEMS );
217 wxString msg;
218
219 msg.Printf( drcItem->GetErrorText() + wxS( " (%s)" ), constraint.GetName() );
220
221 drcItem->SetErrorMessage( msg );
222 drcItem->SetItems( item );
223 drcItem->SetViolatingRule( constraint.GetParentRule() );
224
226
227 if( item->GetLayerSet().count() )
228 layer = item->GetLayerSet().Seq().front();
229
230 reportViolation( drcItem, item->GetPosition(), layer );
231 }
232 };
233
235 [&]( BOARD_ITEM* item ) -> bool
236 {
238 checkTextOnEdgeCuts( item );
239
241 {
242 ZONE* zone = dynamic_cast<ZONE*>( item );
243
244 if( zone && zone->GetIsRuleArea() )
245 return true;
246
247 item->ClearFlags( HOLE_PROXY ); // Just in case
248
249 checkDisallow( item );
250
251 if( item->HasHole() )
252 {
253 item->SetFlags( HOLE_PROXY );
254 checkDisallow( item );
255 item->ClearFlags( HOLE_PROXY );
256 }
257 }
258
259 if( !reportProgress( ii++, totalCount, progressDelta ) )
260 return false;
261
262 return true;
263 } );
264
266
267 return !m_drcEngine->IsCancelled();
268}
269
270
271namespace detail
272{
274}
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:50
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:265
std::unordered_map< ZONE *, std::unique_ptr< DRC_RTREE > > m_CopperZoneRTreeCache
Definition: board.h:1152
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:617
std::unordered_map< PTR_PTR_LAYER_CACHE_KEY, bool > m_IntersectsAreaCache
Definition: board.h:1149
std::mutex m_CachesMutex
Definition: board.h:1145
bool Intersects(const BOX2< Vec > &aRect) const
Definition: box2.h:269
wxString GetName() const
Definition: drc_rule.h:147
int m_DisallowFlags
Definition: drc_rule.h:171
SEVERITY GetSeverity() const
Definition: drc_rule.h:160
DRC_RULE * GetParentRule() const
Definition: drc_rule.h:143
BOARD * GetBoard() const
Definition: drc_engine.h:89
bool ReportProgress(double aProgress)
bool IsErrorLimitExceeded(int error_code)
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
Definition: drc_engine.cpp:671
bool IsCancelled() const
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition: drc_item.cpp:325
Implement an R-tree for fast spatial and layer indexing of connectable items.
Definition: drc_rtree.h:48
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
Definition: drc_rtree.h:211
virtual const wxString GetName() const override
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
virtual const wxString GetDescription() const override
Represent a DRC "provider" which runs some DRC functions over a BOARD and spits out #DRC_ITEMs and po...
virtual bool reportPhase(const wxString &aStageName)
int forEachGeometryItem(const std::vector< KICAD_T > &aTypes, LSET aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
virtual bool reportProgress(int aCount, int aSize, int aDelta)
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const VECTOR2I &aMarkerPos, int aMarkerLayer)
DRC_ENGINE * m_drcEngine
virtual void reportRuleStatistics()
void ClearFlags(EDA_ITEM_FLAGS aMask=EDA_ITEM_ALL_FLAGS)
Definition: eda_item.h:143
static LSET AllLayersMask()
Definition: lset.cpp:808
LSEQ Seq(const PCB_LAYER_ID *aWishListSequence, unsigned aCount) const
Return an LSEQ from the union of this LSET and a desired sequence.
Definition: lset.cpp:411
Represent a set of closed polygons.
@ ALLOW_ACUTE_CORNERS
just inflate the polygon. Acute angles create spikes
void Deflate(int aAmount, int aCircleSegmentsCount, CORNER_STRATEGY aCornerStrategy=ROUND_ALL_CORNERS)
SHAPE_POLY_SET CloneDropTriangulation() const
Creates a new empty polygon in the set and returns its index.
Handle a list of polygons defining a copper zone.
Definition: zone.h:57
bool GetIsRuleArea() const
Accessors to parameters used in Rule Area zones:
Definition: zone.h:691
bool IsFilled() const
Definition: zone.h:235
SHAPE_POLY_SET * Outline()
Definition: zone.h:305
const BOX2I GetCachedBoundingBox() const
ONLY TO BE USED BY CLIENTS WHICH SET UP THE CACHE!
Definition: zone.h:133
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: zone.h:115
bool GetDoNotAllowCopperPour() const
Definition: zone.h:692
bool IsOnCopperLayer() const override
Definition: zone.cpp:245
The common library.
@ DRCE_TEXT_ON_EDGECUTS
Definition: drc_item.h:42
@ DRCE_ALLOWED_ITEMS
Definition: drc_item.h:41
@ DISALLOW_CONSTRAINT
Definition: drc_rule.h:61
#define _(s)
#define HOLE_PROXY
Indicates the BOARD_ITEM is a proxy for its hole.
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:59
@ Edge_Cuts
Definition: layer_ids.h:113
@ UNDEFINED_LAYER
Definition: layer_ids.h:60
static DRC_REGISTER_TEST_PROVIDER< DRC_TEST_PROVIDER_ANNULAR_WIDTH > dummy
@ RPT_SEVERITY_IGNORE
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
Definition: thread_pool.cpp:32
static thread_pool * tp
Definition: thread_pool.cpp:30
BS::thread_pool thread_pool
Definition: thread_pool.h:30
constexpr KICAD_T BaseType(const KICAD_T aType)
Return the underlying type of the given type.
Definition: typeinfo.h:253
@ PCB_TEXTBOX_T
class PCB_TEXTBOX, wrapped text on a layer
Definition: typeinfo.h:91
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
Definition: typeinfo.h:90
@ PCB_DIMENSION_T
class PCB_DIMENSION_BASE: abstract dimension meta-type
Definition: typeinfo.h:105