59 VECTOR2I& aMidpoint,
int& aDistance )
64 std::vector<PCB_SHAPE*> shapes;
66 for(
int ii = 0; ii < items.
GetCount(); ++ii )
71 shapes.push_back( shape );
74 int best = std::numeric_limits<int>::max();
78 for(
size_t ii = 0; ii < shapes.size(); ++ii )
80 std::shared_ptr<SHAPE> shapeA = shapes[ii]->GetEffectiveShape();
82 for(
size_t jj = ii + 1; jj < shapes.size(); ++jj )
84 std::shared_ptr<SHAPE> shapeB = shapes[jj]->GetEffectiveShape();
88 if( shapeA && shapeB && shapeA->NearestPoints( shapeB.get(), ptA, ptB ) )
90 int dist = ( ptA - ptB ).EuclideanNorm();
104 if( aItemA && aItemB )
107 aMidpoint = ( bestA + bestB ) / 2;
127 virtual bool Run()
override;
129 virtual const wxString
GetName()
const override {
return wxT(
"miscellaneous" ); };
146 bool errorHandled =
false;
157 std::swap( itemA, itemB );
163 bool usedGap =
false;
167 shapeA =
static_cast<PCB_SHAPE*
>( itemA );
168 shapeB =
static_cast<PCB_SHAPE*
>( itemB );
170 else if( itemA && !itemB && itemA->Type() ==
PCB_SHAPE_T )
174 shapeA =
static_cast<PCB_SHAPE*
>( itemA );
182 usedGap = shapeA && shapeB;
185 if( shapeA && shapeB )
190 if( effectiveShapeA && effectiveShapeB )
192 BOX2I bboxA = effectiveShapeA->BBox();
193 BOX2I bboxB = effectiveShapeB->BBox();
198 markerPos = overlap.
Centre();
205 if( effectiveShapeA->NearestPoints( effectiveShapeB.get(), ptA, ptB ) )
207 gap = ( ptA - ptB ).EuclideanNorm();
208 markerPos = ( ptA + ptB ) / 2;
217 if( itemA && itemB && usedGap )
223 drcItem->SetErrorDetail( msg );
226 drcItem->SetItems( itemA, itemB );
233 const int minSizeForValideGraphics =
pcbIUScale.mmToIU( 0.001 );
244 drcItem->SetErrorDetail(
_(
"(Suspicious items found on Edge.Cuts layer)" ) );
254 int chainingEpsilon =
m_board->GetOutlinesChainingEpsilon();
268 drcItem->SetErrorDetail(
_(
"(no edges found on Edge.Cuts layer)" ) );
279 const int progressDelta = 2000;
295 auto checkDisabledLayers =
313 if( disabledLayers.
Contains(
pad->GetPrincipalLayer() ) )
314 badLayer = item->GetLayer();
327 via->LayerPair( &
top, &bottom );
329 if( disabledLayers.test(
top ) )
331 else if( disabledLayers.test( bottom ) )
341 LSET badLayers = disabledLayers & item->GetLayerSet();
343 if( badLayers.any() )
344 badLayer = badLayers.
Seq().front();
350 drcItem->SetErrorDetail( wxString::Format(
_(
"(layer %s)" ),
LayerName( badLayer ) ) );
351 drcItem->SetItems( item );
369 std::vector<BOARD_ITEM*> allItems;
374 allItems.push_back( item );
378 std::atomic<size_t> itemsDone( 0 );
379 size_t itemCount = allItems.size();
393 drcItem->SetErrorDetail( wxString::Format( wxS(
"(%s)" ), c->
GetName() ) );
394 drcItem->SetItems( item );
401 itemsDone.fetch_add( 1 );
405 auto itemFutures =
tp.submit_loop( 0, itemCount, checkItem, itemCount );
407 while( itemsDone < itemCount )
414 itemFutures.wait_for( std::chrono::milliseconds( 250 ) );
425 const int progressDelta = 2000;
429 static const std::vector<KICAD_T> itemTypes = {
437 static wxRegEx varRefRegEx( wxT(
"(^|[^\\\\])\\$\\{.*\\}.*" ) );
448 static wxRegEx warningExpr( wxS(
"(^|[^\\\\])\\$\\{DRC_WARNING\\s*([^}]*)\\}" ) );
449 static wxRegEx errorExpr( wxS(
"(^|[^\\\\])\\$\\{DRC_ERROR\\s*([^}]*)\\}" ) );
452 [&]( wxRegEx& aExpr,
int aErrorCode )
460 wxString remaining =
text;
462 while( aExpr.Matches( remaining ) )
466 if( !
m_drcEngine->IsErrorLimitExceeded( aErrorCode ) )
468 wxString drcText = aExpr.GetMatch( remaining, 2 );
473 drcItem->SetItems( item );
475 drcText +=
_(
" (in drawing sheet)" );
477 drcItem->SetErrorMessage( drcText );
485 if( !aExpr.GetMatch( &start, &len, 0 ) || len == 0 )
488 remaining = remaining.Mid( start + len );
497 return foundWarning || foundError;
532 drcItem->SetItems( item );
553 drawItems.
BuildDrawItemsList( drawingSheet->GetPageInfo(), drawingSheet->GetTitleBlock() );
572 drcItem->SetItems( drawingSheet );
586 std::shared_ptr<NET_SETTINGS> netSettings =
m_board->GetProject()->GetProjectFile().NetSettings();
587 const std::shared_ptr<TUNING_PROFILES> tuningProfiles =
588 m_board->GetProject()->GetProjectFile().TuningProfileParameters();
590 std::set<wxString> profileNames;
591 std::ranges::for_each( tuningProfiles->GetTuningProfiles(),
594 if( const wxString name = tuningProfile.m_ProfileName; name != wxEmptyString )
595 profileNames.insert( name );
598 for(
const auto& [
name, netclass] : netSettings->GetNetclasses() )
603 const wxString profileName = netclass->GetTuningProfile();
605 if( netclass->HasTuningProfile() && !profileNames.contains( profileName ) )
608 drcItem->SetErrorDetail( wxString::Format(
"(Net Class: %s, Tuning Profile: %s)",
620 std::shared_ptr<NET_SETTINGS> netSettings =
m_board->GetDesignSettings().m_NetSettings;
621 std::set<wxString> names = { netSettings->GetDefaultNetclass()->GetName() };
623 for(
const auto& [
name, netclass] : netSettings->GetNetclasses() )
624 names.insert( netclass->GetName() );
627 for(
const auto& [
name, netclass] : netSettings->GetCompositeNetclasses() )
633 names.insert( constituent->GetName() );
636 for(
const wxString&
name : names )
645 drcItem->SetErrorMessage( wxString::Format(
_(
"Net class '%s' cannot be used in rules; its clearance "
646 "and width are not checked" ),
662 if( !
reportPhase(
_(
"Checking net class names..." ) ) )
678 if( !
reportPhase(
_(
"Checking disabled layers..." ) ) )
704 if( !
reportPhase(
_(
"Checking for missing tuning profiles..." ) ) )
constexpr EDA_IU_SCALE pcbIUScale
BASE_SET & flip(size_t pos)
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Information pertinent to a Pcbnew printed circuit board.
constexpr BOX2< Vec > Intersect(const BOX2< Vec > &aRect)
constexpr size_type GetWidth() const
constexpr Vec Centre() const
constexpr size_type GetHeight() const
int GetCount() const
Return the number of objects in the list.
DRC_RULE * GetParentRule() const
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
virtual const wxString GetName() const override
void testMissingTuningProfiles()
virtual ~DRC_TEST_PROVIDER_MISC()=default
void testUnquotableNetclasses()
void testDisabledLayers()
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
virtual bool reportPhase(const wxString &aStageName)
int forEachGeometryItem(const std::vector< KICAD_T > &aTypes, const LSET &aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
void reportViolation(std::shared_ptr< DRC_ITEM > &item, const VECTOR2I &aMarkerPos, int aMarkerLayer, const std::function< void(PCB_MARKER *)> &aPathGenerator=[](PCB_MARKER *){})
static std::vector< KICAD_T > s_allBasicItems
virtual bool reportProgress(size_t aCount, size_t aSize, size_t aDelta=1)
Base class to handle basic graphic items.
Store the list of graphic items: rect, lines, polygons and texts to draw/plot the title block and fra...
DS_DRAW_ITEM_BASE * GetFirst()
void BuildDrawItemsList(const PAGE_INFO &aPageInfo, const TITLE_BLOCK &aTitleBlock)
Drawing or plot the drawing sheet.
void SetFileName(const wxString &aFileName)
Set the filename to draw/plot.
void SetSheetName(const wxString &aSheetName)
Set the sheet name to draw/plot.
void SetSheetLayer(const wxString &aSheetLayer)
Set the sheet layer to draw/plot.
void SetSheetCount(int aSheetCount)
Set the value of the count of sheets, for basic inscriptions.
void SetPageNumber(const wxString &aPageNumber)
Set the value of the sheet number.
DS_DRAW_ITEM_BASE * GetNext()
void SetProject(const PROJECT *aProject)
virtual VECTOR2I GetPosition() const
A mix-in class (via multiple inheritance) that handles texts such as labels, parts,...
LSET is a set of PCB_LAYER_IDs.
static const LSET & AllCuMask()
return AllCuMask( MAX_CU_LAYERS );
LSEQ Seq(const LSEQ &aSequence) const
Return an LSEQ from the union of this LSET and a desired sequence.
static const LSET & AllLayersMask()
bool Contains(PCB_LAYER_ID aLayer) const
See if the layer set contains a PCB layer.
A collection of nets and the parameters used to route or test these nets.
const std::vector< NETCLASS * > & GetConstituentNetclasses() const
Gets the netclasses which make up this netclass.
std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT, DRC_CONSTRAINT_T aUsage=NULL_CONSTRAINT) const override
Make a set of SHAPE objects representing the PCB_SHAPE.
PCB_LAYER_ID GetLayer() const override
Return the primary layer this item is on.
Collect all BOARD_ITEM objects of a given set of KICAD_T type(s).
void Collect(BOARD_ITEM *aBoard, const std::vector< KICAD_T > &aTypes)
Collect BOARD_ITEM objects using this class's Inspector method, which does the collection.
Represent a set of closed polygons.
wxString MessageTextFromValue(double aValue, bool aAddUnitLabel=true, EDA_DATA_TYPE aType=EDA_DATA_TYPE::DISTANCE) const
A lower-precision version of StringFromValue().
const wxString ExpandEnvVarSubstitutions(const wxString &aString, const PROJECT *aProject, bool aAllowEscapes)
Replace any environment variable & text variable references with their values.
bool BuildBoardPolygonOutlines(BOARD *aBoard, SHAPE_POLY_SET &aOutlines, int aErrorMax, int aChainingEpsilon, bool aInferOutlineIfNecessary, OUTLINE_ERROR_HANDLER *aErrorHandler, bool aAllowUseArcsInPolygons)
Extract the board outlines and build a closed polygon from lines, arcs and circle items on edge cut l...
bool TestBoardOutlinesGraphicItems(BOARD *aBoard, int aMinDist, OUTLINE_ERROR_HANDLER *aErrorHandler)
Test a board graphic items on edge cut layer for validity.
const std::function< void(const wxString &msg, BOARD_ITEM *itemA, BOARD_ITEM *itemB, const VECTOR2I &pt)> OUTLINE_ERROR_HANDLER
@ DRCE_DISABLED_LAYER_ITEM
@ DRCE_MISSING_TUNING_PROFILE
@ DRCE_UNRESOLVED_VARIABLE
static void findClosestOutlineGap(BOARD *aBoard, PCB_SHAPE *&aItemA, PCB_SHAPE *&aItemB, VECTOR2I &aMidpoint, int &aDistance)
wxString LayerName(int aLayer)
Returns the default display name for a given layer.
@ LAYER_DRAWINGSHEET
Sheet frame and title block.
PCB_LAYER_ID
A quick note on layer IDs:
std::optional< wxString > EscapeStringLiteral(const wxString &aText)
Escape text for use between the quotes of an expression string.
static DRC_REGISTER_TEST_PROVIDER< DRC_TEST_PROVIDER_ANNULAR_WIDTH > dummy
@ SMD
Smd pad, appears on the solder paste layer (default)
@ CONN
Like smd, does not appear on the solder paste layer (default) Note: also has a special attribute in G...
Represents a single line in the tuning profile configuration grid.
KIBIS top(path, &reporter)
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
BS::priority_thread_pool thread_pool
@ PCB_SHAPE_T
class PCB_SHAPE, a segment not on copper layers
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
@ PCB_TEXTBOX_T
class PCB_TEXTBOX, wrapped text on a layer
@ PCB_ZONE_T
class ZONE, a copper pour area
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
@ PCB_FIELD_T
class PCB_FIELD, text associated with a footprint property
@ PCB_TABLECELL_T
class PCB_TABLECELL, PCB_TEXTBOX for use in tables
@ PCB_PAD_T
class PAD, a pad in a footprint
@ PCB_DIMENSION_T
class PCB_DIMENSION_BASE: abstract dimension meta-type
VECTOR2< int32_t > VECTOR2I