KiCad PCB EDA Suite
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drc_test_provider_misc.cpp
Go to the documentation of this file.
1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2004-2023 KiCad Developers.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you may find one here:
18 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19 * or you may search the http://www.gnu.org website for the version 2 license,
20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
25#include <drc/drc_engine.h>
26#include <drc/drc_item.h>
27#include <drc/drc_rule.h>
30#include <pad.h>
31#include <pcb_track.h>
32
35
36/*
37 Miscellaneous tests:
38
39 - DRCE_DISABLED_LAYER_ITEM, ///< item on a disabled layer
40 - DRCE_INVALID_OUTLINE, ///< invalid board outline
41 - DRCE_UNRESOLVED_VARIABLE,
42 - DRCE_ASSERTION_FAILURE ///< user-defined assertions
43*/
44
46{
47public:
49 m_board( nullptr )
50 {
51 m_isRuleDriven = false;
52 }
53
55 {
56 }
57
58 virtual bool Run() override;
59
60 virtual const wxString GetName() const override
61 {
62 return wxT( "miscellaneous" );
63 };
64
65 virtual const wxString GetDescription() const override
66 {
67 return wxT( "Misc checks (board outline, missing textvars)" );
68 }
69
70private:
71 void testOutline();
72 void testDisabledLayers();
73 void testTextVars();
74 void testAssertions();
75
77};
78
79
81{
82 SHAPE_POLY_SET dummyOutline;
83 bool errorHandled = false;
84
85 OUTLINE_ERROR_HANDLER errorHandler =
86 [&]( const wxString& msg, BOARD_ITEM* itemA, BOARD_ITEM* itemB, const VECTOR2I& pt )
87 {
88 if( !itemA ) // If we only have a single item, make sure it's A
89 std::swap( itemA, itemB );
90
91 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_INVALID_OUTLINE );
92
93 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
94 drcItem->SetItems( itemA, itemB );
95
96 reportViolation( drcItem, pt, Edge_Cuts );
97 errorHandled = true;
98 };
99
100 // Use the standard chaining epsilon here so that we report errors that might affect
101 // other tools (such as STEP export).
102 int chainingEpsilon = m_board->GetOutlinesChainingEpsilon();
103
105 chainingEpsilon, &errorHandler ) )
106 {
107 if( errorHandled )
108 {
109 // if there is an invalid outline, then there must be an outline
110 }
111 else
112 {
113 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_INVALID_OUTLINE );
114 wxString msg;
115
116 msg.Printf( _( "(no edges found on Edge.Cuts layer)" ) );
117
118 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
119 drcItem->SetItems( m_board );
120
122 }
123 }
124}
125
126
128{
129 const int progressDelta = 2000;
130 int ii = 0;
131 int items = 0;
132
133 auto countItems =
134 [&]( BOARD_ITEM* item ) -> bool
135 {
136 ++items;
137 return true;
138 };
139
140 LSET disabledLayers = m_board->GetEnabledLayers().flip();
141
142 // Perform the test only for copper layers
143 disabledLayers &= LSET::AllCuMask();
144
145 auto checkDisabledLayers =
146 [&]( BOARD_ITEM* item ) -> bool
147 {
149 return false;
150
151 if( !reportProgress( ii++, items, progressDelta ) )
152 return false;
153
154 PCB_LAYER_ID badLayer = UNDEFINED_LAYER;
155
156 if( item->Type() == PCB_PAD_T )
157 {
158 PAD* pad = static_cast<PAD*>( item );
159
160 if( pad->GetAttribute() == PAD_ATTRIB::SMD
161 || pad->GetAttribute() == PAD_ATTRIB::CONN )
162 {
163 if( disabledLayers.test( pad->GetPrincipalLayer() ) )
164 badLayer = item->GetLayer();
165 }
166 else
167 {
168 // Through hole pad pierces all physical layers.
169 }
170 }
171 else if( item->Type() == PCB_VIA_T )
172 {
173 PCB_VIA* via = static_cast<PCB_VIA*>( item );
174 PCB_LAYER_ID top;
175 PCB_LAYER_ID bottom;
176
177 via->LayerPair( &top, &bottom );
178
179 if( disabledLayers.test( top ) )
180 badLayer = top;
181 else if( disabledLayers.test( bottom ) )
182 badLayer = bottom;
183 }
184 else if( item->Type() == PCB_ZONE_T )
185 {
186 // Footprint zones just get a top/bottom/inner setting, so they're on
187 // whatever inner layers there are.
188 }
189 else
190 {
191 LSET badLayers = disabledLayers & item->GetLayerSet();
192
193 if( badLayers.any() )
194 badLayer = badLayers.Seq().front();
195 }
196
197 if( badLayer != UNDEFINED_LAYER )
198 {
200 wxString msg;
201
202 msg.Printf( _( "(layer %s)" ), LayerName( badLayer ) );
203
204 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
205 drcItem->SetItems( item );
206
207 reportViolation( drcItem, item->GetPosition(), UNDEFINED_LAYER );
208 }
209
210 return true;
211 };
212
215}
216
217
219{
220 const int progressDelta = 2000;
221 int ii = 0;
222 int items = 0;
223
224 auto countItems =
225 [&]( BOARD_ITEM* item ) -> bool
226 {
227 ++items;
228 return true;
229 };
230
231 auto checkAssertions =
232 [&]( BOARD_ITEM* item ) -> bool
233 {
235 return false;
236
237 if( !reportProgress( ii++, items, progressDelta ) )
238 return false;
239
241 [&]( const DRC_CONSTRAINT* c )
242 {
244 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " (" )
245 + c->GetName() + wxS( ")" ) );
246 drcItem->SetItems( item );
247 drcItem->SetViolatingRule( c->GetParentRule() );
248
249 reportViolation( drcItem, item->GetPosition(), item->GetLayer() );
250 } );
251
252 return true;
253 };
254
255 forEachGeometryItem( {}, LSET::AllLayersMask(), countItems );
256 forEachGeometryItem( {}, LSET::AllLayersMask(), checkAssertions );
257}
258
259
261{
262 const int progressDelta = 2000;
263 int ii = 0;
264 int items = 0;
265
266 static const std::vector<KICAD_T> itemTypes = {
271 };
272
274 [&]( BOARD_ITEM* item ) -> bool
275 {
276 ++items;
277 return true;
278 } );
279
281 [&]( BOARD_ITEM* item ) -> bool
282 {
284 return false;
285
286 if( !reportProgress( ii++, items, progressDelta ) )
287 return false;
288
289 BOARD_ITEM* boardItem = dynamic_cast<BOARD_ITEM*>( item );
290 EDA_TEXT* text = dynamic_cast<EDA_TEXT*>( boardItem );
291
292 wxCHECK( boardItem, false );
293
294 if( text && text->GetShownText( true ).Matches( wxT( "*${*}*" ) ) )
295 {
296 std::shared_ptr<DRC_ITEM>drcItem = DRC_ITEM::Create( DRCE_UNRESOLVED_VARIABLE );
297 drcItem->SetItems( item );
298
299 reportViolation( drcItem, boardItem->GetPosition(), boardItem->GetLayer() );
300 }
301
302 return true;
303 } );
304
306 DS_DRAW_ITEM_LIST drawItems( pcbIUScale );
307
309 return;
310
311 drawItems.SetPageNumber( wxT( "1" ) );
312 drawItems.SetSheetCount( 1 );
313 drawItems.SetFileName( wxT( "dummyFilename" ) );
314 drawItems.SetSheetName( wxT( "dummySheet" ) );
315 drawItems.SetSheetLayer( wxT( "dummyLayer" ) );
316 drawItems.SetProject( m_board->GetProject() );
317 drawItems.BuildDrawItemsList( drawingSheet->GetPageInfo(), drawingSheet->GetTitleBlock() );
318
319 for( DS_DRAW_ITEM_BASE* item = drawItems.GetFirst(); item; item = drawItems.GetNext() )
320 {
322 break;
323
324 if( m_drcEngine->IsCancelled() )
325 return;
326
327 DS_DRAW_ITEM_TEXT* text = dynamic_cast<DS_DRAW_ITEM_TEXT*>( item );
328
329 if( text && text->GetShownText( true ).Matches( wxT( "*${*}*" ) ) )
330 {
331 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_UNRESOLVED_VARIABLE );
332 drcItem->SetItems( drawingSheet );
333
334 reportViolation( drcItem, text->GetPosition(), LAYER_DRAWINGSHEET );
335 }
336 }
337}
338
339
341{
343
345 {
346 if( !reportPhase( _( "Checking board outline..." ) ) )
347 return false; // DRC cancelled
348
349 testOutline();
350 }
351
353 {
354 if( !reportPhase( _( "Checking disabled layers..." ) ) )
355 return false; // DRC cancelled
356
358 }
359
361 {
362 if( !reportPhase( _( "Checking text variables..." ) ) )
363 return false; // DRC cancelled
364
365 testTextVars();
366 }
367
369 {
370 if( !reportPhase( _( "Checking assertions..." ) ) )
371 return false; // DRC cancelled
372
374 }
375
376 return !m_drcEngine->IsCancelled();
377}
378
379
380namespace detail
381{
383}
constexpr EDA_IU_SCALE pcbIUScale
Definition: base_units.h:109
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:77
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:204
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:271
LSET GetEnabledLayers() const
A proxy function that calls the corresponding function in m_BoardSettings.
Definition: board.cpp:614
const BOX2I GetBoundingBox() const override
Return the orthogonal bounding box of this object for display purposes.
Definition: board.h:847
int GetOutlinesChainingEpsilon()
Definition: board.h:687
PROJECT * GetProject() const
Definition: board.h:449
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:731
Vec Centre() const
Definition: box2.h:71
wxString GetName() const
Definition: drc_rule.h:149
DRC_RULE * GetParentRule() const
Definition: drc_rule.h:145
DS_PROXY_VIEW_ITEM * GetDrawingSheet() const
Definition: drc_engine.h:98
BOARD * GetBoard() const
Definition: drc_engine.h:89
bool IsErrorLimitExceeded(int error_code)
void ProcessAssertions(const BOARD_ITEM *a, std::function< void(const DRC_CONSTRAINT *)> aFailureHandler, REPORTER *aReporter=nullptr)
bool IsCancelled() const
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition: drc_item.cpp:325
virtual const wxString GetName() const override
virtual const wxString GetDescription() const override
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
Represent a DRC "provider" which runs some DRC functions over a BOARD and spits out DRC_ITEM and posi...
virtual bool reportPhase(const wxString &aStageName)
int forEachGeometryItem(const std::vector< KICAD_T > &aTypes, LSET aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
virtual bool reportProgress(int aCount, int aSize, int aDelta)
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const VECTOR2I &aMarkerPos, int aMarkerLayer)
static std::vector< KICAD_T > s_allBasicItems
DRC_ENGINE * m_drcEngine
Base class to handle basic graphic items.
Definition: ds_draw_item.h:59
Store the list of graphic items: rect, lines, polygons and texts to draw/plot the title block and fra...
Definition: ds_draw_item.h:401
DS_DRAW_ITEM_BASE * GetFirst()
Definition: ds_draw_item.h:511
void BuildDrawItemsList(const PAGE_INFO &aPageInfo, const TITLE_BLOCK &aTitleBlock)
Drawing or plot the drawing sheet.
void SetFileName(const wxString &aFileName)
Set the filename to draw/plot.
Definition: ds_draw_item.h:444
void SetSheetName(const wxString &aSheetName)
Set the sheet name to draw/plot.
Definition: ds_draw_item.h:449
void SetSheetLayer(const wxString &aSheetLayer)
Set the sheet layer to draw/plot.
Definition: ds_draw_item.h:459
void SetSheetCount(int aSheetCount)
Set the value of the count of sheets, for basic inscriptions.
Definition: ds_draw_item.h:498
void SetPageNumber(const wxString &aPageNumber)
Set the value of the sheet number.
Definition: ds_draw_item.h:488
DS_DRAW_ITEM_BASE * GetNext()
Definition: ds_draw_item.h:521
void SetProject(const PROJECT *aProject)
Definition: ds_draw_item.h:424
A graphic text.
Definition: ds_draw_item.h:313
virtual VECTOR2I GetPosition() const
Definition: eda_item.h:239
A mix-in class (via multiple inheritance) that handles texts such as labels, parts,...
Definition: eda_text.h:80
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:552
static LSET AllLayersMask()
Definition: lset.cpp:808
LSEQ Seq(const PCB_LAYER_ID *aWishListSequence, unsigned aCount) const
Return an LSEQ from the union of this LSET and a desired sequence.
Definition: lset.cpp:411
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:773
Definition: pad.h:58
PCB_LAYER_ID GetLayer() const override
Return the primary layer this item is on.
Definition: pad.cpp:237
Represent a set of closed polygons.
bool BuildBoardPolygonOutlines(BOARD *aBoard, SHAPE_POLY_SET &aOutlines, int aErrorMax, int aChainingEpsilon, OUTLINE_ERROR_HANDLER *aErrorHandler, bool aAllowUseArcsInPolygons)
Extracts the board outlines and build a closed polygon from lines, arcs and circle items on edge cut ...
const std::function< void(const wxString &msg, BOARD_ITEM *itemA, BOARD_ITEM *itemB, const VECTOR2I &pt)> OUTLINE_ERROR_HANDLER
@ DRCE_DISABLED_LAYER_ITEM
Definition: drc_item.h:67
@ DRCE_INVALID_OUTLINE
Definition: drc_item.h:68
@ DRCE_UNRESOLVED_VARIABLE
Definition: drc_item.h:81
@ DRCE_ASSERTION_FAILURE
Definition: drc_item.h:82
#define _(s)
wxString LayerName(int aLayer)
Returns the default display name for a given layer.
Definition: layer_id.cpp:30
@ LAYER_DRAWINGSHEET
drawingsheet frame and titleblock
Definition: layer_ids.h:218
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
@ Edge_Cuts
Definition: layer_ids.h:114
@ UNDEFINED_LAYER
Definition: layer_ids.h:61
static DRC_REGISTER_TEST_PROVIDER< DRC_TEST_PROVIDER_ANNULAR_WIDTH > dummy
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:94
@ PCB_TEXTBOX_T
class PCB_TEXTBOX, wrapped text on a layer
Definition: typeinfo.h:92
@ PCB_ZONE_T
class ZONE, a copper pour area
Definition: typeinfo.h:104
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
Definition: typeinfo.h:91
@ PCB_FIELD_T
class PCB_FIELD, text associated with a footprint property
Definition: typeinfo.h:90
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87
@ PCB_DIMENSION_T
class PCB_DIMENSION_BASE: abstract dimension meta-type
Definition: typeinfo.h:97