KiCad PCB EDA Suite
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drc_test_provider_misc.cpp
Go to the documentation of this file.
1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you may find one here:
18 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19 * or you may search the http://www.gnu.org website for the version 2 license,
20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
25#include <drc/drc_engine.h>
26#include <drc/drc_item.h>
27#include <drc/drc_rule.h>
30#include <pad.h>
31#include <pcb_track.h>
32
35
36/*
37 Miscellaneous tests:
38
39 - DRCE_DISABLED_LAYER_ITEM, ///< item on a disabled layer
40 - DRCE_INVALID_OUTLINE, ///< invalid board outline
41 - DRCE_UNRESOLVED_VARIABLE,
42 - DRCE_ASSERTION_FAILURE, ///< user-defined assertions
43 - DRCE_GENERIC_WARNING ///< user-defined warnings
44 - DRCE_GENERIC_ERROR ///< user-defined errors
45*/
46
48{
49public:
51 m_board( nullptr )
52 {
53 m_isRuleDriven = false;
54 }
55
56 virtual ~DRC_TEST_PROVIDER_MISC() = default;
57
58 virtual bool Run() override;
59
60 virtual const wxString GetName() const override { return wxT( "miscellaneous" ); };
61
62private:
63 void testOutline();
64 void testDisabledLayers();
65 void testTextVars();
66 void testAssertions();
67
69};
70
71
73{
74 SHAPE_POLY_SET dummyOutline;
75 bool errorHandled = false;
76
77 OUTLINE_ERROR_HANDLER errorHandler =
78 [&]( const wxString& msg, BOARD_ITEM* itemA, BOARD_ITEM* itemB, const VECTOR2I& pt )
79 {
80 errorHandled = true;
81
83 return;
84
85 if( !itemA ) // If we only have a single item, make sure it's A
86 std::swap( itemA, itemB );
87
88 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_INVALID_OUTLINE );
89
90 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
91 drcItem->SetItems( itemA, itemB );
92
93 reportViolation( drcItem, pt, Edge_Cuts );
94 };
95
96 // Test for very small graphic items (a few nm size) that can create issues
97 // when trying to build the board outlines, and they are not easy to locate onn screen.
98 const int minSizeForValideGraphics = pcbIUScale.mmToIU( 0.001 );
99
100 if( !TestBoardOutlinesGraphicItems(m_board, minSizeForValideGraphics, &errorHandler ) )
101 {
102 if( errorHandled )
103 {
104 // if there are invalid items on Edge.Cuts, they are already reported
105 }
106 else
107 {
108 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_INVALID_OUTLINE );
109 wxString msg;
110
111 msg.Printf( _( "(Suspicious items found on Edge.Cuts layer)" ) );
112
113 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
114 drcItem->SetItems( m_board );
115
117 }
118 }
119
120
121 // Use the standard chaining epsilon here so that we report errors that might affect
122 // other tools (such as 3D viewer).
123 int chainingEpsilon = m_board->GetOutlinesChainingEpsilon();
124
125 // Arc to segment approximation error (not critical here: we do not use the outline shape):
126 int maxError = pcbIUScale.mmToIU( 0.05 );
127
128 if( !BuildBoardPolygonOutlines( m_board, dummyOutline, maxError, chainingEpsilon, &errorHandler ) )
129 {
130 if( errorHandled )
131 {
132 // if there is an invalid outline, then there must be an outline
133 }
134 else
135 {
136 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_INVALID_OUTLINE );
137 wxString msg;
138
139 msg.Printf( _( "(no edges found on Edge.Cuts layer)" ) );
140
141 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
142 drcItem->SetItems( m_board );
143
145 }
146 }
147}
148
149
151{
152 const int progressDelta = 2000;
153 int ii = 0;
154 int items = 0;
155
156 auto countItems =
157 [&]( BOARD_ITEM* item ) -> bool
158 {
159 ++items;
160 return true;
161 };
162
163 LSET disabledLayers = LSET( m_board->GetEnabledLayers() ).flip();
164
165 // Perform the test only for copper layers
166 disabledLayers &= LSET::AllCuMask();
167
168 auto checkDisabledLayers =
169 [&]( BOARD_ITEM* item ) -> bool
170 {
172 return false;
173
174 if( !reportProgress( ii++, items, progressDelta ) )
175 return false;
176
177 PCB_LAYER_ID badLayer = UNDEFINED_LAYER;
178
179 if( item->Type() == PCB_PAD_T )
180 {
181 PAD* pad = static_cast<PAD*>( item );
182
183 if( pad->GetAttribute() == PAD_ATTRIB::SMD
184 || pad->GetAttribute() == PAD_ATTRIB::CONN )
185 {
186 if( disabledLayers.test( pad->GetPrincipalLayer() ) )
187 badLayer = item->GetLayer();
188 }
189 else
190 {
191 // Through hole pad pierces all physical layers.
192 }
193 }
194 else if( item->Type() == PCB_VIA_T )
195 {
196 PCB_VIA* via = static_cast<PCB_VIA*>( item );
197 PCB_LAYER_ID top;
198 PCB_LAYER_ID bottom;
199
200 via->LayerPair( &top, &bottom );
201
202 if( disabledLayers.test( top ) )
203 badLayer = top;
204 else if( disabledLayers.test( bottom ) )
205 badLayer = bottom;
206 }
207 else if( item->Type() == PCB_ZONE_T )
208 {
209 // Footprint zones just get a top/bottom/inner setting, so they're on
210 // whatever inner layers there are.
211 }
212 else
213 {
214 LSET badLayers = disabledLayers & item->GetLayerSet();
215
216 if( badLayers.any() )
217 badLayer = badLayers.Seq().front();
218 }
219
220 if( badLayer != UNDEFINED_LAYER )
221 {
223 wxString msg;
224
225 msg.Printf( _( "(layer %s)" ), LayerName( badLayer ) );
226
227 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
228 drcItem->SetItems( item );
229
230 reportViolation( drcItem, item->GetPosition(), UNDEFINED_LAYER );
231 }
232
233 return true;
234 };
235
238}
239
240
242{
243 const int progressDelta = 2000;
244 int ii = 0;
245 int items = 0;
246
247 auto countItems =
248 [&]( BOARD_ITEM* item ) -> bool
249 {
250 ++items;
251 return true;
252 };
253
254 auto checkAssertions =
255 [&]( BOARD_ITEM* item ) -> bool
256 {
257 if( !reportProgress( ii++, items, progressDelta ) )
258 return false;
259
261 {
263 [&]( const DRC_CONSTRAINT* c )
264 {
266 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " (" )
267 + c->GetName() + wxS( ")" ) );
268 drcItem->SetItems( item );
269 drcItem->SetViolatingRule( c->GetParentRule() );
270
271 reportViolation( drcItem, item->GetPosition(), item->GetLayer() );
272 } );
273 }
274
275 return true;
276 };
277
278 forEachGeometryItem( {}, LSET::AllLayersMask(), countItems );
279 forEachGeometryItem( {}, LSET::AllLayersMask(), checkAssertions );
280}
281
282
284{
285 const int progressDelta = 2000;
286 int ii = 0;
287 int items = 0;
288
289 static const std::vector<KICAD_T> itemTypes = {
293 };
294
295 auto testAssertion =
296 [&]( BOARD_ITEM* item, const wxString& text, const VECTOR2I& pos, int layer )
297 {
298 static wxRegEx warningExpr( wxS( "^\\$\\{DRC_WARNING\\s*([^}]*)\\}(.*)$" ) );
299 static wxRegEx errorExpr( wxS( "^\\$\\{DRC_ERROR\\s*([^}]*)\\}(.*)$" ) );
300
301 if( warningExpr.Matches( text ) )
302 {
304 {
305 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_GENERIC_WARNING );
306 wxString drcText = warningExpr.GetMatch( text, 1 );
307
308 if( item )
309 drcItem->SetItems( item );
310 else
311 drcText += _( " (in drawing sheet)" );
312
313 drcItem->SetErrorMessage( drcText );
314
315 reportViolation( drcItem, pos, layer );
316 }
317
318 return true;
319 }
320
321 if( errorExpr.Matches( text ) )
322 {
324 {
325 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_GENERIC_ERROR );
326 wxString drcText = errorExpr.GetMatch( text, 1 );
327
328 if( item )
329 drcItem->SetItems( item );
330 else
331 drcText += _( " (in drawing sheet)" );
332
333 drcItem->SetErrorMessage( drcText );
334
335 reportViolation( drcItem, pos, layer );
336 }
337
338 return true;
339 }
340
341 return false;
342 };
343
345 [&]( BOARD_ITEM* item ) -> bool
346 {
347 ++items;
348 return true;
349 } );
350
352 [&]( BOARD_ITEM* item ) -> bool
353 {
355 return false;
356
357 if( !reportProgress( ii++, items, progressDelta ) )
358 return false;
359
360 if( EDA_TEXT* textItem = dynamic_cast<EDA_TEXT*>( item ) )
361 {
362 wxString result = ExpandEnvVarSubstitutions( textItem->GetShownText( true ),
363 nullptr /*project already done*/ );
364
365 if( result.Matches( wxT( "*${*}*" ) ) )
366 {
368 drcItem->SetItems( item );
369
370 reportViolation( drcItem, item->GetPosition(), item->GetLayer() );
371 }
372
373 testAssertion( item, textItem->GetText(), item->GetPosition(), item->GetLayer() );
374 }
375
376 return true;
377 } );
378
381
383 return;
384
385 drawItems.SetPageNumber( wxT( "1" ) );
386 drawItems.SetSheetCount( 1 );
387 drawItems.SetFileName( wxT( "dummyFilename" ) );
388 drawItems.SetSheetName( wxT( "dummySheet" ) );
389 drawItems.SetSheetLayer( wxT( "dummyLayer" ) );
390 drawItems.SetProject( m_board->GetProject() );
391 drawItems.BuildDrawItemsList( drawingSheet->GetPageInfo(), drawingSheet->GetTitleBlock() );
392
393 for( DS_DRAW_ITEM_BASE* item = drawItems.GetFirst(); item; item = drawItems.GetNext() )
394 {
396 break;
397
398 if( m_drcEngine->IsCancelled() )
399 return;
400
401 if( DS_DRAW_ITEM_TEXT* text = dynamic_cast<DS_DRAW_ITEM_TEXT*>( item ) )
402 {
403 if( testAssertion( nullptr, text->GetText(), text->GetPosition(), LAYER_DRAWINGSHEET ) )
404 {
405 // Don't run unresolved test
406 }
407 else if( text->GetShownText( true ).Matches( wxT( "*${*}*" ) ) )
408 {
409 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_UNRESOLVED_VARIABLE );
410 drcItem->SetItems( drawingSheet );
411
412 reportViolation( drcItem, text->GetPosition(), LAYER_DRAWINGSHEET );
413 }
414 }
415 }
416}
417
418
420{
422
424 {
425 if( !reportPhase( _( "Checking board outline..." ) ) )
426 return false; // DRC cancelled
427
428 testOutline();
429 }
430
432 {
433 if( !reportPhase( _( "Checking disabled layers..." ) ) )
434 return false; // DRC cancelled
435
437 }
438
440 {
441 if( !reportPhase( _( "Checking text variables..." ) ) )
442 return false; // DRC cancelled
443
444 testTextVars();
445 }
446
450 {
451 if( !reportPhase( _( "Checking assertions..." ) ) )
452 return false; // DRC cancelled
453
455 }
456
457 return !m_drcEngine->IsCancelled();
458}
459
460
461namespace detail
462{
464}
constexpr EDA_IU_SCALE pcbIUScale
Definition: base_units.h:112
BASE_SET & flip(size_t pos)
Definition: base_set.h:160
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:79
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:232
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:317
const BOX2I GetBoundingBox() const override
Return the orthogonal bounding box of this object for display purposes.
Definition: board.h:988
int GetOutlinesChainingEpsilon()
Definition: board.h:792
PROJECT * GetProject() const
Definition: board.h:538
const LSET & GetEnabledLayers() const
A proxy function that calls the corresponding function in m_BoardSettings.
Definition: board.cpp:907
constexpr Vec Centre() const
Definition: box2.h:97
wxString GetName() const
Definition: drc_rule.h:168
DRC_RULE * GetParentRule() const
Definition: drc_rule.h:164
DS_PROXY_VIEW_ITEM * GetDrawingSheet() const
Definition: drc_engine.h:109
BOARD * GetBoard() const
Definition: drc_engine.h:100
bool IsErrorLimitExceeded(int error_code)
void ProcessAssertions(const BOARD_ITEM *a, std::function< void(const DRC_CONSTRAINT *)> aFailureHandler, REPORTER *aReporter=nullptr)
bool IsCancelled() const
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition: drc_item.cpp:393
virtual const wxString GetName() const override
virtual ~DRC_TEST_PROVIDER_MISC()=default
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
Represent a DRC "provider" which runs some DRC functions over a BOARD and spits out DRC_ITEM and posi...
virtual bool reportPhase(const wxString &aStageName)
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const VECTOR2I &aMarkerPos, int aMarkerLayer, DRC_CUSTOM_MARKER_HANDLER *aCustomHandler=nullptr)
int forEachGeometryItem(const std::vector< KICAD_T > &aTypes, const LSET &aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
static std::vector< KICAD_T > s_allBasicItems
DRC_ENGINE * m_drcEngine
virtual bool reportProgress(size_t aCount, size_t aSize, size_t aDelta=1)
Base class to handle basic graphic items.
Definition: ds_draw_item.h:59
Store the list of graphic items: rect, lines, polygons and texts to draw/plot the title block and fra...
Definition: ds_draw_item.h:401
DS_DRAW_ITEM_BASE * GetFirst()
Definition: ds_draw_item.h:512
void BuildDrawItemsList(const PAGE_INFO &aPageInfo, const TITLE_BLOCK &aTitleBlock)
Drawing or plot the drawing sheet.
void SetFileName(const wxString &aFileName)
Set the filename to draw/plot.
Definition: ds_draw_item.h:445
void SetSheetName(const wxString &aSheetName)
Set the sheet name to draw/plot.
Definition: ds_draw_item.h:450
void SetSheetLayer(const wxString &aSheetLayer)
Set the sheet layer to draw/plot.
Definition: ds_draw_item.h:460
void SetSheetCount(int aSheetCount)
Set the value of the count of sheets, for basic inscriptions.
Definition: ds_draw_item.h:499
void SetPageNumber(const wxString &aPageNumber)
Set the value of the sheet number.
Definition: ds_draw_item.h:489
DS_DRAW_ITEM_BASE * GetNext()
Definition: ds_draw_item.h:522
void SetProject(const PROJECT *aProject)
Definition: ds_draw_item.h:425
A graphic text.
Definition: ds_draw_item.h:313
virtual VECTOR2I GetPosition() const
Definition: eda_item.h:272
A mix-in class (via multiple inheritance) that handles texts such as labels, parts,...
Definition: eda_text.h:79
LSET is a set of PCB_LAYER_IDs.
Definition: lset.h:37
LSEQ Seq(const LSEQ &aSequence) const
Return an LSEQ from the union of this LSET and a desired sequence.
Definition: lset.cpp:296
static const LSET & AllLayersMask()
Definition: lset.cpp:624
static LSET AllCuMask()
return AllCuMask( MAX_CU_LAYERS );
Definition: lset.cpp:591
Definition: pad.h:54
PCB_LAYER_ID GetLayer() const override
Return the primary layer this item is on.
Definition: pad.cpp:334
Represent a set of closed polygons.
const wxString ExpandEnvVarSubstitutions(const wxString &aString, const PROJECT *aProject)
Replace any environment variable & text variable references with their values.
Definition: common.cpp:355
#define FOR_ERC_DRC
Expand '${var-name}' templates in text.
Definition: common.h:91
bool TestBoardOutlinesGraphicItems(BOARD *aBoard, int aMinDist, OUTLINE_ERROR_HANDLER *aErrorHandler)
Test a board graphic items on edge cut layer for validity.
bool BuildBoardPolygonOutlines(BOARD *aBoard, SHAPE_POLY_SET &aOutlines, int aErrorMax, int aChainingEpsilon, OUTLINE_ERROR_HANDLER *aErrorHandler, bool aAllowUseArcsInPolygons)
Extract the board outlines and build a closed polygon from lines, arcs and circle items on edge cut l...
const std::function< void(const wxString &msg, BOARD_ITEM *itemA, BOARD_ITEM *itemB, const VECTOR2I &pt)> OUTLINE_ERROR_HANDLER
@ DRCE_DISABLED_LAYER_ITEM
Definition: drc_item.h:71
@ DRCE_INVALID_OUTLINE
Definition: drc_item.h:72
@ DRCE_GENERIC_ERROR
Definition: drc_item.h:90
@ DRCE_UNRESOLVED_VARIABLE
Definition: drc_item.h:87
@ DRCE_ASSERTION_FAILURE
Definition: drc_item.h:88
@ DRCE_GENERIC_WARNING
Definition: drc_item.h:89
#define _(s)
wxString LayerName(int aLayer)
Returns the default display name for a given layer.
Definition: layer_id.cpp:31
@ LAYER_DRAWINGSHEET
Sheet frame and title block.
Definition: layer_ids.h:277
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
@ Edge_Cuts
Definition: layer_ids.h:112
@ UNDEFINED_LAYER
Definition: layer_ids.h:61
static DRC_REGISTER_TEST_PROVIDER< DRC_TEST_PROVIDER_ANNULAR_WIDTH > dummy
constexpr int mmToIU(double mm) const
Definition: base_units.h:92
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:97
@ PCB_TEXTBOX_T
class PCB_TEXTBOX, wrapped text on a layer
Definition: typeinfo.h:93
@ PCB_ZONE_T
class ZONE, a copper pour area
Definition: typeinfo.h:107
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
Definition: typeinfo.h:92
@ PCB_FIELD_T
class PCB_FIELD, text associated with a footprint property
Definition: typeinfo.h:90
@ PCB_TABLECELL_T
class PCB_TABLECELL, PCB_TEXTBOX for use in tables
Definition: typeinfo.h:95
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87
@ PCB_DIMENSION_T
class PCB_DIMENSION_BASE: abstract dimension meta-type
Definition: typeinfo.h:100