KiCad PCB EDA Suite
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drc_test_provider_track_width.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you may find one here:
18 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19 * or you may search the http://www.gnu.org website for the version 2 license,
20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
24#include <pcb_track.h>
25#include <drc/drc_engine.h>
26#include <drc/drc_item.h>
27#include <drc/drc_rule.h>
29
30
31/*
32 Track width test. As the name says, checks width of the tracks (including segments and arcs)
33 Errors generated:
34 - DRCE_TRACK_WIDTH
35*/
36
38{
39public:
41 {}
42
43 virtual ~DRC_TEST_PROVIDER_TRACK_WIDTH() = default;
44
45 virtual bool Run() override;
46
47 virtual const wxString GetName() const override { return wxT( "width" ); };
48};
49
50
52{
54 {
55 REPORT_AUX( wxT( "Track width violations ignored. Tests not run." ) );
56 return true; // continue with other tests
57 }
58
60 {
61 REPORT_AUX( wxT( "No track width constraints found. Tests not run." ) );
62 return true; // continue with other tests
63 }
64
65 if( !reportPhase( _( "Checking track widths..." ) ) )
66 return false; // DRC cancelled
67
68 auto checkTrackWidth =
69 [&]( BOARD_ITEM* item ) -> bool
70 {
72 return false;
73
74 int actual;
75 VECTOR2I p0;
76
77 if( item->Type() == PCB_ARC_T )
78 {
79 PCB_ARC* arc = static_cast<PCB_ARC*>( item );
80
81 actual = arc->GetWidth();
82 p0 = arc->GetStart();
83 }
84 else if( item->Type() == PCB_TRACE_T )
85 {
86 PCB_TRACK* track = static_cast<PCB_TRACK*>( item );
87
88 actual = track->GetWidth();
89 p0 = ( track->GetStart() + track->GetEnd() ) / 2;
90 }
91 else
92 {
93 return true;
94 }
95
96 auto constraint = m_drcEngine->EvalRules( TRACK_WIDTH_CONSTRAINT, item, nullptr,
97 item->GetLayer() );
98 bool fail_min = false;
99 bool fail_max = false;
100 int constraintWidth = 0;
101
102 if( constraint.GetSeverity() != RPT_SEVERITY_IGNORE )
103 {
104 if( constraint.Value().HasMin() && actual < constraint.Value().Min() )
105 {
106 fail_min = true;
107 constraintWidth = constraint.Value().Min();
108 }
109
110 if( constraint.Value().HasMax() && actual > constraint.Value().Max() )
111 {
112 fail_max = true;
113 constraintWidth = constraint.Value().Max();
114 }
115 }
116
117 if( fail_min || fail_max )
118 {
119 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_TRACK_WIDTH );
120 wxString constraintName = constraint.GetName();
121 wxString msg;
122
123 if( fail_min )
124 {
125 if( constraint.m_ImplicitMin )
126 constraintName = _( "board setup constraints" );
127
128 msg = formatMsg( _( "(%s min width %s; actual %s)" ),
129 constraintName,
130 constraintWidth,
131 actual );
132 }
133 else
134 {
135 msg = formatMsg( _( "(%s max width %s; actual %s)" ),
136 constraintName,
137 constraintWidth,
138 actual );
139 }
140
141 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
142 drcItem->SetItems( item );
143 drcItem->SetViolatingRule( constraint.GetParentRule() );
144
145 reportViolation( drcItem, p0, item->GetLayer() );
146 }
147
148 return true;
149 };
150
151 const int progressDelta = 250;
152 int ii = 0;
153
154 for( PCB_TRACK* item : m_drcEngine->GetBoard()->Tracks() )
155 {
156 if( !reportProgress( ii++, m_drcEngine->GetBoard()->Tracks().size(), progressDelta ) )
157 break;
158
159 if( !checkTrackWidth( item ) )
160 break;
161 }
162
163 return !m_drcEngine->IsCancelled();
164}
165
166
167namespace detail
168{
170}
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:79
const TRACKS & Tracks() const
Definition: board.h:356
MINOPTMAX< int > & Value()
Definition: drc_rule.h:161
BOARD * GetBoard() const
Definition: drc_engine.h:95
bool HasRulesForConstraintType(DRC_CONSTRAINT_T constraintID)
bool IsErrorLimitExceeded(int error_code)
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
Definition: drc_engine.cpp:706
bool IsCancelled() const
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition: drc_item.cpp:393
virtual const wxString GetName() const override
virtual ~DRC_TEST_PROVIDER_TRACK_WIDTH()=default
virtual bool Run() override
Run this provider against the given PCB with configured options (if any).
Represent a DRC "provider" which runs some DRC functions over a BOARD and spits out DRC_ITEM and posi...
virtual bool reportPhase(const wxString &aStageName)
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const VECTOR2I &aMarkerPos, int aMarkerLayer, DRC_CUSTOM_MARKER_HANDLER *aCustomHandler=nullptr)
DRC_ENGINE * m_drcEngine
wxString formatMsg(const wxString &aFormatString, const wxString &aSource, double aConstraint, double aActual, EDA_DATA_TYPE aDataType=EDA_DATA_TYPE::DISTANCE)
virtual bool reportProgress(size_t aCount, size_t aSize, size_t aDelta=1)
T Min() const
Definition: minoptmax.h:33
const VECTOR2I & GetStart() const
Definition: pcb_track.h:152
const VECTOR2I & GetEnd() const
Definition: pcb_track.h:149
virtual int GetWidth() const
Definition: pcb_track.h:146
@ DRCE_TRACK_WIDTH
Definition: drc_item.h:55
@ TRACK_WIDTH_CONSTRAINT
Definition: drc_rule.h:59
#define REPORT_AUX(s)
#define _(s)
static DRC_REGISTER_TEST_PROVIDER< DRC_TEST_PROVIDER_ANNULAR_WIDTH > dummy
@ RPT_SEVERITY_IGNORE
int actual
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:98
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:96