KiCad PCB EDA Suite
DRC_TEST_PROVIDER_EDGE_CLEARANCE Class Reference
Inheritance diagram for DRC_TEST_PROVIDER_EDGE_CLEARANCE:
DRC_TEST_PROVIDER_CLEARANCE_BASE DRC_TEST_PROVIDER

Public Member Functions

 DRC_TEST_PROVIDER_EDGE_CLEARANCE ()
 
virtual ~DRC_TEST_PROVIDER_EDGE_CLEARANCE ()
 
virtual bool Run () override
 Run this provider against the given PCB with configured options (if any). More...
 
virtual const wxString GetName () const override
 
virtual const wxString GetDescription () const override
 
virtual std::set< DRC_CONSTRAINT_TGetConstraintTypes () const override
 
int GetNumPhases () const override
 
void SetDRCEngine (DRC_ENGINE *engine)
 
virtual bool IsRuleDriven () const
 
bool IsEnabled () const
 
void Enable (bool aEnable)
 

Protected Member Functions

int forEachGeometryItem (const std::vector< KICAD_T > &aTypes, LSET aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
 
virtual void reportAux (wxString fmt,...)
 
virtual void reportViolation (std::shared_ptr< DRC_ITEM > &item, const wxPoint &aMarkerPos)
 
virtual bool reportProgress (int aCount, int aSize, int aDelta)
 
virtual bool reportPhase (const wxString &aStageName)
 
virtual void reportRuleStatistics ()
 
virtual void accountCheck (const DRC_RULE *ruleToTest)
 
virtual void accountCheck (const DRC_CONSTRAINT &constraintToTest)
 
bool isInvisibleText (const BOARD_ITEM *aItem) const
 
EDA_UNITS userUnits () const
 

Protected Attributes

BOARDm_board
 
int m_largestClearance
 
bool m_boardOutlineValid
 
DRC_ENGINEm_drcEngine
 
std::unordered_map< const DRC_RULE *, int > m_stats
 
bool m_isRuleDriven = true
 
bool m_enabled = true
 
wxString m_msg
 

Static Protected Attributes

static std::vector< KICAD_Ts_allBasicItems
 
static std::vector< KICAD_Ts_allBasicItemsButZones
 

Private Member Functions

bool testAgainstEdge (BOARD_ITEM *item, SHAPE *itemShape, BOARD_ITEM *other, DRC_CONSTRAINT_T aConstraintType, PCB_DRC_CODE aErrorCode)
 

Detailed Description

Definition at line 47 of file drc_test_provider_edge_clearance.cpp.

Constructor & Destructor Documentation

◆ DRC_TEST_PROVIDER_EDGE_CLEARANCE()

DRC_TEST_PROVIDER_EDGE_CLEARANCE::DRC_TEST_PROVIDER_EDGE_CLEARANCE ( )
inline

◆ ~DRC_TEST_PROVIDER_EDGE_CLEARANCE()

virtual DRC_TEST_PROVIDER_EDGE_CLEARANCE::~DRC_TEST_PROVIDER_EDGE_CLEARANCE ( )
inlinevirtual

Definition at line 55 of file drc_test_provider_edge_clearance.cpp.

56  {
57  }

Member Function Documentation

◆ accountCheck() [1/2]

void DRC_TEST_PROVIDER::accountCheck ( const DRC_RULE ruleToTest)
protectedvirtualinherited

Definition at line 103 of file drc_test_provider.cpp.

104 {
105  auto it = m_stats.find( ruleToTest );
106 
107  if( it == m_stats.end() )
108  m_stats[ ruleToTest ] = 1;
109  else
110  m_stats[ ruleToTest ] += 1;
111 }
std::unordered_map< const DRC_RULE *, int > m_stats

References DRC_TEST_PROVIDER::m_stats.

Referenced by DRC_TEST_PROVIDER::accountCheck(), and DRC_TEST_PROVIDER::reportViolation().

◆ accountCheck() [2/2]

void DRC_TEST_PROVIDER::accountCheck ( const DRC_CONSTRAINT constraintToTest)
protectedvirtualinherited

Definition at line 114 of file drc_test_provider.cpp.

115 {
116  accountCheck( constraintToTest.GetParentRule() );
117 }
DRC_RULE * GetParentRule() const
Definition: drc_rule.h:126
virtual void accountCheck(const DRC_RULE *ruleToTest)

References DRC_TEST_PROVIDER::accountCheck(), and DRC_CONSTRAINT::GetParentRule().

◆ Enable()

void DRC_TEST_PROVIDER::Enable ( bool  aEnable)
inlineinherited

Definition at line 106 of file drc_test_provider.h.

107  {
108  m_enabled = aEnable;
109  }

References DRC_TEST_PROVIDER::m_enabled.

◆ forEachGeometryItem()

int DRC_TEST_PROVIDER::forEachGeometryItem ( const std::vector< KICAD_T > &  aTypes,
LSET  aLayers,
const std::function< bool(BOARD_ITEM *)> &  aFunc 
)
protectedinherited

Definition at line 139 of file drc_test_provider.cpp.

141 {
142  BOARD *brd = m_drcEngine->GetBoard();
143  std::bitset<MAX_STRUCT_TYPE_ID> typeMask;
144  int n = 0;
145 
146  if( s_allBasicItems.size() == 0 )
147  {
148  for( int i = 0; i < MAX_STRUCT_TYPE_ID; i++ )
149  {
150  if( i != PCB_FOOTPRINT_T && i != PCB_GROUP_T )
151  {
152  s_allBasicItems.push_back( (KICAD_T) i );
153 
154  if( i != PCB_ZONE_T && i != PCB_FP_ZONE_T )
155  s_allBasicItemsButZones.push_back( (KICAD_T) i );
156  }
157  }
158  }
159 
160  if( aTypes.size() == 0 )
161  {
162  for( int i = 0; i < MAX_STRUCT_TYPE_ID; i++ )
163  typeMask[ i ] = true;
164  }
165  else
166  {
167  for( KICAD_T aType : aTypes )
168  typeMask[ aType ] = true;
169  }
170 
171  for( PCB_TRACK* item : brd->Tracks() )
172  {
173  if( (item->GetLayerSet() & aLayers).any() )
174  {
175  if( typeMask[ PCB_TRACE_T ] && item->Type() == PCB_TRACE_T )
176  {
177  aFunc( item );
178  n++;
179  }
180  else if( typeMask[ PCB_VIA_T ] && item->Type() == PCB_VIA_T )
181  {
182  aFunc( item );
183  n++;
184  }
185  else if( typeMask[ PCB_ARC_T ] && item->Type() == PCB_ARC_T )
186  {
187  aFunc( item );
188  n++;
189  }
190  }
191  }
192 
193  for( BOARD_ITEM* item : brd->Drawings() )
194  {
195  if( (item->GetLayerSet() & aLayers).any() )
196  {
197  if( typeMask[PCB_DIMENSION_T] && BaseType( item->Type() ) == PCB_DIMENSION_T )
198  {
199  if( !aFunc( item ) )
200  return n;
201 
202  n++;
203  }
204  else if( typeMask[ PCB_SHAPE_T ] && item->Type() == PCB_SHAPE_T )
205  {
206  if( !aFunc( item ) )
207  return n;
208 
209  n++;
210  }
211  else if( typeMask[ PCB_TEXT_T ] && item->Type() == PCB_TEXT_T )
212  {
213  if( !aFunc( item ) )
214  return n;
215 
216  n++;
217  }
218  else if( typeMask[ PCB_TARGET_T ] && item->Type() == PCB_TARGET_T )
219  {
220  if( !aFunc( item ) )
221  return n;
222 
223  n++;
224  }
225  }
226  }
227 
228  if( typeMask[ PCB_ZONE_T ] )
229  {
230  for( ZONE* item : brd->Zones() )
231  {
232  if( ( item->GetLayerSet() & aLayers ).any() )
233  {
234  if( !aFunc( item ) )
235  return n;
236 
237  n++;
238  }
239  }
240  }
241 
242  for( FOOTPRINT* footprint : brd->Footprints() )
243  {
244  if( typeMask[ PCB_FP_TEXT_T ] )
245  {
246  if( ( footprint->Reference().GetLayerSet() & aLayers ).any() )
247  {
248  if( !aFunc( &footprint->Reference() ) )
249  return n;
250 
251  n++;
252  }
253 
254  if( ( footprint->Value().GetLayerSet() & aLayers ).any() )
255  {
256  if( !aFunc( &footprint->Value() ) )
257  return n;
258 
259  n++;
260  }
261  }
262 
263  if( typeMask[ PCB_PAD_T ] )
264  {
265  for( PAD* pad : footprint->Pads() )
266  {
267  // Careful: if a pad has a hole then it pierces all layers
268  if( ( pad->GetDrillSizeX() > 0 && pad->GetDrillSizeY() > 0 )
269  || ( pad->GetLayerSet() & aLayers ).any() )
270  {
271  if( !aFunc( pad ) )
272  return n;
273 
274  n++;
275  }
276  }
277  }
278 
279  for( BOARD_ITEM* dwg : footprint->GraphicalItems() )
280  {
281  if( (dwg->GetLayerSet() & aLayers).any() )
282  {
283  if( typeMask[ PCB_FP_TEXT_T ] && dwg->Type() == PCB_FP_TEXT_T )
284  {
285  if( !aFunc( dwg ) )
286  return n;
287 
288  n++;
289  }
290  else if( typeMask[ PCB_FP_SHAPE_T ] && dwg->Type() == PCB_FP_SHAPE_T )
291  {
292  if( !aFunc( dwg ) )
293  return n;
294 
295  n++;
296  }
297  }
298  }
299 
300  if( typeMask[ PCB_FP_ZONE_T ] )
301  {
302  for( ZONE* zone : footprint->Zones() )
303  {
304  if( (zone->GetLayerSet() & aLayers).any() )
305  {
306  if( !aFunc( zone ) )
307  return n;
308 
309  n++;
310  }
311  }
312  }
313 
314  if( typeMask[ PCB_FOOTPRINT_T ] )
315  {
316  if( !aFunc( footprint ) )
317  return n;
318 
319  n++;
320  }
321  }
322 
323  return n;
324 }
class FP_TEXT, text in a footprint
Definition: typeinfo.h:92
ZONES & Zones()
Definition: board.h:240
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:49
class PCB_GROUP, a set of BOARD_ITEMs
Definition: typeinfo.h:108
constexpr KICAD_T BaseType(const KICAD_T aType)
Return the underlying type of the given type.
Definition: typeinfo.h:231
class PCB_TEXT, text on a layer
Definition: typeinfo.h:91
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:97
class FP_SHAPE, a footprint edge
Definition: typeinfo.h:93
class PAD, a pad in a footprint
Definition: typeinfo.h:89
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:77
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:95
BOARD * GetBoard() const
Definition: drc_engine.h:88
FOOTPRINTS & Footprints()
Definition: board.h:234
Handle a list of polygons defining a copper zone.
Definition: zone.h:56
class ZONE, a copper pour area
Definition: typeinfo.h:105
class PCB_DIMENSION_BASE: abstract dimension meta-type
Definition: typeinfo.h:99
class PCB_TARGET, a target (graphic item)
Definition: typeinfo.h:104
class FOOTPRINT, a footprint
Definition: typeinfo.h:88
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:191
static std::vector< KICAD_T > s_allBasicItems
static std::vector< KICAD_T > s_allBasicItemsButZones
DRC_ENGINE * m_drcEngine
class ZONE, managed by a footprint
Definition: typeinfo.h:94
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:96
Definition: pad.h:57
class PCB_SHAPE, a segment not on copper layers
Definition: typeinfo.h:90
DRAWINGS & Drawings()
Definition: board.h:237
TRACKS & Tracks()
Definition: board.h:231

References BaseType(), BOARD::Drawings(), BOARD::Footprints(), DRC_ENGINE::GetBoard(), DRC_TEST_PROVIDER::m_drcEngine, MAX_STRUCT_TYPE_ID, pad, PCB_ARC_T, PCB_DIMENSION_T, PCB_FOOTPRINT_T, PCB_FP_SHAPE_T, PCB_FP_TEXT_T, PCB_FP_ZONE_T, PCB_GROUP_T, PCB_PAD_T, PCB_SHAPE_T, PCB_TARGET_T, PCB_TEXT_T, PCB_TRACE_T, PCB_VIA_T, PCB_ZONE_T, DRC_TEST_PROVIDER::s_allBasicItems, DRC_TEST_PROVIDER::s_allBasicItemsButZones, BOARD::Tracks(), and BOARD::Zones().

Referenced by DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_SILK_TO_MASK::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), Run(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::Run(), DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal(), DRC_TEST_PROVIDER_MISC::testDisabledLayers(), and DRC_TEST_PROVIDER_MISC::testTextVars().

◆ GetConstraintTypes()

std::set< DRC_CONSTRAINT_T > DRC_TEST_PROVIDER_EDGE_CLEARANCE::GetConstraintTypes ( ) const
overridevirtual

◆ GetDescription()

virtual const wxString DRC_TEST_PROVIDER_EDGE_CLEARANCE::GetDescription ( ) const
inlineoverridevirtual

Reimplemented from DRC_TEST_PROVIDER.

Definition at line 66 of file drc_test_provider_edge_clearance.cpp.

67  {
68  return "Tests items vs board edge clearance";
69  }

◆ GetName()

virtual const wxString DRC_TEST_PROVIDER_EDGE_CLEARANCE::GetName ( void  ) const
inlineoverridevirtual

Reimplemented from DRC_TEST_PROVIDER.

Definition at line 61 of file drc_test_provider_edge_clearance.cpp.

62  {
63  return "edge_clearance";
64  }

◆ GetNumPhases()

int DRC_TEST_PROVIDER_EDGE_CLEARANCE::GetNumPhases ( ) const
overridevirtual

Implements DRC_TEST_PROVIDER.

Definition at line 285 of file drc_test_provider_edge_clearance.cpp.

286 {
287  return 1;
288 }

◆ IsEnabled()

bool DRC_TEST_PROVIDER::IsEnabled ( ) const
inlineinherited

Definition at line 101 of file drc_test_provider.h.

102  {
103  return m_enabled;
104  }

References DRC_TEST_PROVIDER::m_enabled.

◆ isInvisibleText()

bool DRC_TEST_PROVIDER::isInvisibleText ( const BOARD_ITEM aItem) const
protectedinherited

Definition at line 327 of file drc_test_provider.cpp.

328 {
329 
330  if( const FP_TEXT* text = dyn_cast<const FP_TEXT*>( aItem ) )
331  {
332  if( !text->IsVisible() )
333  return true;
334  }
335 
336  if( const PCB_TEXT* text = dyn_cast<const PCB_TEXT*>( aItem ) )
337  {
338  if( !text->IsVisible() )
339  return true;
340  }
341 
342  return false;
343 }

References text.

Referenced by DRC_TEST_PROVIDER_SILK_TO_MASK::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), and Run().

◆ IsRuleDriven()

virtual bool DRC_TEST_PROVIDER::IsRuleDriven ( ) const
inlinevirtualinherited

Definition at line 96 of file drc_test_provider.h.

97  {
98  return m_isRuleDriven;
99  }

References DRC_TEST_PROVIDER::m_isRuleDriven.

◆ reportAux()

◆ reportPhase()

◆ reportProgress()

◆ reportRuleStatistics()

void DRC_TEST_PROVIDER::reportRuleStatistics ( )
protectedvirtualinherited

Definition at line 120 of file drc_test_provider.cpp.

121 {
122  if( !m_isRuleDriven )
123  return;
124 
125  m_drcEngine->ReportAux( "Rule hit statistics: " );
126 
127  for( const std::pair<const DRC_RULE* const, int>& stat : m_stats )
128  {
129  if( stat.first )
130  {
131  m_drcEngine->ReportAux( wxString::Format( " - rule '%s': %d hits ",
132  stat.first->m_Name,
133  stat.second ) );
134  }
135  }
136 }
std::unordered_map< const DRC_RULE *, int > m_stats
void Format(OUTPUTFORMATTER *out, int aNestLevel, int aCtl, const CPTREE &aTree)
Output a PTREE into s-expression format via an OUTPUTFORMATTER derivative.
Definition: ptree.cpp:200
void ReportAux(const wxString &aStr)
DRC_ENGINE * m_drcEngine

References Format(), DRC_TEST_PROVIDER::m_drcEngine, DRC_TEST_PROVIDER::m_isRuleDriven, DRC_TEST_PROVIDER::m_stats, and DRC_ENGINE::ReportAux().

Referenced by DRC_TEST_PROVIDER_VIA_DIAMETER::Run(), DRC_TEST_PROVIDER_TRACK_WIDTH::Run(), DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_HOLE_SIZE::Run(), DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTIVITY::Run(), DRC_TEST_PROVIDER_SILK_TO_MASK::Run(), Run(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), DRC_TEST_PROVIDER_LVS::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::Run(), and DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal().

◆ reportViolation()

void DRC_TEST_PROVIDER::reportViolation ( std::shared_ptr< DRC_ITEM > &  item,
const wxPoint &  aMarkerPos 
)
protectedvirtualinherited

Definition at line 56 of file drc_test_provider.cpp.

58 {
59  if( item->GetViolatingRule() )
60  accountCheck( item->GetViolatingRule() );
61 
62  item->SetViolatingTest( this );
63  m_drcEngine->ReportViolation( item, aMarkerPos );
64 }
virtual void accountCheck(const DRC_RULE *ruleToTest)
DRC_ENGINE * m_drcEngine
void ReportViolation(const std::shared_ptr< DRC_ITEM > &aItem, const wxPoint &aPos)

References DRC_TEST_PROVIDER::accountCheck(), DRC_TEST_PROVIDER::m_drcEngine, and DRC_ENGINE::ReportViolation().

Referenced by DRC_TEST_PROVIDER_MATCHED_LENGTH::checkLengths(), DRC_TEST_PROVIDER_HOLE_SIZE::checkPad(), DRC_TEST_PROVIDER_MATCHED_LENGTH::checkSkews(), DRC_TEST_PROVIDER_HOLE_SIZE::checkVia(), DRC_TEST_PROVIDER_MATCHED_LENGTH::checkViaCounts(), DRC_TEST_PROVIDER_VIA_DIAMETER::Run(), DRC_TEST_PROVIDER_TRACK_WIDTH::Run(), DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTIVITY::Run(), DRC_TEST_PROVIDER_SILK_TO_MASK::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), testAgainstEdge(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testCourtyardClearances(), DRC_TEST_PROVIDER_MISC::testDisabledLayers(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testFootprintCourtyardDefinitions(), DRC_TEST_PROVIDER_LVS::testFootprints(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::testHoleAgainstHole(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testItemAgainstZones(), DRC_TEST_PROVIDER_MISC::testOutline(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem(), DRC_TEST_PROVIDER_MISC::testTextVars(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem(), and DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones().

◆ Run()

bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run ( )
overridevirtual

Run this provider against the given PCB with configured options (if any).

Implements DRC_TEST_PROVIDER.

Definition at line 119 of file drc_test_provider_edge_clearance.cpp.

120 {
122  {
123  if( !reportPhase( _( "Checking copper to board edge clearances..." ) ) )
124  return false; // DRC cancelled
125  }
127  {
128  if( !reportPhase( _( "Checking silk to board edge clearances..." ) ) )
129  return false; // DRC cancelled
130  }
131  else
132  {
133  reportAux( "Edge clearance violations ignored. Tests not run." );
134  return true; // continue with other tests
135  }
136 
138 
139  DRC_CONSTRAINT worstClearanceConstraint;
140 
141  if( m_drcEngine->QueryWorstConstraint( EDGE_CLEARANCE_CONSTRAINT, worstClearanceConstraint ) )
142  m_largestClearance = worstClearanceConstraint.GetValue().Min();
143 
144  reportAux( "Worst clearance : %d nm", m_largestClearance );
145 
146  std::vector<std::unique_ptr<PCB_SHAPE>> edges; // we own these
147  DRC_RTREE edgesTree;
148  std::vector<BOARD_ITEM*> boardItems; // we don't own these
149 
150  auto queryBoardOutlineItems =
151  [&]( BOARD_ITEM *item ) -> bool
152  {
153  PCB_SHAPE* shape = static_cast<PCB_SHAPE*>( item );
154 
155  if( shape->GetShape() == SHAPE_T::RECT )
156  {
157  // A single rectangle for the board would make the RTree useless, so convert
158  // to 4 edges
159  edges.emplace_back( static_cast<PCB_SHAPE*>( shape->Clone() ) );
160  edges.back()->SetShape( SHAPE_T::SEGMENT );
161  edges.back()->SetEndX( shape->GetStartX() );
162  edges.back()->SetWidth( 0 );
163  edges.emplace_back( static_cast<PCB_SHAPE*>( shape->Clone() ) );
164  edges.back()->SetShape( SHAPE_T::SEGMENT );
165  edges.back()->SetEndY( shape->GetStartY() );
166  edges.back()->SetWidth( 0 );
167  edges.emplace_back( static_cast<PCB_SHAPE*>( shape->Clone() ) );
168  edges.back()->SetShape( SHAPE_T::SEGMENT );
169  edges.back()->SetStartX( shape->GetEndX() );
170  edges.back()->SetWidth( 0 );
171  edges.emplace_back( static_cast<PCB_SHAPE*>( shape->Clone() ) );
172  edges.back()->SetShape( SHAPE_T::SEGMENT );
173  edges.back()->SetStartY( shape->GetEndY() );
174  edges.back()->SetWidth( 0 );
175  return true;
176  }
177  else if( shape->GetShape() == SHAPE_T::POLY )
178  {
179  // A single polygon for the board would make the RTree useless, so convert
180  // to n edges.
181  SHAPE_LINE_CHAIN poly = shape->GetPolyShape().Outline( 0 );
182 
183  for( size_t ii = 0; ii < poly.GetSegmentCount(); ++ii )
184  {
185  SEG seg = poly.CSegment( ii );
186  edges.emplace_back( static_cast<PCB_SHAPE*>( shape->Clone() ) );
187  edges.back()->SetShape( SHAPE_T::SEGMENT );
188  edges.back()->SetStart((wxPoint) seg.A );
189  edges.back()->SetEnd((wxPoint) seg.B );
190  edges.back()->SetWidth( 0 );
191  }
192  }
193 
194  edges.emplace_back( static_cast<PCB_SHAPE*>( shape->Clone() ) );
195  edges.back()->SetWidth( 0 );
196  return true;
197  };
198 
199  auto queryBoardGeometryItems =
200  [&]( BOARD_ITEM *item ) -> bool
201  {
202  if( !isInvisibleText( item ) )
203  boardItems.push_back( item );
204 
205  return true;
206  };
207 
209  queryBoardOutlineItems );
210  forEachGeometryItem( s_allBasicItemsButZones, LSET::AllLayersMask(), queryBoardGeometryItems );
211 
212  for( const std::unique_ptr<PCB_SHAPE>& edge : edges )
213  {
214  for( PCB_LAYER_ID layer : { Edge_Cuts, Margin } )
215  {
216  if( edge->IsOnLayer( layer ) )
217  edgesTree.Insert( edge.get(), layer, m_largestClearance );
218  }
219  }
220 
221  wxString val;
222  wxGetEnv( "WXTRACE", &val );
223 
224  drc_dbg( 2, "outline: %d items, board: %d items\n",
225  (int) edges.size(), (int) boardItems.size() );
226 
227  // This is the number of tests between 2 calls to the progress bar
228  const int delta = 50;
229  int ii = 0;
230 
231  for( BOARD_ITEM* item : boardItems )
232  {
235 
236  if( !testCopper && !testSilk )
237  break;
238 
239  if( !reportProgress( ii++, boardItems.size(), delta ) )
240  return false; // DRC cancelled
241 
242  const std::shared_ptr<SHAPE>& itemShape = item->GetEffectiveShape();
243 
244  for( PCB_LAYER_ID testLayer : { Edge_Cuts, Margin } )
245  {
246  if( testCopper && item->IsOnCopperLayer() )
247  {
248  edgesTree.QueryColliding( item, UNDEFINED_LAYER, testLayer, nullptr,
249  [&]( BOARD_ITEM* edge ) -> bool
250  {
251  return testAgainstEdge( item, itemShape.get(), edge,
254  },
256  }
257 
258  if( testSilk && ( item->GetLayer() == F_SilkS || item->GetLayer() == B_SilkS ) )
259  {
260  if( edgesTree.QueryColliding( item, UNDEFINED_LAYER, testLayer, nullptr,
261  [&]( BOARD_ITEM* edge ) -> bool
262  {
263  return testAgainstEdge( item, itemShape.get(), edge,
264  SILK_CLEARANCE_CONSTRAINT,
265  DRCE_SILK_MASK_CLEARANCE );
266  },
268  {
269  // violations reported during QueryColliding
270  }
271  else
272  {
273  // TODO: check postion being outside board boundary
274  }
275  }
276  }
277  }
278 
280 
281  return true;
282 }
int GetStartY()
Definition: eda_shape.h:98
virtual size_t GetSegmentCount() const override
bool isInvisibleText(const BOARD_ITEM *aItem) const
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:49
virtual EDA_ITEM * Clone() const override
Create a duplicate of this item with linked list members set to NULL.
Definition: pcb_shape.cpp:175
bool IsErrorLimitExceeded(int error_code)
int GetEndY()
Definition: eda_shape.h:123
virtual bool reportProgress(int aCount, int aSize, int aDelta)
class FP_SHAPE, a footprint edge
Definition: typeinfo.h:93
T Min() const
Definition: minoptmax.h:33
int GetStartX()
Definition: eda_shape.h:99
virtual void reportRuleStatistics()
int GetEndX()
Definition: eda_shape.h:124
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:505
bool QueryWorstConstraint(DRC_CONSTRAINT_T aRuleId, DRC_CONSTRAINT &aConstraint)
bool testAgainstEdge(BOARD_ITEM *item, SHAPE *itemShape, BOARD_ITEM *other, DRC_CONSTRAINT_T aConstraintType, PCB_DRC_CODE aErrorCode)
BOARD * GetBoard() const
Definition: drc_engine.h:88
virtual bool reportPhase(const wxString &aStageName)
SHAPE_LINE_CHAIN & Outline(int aIndex)
#define _(s)
static LSET AllLayersMask()
Definition: lset.cpp:796
SHAPE_POLY_SET & GetPolyShape()
Definition: eda_shape.h:207
Definition: seg.h:40
int forEachGeometryItem(const std::vector< KICAD_T > &aTypes, LSET aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
const MINOPTMAX< int > & GetValue() const
Definition: drc_rule.h:122
const SEG CSegment(int aIndex) const
Return a constant copy of the aIndex segment in the line chain.
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:65
static std::vector< KICAD_T > s_allBasicItemsButZones
DRC_ENGINE * m_drcEngine
VECTOR2I A
Definition: seg.h:48
void Insert(BOARD_ITEM *aItem, PCB_LAYER_ID aLayer, int aWorstClearance=0)
Insert an item into the tree on a particular layer with an optional worst clearance.
Definition: drc_rtree.h:88
constexpr int delta
SHAPE_T GetShape() const
Definition: eda_shape.h:92
#define drc_dbg(level, fmt,...)
Definition: drc_engine.h:57
Implement an R-tree for fast spatial and layer indexing of connectable items.
Definition: drc_rtree.h:46
class PCB_SHAPE, a segment not on copper layers
Definition: typeinfo.h:90
virtual void reportAux(wxString fmt,...)
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
Definition: drc_rtree.h:178
VECTOR2I B
Definition: seg.h:49

References _, SEG::A, LSET::AllLayersMask(), SEG::B, B_SilkS, PCB_SHAPE::Clone(), SHAPE_LINE_CHAIN::CSegment(), delta, drc_dbg, DRCE_EDGE_CLEARANCE, DRCE_SILK_MASK_CLEARANCE, EDGE_CLEARANCE_CONSTRAINT, Edge_Cuts, F_SilkS, DRC_TEST_PROVIDER::forEachGeometryItem(), DRC_ENGINE::GetBoard(), EDA_SHAPE::GetEndX(), EDA_SHAPE::GetEndY(), EDA_SHAPE::GetPolyShape(), SHAPE_LINE_CHAIN::GetSegmentCount(), EDA_SHAPE::GetShape(), EDA_SHAPE::GetStartX(), EDA_SHAPE::GetStartY(), DRC_CONSTRAINT::GetValue(), DRC_RTREE::Insert(), DRC_ENGINE::IsErrorLimitExceeded(), DRC_TEST_PROVIDER::isInvisibleText(), DRC_TEST_PROVIDER_CLEARANCE_BASE::m_board, DRC_TEST_PROVIDER::m_drcEngine, DRC_TEST_PROVIDER_CLEARANCE_BASE::m_largestClearance, Margin, MINOPTMAX< T >::Min(), SHAPE_POLY_SET::Outline(), PCB_FP_SHAPE_T, PCB_SHAPE_T, POLY, DRC_RTREE::QueryColliding(), DRC_ENGINE::QueryWorstConstraint(), RECT, DRC_TEST_PROVIDER::reportAux(), DRC_TEST_PROVIDER::reportPhase(), DRC_TEST_PROVIDER::reportProgress(), DRC_TEST_PROVIDER::reportRuleStatistics(), DRC_TEST_PROVIDER::s_allBasicItemsButZones, SEGMENT, testAgainstEdge(), and UNDEFINED_LAYER.

◆ SetDRCEngine()

void DRC_TEST_PROVIDER::SetDRCEngine ( DRC_ENGINE engine)
inlineinherited

Definition at line 78 of file drc_test_provider.h.

79  {
80  m_drcEngine = engine;
81  m_stats.clear();
82  }
std::unordered_map< const DRC_RULE *, int > m_stats
DRC_ENGINE * m_drcEngine

References DRC_TEST_PROVIDER::m_drcEngine, and DRC_TEST_PROVIDER::m_stats.

◆ testAgainstEdge()

bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::testAgainstEdge ( BOARD_ITEM item,
SHAPE itemShape,
BOARD_ITEM other,
DRC_CONSTRAINT_T  aConstraintType,
PCB_DRC_CODE  aErrorCode 
)
private

Definition at line 81 of file drc_test_provider_edge_clearance.cpp.

85 {
86  const std::shared_ptr<SHAPE>& edgeShape = edge->GetEffectiveShape( Edge_Cuts );
87 
88  auto constraint = m_drcEngine->EvalRules( aConstraintType, edge, item, item->GetLayer() );
89  int minClearance = constraint.GetValue().Min();
90  int actual;
91  VECTOR2I pos;
92 
93  if( minClearance >= 0 && itemShape->Collide( edgeShape.get(), minClearance, &actual, &pos ) )
94  {
95  std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( aErrorCode );
96 
97  // Only report clearance info if there is any; otherwise it's just a straight collision
98  if( minClearance > 0 )
99  {
100  m_msg.Printf( _( "(%s clearance %s; actual %s)" ),
101  constraint.GetName(),
102  MessageTextFromValue( userUnits(), minClearance ),
103  MessageTextFromValue( userUnits(), actual ) );
104 
105  drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + m_msg );
106  }
107 
108  drce->SetItems( edge->m_Uuid, item->m_Uuid );
109  drce->SetViolatingRule( constraint.GetParentRule() );
110 
111  reportViolation( drce, (wxPoint) pos );
112  return false; // don't report violations with multiple edges; one is enough
113  }
114 
115  return true;
116 }
wxString MessageTextFromValue(EDA_UNITS aUnits, int aValue, bool aAddUnitLabel, EDA_DATA_TYPE aType)
Convert a value to a string using double notation.
Definition: base_units.cpp:104
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition: drc_item.cpp:266
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const wxPoint &aMarkerPos)
T Min() const
Definition: minoptmax.h:33
virtual bool Collide(const VECTOR2I &aP, int aClearance=0, int *aActual=nullptr, VECTOR2I *aLocation=nullptr) const
Check if the boundary of shape (this) lies closer to the point aP than aClearance,...
Definition: shape.h:165
#define _(s)
EDA_UNITS userUnits() const
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
Definition: drc_engine.cpp:760
const KIID m_Uuid
Definition: eda_item.h:474
const MINOPTMAX< int > & GetValue() const
Definition: drc_rule.h:122
DRC_ENGINE * m_drcEngine
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:142

References _, SHAPE::Collide(), DRC_ITEM::Create(), Edge_Cuts, DRC_ENGINE::EvalRules(), BOARD_ITEM::GetEffectiveShape(), BOARD_ITEM::GetLayer(), DRC_CONSTRAINT::GetValue(), DRC_TEST_PROVIDER::m_drcEngine, DRC_TEST_PROVIDER::m_msg, EDA_ITEM::m_Uuid, MessageTextFromValue(), MINOPTMAX< T >::Min(), DRC_TEST_PROVIDER::reportViolation(), and DRC_TEST_PROVIDER::userUnits().

Referenced by Run().

◆ userUnits()

Member Data Documentation

◆ m_board

◆ m_boardOutlineValid

bool DRC_TEST_PROVIDER_CLEARANCE_BASE::m_boardOutlineValid
protectedinherited

Definition at line 53 of file drc_test_provider_clearance_base.h.

◆ m_drcEngine

DRC_ENGINE* DRC_TEST_PROVIDER::m_drcEngine
protectedinherited

Definition at line 131 of file drc_test_provider.h.

Referenced by DRC_TEST_PROVIDER_HOLE_SIZE::checkPad(), DRC_TEST_PROVIDER_HOLE_SIZE::checkVia(), DRC_TEST_PROVIDER::forEachGeometryItem(), DRC_TEST_PROVIDER_LVS::GetNumPhases(), DRC_TEST_PROVIDER::reportAux(), DRC_TEST_PROVIDER::reportPhase(), DRC_TEST_PROVIDER::reportProgress(), DRC_TEST_PROVIDER::reportRuleStatistics(), DRC_TEST_PROVIDER::reportViolation(), DRC_TEST_PROVIDER_VIA_DIAMETER::Run(), DRC_TEST_PROVIDER_TRACK_WIDTH::Run(), DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_HOLE_SIZE::Run(), DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTIVITY::Run(), DRC_TEST_PROVIDER_SILK_TO_MASK::Run(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::Run(), DRC_TEST_PROVIDER_MISC::Run(), Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::Run(), DRC_TEST_PROVIDER_LVS::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::Run(), DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal(), DRC_TEST_PROVIDER::SetDRCEngine(), testAgainstEdge(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testCourtyardClearances(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testFootprintCourtyardDefinitions(), DRC_TEST_PROVIDER_LVS::testFootprints(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::testHoleAgainstHole(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testItemAgainstZones(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem(), DRC_TEST_PROVIDER_MISC::testTextVars(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones(), and DRC_TEST_PROVIDER::userUnits().

◆ m_enabled

bool DRC_TEST_PROVIDER::m_enabled = true
protectedinherited

Definition at line 134 of file drc_test_provider.h.

Referenced by DRC_TEST_PROVIDER::Enable(), and DRC_TEST_PROVIDER::IsEnabled().

◆ m_isRuleDriven

◆ m_largestClearance

◆ m_msg

◆ m_stats

std::unordered_map<const DRC_RULE*, int> DRC_TEST_PROVIDER::m_stats
protectedinherited

◆ s_allBasicItems

std::vector< KICAD_T > DRC_TEST_PROVIDER::s_allBasicItems
staticprotectedinherited

◆ s_allBasicItemsButZones

std::vector< KICAD_T > DRC_TEST_PROVIDER::s_allBasicItemsButZones
staticprotectedinherited

Definition at line 128 of file drc_test_provider.h.

Referenced by DRC_TEST_PROVIDER::forEachGeometryItem(), and Run().


The documentation for this class was generated from the following file: