KiCad PCB EDA Suite
DRC_TEST_PROVIDER_MATCHED_LENGTH Class Reference
Inheritance diagram for DRC_TEST_PROVIDER_MATCHED_LENGTH:
DRC_TEST_PROVIDER

Public Member Functions

 DRC_TEST_PROVIDER_MATCHED_LENGTH ()
 
virtual ~DRC_TEST_PROVIDER_MATCHED_LENGTH ()
 
virtual bool Run () override
 Run this provider against the given PCB with configured options (if any). More...
 
virtual const wxString GetName () const override
 
virtual const wxString GetDescription () const override
 
DRC_LENGTH_REPORT BuildLengthReport () const
 
void SetDRCEngine (DRC_ENGINE *engine)
 

Static Public Member Functions

static void Init ()
 

Protected Member Functions

int forEachGeometryItem (const std::vector< KICAD_T > &aTypes, LSET aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
 
virtual void reportAux (wxString fmt,...)
 
virtual void reportViolation (std::shared_ptr< DRC_ITEM > &item, const VECTOR2I &aMarkerPos, int aMarkerLayer)
 
virtual bool reportProgress (int aCount, int aSize, int aDelta)
 
virtual bool reportPhase (const wxString &aStageName)
 
virtual void reportRuleStatistics ()
 
virtual void accountCheck (const DRC_RULE *ruleToTest)
 
virtual void accountCheck (const DRC_CONSTRAINT &constraintToTest)
 
bool isInvisibleText (const BOARD_ITEM *aItem) const
 
EDA_UNITS userUnits () const
 

Protected Attributes

DRC_ENGINEm_drcEngine
 
std::unordered_map< const DRC_RULE *, int > m_stats
 
bool m_isRuleDriven = true
 

Static Protected Attributes

static std::vector< KICAD_Ts_allBasicItems
 
static std::vector< KICAD_Ts_allBasicItemsButZones
 

Private Types

using CONNECTION = DRC_LENGTH_REPORT::ENTRY
 

Private Member Functions

bool runInternal (bool aDelayReportMode=false)
 
void checkLengths (const DRC_CONSTRAINT &aConstraint, const std::vector< CONNECTION > &aMatchedConnections)
 
void checkSkews (const DRC_CONSTRAINT &aConstraint, const std::vector< CONNECTION > &aMatchedConnections)
 
void checkViaCounts (const DRC_CONSTRAINT &aConstraint, const std::vector< CONNECTION > &aMatchedConnections)
 

Private Attributes

BOARDm_board
 
DRC_LENGTH_REPORT m_report
 

Detailed Description

Definition at line 45 of file drc_test_provider_matched_length.cpp.

Member Typedef Documentation

◆ CONNECTION

Constructor & Destructor Documentation

◆ DRC_TEST_PROVIDER_MATCHED_LENGTH()

DRC_TEST_PROVIDER_MATCHED_LENGTH::DRC_TEST_PROVIDER_MATCHED_LENGTH ( )
inline

Definition at line 48 of file drc_test_provider_matched_length.cpp.

48 :
49 m_board( nullptr )
50 {
51 }

◆ ~DRC_TEST_PROVIDER_MATCHED_LENGTH()

virtual DRC_TEST_PROVIDER_MATCHED_LENGTH::~DRC_TEST_PROVIDER_MATCHED_LENGTH ( )
inlinevirtual

Definition at line 53 of file drc_test_provider_matched_length.cpp.

54 {
55 }

Member Function Documentation

◆ accountCheck() [1/2]

void DRC_TEST_PROVIDER::accountCheck ( const DRC_CONSTRAINT constraintToTest)
protectedvirtualinherited

Definition at line 132 of file drc_test_provider.cpp.

133{
134 accountCheck( constraintToTest.GetParentRule() );
135}
DRC_RULE * GetParentRule() const
Definition: drc_rule.h:143
virtual void accountCheck(const DRC_RULE *ruleToTest)

References DRC_TEST_PROVIDER::accountCheck(), and DRC_CONSTRAINT::GetParentRule().

◆ accountCheck() [2/2]

void DRC_TEST_PROVIDER::accountCheck ( const DRC_RULE ruleToTest)
protectedvirtualinherited

Definition at line 121 of file drc_test_provider.cpp.

122{
123 auto it = m_stats.find( ruleToTest );
124
125 if( it == m_stats.end() )
126 m_stats[ ruleToTest ] = 1;
127 else
128 m_stats[ ruleToTest ] += 1;
129}
std::unordered_map< const DRC_RULE *, int > m_stats

References DRC_TEST_PROVIDER::m_stats.

Referenced by DRC_TEST_PROVIDER::accountCheck(), and DRC_TEST_PROVIDER::reportViolation().

◆ BuildLengthReport()

DRC_LENGTH_REPORT DRC_TEST_PROVIDER_MATCHED_LENGTH::BuildLengthReport ( ) const

◆ checkLengths()

void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkLengths ( const DRC_CONSTRAINT aConstraint,
const std::vector< CONNECTION > &  aMatchedConnections 
)
private

Definition at line 88 of file drc_test_provider_matched_length.cpp.

90{
91 for( const DRC_LENGTH_REPORT::ENTRY& ent : aMatchedConnections )
92 {
93 bool minViolation = false;
94 bool maxViolation = false;
95 int minLen = 0;
96 int maxLen = 0;
97
98 if( aConstraint.GetValue().HasMin() && ent.total < aConstraint.GetValue().Min() )
99 {
100 minViolation = true;
101 minLen = aConstraint.GetValue().Min();
102 }
103 else if( aConstraint.GetValue().HasMax() && ent.total > aConstraint.GetValue().Max() )
104 {
105 maxViolation = true;
106 maxLen = aConstraint.GetValue().Max();
107 }
108
109 if( ( minViolation || maxViolation ) )
110 {
111 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_LENGTH_OUT_OF_RANGE );
112 wxString msg;
113
114 if( minViolation )
115 {
116 msg.Printf( _( "(%s min length: %s; actual: %s)" ),
117 aConstraint.GetName(),
118 MessageTextFromValue( userUnits(), minLen ),
119 MessageTextFromValue( userUnits(), ent.total ) );
120 }
121 else if( maxViolation )
122 {
123 msg.Printf( _( "(%s max length: %s; actual: %s)" ),
124 aConstraint.GetName(),
125 MessageTextFromValue( userUnits(), maxLen ),
126 MessageTextFromValue( userUnits(), ent.total ) );
127 }
128
129 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
130
131 for( auto offendingTrack : ent.items )
132 drcItem->AddItem( offendingTrack );
133
134 drcItem->SetViolatingRule( aConstraint.GetParentRule() );
135
136 reportViolation( drcItem, ( *ent.items.begin() )->GetPosition(),
137 ( *ent.items.begin() )->GetLayer() );
138 }
139 }
140}
wxString MessageTextFromValue(EDA_UNITS aUnits, int aValue, bool aAddUnitLabel, EDA_DATA_TYPE aType)
Convert a value to a string using double notation.
Definition: base_units.cpp:103
wxString GetName() const
Definition: drc_rule.h:147
const MINOPTMAX< int > & GetValue() const
Definition: drc_rule.h:139
static std::shared_ptr< DRC_ITEM > Create(int aErrorCode)
Constructs a DRC_ITEM for the given error code.
Definition: drc_item.cpp:325
virtual void reportViolation(std::shared_ptr< DRC_ITEM > &item, const VECTOR2I &aMarkerPos, int aMarkerLayer)
EDA_UNITS userUnits() const
T Min() const
Definition: minoptmax.h:33
bool HasMax() const
Definition: minoptmax.h:38
bool HasMin() const
Definition: minoptmax.h:37
T Max() const
Definition: minoptmax.h:34
@ DRCE_LENGTH_OUT_OF_RANGE
Definition: drc_item.h:95
#define _(s)

References _, DRC_ITEM::Create(), DRCE_LENGTH_OUT_OF_RANGE, DRC_CONSTRAINT::GetName(), DRC_CONSTRAINT::GetParentRule(), DRC_CONSTRAINT::GetValue(), MINOPTMAX< T >::HasMax(), MINOPTMAX< T >::HasMin(), MINOPTMAX< T >::Max(), MessageTextFromValue(), MINOPTMAX< T >::Min(), DRC_TEST_PROVIDER::reportViolation(), and DRC_TEST_PROVIDER::userUnits().

Referenced by runInternal().

◆ checkSkews()

void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkSkews ( const DRC_CONSTRAINT aConstraint,
const std::vector< CONNECTION > &  aMatchedConnections 
)
private

Definition at line 142 of file drc_test_provider_matched_length.cpp.

144{
145 int avgLength = 0;
146
147 for( const DRC_LENGTH_REPORT::ENTRY& ent : aMatchedConnections )
148 avgLength += ent.total;
149
150 avgLength /= aMatchedConnections.size();
151
152 for( const auto& ent : aMatchedConnections )
153 {
154 int skew = ent.total - avgLength;
155 if( aConstraint.GetValue().HasMax() && abs( skew ) > aConstraint.GetValue().Max() )
156 {
157 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SKEW_OUT_OF_RANGE );
158 wxString msg;
159
160 msg.Printf( _( "(%s max skew: %s; actual: %s; average net length: %s; actual: %s)" ),
161 aConstraint.GetName(),
162 MessageTextFromValue( userUnits(), aConstraint.GetValue().Max() ),
164 MessageTextFromValue( userUnits(), avgLength ),
165 MessageTextFromValue( userUnits(), ent.total ) );
166
167 drcItem->SetErrorMessage( drcItem->GetErrorText() + " " + msg );
168
169 for( BOARD_CONNECTED_ITEM* offendingTrack : ent.items )
170 drcItem->SetItems( offendingTrack );
171
172 drcItem->SetViolatingRule( aConstraint.GetParentRule() );
173
174 reportViolation( drcItem, ( *ent.items.begin() )->GetPosition(),
175 ( *ent.items.begin() )->GetLayer() );
176 }
177 }
178}
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
@ DRCE_SKEW_OUT_OF_RANGE
Definition: drc_item.h:96
EDA_ANGLE abs(const EDA_ANGLE &aAngle)
Definition: eda_angle.h:412

References _, std::abs(), DRC_ITEM::Create(), DRCE_SKEW_OUT_OF_RANGE, DRC_CONSTRAINT::GetName(), DRC_CONSTRAINT::GetParentRule(), DRC_CONSTRAINT::GetValue(), MINOPTMAX< T >::HasMax(), MINOPTMAX< T >::Max(), MessageTextFromValue(), DRC_TEST_PROVIDER::reportViolation(), and DRC_TEST_PROVIDER::userUnits().

Referenced by runInternal().

◆ checkViaCounts()

void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkViaCounts ( const DRC_CONSTRAINT aConstraint,
const std::vector< CONNECTION > &  aMatchedConnections 
)
private

Definition at line 181 of file drc_test_provider_matched_length.cpp.

183{
184 for( const auto& ent : aMatchedConnections )
185 {
186 if( aConstraint.GetValue().HasMax() && ent.viaCount > aConstraint.GetValue().Max() )
187 {
188 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_TOO_MANY_VIAS );
189 wxString msg;
190
191 msg.Printf( _( "(%s max count: %d; actual: %d)" ),
192 aConstraint.GetName(),
193 aConstraint.GetValue().Max(),
194 ent.viaCount );
195
196 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
197
198 for( auto offendingTrack : ent.items )
199 drcItem->SetItems( offendingTrack );
200
201 drcItem->SetViolatingRule( aConstraint.GetParentRule() );
202
203 reportViolation( drcItem, ( *ent.items.begin() )->GetPosition(),
204 ( *ent.items.begin() )->GetLayer() );
205 }
206 }
207}
@ DRCE_TOO_MANY_VIAS
Definition: drc_item.h:97

References _, DRC_ITEM::Create(), DRCE_TOO_MANY_VIAS, DRC_CONSTRAINT::GetName(), DRC_CONSTRAINT::GetParentRule(), DRC_CONSTRAINT::GetValue(), MINOPTMAX< T >::HasMax(), MINOPTMAX< T >::Max(), and DRC_TEST_PROVIDER::reportViolation().

Referenced by runInternal().

◆ forEachGeometryItem()

int DRC_TEST_PROVIDER::forEachGeometryItem ( const std::vector< KICAD_T > &  aTypes,
LSET  aLayers,
const std::function< bool(BOARD_ITEM *)> &  aFunc 
)
protectedinherited

Definition at line 157 of file drc_test_provider.cpp.

159{
160 BOARD *brd = m_drcEngine->GetBoard();
161 std::bitset<MAX_STRUCT_TYPE_ID> typeMask;
162 int n = 0;
163
164 if( aTypes.size() == 0 )
165 {
166 for( int i = 0; i < MAX_STRUCT_TYPE_ID; i++ )
167 typeMask[ i ] = true;
168 }
169 else
170 {
171 for( KICAD_T aType : aTypes )
172 typeMask[ aType ] = true;
173 }
174
175 for( PCB_TRACK* item : brd->Tracks() )
176 {
177 if( (item->GetLayerSet() & aLayers).any() )
178 {
179 if( typeMask[ PCB_TRACE_T ] && item->Type() == PCB_TRACE_T )
180 {
181 aFunc( item );
182 n++;
183 }
184 else if( typeMask[ PCB_VIA_T ] && item->Type() == PCB_VIA_T )
185 {
186 aFunc( item );
187 n++;
188 }
189 else if( typeMask[ PCB_ARC_T ] && item->Type() == PCB_ARC_T )
190 {
191 aFunc( item );
192 n++;
193 }
194 }
195 }
196
197 for( BOARD_ITEM* item : brd->Drawings() )
198 {
199 if( (item->GetLayerSet() & aLayers).any() )
200 {
201 if( typeMask[ PCB_DIMENSION_T ] && BaseType( item->Type() ) == PCB_DIMENSION_T )
202 {
203 if( !aFunc( item ) )
204 return n;
205
206 n++;
207 }
208 else if( typeMask[ PCB_SHAPE_T ] && item->Type() == PCB_SHAPE_T )
209 {
210 if( !aFunc( item ) )
211 return n;
212
213 n++;
214 }
215 else if( typeMask[ PCB_TEXT_T ] && item->Type() == PCB_TEXT_T )
216 {
217 if( !aFunc( item ) )
218 return n;
219
220 n++;
221 }
222 else if( typeMask[ PCB_TEXTBOX_T ] && item->Type() == PCB_TEXTBOX_T )
223 {
224 if( !aFunc( item ) )
225 return n;
226
227 n++;
228 }
229 else if( typeMask[ PCB_TARGET_T ] && item->Type() == PCB_TARGET_T )
230 {
231 if( !aFunc( item ) )
232 return n;
233
234 n++;
235 }
236 }
237 }
238
239 if( typeMask[ PCB_ZONE_T ] )
240 {
241 for( ZONE* item : brd->Zones() )
242 {
243 if( ( item->GetLayerSet() & aLayers ).any() )
244 {
245 if( !aFunc( item ) )
246 return n;
247
248 n++;
249 }
250 }
251 }
252
253 for( FOOTPRINT* footprint : brd->Footprints() )
254 {
255 if( typeMask[ PCB_FP_TEXT_T ] )
256 {
257 if( ( footprint->Reference().GetLayerSet() & aLayers ).any() )
258 {
259 if( !aFunc( &footprint->Reference() ) )
260 return n;
261
262 n++;
263 }
264
265 if( ( footprint->Value().GetLayerSet() & aLayers ).any() )
266 {
267 if( !aFunc( &footprint->Value() ) )
268 return n;
269
270 n++;
271 }
272 }
273
274 if( typeMask[ PCB_PAD_T ] )
275 {
276 for( PAD* pad : footprint->Pads() )
277 {
278 // Careful: if a pad has a hole then it pierces all layers
279 if( pad->HasHole() || ( pad->GetLayerSet() & aLayers ).any() )
280 {
281 if( !aFunc( pad ) )
282 return n;
283
284 n++;
285 }
286 }
287 }
288
289 for( BOARD_ITEM* dwg : footprint->GraphicalItems() )
290 {
291 if( (dwg->GetLayerSet() & aLayers).any() )
292 {
293 if( typeMask[ PCB_DIMENSION_T ] && BaseType( dwg->Type() ) == PCB_DIMENSION_T )
294 {
295 if( !aFunc( dwg ) )
296 return n;
297
298 n++;
299 }
300 else if( typeMask[ PCB_FP_TEXT_T ] && dwg->Type() == PCB_FP_TEXT_T )
301 {
302 if( !aFunc( dwg ) )
303 return n;
304
305 n++;
306 }
307 else if( typeMask[ PCB_FP_TEXTBOX_T ] && dwg->Type() == PCB_FP_TEXTBOX_T )
308 {
309 if( !aFunc( dwg ) )
310 return n;
311
312 n++;
313 }
314 else if( typeMask[ PCB_FP_SHAPE_T ] && dwg->Type() == PCB_FP_SHAPE_T )
315 {
316 if( !aFunc( dwg ) )
317 return n;
318
319 n++;
320 }
321 }
322 }
323
324 if( typeMask[ PCB_FP_ZONE_T ] )
325 {
326 for( ZONE* zone : footprint->Zones() )
327 {
328 if( (zone->GetLayerSet() & aLayers).any() )
329 {
330 if( !aFunc( zone ) )
331 return n;
332
333 n++;
334 }
335 }
336 }
337
338 if( typeMask[ PCB_FOOTPRINT_T ] )
339 {
340 if( !aFunc( footprint ) )
341 return n;
342
343 n++;
344 }
345 }
346
347 return n;
348}
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:53
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:240
ZONES & Zones()
Definition: board.h:288
FOOTPRINTS & Footprints()
Definition: board.h:282
TRACKS & Tracks()
Definition: board.h:279
DRAWINGS & Drawings()
Definition: board.h:285
BOARD * GetBoard() const
Definition: drc_engine.h:88
DRC_ENGINE * m_drcEngine
Definition: pad.h:59
Handle a list of polygons defining a copper zone.
Definition: zone.h:58
constexpr KICAD_T BaseType(const KICAD_T aType)
Return the underlying type of the given type.
Definition: typeinfo.h:245
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:78
@ PCB_SHAPE_T
class PCB_SHAPE, a segment not on copper layers
Definition: typeinfo.h:90
@ PCB_FP_SHAPE_T
class FP_SHAPE, a footprint edge
Definition: typeinfo.h:96
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:104
@ MAX_STRUCT_TYPE_ID
Definition: typeinfo.h:233
@ PCB_FP_TEXTBOX_T
class FP_TEXTBOX, wrapped text in a footprint
Definition: typeinfo.h:95
@ PCB_TEXTBOX_T
class PCB_TEXTBOX, wrapped text on a layer
Definition: typeinfo.h:93
@ PCB_ZONE_T
class ZONE, a copper pour area
Definition: typeinfo.h:114
@ PCB_TEXT_T
class PCB_TEXT, text on a layer
Definition: typeinfo.h:92
@ PCB_TARGET_T
class PCB_TARGET, a target (graphic item)
Definition: typeinfo.h:113
@ PCB_FOOTPRINT_T
class FOOTPRINT, a footprint
Definition: typeinfo.h:88
@ PCB_FP_ZONE_T
class ZONE, managed by a footprint
Definition: typeinfo.h:102
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:89
@ PCB_FP_TEXT_T
class FP_TEXT, text in a footprint
Definition: typeinfo.h:94
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:105
@ PCB_DIMENSION_T
class PCB_DIMENSION_BASE: abstract dimension meta-type
Definition: typeinfo.h:107
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:103

References BaseType(), BOARD::Drawings(), BOARD::Footprints(), DRC_ENGINE::GetBoard(), DRC_TEST_PROVIDER::m_drcEngine, MAX_STRUCT_TYPE_ID, pad, PCB_ARC_T, PCB_DIMENSION_T, PCB_FOOTPRINT_T, PCB_FP_SHAPE_T, PCB_FP_TEXT_T, PCB_FP_TEXTBOX_T, PCB_FP_ZONE_T, PCB_PAD_T, PCB_SHAPE_T, PCB_TARGET_T, PCB_TEXT_T, PCB_TEXTBOX_T, PCB_TRACE_T, PCB_VIA_T, PCB_ZONE_T, BOARD::Tracks(), and BOARD::Zones().

Referenced by DRC_TEST_PROVIDER_SOLDER_MASK::buildRTrees(), DRC_CACHE_GENERATOR::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::Run(), DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), DRC_TEST_PROVIDER_SLIVER_CHECKER::Run(), DRC_TEST_PROVIDER_TEXT_DIMS::Run(), runInternal(), DRC_TEST_PROVIDER_MISC::testAssertions(), DRC_TEST_PROVIDER_MISC::testDisabledLayers(), DRC_TEST_PROVIDER_SOLDER_MASK::testMaskBridges(), DRC_TEST_PROVIDER_SOLDER_MASK::testSilkToMaskClearance(), and DRC_TEST_PROVIDER_MISC::testTextVars().

◆ GetDescription()

virtual const wxString DRC_TEST_PROVIDER_MATCHED_LENGTH::GetDescription ( ) const
inlineoverridevirtual

Reimplemented from DRC_TEST_PROVIDER.

Definition at line 64 of file drc_test_provider_matched_length.cpp.

65 {
66 return wxT( "Tests matched track lengths." );
67 }

◆ GetName()

virtual const wxString DRC_TEST_PROVIDER_MATCHED_LENGTH::GetName ( void  ) const
inlineoverridevirtual

Reimplemented from DRC_TEST_PROVIDER.

Definition at line 59 of file drc_test_provider_matched_length.cpp.

60 {
61 return wxT( "length" );
62 };

◆ Init()

void DRC_TEST_PROVIDER::Init ( )
staticinherited

Definition at line 52 of file drc_test_provider.cpp.

53{
54 if( s_allBasicItems.size() == 0 )
55 {
56 for( int i = 0; i < MAX_STRUCT_TYPE_ID; i++ )
57 {
58 if( i != PCB_FOOTPRINT_T && i != PCB_GROUP_T )
59 {
60 s_allBasicItems.push_back( (KICAD_T) i );
61
62 if( i != PCB_ZONE_T && i != PCB_FP_ZONE_T )
63 s_allBasicItemsButZones.push_back( (KICAD_T) i );
64 }
65 }
66 }
67}
static std::vector< KICAD_T > s_allBasicItemsButZones
static std::vector< KICAD_T > s_allBasicItems
@ PCB_GROUP_T
class PCB_GROUP, a set of BOARD_ITEMs
Definition: typeinfo.h:117

References MAX_STRUCT_TYPE_ID, PCB_FOOTPRINT_T, PCB_FP_ZONE_T, PCB_GROUP_T, PCB_ZONE_T, DRC_TEST_PROVIDER::s_allBasicItems, and DRC_TEST_PROVIDER::s_allBasicItemsButZones.

Referenced by DRC_ENGINE::RunTests().

◆ isInvisibleText()

bool DRC_TEST_PROVIDER::isInvisibleText ( const BOARD_ITEM aItem) const
protectedinherited

Definition at line 351 of file drc_test_provider.cpp.

352{
353
354 if( const FP_TEXT* text = dyn_cast<const FP_TEXT*>( aItem ) )
355 {
356 if( !text->IsVisible() )
357 return true;
358 }
359
360 if( const PCB_TEXT* text = dyn_cast<const PCB_TEXT*>( aItem ) )
361 {
362 if( !text->IsVisible() )
363 return true;
364 }
365
366 return false;
367}

References text.

Referenced by DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), and DRC_TEST_PROVIDER_SOLDER_MASK::testSilkToMaskClearance().

◆ reportAux()

◆ reportPhase()

bool DRC_TEST_PROVIDER::reportPhase ( const wxString &  aStageName)
protectedvirtualinherited

◆ reportProgress()

bool DRC_TEST_PROVIDER::reportProgress ( int  aCount,
int  aSize,
int  aDelta 
)
protectedvirtualinherited

Definition at line 85 of file drc_test_provider.cpp.

86{
87 if( ( aCount % aDelta ) == 0 || aCount == aSize - 1 )
88 {
89 if( !m_drcEngine->ReportProgress( (double) aCount / (double) aSize ) )
90 return false;
91 }
92
93 return true;
94}
bool ReportProgress(double aProgress)

References DRC_TEST_PROVIDER::m_drcEngine, and DRC_ENGINE::ReportProgress().

Referenced by DRC_TEST_PROVIDER_SOLDER_MASK::buildRTrees(), DRC_CACHE_GENERATOR::Run(), DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTIVITY::Run(), DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::Run(), DRC_TEST_PROVIDER_LIBRARY_PARITY::Run(), DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), DRC_TEST_PROVIDER_TEXT_DIMS::Run(), DRC_TEST_PROVIDER_TRACK_WIDTH::Run(), DRC_TEST_PROVIDER_VIA_DIAMETER::Run(), runInternal(), DRC_TEST_PROVIDER_MISC::testAssertions(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testCourtyardClearances(), DRC_TEST_PROVIDER_MISC::testDisabledLayers(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testFootprintCourtyardDefinitions(), DRC_TEST_PROVIDER_SOLDER_MASK::testMaskBridges(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances(), DRC_TEST_PROVIDER_SOLDER_MASK::testSilkToMaskClearance(), DRC_TEST_PROVIDER_MISC::testTextVars(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances(), and DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones().

◆ reportRuleStatistics()

void DRC_TEST_PROVIDER::reportRuleStatistics ( )
protectedvirtualinherited

Definition at line 138 of file drc_test_provider.cpp.

139{
140 if( !m_isRuleDriven )
141 return;
142
143 m_drcEngine->ReportAux( wxT( "Rule hit statistics: " ) );
144
145 for( const std::pair<const DRC_RULE* const, int>& stat : m_stats )
146 {
147 if( stat.first )
148 {
149 m_drcEngine->ReportAux( wxString::Format( wxT( " - rule '%s': %d hits " ),
150 stat.first->m_Name,
151 stat.second ) );
152 }
153 }
154}
void Format(OUTPUTFORMATTER *out, int aNestLevel, int aCtl, const CPTREE &aTree)
Output a PTREE into s-expression format via an OUTPUTFORMATTER derivative.
Definition: ptree.cpp:200

References Format(), DRC_TEST_PROVIDER::m_drcEngine, DRC_TEST_PROVIDER::m_isRuleDriven, DRC_TEST_PROVIDER::m_stats, and DRC_ENGINE::ReportAux().

Referenced by DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTIVITY::Run(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_HOLE_SIZE::Run(), DRC_TEST_PROVIDER_SCHEMATIC_PARITY::Run(), DRC_TEST_PROVIDER_SOLDER_MASK::Run(), DRC_TEST_PROVIDER_TEXT_DIMS::Run(), DRC_TEST_PROVIDER_TRACK_WIDTH::Run(), DRC_TEST_PROVIDER_VIA_DIAMETER::Run(), and runInternal().

◆ reportViolation()

void DRC_TEST_PROVIDER::reportViolation ( std::shared_ptr< DRC_ITEM > &  item,
const VECTOR2I aMarkerPos,
int  aMarkerLayer 
)
protectedvirtualinherited

Definition at line 74 of file drc_test_provider.cpp.

76{
77 if( item->GetViolatingRule() )
78 accountCheck( item->GetViolatingRule() );
79
80 item->SetViolatingTest( this );
81 m_drcEngine->ReportViolation( item, aMarkerPos, aMarkerLayer );
82}
void ReportViolation(const std::shared_ptr< DRC_ITEM > &aItem, const VECTOR2I &aPos, int aMarkerLayer)

References DRC_TEST_PROVIDER::accountCheck(), DRC_TEST_PROVIDER::m_drcEngine, and DRC_ENGINE::ReportViolation().

Referenced by checkLengths(), DRC_TEST_PROVIDER_HOLE_SIZE::checkPadHole(), checkSkews(), checkViaCounts(), DRC_TEST_PROVIDER_HOLE_SIZE::checkViaHole(), DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTION_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTIVITY::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_FOOTPRINT_CHECKS::Run(), DRC_TEST_PROVIDER_LIBRARY_PARITY::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), DRC_TEST_PROVIDER_SLIVER_CHECKER::Run(), DRC_TEST_PROVIDER_TEXT_DIMS::Run(), DRC_TEST_PROVIDER_TRACK_WIDTH::Run(), DRC_TEST_PROVIDER_VIA_DIAMETER::Run(), DRC_TEST_PROVIDER_EDGE_CLEARANCE::testAgainstEdge(), DRC_TEST_PROVIDER_MISC::testAssertions(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testCourtyardClearances(), DRC_TEST_PROVIDER_MISC::testDisabledLayers(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testFootprintCourtyardDefinitions(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::testHoleAgainstHole(), DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::testItemAgainstItem(), DRC_TEST_PROVIDER_SOLDER_MASK::testItemAgainstItems(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testItemAgainstZone(), DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::testItemAgainstZones(), DRC_TEST_PROVIDER_SOLDER_MASK::testMaskItemAgainstZones(), DRC_TEST_PROVIDER_SCHEMATIC_PARITY::testNetlist(), DRC_TEST_PROVIDER_MISC::testOutline(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem(), DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::testShapeLineChain(), DRC_TEST_PROVIDER_MISC::testTextVars(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem(), DRC_TEST_PROVIDER_ZONE_CONNECTIONS::testZoneLayer(), DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::testZoneLayer(), and DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones().

◆ Run()

bool DRC_TEST_PROVIDER_MATCHED_LENGTH::Run ( )
overridevirtual

Run this provider against the given PCB with configured options (if any).

Implements DRC_TEST_PROVIDER.

Definition at line 210 of file drc_test_provider_matched_length.cpp.

211{
212 return runInternal( false );
213}
bool runInternal(bool aDelayReportMode=false)

References runInternal().

◆ runInternal()

bool DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal ( bool  aDelayReportMode = false)
private

Definition at line 216 of file drc_test_provider_matched_length.cpp.

217{
219 m_report.Clear();
220
221 if( !aDelayReportMode )
222 {
223 if( !reportPhase( _( "Gathering length-constrained connections..." ) ) )
224 return false;
225 }
226
227 std::map<DRC_RULE*, std::set<BOARD_CONNECTED_ITEM*> > itemSets;
228
229 std::shared_ptr<FROM_TO_CACHE> ftCache = m_board->GetConnectivity()->GetFromToCache();
230
231 ftCache->Rebuild( m_board );
232
233 const size_t progressDelta = 100;
234 size_t count = 0;
235 size_t ii = 0;
236
238 [&]( BOARD_ITEM *item ) -> bool
239 {
240 count++;
241 return true;
242 } );
243
245 [&]( BOARD_ITEM *item ) -> bool
246 {
247 if( !reportProgress( ii++, count, progressDelta ) )
248 return false;
249
250 const DRC_CONSTRAINT_T constraintsToCheck[] = {
254 };
255
256 for( int i = 0; i < 3; i++ )
257 {
258 auto constraint = m_drcEngine->EvalRules( constraintsToCheck[i], item, nullptr,
259 item->GetLayer() );
260
261 if( constraint.IsNull() )
262 continue;
263
264 auto citem = static_cast<BOARD_CONNECTED_ITEM*>( item );
265
266 itemSets[ constraint.GetParentRule() ].insert( citem );
267 }
268
269 return true;
270 } );
271
272 std::map< DRC_RULE*, std::vector<CONNECTION> > matches;
273
274 for( const std::pair< DRC_RULE* const, std::set<BOARD_CONNECTED_ITEM*> >& it : itemSets )
275 {
276 std::map<int, std::set<BOARD_CONNECTED_ITEM*> > netMap;
277
278 for( BOARD_CONNECTED_ITEM* citem : it.second )
279 netMap[ citem->GetNetCode() ].insert( citem );
280
281 for( const std::pair< const int, std::set<BOARD_CONNECTED_ITEM*> >& nitem : netMap )
282 {
283 CONNECTION ent;
284 ent.items = nitem.second;
285 ent.netcode = nitem.first;
286 ent.netname = m_board->GetNetInfo().GetNetItem( ent.netcode )->GetNetname();
287
288 ent.viaCount = 0;
289 ent.totalRoute = 0;
290 ent.totalVia = 0;
291 ent.totalPadToDie = 0;
292 ent.fromItem = nullptr;
293 ent.toItem = nullptr;
294
295 for( BOARD_CONNECTED_ITEM* citem : nitem.second )
296 {
297 if( citem->Type() == PCB_VIA_T )
298 {
300 const BOARD_STACKUP& stackup = bds.GetStackupDescriptor();
301
302 ent.viaCount++;
303
305 {
306 const PCB_VIA* v = static_cast<PCB_VIA*>( citem );
307
308 ent.totalVia += stackup.GetLayerDistance( v->TopLayer(), v->BottomLayer() );
309 }
310 }
311 else if( citem->Type() == PCB_TRACE_T )
312 {
313 ent.totalRoute += static_cast<PCB_TRACK*>( citem )->GetLength();
314 }
315 else if ( citem->Type() == PCB_ARC_T )
316 {
317 ent.totalRoute += static_cast<PCB_ARC*>( citem )->GetLength();
318 }
319 else if( citem->Type() == PCB_PAD_T )
320 {
321 ent.totalPadToDie += static_cast<PAD*>( citem )->GetPadToDieLength();
322 }
323 }
324
325 ent.total = ent.totalRoute + ent.totalVia + ent.totalPadToDie;
326 ent.matchingRule = it.first;
327
328 // fixme: doesn't seem to work ;-)
329 auto ftPath = ftCache->QueryFromToPath( ent.items );
330
331 if( ftPath )
332 {
333 ent.from = ftPath->fromName;
334 ent.to = ftPath->toName;
335 }
336 else
337 {
338 ent.from = ent.to = _( "<unconstrained>" );
339 }
340
341 m_report.Add( ent );
342 matches[ it.first ].push_back(ent);
343 }
344 }
345
346 if( !aDelayReportMode )
347 {
348 if( !reportPhase( _( "Checking length constraints..." ) ) )
349 return false;
350
351 ii = 0;
352 count = matches.size();
353
354 for( std::pair< DRC_RULE* const, std::vector<CONNECTION> > it : matches )
355 {
356 DRC_RULE *rule = it.first;
357 auto& matchedConnections = it.second;
358
359 if( !reportProgress( ii++, count, progressDelta ) )
360 return false;
361
362 std::sort( matchedConnections.begin(), matchedConnections.end(),
363 [] ( const CONNECTION&a, const CONNECTION&b ) -> int
364 {
365 return a.netname < b.netname;
366 } );
367
368 reportAux( wxString::Format( wxT( "Length-constrained traces for rule '%s':" ),
369 it.first->m_Name ) );
370
371 for( const DRC_LENGTH_REPORT::ENTRY& ent : matchedConnections )
372 {
373 reportAux(wxString::Format( wxT( " - net: %s, from: %s, to: %s, "
374 "%d matching items, "
375 "total: %s (tracks: %s, vias: %s, pad-to-die: %s), "
376 "vias: %d" ),
377 ent.netname,
378 ent.from,
379 ent.to,
380 (int) ent.items.size(),
381 MessageTextFromValue( userUnits(), ent.total ),
382 MessageTextFromValue( userUnits(), ent.totalRoute ),
383 MessageTextFromValue( userUnits(), ent.totalVia ),
384 MessageTextFromValue( userUnits(), ent.totalPadToDie ),
385 ent.viaCount ) );
386 }
387
388
389 OPT<DRC_CONSTRAINT> lengthConstraint = rule->FindConstraint( LENGTH_CONSTRAINT );
390
391 if( lengthConstraint && lengthConstraint->GetSeverity() != RPT_SEVERITY_IGNORE )
392 checkLengths( *lengthConstraint, matchedConnections );
393
394 OPT<DRC_CONSTRAINT> skewConstraint = rule->FindConstraint( SKEW_CONSTRAINT );
395
396 if( skewConstraint && skewConstraint->GetSeverity() != RPT_SEVERITY_IGNORE )
397 checkSkews( *skewConstraint, matchedConnections );
398
399 OPT<DRC_CONSTRAINT> viaCountConstraint = rule->FindConstraint( VIA_COUNT_CONSTRAINT );
400
401 if( viaCountConstraint && viaCountConstraint->GetSeverity() != RPT_SEVERITY_IGNORE )
402 checkViaCounts( *viaCountConstraint, matchedConnections );
403 }
404
406 }
407
408 return !m_drcEngine->IsCancelled();
409}
Container for design settings for a BOARD object.
BOARD_STACKUP & GetStackupDescriptor()
bool m_UseHeightForLengthCalcs
Enable inclusion of stackup height in track length measurements and length tuning.
Manage layers needed to make a physical board.
int GetLayerDistance(PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer) const
Calculate the distance (height) between the two given copper layers.
const NETINFO_LIST & GetNetInfo() const
Definition: board.h:737
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:620
std::shared_ptr< CONNECTIVITY_DATA > GetConnectivity() const
Return a list of missing connections between components/tracks.
Definition: board.h:399
DRC_CONSTRAINT EvalRules(DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM *a, const BOARD_ITEM *b, PCB_LAYER_ID aLayer, REPORTER *aReporter=nullptr)
Definition: drc_engine.cpp:646
bool IsCancelled() const
void Add(const ENTRY &ent)
OPT< DRC_CONSTRAINT > FindConstraint(DRC_CONSTRAINT_T aType)
Definition: drc_rule.cpp:65
void checkSkews(const DRC_CONSTRAINT &aConstraint, const std::vector< CONNECTION > &aMatchedConnections)
void checkViaCounts(const DRC_CONSTRAINT &aConstraint, const std::vector< CONNECTION > &aMatchedConnections)
void checkLengths(const DRC_CONSTRAINT &aConstraint, const std::vector< CONNECTION > &aMatchedConnections)
virtual bool reportPhase(const wxString &aStageName)
int forEachGeometryItem(const std::vector< KICAD_T > &aTypes, LSET aLayers, const std::function< bool(BOARD_ITEM *)> &aFunc)
virtual bool reportProgress(int aCount, int aSize, int aDelta)
virtual void reportRuleStatistics()
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:112
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:773
const wxString & GetNetname() const
Definition: netinfo.h:119
NETINFO_ITEM * GetNetItem(int aNetCode) const
PCB_LAYER_ID BottomLayer() const
Definition: pcb_track.cpp:529
PCB_LAYER_ID TopLayer() const
Definition: pcb_track.cpp:523
DRC_CONSTRAINT_T
Definition: drc_rule.h:44
@ LENGTH_CONSTRAINT
Definition: drc_rule.h:63
@ VIA_COUNT_CONSTRAINT
Definition: drc_rule.h:68
@ SKEW_CONSTRAINT
Definition: drc_rule.h:64
boost::optional< T > OPT
Definition: optional.h:7
@ RPT_SEVERITY_IGNORE
std::set< BOARD_CONNECTED_ITEM * > items

References _, DRC_LENGTH_REPORT::Add(), LSET::AllCuMask(), PCB_VIA::BottomLayer(), checkLengths(), checkSkews(), checkViaCounts(), DRC_LENGTH_REPORT::Clear(), DRC_ENGINE::EvalRules(), DRC_RULE::FindConstraint(), DRC_TEST_PROVIDER::forEachGeometryItem(), Format(), DRC_LENGTH_REPORT::ENTRY::from, DRC_LENGTH_REPORT::ENTRY::fromItem, DRC_ENGINE::GetBoard(), BOARD::GetConnectivity(), BOARD::GetDesignSettings(), BOARD_STACKUP::GetLayerDistance(), BOARD_CONNECTED_ITEM::GetNetCode(), BOARD::GetNetInfo(), NETINFO_LIST::GetNetItem(), NETINFO_ITEM::GetNetname(), BOARD_DESIGN_SETTINGS::GetStackupDescriptor(), DRC_ENGINE::IsCancelled(), DRC_LENGTH_REPORT::ENTRY::items, LENGTH_CONSTRAINT, m_board, DRC_TEST_PROVIDER::m_drcEngine, m_report, BOARD_DESIGN_SETTINGS::m_UseHeightForLengthCalcs, DRC_LENGTH_REPORT::ENTRY::matchingRule, MessageTextFromValue(), DRC_LENGTH_REPORT::ENTRY::netcode, DRC_LENGTH_REPORT::ENTRY::netname, PCB_ARC_T, PCB_PAD_T, PCB_TRACE_T, PCB_VIA_T, DRC_TEST_PROVIDER::reportAux(), DRC_TEST_PROVIDER::reportPhase(), DRC_TEST_PROVIDER::reportProgress(), DRC_TEST_PROVIDER::reportRuleStatistics(), RPT_SEVERITY_IGNORE, SKEW_CONSTRAINT, DRC_LENGTH_REPORT::ENTRY::to, DRC_LENGTH_REPORT::ENTRY::toItem, PCB_VIA::TopLayer(), DRC_LENGTH_REPORT::ENTRY::total, DRC_LENGTH_REPORT::ENTRY::totalPadToDie, DRC_LENGTH_REPORT::ENTRY::totalRoute, DRC_LENGTH_REPORT::ENTRY::totalVia, EDA_ITEM::Type(), DRC_TEST_PROVIDER::userUnits(), VIA_COUNT_CONSTRAINT, and DRC_LENGTH_REPORT::ENTRY::viaCount.

Referenced by Run().

◆ SetDRCEngine()

void DRC_TEST_PROVIDER::SetDRCEngine ( DRC_ENGINE engine)
inlineinherited

Definition at line 80 of file drc_test_provider.h.

81 {
82 m_drcEngine = engine;
83 m_stats.clear();
84 }

References DRC_TEST_PROVIDER::m_drcEngine, and DRC_TEST_PROVIDER::m_stats.

Referenced by EDIT_TOOL::doMoveSelection(), and DRC_ENGINE::RunTests().

◆ userUnits()

Member Data Documentation

◆ m_board

BOARD* DRC_TEST_PROVIDER_MATCHED_LENGTH::m_board
private

Definition at line 84 of file drc_test_provider_matched_length.cpp.

Referenced by runInternal().

◆ m_drcEngine

DRC_ENGINE* DRC_TEST_PROVIDER::m_drcEngine
protectedinherited

Definition at line 117 of file drc_test_provider.h.

Referenced by DRC_TEST_PROVIDER_HOLE_SIZE::checkPadHole(), DRC_TEST_PROVIDER_HOLE_SIZE::checkViaHole(), DRC_TEST_PROVIDER::forEachGeometryItem(), DRC_TEST_PROVIDER_CONNECTION_WIDTH::layerDesc(), DRC_TEST_PROVIDER_SLIVER_CHECKER::layerDesc(), DRC_TEST_PROVIDER::reportAux(), DRC_TEST_PROVIDER::reportPhase(), DRC_TEST_PROVIDER::reportProgress(), DRC_TEST_PROVIDER::reportRuleStatistics(), DRC_TEST_PROVIDER::reportViolation(), DRC_CACHE_GENERATOR::Run(), DRC_TEST_PROVIDER_ANNULAR_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTION_WIDTH::Run(), DRC_TEST_PROVIDER_CONNECTIVITY::Run(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::Run(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::Run(), test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run(), DRC_TEST_PROVIDER_DISALLOW::Run(), DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run(), DRC_TEST_PROVIDER_FOOTPRINT_CHECKS::Run(), DRC_TEST_PROVIDER_HOLE_SIZE::Run(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::Run(), DRC_TEST_PROVIDER_LIBRARY_PARITY::Run(), DRC_TEST_PROVIDER_MISC::Run(), DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::Run(), DRC_TEST_PROVIDER_SCHEMATIC_PARITY::Run(), DRC_TEST_PROVIDER_SILK_CLEARANCE::Run(), DRC_TEST_PROVIDER_SLIVER_CHECKER::Run(), DRC_TEST_PROVIDER_SOLDER_MASK::Run(), DRC_TEST_PROVIDER_TEXT_DIMS::Run(), DRC_TEST_PROVIDER_TRACK_WIDTH::Run(), DRC_TEST_PROVIDER_VIA_DIAMETER::Run(), DRC_TEST_PROVIDER_ZONE_CONNECTIONS::Run(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE_ON_MOVE::Run(), runInternal(), DRC_TEST_PROVIDER::SetDRCEngine(), DRC_TEST_PROVIDER_EDGE_CLEARANCE::testAgainstEdge(), DRC_TEST_PROVIDER_MISC::testAssertions(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testCourtyardClearances(), DRC_TEST_PROVIDER_MISC::testDisabledLayers(), DRC_TEST_PROVIDER_COURTYARD_CLEARANCE::testFootprintCourtyardDefinitions(), DRC_TEST_PROVIDER_HOLE_TO_HOLE::testHoleAgainstHole(), DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::testItemAgainstItem(), DRC_TEST_PROVIDER_SOLDER_MASK::testItemAgainstItems(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testItemAgainstZone(), DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::testItemAgainstZones(), DRC_TEST_PROVIDER_SOLDER_MASK::testMaskBridges(), DRC_TEST_PROVIDER_SOLDER_MASK::testMaskItemAgainstZones(), DRC_TEST_PROVIDER_SCHEMATIC_PARITY::testNetlist(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances(), DRC_TEST_PROVIDER_SOLDER_MASK::testSilkToMaskClearance(), DRC_TEST_PROVIDER_MISC::testTextVars(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances(), DRC_TEST_PROVIDER_ZONE_CONNECTIONS::testZoneLayer(), DRC_TEST_PROVIDER_PHYSICAL_CLEARANCE::testZoneLayer(), DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones(), and DRC_TEST_PROVIDER::userUnits().

◆ m_isRuleDriven

◆ m_report

DRC_LENGTH_REPORT DRC_TEST_PROVIDER_MATCHED_LENGTH::m_report
private

Definition at line 85 of file drc_test_provider_matched_length.cpp.

Referenced by runInternal().

◆ m_stats

std::unordered_map<const DRC_RULE*, int> DRC_TEST_PROVIDER::m_stats
protectedinherited

◆ s_allBasicItems

◆ s_allBasicItemsButZones

std::vector< KICAD_T > DRC_TEST_PROVIDER::s_allBasicItemsButZones
staticprotectedinherited

The documentation for this class was generated from the following file: