KiCad PCB EDA Suite
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odb_entity.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
5 * Author: SYSUEric <[email protected]>.
6 *
7 * This program is free software: you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation, either version 3 of the License, or (at your
10 * option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21
22#include <base_units.h>
24#include <build_version.h>
25#include <callback_gal.h>
29#include <font/font.h>
30#include <footprint.h>
31#include <hash_eda.h>
32#include <pad.h>
33#include <pcb_dimension.h>
34#include <pcb_shape.h>
35#include <pcb_text.h>
36#include <pcb_textbox.h>
37#include <pcb_track.h>
38#include <pcbnew_settings.h>
40#include <pgm_base.h>
41#include <progress_reporter.h>
43#include <wx_fstream_progress.h>
44
49
50#include <wx/log.h>
51#include <wx/numformatter.h>
52#include <wx/mstream.h>
53
54#include "odb_attribute.h"
55#include "odb_entity.h"
56#include "odb_defines.h"
57#include "odb_feature.h"
58#include "odb_util.h"
59#include "pcb_io_odbpp.h"
60
61
63{
64 try
65 {
67 return true;
68 }
69 catch( const std::exception& e )
70 {
71 std::cerr << e.what() << std::endl;
72 return false;
73 }
74}
75
76
78{
79 m_info = { { wxS( ODB_JOB_NAME ), wxS( "job" ) },
81 { wxS( "ODB_VERSION_MAJOR" ), wxS( "8" ) },
82 { wxS( "ODB_VERSION_MINOR" ), wxS( "1" ) },
83 { wxS( "ODB_SOURCE" ), wxS( "KiCad EDA" ) },
84 { wxS( "CREATION_DATE" ), wxDateTime::Now().Format( "%Y%m%d.%H%M%S" ) },
85 { wxS( "SAVE_DATE" ), wxDateTime::Now().Format( "%Y%m%d.%H%M%S" ) },
86 { wxS( "SAVE_APP" ), wxString::Format( wxS( "KiCad EDA %s" ), GetBuildVersion() ) } };
87}
88
89
91{
92 auto fileproxy = writer.CreateFileProxy( "info" );
93
94 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
95
96 for( auto& info : m_info )
97 {
98 twriter.WriteEquationLine( info.first, info.second );
99 }
100}
101
102
103void ODB_MATRIX_ENTITY::AddStep( const wxString& aStepName )
104{
105 m_matrixSteps.emplace( aStepName.Upper(), m_col++ );
106}
107
108
110{
111 AddStep( "PCB" );
112
114}
115
116
118{
120 BOARD_STACKUP& stackup = dsnSettings.GetStackupDescriptor();
121 stackup.SynchronizeWithBoard( &dsnSettings );
122
123 std::vector<BOARD_STACKUP_ITEM*> layers = stackup.GetList();
124 std::set<PCB_LAYER_ID> added_layers;
125
127
128 for( int i = 0; i < stackup.GetCount(); i++ )
129 {
130 BOARD_STACKUP_ITEM* stackup_item = layers.at( i );
131
132 for( int sublayer_id = 0; sublayer_id < stackup_item->GetSublayersCount(); sublayer_id++ )
133 {
134 wxString ly_name = stackup_item->GetLayerName();
135
136 if( ly_name.IsEmpty() )
137 {
138 if( IsValidLayer( stackup_item->GetBrdLayerId() ) )
139 ly_name = m_board->GetLayerName( stackup_item->GetBrdLayerId() );
140
141 if( ly_name.IsEmpty() && stackup_item->GetType() == BS_ITEM_TYPE_DIELECTRIC )
142 ly_name = wxString::Format( "DIELECTRIC_%d",
143 stackup_item->GetDielectricLayerId() );
144 }
145
146 MATRIX_LAYER matrix( m_row++, ly_name );
147
148 if( stackup_item->GetType() == BS_ITEM_TYPE_DIELECTRIC )
149 {
150 if( stackup_item->GetTypeName() == KEY_CORE )
151 matrix.m_diType.emplace( ODB_DIELECTRIC_TYPE::CORE );
152 else
153 matrix.m_diType.emplace( ODB_DIELECTRIC_TYPE::PREPREG );
154
155 matrix.m_type = ODB_TYPE::DIELECTRIC;
156 matrix.m_context = ODB_CONTEXT::BOARD;
157 matrix.m_polarity = ODB_POLARITY::POSITIVE;
158 m_matrixLayers.push_back( matrix );
159 m_plugin->GetLayerNameList().emplace_back(
160 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
161
162 continue;
163 }
164 else
165 {
166 added_layers.insert( stackup_item->GetBrdLayerId() );
167 AddMatrixLayerField( matrix, stackup_item->GetBrdLayerId() );
168 }
169 }
170 }
171
172 for( PCB_LAYER_ID layer : m_board->GetEnabledLayers().Seq() )
173 {
174 if( added_layers.find( layer ) != added_layers.end() )
175 continue;
176
177 MATRIX_LAYER matrix( m_row++, m_board->GetLayerName( layer ) );
178 added_layers.insert( layer );
179 AddMatrixLayerField( matrix, layer );
180 }
181
183
185
187}
188
189
191{
192 aMLayer.m_polarity = ODB_POLARITY::POSITIVE;
193 aMLayer.m_context = ODB_CONTEXT::BOARD;
194 switch( aLayer )
195 {
196 case F_Paste:
197 case B_Paste: aMLayer.m_type = ODB_TYPE::SOLDER_PASTE; break;
198 case F_SilkS:
199 case B_SilkS: aMLayer.m_type = ODB_TYPE::SILK_SCREEN; break;
200 case F_Mask:
201 case B_Mask: aMLayer.m_type = ODB_TYPE::SOLDER_MASK; break;
202 case B_CrtYd:
203 case F_CrtYd:
204 case Edge_Cuts:
205 case B_Fab:
206 case F_Fab:
207 case F_Adhes:
208 case B_Adhes:
209 case Dwgs_User:
210 case Cmts_User:
211 case Eco1_User:
212 case Eco2_User:
213 case Margin:
214 case User_1:
215 case User_2:
216 case User_3:
217 case User_4:
218 case User_5:
219 case User_6:
220 case User_7:
221 case User_8:
222 case User_9:
223 case User_10:
224 case User_11:
225 case User_12:
226 case User_13:
227 case User_14:
228 case User_15:
229 case User_16:
230 case User_17:
231 case User_18:
232 case User_19:
233 case User_20:
234 case User_21:
235 case User_22:
236 case User_23:
237 case User_24:
238 case User_25:
239 case User_26:
240 case User_27:
241 case User_28:
242 case User_29:
243 case User_30:
244 case User_31:
245 case User_32:
246 case User_33:
247 case User_34:
248 case User_35:
249 case User_36:
250 case User_37:
251 case User_38:
252 case User_39:
253 case User_40:
254 case User_41:
255 case User_42:
256 case User_43:
257 case User_44:
258 case User_45:
259 aMLayer.m_context = ODB_CONTEXT::MISC;
260 aMLayer.m_type = ODB_TYPE::DOCUMENT;
261 break;
262
263 default:
264 if( IsCopperLayer( aLayer ) )
265 {
266 aMLayer.m_type = ODB_TYPE::SIGNAL;
267 }
268 else
269 {
270 // Do not handle other layers :
271 aMLayer.m_type = ODB_TYPE::UNDEFINED;
272 m_row--;
273 }
274
275 break;
276 }
277
278 if( aMLayer.m_type != ODB_TYPE::UNDEFINED )
279 {
280 m_matrixLayers.push_back( aMLayer );
281 m_plugin->GetLayerNameList().emplace_back( std::make_pair( aLayer, aMLayer.m_layerName ) );
282 }
283}
284
285
287{
288 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& drill_layers =
290
291 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& slot_holes =
293
294 bool has_pth_layer = false;
295 bool has_npth_layer = false;
296
297 for( BOARD_ITEM* item : m_board->Tracks() )
298 {
299 if( item->Type() == PCB_VIA_T )
300 {
301 PCB_VIA* via = static_cast<PCB_VIA*>( item );
302 drill_layers[std::make_pair( via->TopLayer(), via->BottomLayer() )].push_back( via );
303 }
304 }
305
306 for( FOOTPRINT* fp : m_board->Footprints() )
307 {
308 // std::shared_ptr<FOOTPRINT> fp( static_cast<FOOTPRINT*>( it_fp->Clone() ) );
309
310 if( fp->IsFlipped() )
311 {
312 m_hasBotComp = true;
313 }
314
315 for( PAD* pad : fp->Pads() )
316 {
317 if( !has_pth_layer && pad->GetAttribute() == PAD_ATTRIB::PTH )
318 has_pth_layer = true;
319 if( !has_npth_layer && pad->GetAttribute() == PAD_ATTRIB::NPTH )
320 has_npth_layer = true;
321
322 if( pad->HasHole() && pad->GetDrillSizeX() != pad->GetDrillSizeY() )
323 slot_holes[std::make_pair( F_Cu, B_Cu )].push_back( pad );
324 else if( pad->HasHole() )
325 drill_layers[std::make_pair( F_Cu, B_Cu )].push_back( pad );
326 }
327
328 // m_plugin->GetLoadedFootprintList().push_back( std::move( fp ) );
329 }
330
331 auto InitDrillMatrix =
332 [&]( const wxString& aHasPlated, std::pair<PCB_LAYER_ID, PCB_LAYER_ID> aLayerPair )
333 {
334 wxString dLayerName = wxString::Format( "drill_%s_%s-%s", aHasPlated,
335 m_board->GetLayerName( aLayerPair.first ),
336 m_board->GetLayerName( aLayerPair.second ) );
337 MATRIX_LAYER matrix( m_row++, dLayerName );
338
339 matrix.m_type = ODB_TYPE::DRILL;
340 matrix.m_context = ODB_CONTEXT::BOARD;
341 matrix.m_polarity = ODB_POLARITY::POSITIVE;
342 matrix.m_span.emplace( std::make_pair(
343 ODB::GenLegalEntityName( m_board->GetLayerName( aLayerPair.first ) ),
344 ODB::GenLegalEntityName( m_board->GetLayerName( aLayerPair.second ) ) ) );
345 m_matrixLayers.push_back( matrix );
346 m_plugin->GetLayerNameList().emplace_back(
347 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
348 };
349
350 if( has_npth_layer )
351 InitDrillMatrix( "non-plated", std::make_pair( F_Cu, B_Cu ) );
352 // at least one non plated hole is present.
353
354 if( has_pth_layer && drill_layers.find( std::make_pair( F_Cu, B_Cu ) ) == drill_layers.end() )
355 InitDrillMatrix( "plated", std::make_pair( F_Cu, B_Cu ) );
356 // there is no circular plated dril hole present.
357
358 for( const auto& [layer_pair, vec] : drill_layers )
359 {
360 InitDrillMatrix( "plated", layer_pair );
361 }
362}
363
364
366{
367 MATRIX_LAYER matrix( m_row++, "COMP_+_TOP" );
368 matrix.m_type = ODB_TYPE::COMPONENT;
369 matrix.m_context = ODB_CONTEXT::BOARD;
370
371 if( aCompSide == F_Cu )
372 {
373 m_matrixLayers.push_back( matrix );
374 m_plugin->GetLayerNameList().emplace_back(
375 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
376 }
377
378 if( aCompSide == B_Cu && m_hasBotComp )
379 {
380 matrix.m_layerName = ODB::GenLegalEntityName( "COMP_+_BOT" );
381 m_matrixLayers.push_back( matrix );
382 m_plugin->GetLayerNameList().emplace_back(
383 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
384 }
385}
386
388{
389 auto& auxilliary_layers = m_plugin->GetAuxilliaryLayerItemsMap();
390
391 for( BOARD_ITEM* item : m_board->Tracks() )
392 {
393 if( item->Type() == PCB_VIA_T )
394 {
395 PCB_VIA* via = static_cast<PCB_VIA*>( item );
396
397 if( via->Padstack().IsFilled().value_or( false ) )
398 {
399 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::FILLING, via->TopLayer(),
400 via->BottomLayer() )]
401 .push_back( via );
402 }
403
404 if( via->Padstack().IsCapped().value_or( false ) )
405 {
406 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::CAPPING, via->TopLayer(),
407 via->BottomLayer() )]
408 .push_back( via );
409 }
410
411 for( PCB_LAYER_ID layer : { via->TopLayer(), via->BottomLayer() } )
412 {
413 if( via->Padstack().IsPlugged( layer ).value_or( false ) )
414 {
415 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::PLUGGING, layer,
416 PCB_LAYER_ID::UNDEFINED_LAYER )]
417 .push_back( via );
418 }
419
420 if( via->Padstack().IsCovered( layer ).value_or( false ) )
421 {
422 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::COVERING, layer,
423 PCB_LAYER_ID::UNDEFINED_LAYER )]
424 .push_back( via );
425 }
426
427 if( via->Padstack().IsTented( layer ).value_or( false ) )
428 {
429 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::TENTING, layer,
430 PCB_LAYER_ID::UNDEFINED_LAYER )]
431 .push_back( via );
432 }
433 }
434 }
435 }
436
437 auto InitAuxMatrix =
438 [&]( std::tuple<ODB_AUX_LAYER_TYPE, PCB_LAYER_ID, PCB_LAYER_ID> aLayerPair )
439 {
440 wxString featureName = "";
441 switch( std::get<0>( aLayerPair ) )
442 {
443 case ODB_AUX_LAYER_TYPE::TENTING: featureName = "tenting"; break;
444 case ODB_AUX_LAYER_TYPE::COVERING: featureName = "covering"; break;
445 case ODB_AUX_LAYER_TYPE::PLUGGING: featureName = "plugging"; break;
446 case ODB_AUX_LAYER_TYPE::FILLING: featureName = "filling"; break;
447 case ODB_AUX_LAYER_TYPE::CAPPING: featureName = "capping"; break;
448 default: return;
449 }
450
451 wxString dLayerName;
452
453 if( std::get<2>( aLayerPair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
454 {
455 dLayerName = wxString::Format( "%s_%s-%s", featureName,
456 m_board->GetLayerName( std::get<1>( aLayerPair ) ),
457 m_board->GetLayerName( std::get<2>( aLayerPair ) ) );
458 }
459 else
460 {
461 if( m_board->IsFrontLayer( std::get<1>( aLayerPair ) ) )
462 dLayerName = wxString::Format( "%s_front", featureName );
463 else if( m_board->IsBackLayer( std::get<1>( aLayerPair ) ) )
464 dLayerName = wxString::Format( "%s_back", featureName );
465 else
466 return;
467 }
468 MATRIX_LAYER matrix( m_row++, dLayerName );
469
470 matrix.m_type = ODB_TYPE::DOCUMENT;
471 matrix.m_context = ODB_CONTEXT::BOARD;
472 matrix.m_polarity = ODB_POLARITY::POSITIVE;
473
474 if( std::get<2>( aLayerPair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
475 {
476 matrix.m_span.emplace( std::make_pair(
477 ODB::GenLegalEntityName( m_board->GetLayerName( std::get<1>( aLayerPair ) ) ),
479 m_board->GetLayerName( std::get<2>( aLayerPair ) ) ) ) );
480 }
481
482 m_matrixLayers.push_back( matrix );
483
484 if( std::get<2>( aLayerPair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
485 {
486 m_plugin->GetLayerNameList().emplace_back(
487 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
488 }
489 else
490 {
491 m_plugin->GetLayerNameList().emplace_back(
492 std::make_pair( std::get<1>( aLayerPair ), matrix.m_layerName ) );
493 }
494 };
495
496 for( const auto& [layer_pair, vec] : auxilliary_layers )
497 {
498 InitAuxMatrix( layer_pair );
499 }
500}
501
502
504{
505 auto fileproxy = writer.CreateFileProxy( "matrix" );
506
507 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
508
509 for( const auto& [step_name, column] : m_matrixSteps )
510 {
511 const auto array_proxy = twriter.MakeArrayProxy( "STEP" );
512 twriter.WriteEquationLine( "COL", column );
513 twriter.WriteEquationLine( "NAME", step_name );
514 }
515
516 for( const MATRIX_LAYER& layer : m_matrixLayers )
517 {
518 const auto array_proxy = twriter.MakeArrayProxy( "LAYER" );
519 twriter.WriteEquationLine( "ROW", layer.m_rowNumber );
520 twriter.write_line_enum( "CONTEXT", layer.m_context );
521 twriter.write_line_enum( "TYPE", layer.m_type );
522
523 if( layer.m_addType.has_value() )
524 {
525 twriter.write_line_enum( "ADD_TYPE", layer.m_addType.value() );
526 }
527
528 twriter.WriteEquationLine( "NAME", layer.m_layerName.Upper() );
529 twriter.WriteEquationLine( "OLD_NAME", wxEmptyString );
530 twriter.write_line_enum( "POLARITY", layer.m_polarity );
531
532 if( layer.m_diType.has_value() )
533 {
534 twriter.write_line_enum( "DIELECTRIC_TYPE", layer.m_diType.value() );
535 // twriter.WriteEquationLine( "DIELECTRIC_NAME", wxEmptyString );
536
537 // Can be used with DIELECTRIC_TYPE=CORE
538 // twriter.WriteEquationLine( "CU_TOP", wxEmptyString );
539 // twriter.WriteEquationLine( "CU_BOTTOM", wxEmptyString );
540 }
541
542 // Only applies to: soldermask, silkscreen, solderpaste and specifies the relevant cu layer
543 // twriter.WriteEquationLine( "REF", wxEmptyString );
544
545 if( layer.m_span.has_value() )
546 {
547 twriter.WriteEquationLine( "START_NAME", layer.m_span->first.Upper() );
548 twriter.WriteEquationLine( "END_NAME", layer.m_span->second.Upper() );
549 }
550
551 twriter.WriteEquationLine( "COLOR", "0" );
552 }
553}
554
555
557 std::map<int, std::vector<BOARD_ITEM*>>& aMap,
558 const PCB_LAYER_ID& aLayerID, const wxString& aLayerName ) :
559 ODB_ENTITY_BASE( aBoard, aPlugin ), m_layerItems( aMap ), m_layerID( aLayerID ),
560 m_matrixLayerName( aLayerName )
561{
562 m_featuresMgr = std::make_unique<FEATURES_MANAGER>( aBoard, aPlugin, aLayerName );
563}
564
565
567{
568 if( m_matrixLayerName.Contains( "drill" ) )
569 {
572 return;
573 }
574
575 if( m_matrixLayerName.Contains( "filling" ) || m_matrixLayerName.Contains( "capping" )
576 || m_matrixLayerName.Contains( "covering" ) || m_matrixLayerName.Contains( "plugging" )
577 || m_matrixLayerName.Contains( "tenting" ) )
578 {
581 return;
582 }
583
584 if( m_layerID != PCB_LAYER_ID::UNDEFINED_LAYER )
585 {
587 }
588}
589
591{
592 if( m_layerItems.empty() )
593 return;
594
595 const NETINFO_LIST& nets = m_board->GetNetInfo();
596
597 for( const NETINFO_ITEM* net : nets )
598 {
599 std::vector<BOARD_ITEM*>& vec = m_layerItems[net->GetNetCode()];
600
601 std::stable_sort( vec.begin(), vec.end(),
602 []( BOARD_ITEM* a, BOARD_ITEM* b )
603 {
604 if( a->GetParentFootprint() == b->GetParentFootprint() )
605 return a->Type() < b->Type();
606
607 return a->GetParentFootprint() < b->GetParentFootprint();
608 } );
609
610 if( vec.empty() )
611 continue;
612
613 m_featuresMgr->InitFeatureList( m_layerID, vec );
614 }
615}
616
617
619 const EDA_DATA::PACKAGE& aPkg )
620{
621 if( m_matrixLayerName == "COMP_+_BOT" )
622 {
623 if( !m_compBot.has_value() )
624 {
625 m_compBot.emplace();
626 }
627 return m_compBot.value().AddComponent( aFp, aPkg );
628 }
629 else
630 {
631 if( !m_compTop.has_value() )
632 {
633 m_compTop.emplace();
634 }
635
636 return m_compTop.value().AddComponent( aFp, aPkg );
637 }
638}
639
640
642{
643 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& drill_layers =
645
646 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& slot_holes =
648
649 if( !m_layerItems.empty() )
650 {
651 m_layerItems.clear();
652 }
653
655
656 bool is_npth_layer = false;
657 wxString plated_name = "plated";
658
659 if( m_matrixLayerName.Contains( "non-plated" ) )
660 {
661 is_npth_layer = true;
662 plated_name = "non-plated";
663 }
664
665
666 for( const auto& [layer_pair, vec] : slot_holes )
667 {
668 wxString dLayerName = wxString::Format( "drill_%s_%s-%s", plated_name,
669 m_board->GetLayerName( layer_pair.first ),
670 m_board->GetLayerName( layer_pair.second ) );
671
672 if( ODB::GenLegalEntityName( dLayerName ) == m_matrixLayerName )
673 {
674 for( BOARD_ITEM* item : vec )
675 {
676 if( item->Type() == PCB_PAD_T )
677 {
678 PAD* pad = static_cast<PAD*>( item );
679
680 if( ( is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::PTH )
681 || ( !is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::NPTH ) )
682 {
683 continue;
684 }
685
686 m_tools.value().AddDrillTools(
687 pad->GetAttribute() == PAD_ATTRIB::PTH ? "PLATED" : "NON_PLATED",
689 std::min( pad->GetDrillSizeX(), pad->GetDrillSizeY() ) ) );
690
691 // for drill features
692 m_layerItems[pad->GetNetCode()].push_back( item );
693 }
694 }
695
696 break;
697 }
698 }
699
700 for( const auto& [layer_pair, vec] : drill_layers )
701 {
702 wxString dLayerName = wxString::Format( "drill_%s_%s-%s", plated_name,
703 m_board->GetLayerName( layer_pair.first ),
704 m_board->GetLayerName( layer_pair.second ) );
705
706 if( ODB::GenLegalEntityName( dLayerName ) == m_matrixLayerName )
707 {
708 for( BOARD_ITEM* item : vec )
709 {
710 if( item->Type() == PCB_VIA_T && !is_npth_layer )
711 {
712 PCB_VIA* via = static_cast<PCB_VIA*>( item );
713
714 m_tools.value().AddDrillTools( "VIA",
715 ODB::SymDouble2String( via->GetDrillValue() ) );
716
717 // for drill features
718 m_layerItems[via->GetNetCode()].push_back( item );
719 }
720 else if( item->Type() == PCB_PAD_T )
721 {
722 PAD* pad = static_cast<PAD*>( item );
723
724 if( ( is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::PTH )
725 || ( !is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::NPTH ) )
726 {
727 continue;
728 }
729
730 m_tools.value().AddDrillTools(
731 pad->GetAttribute() == PAD_ATTRIB::PTH ? "PLATED" : "NON_PLATED",
732 ODB::SymDouble2String( pad->GetDrillSizeX() ) );
733
734 // for drill features
735 m_layerItems[pad->GetNetCode()].push_back( item );
736 }
737 }
738
739 break;
740 }
741 }
742}
743
745{
746 auto& auxilliary_layers = m_plugin->GetAuxilliaryLayerItemsMap();
747
748 if( !m_layerItems.empty() )
749 {
750 m_layerItems.clear();
751 }
752
753 for( const auto& [layer_pair, vec] : auxilliary_layers )
754 {
755 wxString featureName = "";
756 switch( std::get<0>( layer_pair ) )
757 {
758 case ODB_AUX_LAYER_TYPE::TENTING: featureName = "tenting"; break;
759 case ODB_AUX_LAYER_TYPE::COVERING: featureName = "covering"; break;
760 case ODB_AUX_LAYER_TYPE::PLUGGING: featureName = "plugging"; break;
761 case ODB_AUX_LAYER_TYPE::FILLING: featureName = "filling"; break;
762 case ODB_AUX_LAYER_TYPE::CAPPING: featureName = "capping"; break;
763 default: return;
764 }
765
766 wxString dLayerName;
767 bool drill_value = false;
768
769 if( std::get<2>( layer_pair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
770 {
771 drill_value = true;
772 dLayerName = wxString::Format( "%s_%s-%s", featureName,
773 m_board->GetLayerName( std::get<1>( layer_pair ) ),
774 m_board->GetLayerName( std::get<2>( layer_pair ) ) );
775 }
776 else
777 {
778 if( m_board->IsFrontLayer( std::get<1>( layer_pair ) ) )
779 dLayerName = wxString::Format( "%s_front", featureName );
780 else if( m_board->IsBackLayer( std::get<1>( layer_pair ) ) )
781 dLayerName = wxString::Format( "%s_back", featureName );
782 else
783 return;
784 }
785
786 if( ODB::GenLegalEntityName( dLayerName ) == m_matrixLayerName )
787 {
788 for( BOARD_ITEM* item : vec )
789 {
790 if( item->Type() == PCB_VIA_T )
791 {
792 PCB_VIA* via = static_cast<PCB_VIA*>( item );
793
794 m_layerItems[via->GetNetCode()].push_back( item );
795 }
796 }
797
798 break;
799 }
800 }
801}
802
804{
806
807 InitEdaData();
808
809 // Init Layer Entity Data
810 for( const auto& [layerName, layer_entity_ptr] : m_layerEntityMap )
811 {
812 layer_entity_ptr->InitEntityData();
813 }
814}
815
816
818{
819 GenAttrList( writer );
820
821 GenFeatures( writer );
822
823 if( m_compTop.has_value() || m_compBot.has_value() )
824 {
825 GenComponents( writer );
826 }
827
828 if( m_tools.has_value() )
829 {
830 GenTools( writer );
831 }
832}
833
834
836{
837 auto fileproxy = writer.CreateFileProxy( "components" );
838
839 if( m_compTop.has_value() )
840 {
841 m_compTop->Write( fileproxy.GetStream() );
842 }
843 else if( m_compBot.has_value() )
844 {
845 m_compBot->Write( fileproxy.GetStream() );
846 }
847}
848
849
851{
852 auto fileproxy = writer.CreateFileProxy( "features" );
853
854 m_featuresMgr->GenerateFeatureFile( fileproxy.GetStream() );
855}
856
857
859{
860 auto fileproxy = writer.CreateFileProxy( "attrlist" );
861}
862
863
865{
866 auto fileproxy = writer.CreateFileProxy( "tools" );
867
868 m_tools.value().GenerateFile( fileproxy.GetStream() );
869}
870
871
873{
874 //InitPackage
875 for( const FOOTPRINT* fp : m_board->Footprints() )
876 {
877 m_edaData.AddPackage( fp );
878 }
879
880 // for NET
881 const NETINFO_LIST& nets = m_board->GetNetInfo();
882
883 for( const NETINFO_ITEM* net : nets )
884 {
885 m_edaData.AddNET( net );
886 }
887
888 // for CMP
889 size_t j = 0;
890
891 for( const FOOTPRINT* fp : m_board->Footprints() )
892 {
893 wxString compName = ODB::GenLegalEntityName( "COMP_+_TOP" );
894 if( fp->IsFlipped() )
895 compName = ODB::GenLegalEntityName( "COMP_+_BOT" );
896
897 auto iter = m_layerEntityMap.find( compName );
898
899 if( iter == m_layerEntityMap.end() )
900 {
901 wxLogError( _( "Failed to add component data" ) );
902 return;
903 }
904
905 // ODBPP only need unique PACKAGE in PKG record in eda/data file.
906 // the PKG index can repeat to be ref in CMP record in component file.
907 std::shared_ptr<FOOTPRINT> fp_pkg = m_edaData.GetEdaFootprints().at( j );
908 ++j;
909
910 const EDA_DATA::PACKAGE& eda_pkg =
911 m_edaData.GetPackage( hash_fp_item( fp_pkg.get(), HASH_POS | REL_COORD ) );
912
913 ODB_COMPONENT& comp = iter->second->InitComponentData( fp, eda_pkg );
914
915 for( int i = 0; i < fp->Pads().size(); ++i )
916 {
917 PAD* pad = fp->Pads()[i];
918 auto& eda_net = m_edaData.GetNet( pad->GetNetCode() );
919
920 auto& subnet = eda_net.AddSubnet<EDA_DATA::SUB_NET_TOEPRINT>(
921 &m_edaData,
924 comp.m_index, comp.m_toeprints.size() );
925
926 m_plugin->GetPadSubnetMap().emplace( pad, &subnet );
927
928 const std::shared_ptr<EDA_DATA::PIN> pin = eda_pkg.GetEdaPkgPin( i );
929 const EDA_DATA::PIN& pin_ref = *pin;
930 auto& toep = comp.m_toeprints.emplace_back( pin_ref );
931
932 toep.m_net_num = eda_net.m_index;
933 toep.m_subnet_num = subnet.m_index;
934
935 toep.m_center = ODB::AddXY( pad->GetPosition() );
936
937 toep.m_rot = ODB::Double2String(
938 ( ANGLE_360 - pad->GetOrientation() ).Normalize().AsDegrees() );
939
940 if( pad->IsFlipped() )
941 toep.m_mirror = wxT( "M" );
942 else
943 toep.m_mirror = wxT( "N" );
944 }
945 }
946
947 for( PCB_TRACK* track : m_board->Tracks() )
948 {
949 auto& eda_net = m_edaData.GetNet( track->GetNetCode() );
950 EDA_DATA::SUB_NET* subnet = nullptr;
951
952 if( track->Type() == PCB_VIA_T )
953 subnet = &( eda_net.AddSubnet<EDA_DATA::SUB_NET_VIA>( &m_edaData ) );
954 else
955 subnet = &( eda_net.AddSubnet<EDA_DATA::SUB_NET_TRACE>( &m_edaData ) );
956
957 m_plugin->GetViaTraceSubnetMap().emplace( track, subnet );
958 }
959
960 for( ZONE* zone : m_board->Zones() )
961 {
962 for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
963 {
964 auto& eda_net = m_edaData.GetNet( zone->GetNetCode() );
965 auto& subnet = eda_net.AddSubnet<EDA_DATA::SUB_NET_PLANE>( &m_edaData,
968 0 );
969 m_plugin->GetPlaneSubnetMap().emplace( std::piecewise_construct,
970 std::forward_as_tuple( layer, zone ),
971 std::forward_as_tuple( &subnet ) );
972 }
973 }
974}
975
976
978{
979 wxString step_root = writer.GetCurrentPath();
980
981 writer.CreateEntityDirectory( step_root, "layers" );
982 GenerateLayerFiles( writer );
983
984 writer.CreateEntityDirectory( step_root, "eda" );
985 GenerateEdaFiles( writer );
986
987 writer.CreateEntityDirectory( step_root, "netlists/cadnet" );
988 GenerateNetlistsFiles( writer );
989
990 writer.SetCurrentPath( step_root );
991 GenerateProfileFile( writer );
992
993 GenerateStepHeaderFile( writer );
994
995 //TODO: system attributes
996 // GenerateAttrListFile( writer );
997}
998
999
1001{
1002 auto fileproxy = writer.CreateFileProxy( "profile" );
1003
1004 m_profile = std::make_unique<FEATURES_MANAGER>( m_board, m_plugin, wxEmptyString );
1005
1006 SHAPE_POLY_SET board_outline;
1007
1008 if( !m_board->GetBoardPolygonOutlines( board_outline ) )
1009 {
1010 wxLogError( "Failed to get board outline" );
1011 }
1012
1013 if( !m_profile->AddContour( board_outline, 0 ) )
1014 {
1015 wxLogError( "Failed to add polygon to profile" );
1016 }
1017
1018 m_profile->GenerateProfileFeatures( fileproxy.GetStream() );
1019}
1020
1021
1023{
1024 auto fileproxy = writer.CreateFileProxy( "stephdr" );
1025
1026 m_stephdr = {
1028 { "X_DATUM", "0" },
1029 { "Y_DATUM", "0" },
1030 { "X_ORIGIN", "0" },
1031 { "Y_ORIGIN", "0" },
1032 { "TOP_ACTIVE", "0" },
1033 { "BOTTOM_ACTIVE", "0" },
1034 { "RIGHT_ACTIVE", "0" },
1035 { "LEFT_ACTIVE", "0" },
1036 { "AFFECTING_BOM", "" },
1037 { "AFFECTING_BOM_CHANGED", "0" },
1038 };
1039
1040 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
1041
1042 for( const auto& [key, value] : m_stephdr )
1043 {
1044 twriter.WriteEquationLine( key, value );
1045 }
1046}
1047
1048
1050{
1051 wxString layers_root = writer.GetCurrentPath();
1052
1053 for( auto& [layerName, layerEntity] : m_layerEntityMap )
1054 {
1055 writer.CreateEntityDirectory( layers_root, layerName );
1056
1057 layerEntity->GenerateFiles( writer );
1058 }
1059}
1060
1061
1063{
1064 auto fileproxy = writer.CreateFileProxy( "data" );
1065
1066 m_edaData.Write( fileproxy.GetStream() );
1067}
1068
1069
1071{
1072 auto fileproxy = writer.CreateFileProxy( "netlist" );
1073
1074 m_netlist.Write( fileproxy.GetStream() );
1075}
1076
1077
1079{
1080 try
1081 {
1082 writer.CreateEntityDirectory( writer.GetRootPath(), "steps" );
1084 return true;
1085 }
1086 catch( const std::exception& e )
1087 {
1088 std::cerr << e.what() << std::endl;
1089 return false;
1090 }
1091}
1092
1093
1095{
1096 LSET layers = m_board->GetEnabledLayers();
1097 const NETINFO_LIST& nets = m_board->GetNetInfo();
1098
1099 // To avoid the overhead of repeatedly cycling through the layers and nets,
1100 // we pre-sort the board items into a map of layer -> net -> items
1101 std::map<PCB_LAYER_ID, std::map<int, std::vector<BOARD_ITEM*>>>& elements = m_plugin->GetLayerElementsMap();
1102
1103 std::for_each( m_board->Tracks().begin(), m_board->Tracks().end(),
1104 [&layers, &elements]( PCB_TRACK* aTrack )
1105 {
1106 if( aTrack->Type() == PCB_VIA_T )
1107 {
1108 PCB_VIA* via = static_cast<PCB_VIA*>( aTrack );
1109
1110 for( PCB_LAYER_ID layer : layers )
1111 {
1112 if( via->FlashLayer( layer ) )
1113 elements[layer][via->GetNetCode()].push_back( via );
1114 }
1115 }
1116 else
1117 {
1118 elements[aTrack->GetLayer()][aTrack->GetNetCode()].push_back( aTrack );
1119 }
1120 } );
1121
1122 std::for_each( m_board->Zones().begin(), m_board->Zones().end(),
1123 [&elements]( ZONE* zone )
1124 {
1125 for( PCB_LAYER_ID layer : zone->GetLayerSet() )
1126 elements[layer][zone->GetNetCode()].push_back( zone );
1127 } );
1128
1129 for( BOARD_ITEM* item : m_board->Drawings() )
1130 {
1131 if( BOARD_CONNECTED_ITEM* conn_it = dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
1132 elements[conn_it->GetLayer()][conn_it->GetNetCode()].push_back( conn_it );
1133 else
1134 elements[item->GetLayer()][0].push_back( item );
1135 }
1136
1137 for( FOOTPRINT* fp : m_board->Footprints() )
1138 {
1139 for( PCB_FIELD* field : fp->GetFields() )
1140 elements[field->GetLayer()][0].push_back( field );
1141
1142 for( BOARD_ITEM* item : fp->GraphicalItems() )
1143 elements[item->GetLayer()][0].push_back( item );
1144
1145 for( PAD* pad : fp->Pads() )
1146 {
1147 VECTOR2I margin;
1148
1149 for( PCB_LAYER_ID layer : pad->GetLayerSet() )
1150 {
1151 bool onCopperLayer = LSET::AllCuMask().test( layer );
1152 bool onSolderMaskLayer = LSET( { F_Mask, B_Mask } ).test( layer );
1153 bool onSolderPasteLayer = LSET( { F_Paste, B_Paste } ).test( layer );
1154
1155 if( onSolderMaskLayer )
1156 margin.x = margin.y = pad->GetSolderMaskExpansion( PADSTACK::ALL_LAYERS );
1157
1158 if( onSolderPasteLayer )
1159 margin = pad->GetSolderPasteMargin( PADSTACK::ALL_LAYERS );
1160
1161 VECTOR2I padPlotsSize = pad->GetSize( PADSTACK::ALL_LAYERS ) + margin * 2;
1162
1163 if( onCopperLayer && !pad->IsOnCopperLayer() )
1164 continue;
1165
1166 if( onCopperLayer && !pad->FlashLayer( layer ) )
1167 continue;
1168
1169 if( pad->GetShape( PADSTACK::ALL_LAYERS ) != PAD_SHAPE::CUSTOM
1170 && ( padPlotsSize.x <= 0 || padPlotsSize.y <= 0 ) )
1171 {
1172 continue;
1173 }
1174
1175 elements[layer][pad->GetNetCode()].push_back( pad );
1176 }
1177 }
1178 }
1179
1180 for( const auto& [layerID, layerName] : m_plugin->GetLayerNameList() )
1181 {
1182 std::shared_ptr<ODB_LAYER_ENTITY> layer_entity_ptr = std::make_shared<ODB_LAYER_ENTITY>(
1183 m_board, m_plugin, elements[layerID], layerID, layerName );
1184
1185 m_layerEntityMap.emplace( layerName, layer_entity_ptr );
1186 }
1187}
@ BS_ITEM_TYPE_DIELECTRIC
Definition: board_stackup.h:46
wxString GetBuildVersion()
Get the full KiCad version string.
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
Container for design settings for a BOARD object.
BOARD_STACKUP & GetStackupDescriptor()
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:79
Manage one layer needed to make a physical board.
Definition: board_stackup.h:96
wxString GetTypeName() const
int GetSublayersCount() const
wxString GetLayerName() const
PCB_LAYER_ID GetBrdLayerId() const
BOARD_STACKUP_ITEM_TYPE GetType() const
int GetDielectricLayerId() const
Manage layers needed to make a physical board.
const std::vector< BOARD_STACKUP_ITEM * > & GetList() const
int GetCount() const
bool SynchronizeWithBoard(BOARD_DESIGN_SETTINGS *aSettings)
Synchronize the BOARD_STACKUP_ITEM* list with the board.
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:317
bool GetBoardPolygonOutlines(SHAPE_POLY_SET &aOutlines, OUTLINE_ERROR_HANDLER *aErrorHandler=nullptr, bool aAllowUseArcsInPolygons=false, bool aIncludeNPTHAsOutlines=false)
Extract the board outlines and build a closed polygon from lines, arcs and circle items on edge cut l...
Definition: board.cpp:2604
const NETINFO_LIST & GetNetInfo() const
Definition: board.h:934
bool IsBackLayer(PCB_LAYER_ID aLayer) const
Definition: board.cpp:724
const ZONES & Zones() const
Definition: board.h:362
bool IsFrontLayer(PCB_LAYER_ID aLayer) const
Definition: board.cpp:718
const FOOTPRINTS & Footprints() const
Definition: board.h:358
const TRACKS & Tracks() const
Definition: board.h:356
const wxString GetLayerName(PCB_LAYER_ID aLayer) const
Return the name of a aLayer.
Definition: board.cpp:680
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:1024
const LSET & GetEnabledLayers() const
A proxy function that calls the corresponding function in m_BoardSettings.
Definition: board.cpp:907
T & AddSubnet(Args &&... args)
Definition: odb_eda_data.h:160
const std::shared_ptr< PIN > GetEdaPkgPin(size_t aPadIndex) const
Definition: odb_eda_data.h:241
NET & GetNet(size_t aNetcode)
Definition: odb_eda_data.h:172
const PACKAGE & GetPackage(size_t aHash) const
Definition: odb_eda_data.h:253
void AddNET(const NETINFO_ITEM *aNet)
void AddPackage(const FOOTPRINT *aFp)
void Write(std::ostream &ost) const
std::vector< std::shared_ptr< FOOTPRINT > > GetEdaFootprints() const
Definition: odb_eda_data.h:40
LSET is a set of PCB_LAYER_IDs.
Definition: lset.h:37
LSEQ Seq(const LSEQ &aSequence) const
Return an LSEQ from the union of this LSET and a desired sequence.
Definition: lset.cpp:296
static LSET AllCuMask()
return AllCuMask( MAX_CU_LAYERS );
Definition: lset.cpp:591
Handle the data for a net.
Definition: netinfo.h:56
Container for NETINFO_ITEM elements, which are the nets.
Definition: netinfo.h:346
const size_t m_index
! CMP index number on board to be used in SNT(TOP), 0~n-1
Definition: odb_component.h:53
std::list< TOEPRINT > m_toeprints
Definition: odb_component.h:93
virtual std::string GetEntityName()=0
virtual bool CreateDirectoryTree(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:62
BOARD * m_board
Definition: odb_entity.h:59
PCB_IO_ODBPP * m_plugin
Definition: odb_entity.h:61
void GenFeatures(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:850
PCB_LAYER_ID m_layerID
Definition: odb_entity.h:207
void InitFeatureData()
Definition: odb_entity.cpp:590
void GenComponents(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:835
wxString m_matrixLayerName
Definition: odb_entity.h:208
void InitAuxilliaryData()
Definition: odb_entity.cpp:744
std::optional< COMPONENTS_MANAGER > m_compTop
Definition: odb_entity.h:211
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:817
std::optional< COMPONENTS_MANAGER > m_compBot
Definition: odb_entity.h:212
std::optional< ODB_DRILL_TOOLS > m_tools
Definition: odb_entity.h:210
void GenTools(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:864
std::map< int, std::vector< BOARD_ITEM * > > m_layerItems
Definition: odb_entity.h:206
ODB_LAYER_ENTITY(BOARD *aBoard, PCB_IO_ODBPP *aPlugin, std::map< int, std::vector< BOARD_ITEM * > > &aMap, const PCB_LAYER_ID &aLayerID, const wxString &aLayerName)
Definition: odb_entity.cpp:556
ODB_COMPONENT & InitComponentData(const FOOTPRINT *aFp, const EDA_DATA::PACKAGE &aPkg)
Definition: odb_entity.cpp:618
virtual void InitEntityData() override
Definition: odb_entity.cpp:566
void GenAttrList(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:858
std::unique_ptr< FEATURES_MANAGER > m_featuresMgr
Definition: odb_entity.h:213
void AddStep(const wxString &aStepName)
Definition: odb_entity.cpp:103
unsigned int m_col
Definition: odb_entity.h:112
void InitMatrixLayerData()
Definition: odb_entity.cpp:117
std::vector< MATRIX_LAYER > m_matrixLayers
Definition: odb_entity.h:110
void AddMatrixLayerField(MATRIX_LAYER &aMLayer, PCB_LAYER_ID aLayer)
Definition: odb_entity.cpp:190
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:503
std::map< wxString, unsigned int > m_matrixSteps
Definition: odb_entity.h:109
unsigned int m_row
Definition: odb_entity.h:111
void AddAuxilliaryMatrixLayer()
Definition: odb_entity.cpp:387
void AddDrillMatrixLayer()
Definition: odb_entity.cpp:286
virtual void InitEntityData() override
Definition: odb_entity.cpp:109
void AddCOMPMatrixLayer(PCB_LAYER_ID aCompSide)
Definition: odb_entity.cpp:365
std::vector< std::pair< wxString, wxString > > m_info
Definition: odb_entity.h:129
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:90
void Write(std::ostream &aStream)
virtual std::string GetEntityName() override
Definition: odb_entity.h:145
std::unordered_map< wxString, wxString > m_stephdr
Definition: odb_entity.h:172
void GenerateProfileFile(ODB_TREE_WRITER &writer)
EDA_DATA m_edaData
Definition: odb_entity.h:171
void GenerateStepHeaderFile(ODB_TREE_WRITER &writer)
void GenerateEdaFiles(ODB_TREE_WRITER &writer)
virtual void InitEntityData() override
Definition: odb_entity.cpp:803
void GenerateLayerFiles(ODB_TREE_WRITER &writer)
std::map< wxString, std::shared_ptr< ODB_LAYER_ENTITY > > m_layerEntityMap
Definition: odb_entity.h:168
ODB_NET_LIST m_netlist
Definition: odb_entity.h:173
std::unique_ptr< FEATURES_MANAGER > m_profile
Definition: odb_entity.h:169
virtual bool CreateDirectoryTree(ODB_TREE_WRITER &writer) override
void GenerateNetlistsFiles(ODB_TREE_WRITER &writer)
void MakeLayerEntity()
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:977
void WriteEquationLine(const std::string &var, int value)
Definition: odb_util.cpp:285
ARRAY_PROXY MakeArrayProxy(const std::string &aStr)
Definition: odb_util.h:310
void write_line_enum(const std::string &var, const T &value)
Definition: odb_util.h:284
const wxString GetRootPath() const
Definition: odb_util.h:265
void CreateEntityDirectory(const wxString &aPareDir, const wxString &aSubDir=wxEmptyString)
Definition: odb_util.cpp:206
ODB_FILE_WRITER CreateFileProxy(const wxString &aFileName)
Definition: odb_util.h:252
void SetCurrentPath(const wxString &aDir)
Definition: odb_util.h:261
const wxString GetCurrentPath() const
Definition: odb_util.h:259
static constexpr PCB_LAYER_ID ALL_LAYERS
! Temporary layer identifier to identify code that is not padstack-aware
Definition: padstack.h:145
Definition: pad.h:54
std::map< std::pair< PCB_LAYER_ID, ZONE * >, EDA_DATA::SUB_NET_PLANE * > & GetPlaneSubnetMap()
Definition: pcb_io_odbpp.h:127
std::map< PCB_TRACK *, EDA_DATA::SUB_NET * > & GetViaTraceSubnetMap()
Definition: pcb_io_odbpp.h:132
std::vector< std::pair< PCB_LAYER_ID, wxString > > & GetLayerNameList()
Definition: pcb_io_odbpp.h:88
std::map< std::pair< PCB_LAYER_ID, PCB_LAYER_ID >, std::vector< BOARD_ITEM * > > & GetSlotHolesMap()
Definition: pcb_io_odbpp.h:117
std::map< const PAD *, EDA_DATA::SUB_NET_TOEPRINT * > & GetPadSubnetMap()
Definition: pcb_io_odbpp.h:122
std::map< PCB_LAYER_ID, std::map< int, std::vector< BOARD_ITEM * > > > & GetLayerElementsMap()
Definition: pcb_io_odbpp.h:93
std::map< std::tuple< ODB_AUX_LAYER_TYPE, PCB_LAYER_ID, PCB_LAYER_ID >, std::vector< BOARD_ITEM * > > & GetAuxilliaryLayerItemsMap()
Definition: pcb_io_odbpp.h:111
static std::string m_unitsStr
Definition: pcb_io_odbpp.h:152
std::map< std::pair< PCB_LAYER_ID, PCB_LAYER_ID >, std::vector< BOARD_ITEM * > > & GetDrillLayerItemsMap()
Definition: pcb_io_odbpp.h:104
Represent a set of closed polygons.
Handle a list of polygons defining a copper zone.
Definition: zone.h:74
#define _(s)
static constexpr EDA_ANGLE ANGLE_360
Definition: eda_angle.h:417
size_t hash_fp_item(const EDA_ITEM *aItem, int aFlags)
Calculate hash of an EDA_ITEM.
Definition: hash_eda.cpp:55
Hashing functions for EDA_ITEMs.
@ HASH_POS
Definition: hash_eda.h:47
@ REL_COORD
Use coordinates relative to the parent object.
Definition: hash_eda.h:50
bool IsCopperLayer(int aLayerId)
Test whether a layer is a copper layer.
Definition: layer_ids.h:665
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
@ User_16
Definition: layer_ids.h:139
@ User_29
Definition: layer_ids.h:152
@ User_40
Definition: layer_ids.h:163
@ User_15
Definition: layer_ids.h:138
@ User_8
Definition: layer_ids.h:131
@ F_CrtYd
Definition: layer_ids.h:116
@ User_11
Definition: layer_ids.h:134
@ User_25
Definition: layer_ids.h:148
@ User_34
Definition: layer_ids.h:157
@ User_45
Definition: layer_ids.h:168
@ B_Adhes
Definition: layer_ids.h:103
@ User_36
Definition: layer_ids.h:159
@ Edge_Cuts
Definition: layer_ids.h:112
@ Dwgs_User
Definition: layer_ids.h:107
@ F_Paste
Definition: layer_ids.h:104
@ Cmts_User
Definition: layer_ids.h:108
@ User_6
Definition: layer_ids.h:129
@ User_7
Definition: layer_ids.h:130
@ User_19
Definition: layer_ids.h:142
@ User_23
Definition: layer_ids.h:146
@ F_Adhes
Definition: layer_ids.h:102
@ User_41
Definition: layer_ids.h:164
@ B_Mask
Definition: layer_ids.h:98
@ B_Cu
Definition: layer_ids.h:65
@ User_14
Definition: layer_ids.h:137
@ User_39
Definition: layer_ids.h:162
@ User_5
Definition: layer_ids.h:128
@ User_20
Definition: layer_ids.h:143
@ Eco1_User
Definition: layer_ids.h:109
@ F_Mask
Definition: layer_ids.h:97
@ User_42
Definition: layer_ids.h:165
@ User_43
Definition: layer_ids.h:166
@ B_Paste
Definition: layer_ids.h:105
@ User_10
Definition: layer_ids.h:133
@ User_9
Definition: layer_ids.h:132
@ User_27
Definition: layer_ids.h:150
@ User_28
Definition: layer_ids.h:151
@ F_Fab
Definition: layer_ids.h:119
@ Margin
Definition: layer_ids.h:113
@ F_SilkS
Definition: layer_ids.h:100
@ B_CrtYd
Definition: layer_ids.h:115
@ Eco2_User
Definition: layer_ids.h:110
@ User_35
Definition: layer_ids.h:158
@ User_31
Definition: layer_ids.h:154
@ User_3
Definition: layer_ids.h:126
@ User_1
Definition: layer_ids.h:124
@ User_12
Definition: layer_ids.h:135
@ B_SilkS
Definition: layer_ids.h:101
@ User_30
Definition: layer_ids.h:153
@ User_37
Definition: layer_ids.h:160
@ User_22
Definition: layer_ids.h:145
@ User_38
Definition: layer_ids.h:161
@ User_4
Definition: layer_ids.h:127
@ User_21
Definition: layer_ids.h:144
@ User_24
Definition: layer_ids.h:147
@ User_13
Definition: layer_ids.h:136
@ User_2
Definition: layer_ids.h:125
@ User_17
Definition: layer_ids.h:140
@ User_33
Definition: layer_ids.h:156
@ User_26
Definition: layer_ids.h:149
@ User_32
Definition: layer_ids.h:155
@ User_18
Definition: layer_ids.h:141
@ User_44
Definition: layer_ids.h:167
@ F_Cu
Definition: layer_ids.h:64
@ B_Fab
Definition: layer_ids.h:118
bool IsValidLayer(int aLayerId)
Test whether a given integer is a valid layer index, i.e.
Definition: layer_ids.h:643
std::pair< wxString, wxString > AddXY(const VECTOR2I &aVec)
Definition: odb_util.cpp:167
wxString GenLegalEntityName(const wxString &aStr)
Definition: odb_util.cpp:82
wxString Double2String(double aVal)
Definition: odb_util.cpp:127
wxString SymDouble2String(double aVal)
Definition: odb_util.cpp:155
#define ODB_JOB_NAME
Definition: odb_defines.h:27
#define ODB_UNITS
Definition: odb_defines.h:28
see class PGM_BASE
#define KEY_CORE
std::optional< ODB_DIELECTRIC_TYPE > m_diType
Definition: odb_entity.h:84
std::optional< std::pair< wxString, wxString > > m_span
Definition: odb_entity.h:82
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:97
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87