KiCad PCB EDA Suite
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odb_entity.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2024 KiCad Developers, see AUTHORS.txt for contributors.
5 * Author: SYSUEric <[email protected]>.
6 *
7 * This program is free software: you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation, either version 3 of the License, or (at your
10 * option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21
22#include <base_units.h>
24#include <build_version.h>
25#include <callback_gal.h>
29#include <font/font.h>
30#include <footprint.h>
31#include <hash_eda.h>
32#include <pad.h>
33#include <pcb_dimension.h>
34#include <pcb_shape.h>
35#include <pcb_text.h>
36#include <pcb_textbox.h>
37#include <pcb_track.h>
38#include <pcbnew_settings.h>
40#include <pgm_base.h>
41#include <progress_reporter.h>
43#include <wx_fstream_progress.h>
44
49
50#include <wx/log.h>
51#include <wx/numformatter.h>
52#include <wx/mstream.h>
53
54#include "odb_attribute.h"
55#include "odb_entity.h"
56#include "odb_defines.h"
57#include "odb_feature.h"
58#include "odb_util.h"
59#include "pcb_io_odbpp.h"
60
61
63{
64 try
65 {
67 return true;
68 }
69 catch( const std::exception& e )
70 {
71 std::cerr << e.what() << std::endl;
72 return false;
73 }
74}
75
76
78{
79 m_info = { { wxS( ODB_JOB_NAME ), wxS( "job" ) },
81 { wxS( "ODB_VERSION_MAJOR" ), wxS( "8" ) },
82 { wxS( "ODB_VERSION_MINOR" ), wxS( "1" ) },
83 { wxS( "ODB_SOURCE" ), wxS( "KiCad EDA" ) },
84 { wxS( "CREATION_DATE" ), wxDateTime::Now().FormatISOCombined() },
85 { wxS( "SAVE_DATE" ), wxDateTime::Now().FormatISOCombined() },
86 { wxS( "SAVE_APP" ), wxString::Format( wxS( "KiCad EDA %s" ), GetBuildVersion() ) } };
87}
88
89
91{
92 auto fileproxy = writer.CreateFileProxy( "info" );
93
94 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
95
96 for( auto& info : m_info )
97 {
98 twriter.WriteEquationLine( info.first, info.second );
99 }
100}
101
102
103void ODB_MATRIX_ENTITY::AddStep( const wxString& aStepName )
104{
105 m_matrixSteps.emplace( aStepName.Upper(), m_col++ );
106}
107
108
110{
111 AddStep( "PCB" );
112
114}
115
116
118{
120 BOARD_STACKUP& stackup = dsnSettings.GetStackupDescriptor();
121 stackup.SynchronizeWithBoard( &dsnSettings );
122
123 std::vector<BOARD_STACKUP_ITEM*> layers = stackup.GetList();
124 std::set<PCB_LAYER_ID> added_layers;
125
127
128 for( int i = 0; i < stackup.GetCount(); i++ )
129 {
130 BOARD_STACKUP_ITEM* stackup_item = layers.at( i );
131
132 for( int sublayer_id = 0; sublayer_id < stackup_item->GetSublayersCount(); sublayer_id++ )
133 {
134 wxString ly_name = stackup_item->GetLayerName();
135
136 if( ly_name.IsEmpty() )
137 {
138 if( IsValidLayer( stackup_item->GetBrdLayerId() ) )
139 ly_name = m_board->GetLayerName( stackup_item->GetBrdLayerId() );
140
141 if( ly_name.IsEmpty() && stackup_item->GetType() == BS_ITEM_TYPE_DIELECTRIC )
142 ly_name = wxString::Format( "DIELECTRIC_%d",
143 stackup_item->GetDielectricLayerId() );
144 }
145
146 MATRIX_LAYER matrix( m_row++, ly_name );
147
148 if( stackup_item->GetType() == BS_ITEM_TYPE_DIELECTRIC )
149 {
150 if( stackup_item->GetTypeName() == KEY_CORE )
151 matrix.m_diType.emplace( ODB_DIELECTRIC_TYPE::CORE );
152 else
153 matrix.m_diType.emplace( ODB_DIELECTRIC_TYPE::PREPREG );
154
155 matrix.m_type = ODB_TYPE::DIELECTRIC;
156 matrix.m_context = ODB_CONTEXT::BOARD;
157 matrix.m_polarity = ODB_POLARITY::POSITIVE;
158 m_matrixLayers.push_back( matrix );
159 m_plugin->GetLayerNameList().emplace_back(
160 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
161
162 continue;
163 }
164 else
165 {
166 added_layers.insert( stackup_item->GetBrdLayerId() );
167 AddMatrixLayerField( matrix, stackup_item->GetBrdLayerId() );
168 }
169 }
170 }
171
172 LSEQ layer_seq = m_board->GetEnabledLayers().Seq();
173
174 for( PCB_LAYER_ID layer : layer_seq )
175 {
176 if( added_layers.find( layer ) != added_layers.end() )
177 continue;
178
179 MATRIX_LAYER matrix( m_row++, m_board->GetLayerName( layer ) );
180 added_layers.insert( layer );
181 AddMatrixLayerField( matrix, layer );
182 }
183
185
187}
188
189
191{
192 aMLayer.m_polarity = ODB_POLARITY::POSITIVE;
193 aMLayer.m_context = ODB_CONTEXT::BOARD;
194 switch( aLayer )
195 {
196 case F_Paste:
197 case B_Paste: aMLayer.m_type = ODB_TYPE::SOLDER_PASTE; break;
198 case F_SilkS:
199 case B_SilkS: aMLayer.m_type = ODB_TYPE::SILK_SCREEN; break;
200 case F_Mask:
201 case B_Mask: aMLayer.m_type = ODB_TYPE::SOLDER_MASK; break;
202 case B_CrtYd:
203 case F_CrtYd:
204 case Edge_Cuts:
205 case B_Fab:
206 case F_Fab:
207 case F_Adhes:
208 case B_Adhes:
209 case Dwgs_User:
210 case Cmts_User:
211 case Eco1_User:
212 case Eco2_User:
213 case Margin:
214 case User_1:
215 case User_2:
216 case User_3:
217 case User_4:
218 case User_5:
219 case User_6:
220 case User_7:
221 case User_8:
222 case User_9:
223 aMLayer.m_context = ODB_CONTEXT::MISC;
224 aMLayer.m_type = ODB_TYPE::DOCUMENT;
225 break;
226
227 default:
228 if( IsCopperLayer( aLayer ) )
229 {
230 aMLayer.m_type = ODB_TYPE::SIGNAL;
231 }
232 else
233 {
234 // Do not handle other layers :
235 aMLayer.m_type = ODB_TYPE::UNDEFINED;
236 m_row--;
237 }
238
239 break;
240 }
241
242 if( aMLayer.m_type != ODB_TYPE::UNDEFINED )
243 {
244 m_matrixLayers.push_back( aMLayer );
245 m_plugin->GetLayerNameList().emplace_back( std::make_pair( aLayer, aMLayer.m_layerName ) );
246 }
247}
248
249
251{
252 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& drill_layers =
254
255 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& slot_holes =
257
258 bool has_pth_layer = false;
259 bool has_npth_layer = false;
260
261 for( BOARD_ITEM* item : m_board->Tracks() )
262 {
263 if( item->Type() == PCB_VIA_T )
264 {
265 PCB_VIA* via = static_cast<PCB_VIA*>( item );
266 drill_layers[std::make_pair( via->TopLayer(), via->BottomLayer() )].push_back( via );
267 }
268 }
269
270 for( FOOTPRINT* fp : m_board->Footprints() )
271 {
272 // std::shared_ptr<FOOTPRINT> fp( static_cast<FOOTPRINT*>( it_fp->Clone() ) );
273
274 if( fp->IsFlipped() )
275 {
276 m_hasBotComp = true;
277 }
278
279 for( PAD* pad : fp->Pads() )
280 {
281 if( !has_pth_layer && pad->GetAttribute() == PAD_ATTRIB::PTH )
282 has_pth_layer = true;
283 if( !has_npth_layer && pad->GetAttribute() == PAD_ATTRIB::NPTH )
284 has_npth_layer = true;
285
286 if( pad->HasHole() && pad->GetDrillSizeX() != pad->GetDrillSizeY() )
287 slot_holes[std::make_pair( F_Cu, B_Cu )].push_back( pad );
288 else if( pad->HasHole() )
289 drill_layers[std::make_pair( F_Cu, B_Cu )].push_back( pad );
290 }
291
292 // m_plugin->GetLoadedFootprintList().push_back( std::move( fp ) );
293 }
294
295 auto InitDrillMatrix =
296 [&]( const wxString& aHasPlated, std::pair<PCB_LAYER_ID, PCB_LAYER_ID> aLayerPair )
297 {
298 wxString dLayerName = wxString::Format( "drill_%s_%s-%s", aHasPlated,
299 m_board->GetLayerName( aLayerPair.first ),
300 m_board->GetLayerName( aLayerPair.second ) );
301 MATRIX_LAYER matrix( m_row++, dLayerName );
302
303 matrix.m_type = ODB_TYPE::DRILL;
304 matrix.m_context = ODB_CONTEXT::BOARD;
305 matrix.m_polarity = ODB_POLARITY::POSITIVE;
306 matrix.m_span.emplace( std::make_pair(
307 ODB::GenLegalEntityName( m_board->GetLayerName( aLayerPair.first ) ),
308 ODB::GenLegalEntityName( m_board->GetLayerName( aLayerPair.second ) ) ) );
309 m_matrixLayers.push_back( matrix );
310 m_plugin->GetLayerNameList().emplace_back(
311 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
312 };
313
314 if( drill_layers.find( std::make_pair( F_Cu, B_Cu ) ) != drill_layers.end()
315 || !slot_holes.empty() )
316 {
317 // for pad has hole
318 if( has_pth_layer )
319 InitDrillMatrix( "plated", std::make_pair( F_Cu, B_Cu ) );
320 if( has_npth_layer )
321 InitDrillMatrix( "non-plated", std::make_pair( F_Cu, B_Cu ) );
322 }
323
324 for( const auto& [layer_pair, vec] : drill_layers )
325 {
326 if( layer_pair != std::make_pair( F_Cu, B_Cu ) ) // pad has initialized above
327 InitDrillMatrix( "plated", layer_pair ); // for via
328 }
329}
330
331
333{
334 MATRIX_LAYER matrix( m_row++, "COMP_+_TOP" );
335 matrix.m_type = ODB_TYPE::COMPONENT;
336 matrix.m_context = ODB_CONTEXT::BOARD;
337
338 if( aCompSide == F_Cu )
339 {
340 m_matrixLayers.push_back( matrix );
341 m_plugin->GetLayerNameList().emplace_back(
342 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
343 }
344
345 if( aCompSide == B_Cu && m_hasBotComp )
346 {
347 matrix.m_layerName = ODB::GenLegalEntityName( "COMP_+_BOT" );
348 m_matrixLayers.push_back( matrix );
349 m_plugin->GetLayerNameList().emplace_back(
350 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
351 }
352}
353
354
356{
357 auto fileproxy = writer.CreateFileProxy( "matrix" );
358
359 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
360
361 for( const auto& [step_name, column] : m_matrixSteps )
362 {
363 const auto array_proxy = twriter.MakeArrayProxy( "STEP" );
364 twriter.WriteEquationLine( "COL", column );
365 twriter.WriteEquationLine( "NAME", step_name );
366 }
367
368 for( const MATRIX_LAYER& layer : m_matrixLayers )
369 {
370 const auto array_proxy = twriter.MakeArrayProxy( "LAYER" );
371 twriter.WriteEquationLine( "ROW", layer.m_rowNumber );
372 twriter.write_line_enum( "CONTEXT", layer.m_context );
373 twriter.write_line_enum( "TYPE", layer.m_type );
374
375 if( layer.m_addType.has_value() )
376 {
377 twriter.write_line_enum( "ADD_TYPE", layer.m_addType.value() );
378 }
379
380 twriter.WriteEquationLine( "NAME", layer.m_layerName.Upper() );
381 twriter.WriteEquationLine( "OLD_NAME", wxEmptyString );
382 twriter.write_line_enum( "POLARITY", layer.m_polarity );
383
384 if( layer.m_diType.has_value() )
385 {
386 twriter.write_line_enum( "DIELECTRIC_TYPE", layer.m_diType.value() );
387 // twriter.WriteEquationLine( "DIELECTRIC_NAME", wxEmptyString );
388
389 // Can be used with DIELECTRIC_TYPE=CORE
390 // twriter.WriteEquationLine( "CU_TOP", wxEmptyString );
391 // twriter.WriteEquationLine( "CU_BOTTOM", wxEmptyString );
392 }
393
394 // Only applies to: soldermask, silkscreen, solderpaste and specifies the relevant cu layer
395 // twriter.WriteEquationLine( "REF", wxEmptyString );
396
397 if( layer.m_span.has_value() )
398 {
399 twriter.WriteEquationLine( "START_NAME", layer.m_span->first.Upper() );
400 twriter.WriteEquationLine( "END_NAME", layer.m_span->second.Upper() );
401 }
402
403 twriter.WriteEquationLine( "COLOR", "0" );
404 }
405}
406
407
409 std::map<int, std::vector<BOARD_ITEM*>>& aMap,
410 const PCB_LAYER_ID& aLayerID, const wxString& aLayerName ) :
411 ODB_ENTITY_BASE( aBoard, aPlugin ), m_layerItems( aMap ), m_layerID( aLayerID ),
412 m_matrixLayerName( aLayerName )
413{
414 m_featuresMgr = std::make_unique<FEATURES_MANAGER>( aBoard, aPlugin, aLayerName );
415}
416
417
419{
420 if( m_matrixLayerName.Contains( "drill" ) )
421 {
424 return;
425 }
426
427 if( m_layerID != PCB_LAYER_ID::UNDEFINED_LAYER )
428 {
430 }
431}
432
434{
435 if( m_layerItems.empty() )
436 return;
437
438 const NETINFO_LIST& nets = m_board->GetNetInfo();
439
440 for( const NETINFO_ITEM* net : nets )
441 {
442 std::vector<BOARD_ITEM*>& vec = m_layerItems[net->GetNetCode()];
443
444 std::stable_sort( vec.begin(), vec.end(),
445 []( BOARD_ITEM* a, BOARD_ITEM* b )
446 {
447 if( a->GetParentFootprint() == b->GetParentFootprint() )
448 return a->Type() < b->Type();
449
450 return a->GetParentFootprint() < b->GetParentFootprint();
451 } );
452
453 if( vec.empty() )
454 continue;
455
456 m_featuresMgr->InitFeatureList( m_layerID, vec );
457 }
458}
459
460
462 const EDA_DATA::PACKAGE& aPkg )
463{
464 if( m_matrixLayerName == "COMP_+_BOT" )
465 {
466 if( !m_compBot.has_value() )
467 {
468 m_compBot.emplace();
469 }
470 return m_compBot.value().AddComponent( aFp, aPkg );
471 }
472 else
473 {
474 if( !m_compTop.has_value() )
475 {
476 m_compTop.emplace();
477 }
478
479 return m_compTop.value().AddComponent( aFp, aPkg );
480 }
481}
482
483
485{
486 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& drill_layers =
488
489 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& slot_holes =
491
492 if( !m_layerItems.empty() )
493 {
494 m_layerItems.clear();
495 }
496
498
499 bool is_npth_layer = false;
500 wxString plated_name = "plated";
501
502 if( m_matrixLayerName.Contains( "non-plated" ) )
503 {
504 is_npth_layer = true;
505 plated_name = "non-plated";
506 }
507
508
509 for( const auto& [layer_pair, vec] : slot_holes )
510 {
511 wxString dLayerName = wxString::Format( "drill_%s_%s-%s", plated_name,
512 m_board->GetLayerName( layer_pair.first ),
513 m_board->GetLayerName( layer_pair.second ) );
514
515 if( ODB::GenLegalEntityName( dLayerName ) == m_matrixLayerName )
516 {
517 for( BOARD_ITEM* item : vec )
518 {
519 if( item->Type() == PCB_PAD_T )
520 {
521 PAD* pad = static_cast<PAD*>( item );
522
523 if( ( is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::PTH )
524 || ( !is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::NPTH ) )
525 {
526 continue;
527 }
528
529 m_tools.value().AddDrillTools(
530 pad->GetAttribute() == PAD_ATTRIB::PTH ? "PLATED" : "NON_PLATED",
532 std::min( pad->GetDrillSizeX(), pad->GetDrillSizeY() ) ) );
533
534 // for drill features
535 m_layerItems[pad->GetNetCode()].push_back( item );
536 }
537 }
538
539 break;
540 }
541 }
542
543 for( const auto& [layer_pair, vec] : drill_layers )
544 {
545 wxString dLayerName = wxString::Format( "drill_%s_%s-%s", plated_name,
546 m_board->GetLayerName( layer_pair.first ),
547 m_board->GetLayerName( layer_pair.second ) );
548
549 if( ODB::GenLegalEntityName( dLayerName ) == m_matrixLayerName )
550 {
551 for( BOARD_ITEM* item : vec )
552 {
553 if( item->Type() == PCB_VIA_T && !is_npth_layer )
554 {
555 PCB_VIA* via = static_cast<PCB_VIA*>( item );
556
557 m_tools.value().AddDrillTools( "VIA",
558 ODB::SymDouble2String( via->GetDrillValue() ) );
559
560 // for drill features
561 m_layerItems[via->GetNetCode()].push_back( item );
562 }
563 else if( item->Type() == PCB_PAD_T )
564 {
565 PAD* pad = static_cast<PAD*>( item );
566
567 if( ( is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::PTH )
568 || ( !is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::NPTH ) )
569 {
570 continue;
571 }
572
573 m_tools.value().AddDrillTools(
574 pad->GetAttribute() == PAD_ATTRIB::PTH ? "PLATED" : "NON_PLATED",
575 ODB::SymDouble2String( pad->GetDrillSizeX() ) );
576
577 // for drill features
578 m_layerItems[pad->GetNetCode()].push_back( item );
579 }
580 }
581
582 break;
583 }
584 }
585}
586
587
589{
591
592 InitEdaData();
593
594 // Init Layer Entity Data
595 for( const auto& [layerName, layer_entity_ptr] : m_layerEntityMap )
596 {
597 layer_entity_ptr->InitEntityData();
598 }
599}
600
601
603{
604 GenAttrList( writer );
605
606 GenFeatures( writer );
607
608 if( m_compTop.has_value() || m_compBot.has_value() )
609 {
610 GenComponents( writer );
611 }
612
613 if( m_tools.has_value() )
614 {
615 GenTools( writer );
616 }
617}
618
619
621{
622 auto fileproxy = writer.CreateFileProxy( "components" );
623
624 if( m_compTop.has_value() )
625 {
626 m_compTop->Write( fileproxy.GetStream() );
627 }
628 else if( m_compBot.has_value() )
629 {
630 m_compBot->Write( fileproxy.GetStream() );
631 }
632}
633
634
636{
637 auto fileproxy = writer.CreateFileProxy( "features" );
638
639 m_featuresMgr->GenerateFeatureFile( fileproxy.GetStream() );
640}
641
642
644{
645 auto fileproxy = writer.CreateFileProxy( "attrlist" );
646}
647
648
650{
651 auto fileproxy = writer.CreateFileProxy( "tools" );
652
653 m_tools.value().GenerateFile( fileproxy.GetStream() );
654}
655
656
658{
659 //InitPackage
660 for( const FOOTPRINT* fp : m_board->Footprints() )
661 {
662 m_edaData.AddPackage( fp );
663 }
664
665 // for NET
666 const NETINFO_LIST& nets = m_board->GetNetInfo();
667
668 for( const NETINFO_ITEM* net : nets )
669 {
670 m_edaData.AddNET( net );
671 }
672
673 // for CMP
674 size_t j = 0;
675
676 for( const FOOTPRINT* fp : m_board->Footprints() )
677 {
678 wxString compName = ODB::GenLegalEntityName( "COMP_+_TOP" );
679 if( fp->IsFlipped() )
680 compName = ODB::GenLegalEntityName( "COMP_+_BOT" );
681
682 auto iter = m_layerEntityMap.find( compName );
683
684 if( iter == m_layerEntityMap.end() )
685 {
686 wxLogError( _( "Failed to add component data" ) );
687 return;
688 }
689
690 // ODBPP only need unique PACKAGE in PKG record in eda/data file.
691 // the PKG index can repeat to be ref in CMP record in component file.
692 std::shared_ptr<FOOTPRINT> fp_pkg = m_edaData.GetEdaFootprints().at( j );
693 ++j;
694
695 const EDA_DATA::PACKAGE& eda_pkg =
696 m_edaData.GetPackage( hash_fp_item( fp_pkg.get(), HASH_POS | REL_COORD ) );
697
698 ODB_COMPONENT& comp = iter->second->InitComponentData( fp, eda_pkg );
699
700 for( int i = 0; i < fp->Pads().size(); ++i )
701 {
702 PAD* pad = fp->Pads()[i];
703 auto& eda_net = m_edaData.GetNet( pad->GetNetCode() );
704
705 auto& subnet = eda_net.AddSubnet<EDA_DATA::SUB_NET_TOEPRINT>(
706 &m_edaData,
709 comp.m_index, comp.m_toeprints.size() );
710
711 m_plugin->GetPadSubnetMap().emplace( pad, &subnet );
712
713 const std::shared_ptr<EDA_DATA::PIN> pin = eda_pkg.GetEdaPkgPin( i );
714 const EDA_DATA::PIN& pin_ref = *pin;
715 auto& toep = comp.m_toeprints.emplace_back( pin_ref );
716
717 toep.m_net_num = eda_net.m_index;
718 toep.m_subnet_num = subnet.m_index;
719
720 toep.m_center = ODB::AddXY( pad->GetPosition() );
721
722 toep.m_rot = ODB::Double2String(
723 ( ANGLE_360 - pad->GetOrientation() ).Normalize().AsDegrees() );
724
725 if( pad->IsFlipped() )
726 toep.m_mirror = wxT( "M" );
727 else
728 toep.m_mirror = wxT( "N" );
729 }
730 }
731
732 for( PCB_TRACK* track : m_board->Tracks() )
733 {
734 auto& eda_net = m_edaData.GetNet( track->GetNetCode() );
735 EDA_DATA::SUB_NET* subnet = nullptr;
736
737 if( track->Type() == PCB_VIA_T )
738 subnet = &( eda_net.AddSubnet<EDA_DATA::SUB_NET_VIA>( &m_edaData ) );
739 else
740 subnet = &( eda_net.AddSubnet<EDA_DATA::SUB_NET_TRACE>( &m_edaData ) );
741
742 m_plugin->GetViaTraceSubnetMap().emplace( track, subnet );
743 }
744
745 for( ZONE* zone : m_board->Zones() )
746 {
747 for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
748 {
749 auto& eda_net = m_edaData.GetNet( zone->GetNetCode() );
750 auto& subnet = eda_net.AddSubnet<EDA_DATA::SUB_NET_PLANE>(
753 m_plugin->GetPlaneSubnetMap().emplace( std::piecewise_construct,
754 std::forward_as_tuple( layer, zone ),
755 std::forward_as_tuple( &subnet ) );
756 }
757 }
758}
759
760
762{
763 wxString step_root = writer.GetCurrentPath();
764
765 writer.CreateEntityDirectory( step_root, "layers" );
766 GenerateLayerFiles( writer );
767
768 writer.CreateEntityDirectory( step_root, "eda" );
769 GenerateEdaFiles( writer );
770
771 writer.CreateEntityDirectory( step_root, "netlists/cadnet" );
772 GenerateNetlistsFiles( writer );
773
774 writer.SetCurrentPath( step_root );
775 GenerateProfileFile( writer );
776
777 GenerateStepHeaderFile( writer );
778
779 //TODO: system attributes
780 // GenerateAttrListFile( writer );
781}
782
783
785{
786 auto fileproxy = writer.CreateFileProxy( "profile" );
787
788 m_profile = std::make_unique<FEATURES_MANAGER>( m_board, m_plugin, wxEmptyString );
789
790 SHAPE_POLY_SET board_outline;
791
792 if( !m_board->GetBoardPolygonOutlines( board_outline ) )
793 {
794 wxLogError( "Failed to get board outline" );
795 }
796
797 if( !m_profile->AddContour( board_outline, 0 ) )
798 {
799 wxLogError( "Failed to add polygon to profile" );
800 }
801
802 m_profile->GenerateProfileFeatures( fileproxy.GetStream() );
803}
804
805
807{
808 auto fileproxy = writer.CreateFileProxy( "stephdr" );
809
810 m_stephdr = {
812 { "X_DATUM", "0" },
813 { "Y_DATUM", "0" },
814 { "X_ORIGIN", "0" },
815 { "Y_ORIGIN", "0" },
816 { "TOP_ACTIVE", "0" },
817 { "BOTTOM_ACTIVE", "0" },
818 { "RIGHT_ACTIVE", "0" },
819 { "LEFT_ACTIVE", "0" },
820 { "AFFECTING_BOM", "" },
821 { "AFFECTING_BOM_CHANGED", "0" },
822 };
823
824 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
825
826 for( const auto& [key, value] : m_stephdr )
827 {
828 twriter.WriteEquationLine( key, value );
829 }
830}
831
832
834{
835 wxString layers_root = writer.GetCurrentPath();
836
837 for( auto& [layerName, layerEntity] : m_layerEntityMap )
838 {
839 writer.CreateEntityDirectory( layers_root, layerName );
840
841 layerEntity->GenerateFiles( writer );
842 }
843}
844
845
847{
848 auto fileproxy = writer.CreateFileProxy( "data" );
849
850 m_edaData.Write( fileproxy.GetStream() );
851}
852
853
855{
856 auto fileproxy = writer.CreateFileProxy( "netlist" );
857
858 m_netlist.Write( fileproxy.GetStream() );
859}
860
861
863{
864 try
865 {
866 writer.CreateEntityDirectory( writer.GetRootPath(), "steps" );
868 return true;
869 }
870 catch( const std::exception& e )
871 {
872 std::cerr << e.what() << std::endl;
873 return false;
874 }
875}
876
877
879{
880 LSEQ layers = m_board->GetEnabledLayers().Seq();
881 const NETINFO_LIST& nets = m_board->GetNetInfo();
882
883 // To avoid the overhead of repeatedly cycling through the layers and nets,
884 // we pre-sort the board items into a map of layer -> net -> items
885 std::map<PCB_LAYER_ID, std::map<int, std::vector<BOARD_ITEM*>>>& elements =
887
888 std::for_each( m_board->Tracks().begin(), m_board->Tracks().end(),
889 [&layers, &elements]( PCB_TRACK* aTrack )
890 {
891 if( aTrack->Type() == PCB_VIA_T )
892 {
893 PCB_VIA* via = static_cast<PCB_VIA*>( aTrack );
894
895 for( PCB_LAYER_ID layer : layers )
896 {
897 if( via->FlashLayer( layer ) )
898 elements[layer][via->GetNetCode()].push_back( via );
899 }
900 }
901 else
902 {
903 elements[aTrack->GetLayer()][aTrack->GetNetCode()].push_back( aTrack );
904 }
905 } );
906
907 std::for_each( m_board->Zones().begin(), m_board->Zones().end(),
908 [&elements]( ZONE* zone )
909 {
910 LSEQ zone_layers = zone->GetLayerSet().Seq();
911
912 for( PCB_LAYER_ID layer : zone_layers )
913 {
914 elements[layer][zone->GetNetCode()].push_back( zone );
915 }
916 } );
917
918 for( BOARD_ITEM* item : m_board->Drawings() )
919 {
920 if( BOARD_CONNECTED_ITEM* conn_it = dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
921 elements[conn_it->GetLayer()][conn_it->GetNetCode()].push_back( conn_it );
922 else
923 elements[item->GetLayer()][0].push_back( item );
924 }
925
926 for( FOOTPRINT* fp : m_board->Footprints() )
927 {
928 for( PCB_FIELD* field : fp->GetFields() )
929 elements[field->GetLayer()][0].push_back( field );
930
931 for( BOARD_ITEM* item : fp->GraphicalItems() )
932 elements[item->GetLayer()][0].push_back( item );
933
934 for( PAD* pad : fp->Pads() )
935 {
936 LSEQ pad_layers = pad->GetLayerSet().Seq();
937 VECTOR2I margin;
938
939 for( PCB_LAYER_ID layer : pad_layers )
940 {
941 bool onCopperLayer = ( LSET::AllCuMask() & LSET( { layer } ) ).any();
942 bool onSolderMaskLayer = ( LSET( { F_Mask, B_Mask } ) & LSET( { layer } ) ).any();
943 bool onSolderPasteLayer =
944 ( LSET( { F_Paste, B_Paste } ) & LSET( { layer } ) ).any();
945
946 if( onSolderMaskLayer )
947 margin.x = margin.y = pad->GetSolderMaskExpansion( PADSTACK::ALL_LAYERS );
948
949 if( onSolderPasteLayer )
950 margin = pad->GetSolderPasteMargin( PADSTACK::ALL_LAYERS );
951
952 VECTOR2I padPlotsSize = pad->GetSize( PADSTACK::ALL_LAYERS ) + margin * 2;
953
954 if( onCopperLayer && !pad->IsOnCopperLayer() )
955 continue;
956
957 if( onCopperLayer && !pad->FlashLayer( layer ) )
958 continue;
959
960 if( pad->GetShape( PADSTACK::ALL_LAYERS ) != PAD_SHAPE::CUSTOM
961 && ( padPlotsSize.x <= 0 || padPlotsSize.y <= 0 ) )
962 continue;
963
964 elements[layer][pad->GetNetCode()].push_back( pad );
965 }
966 }
967 }
968
969 for( const auto& [layerID, layerName] : m_plugin->GetLayerNameList() )
970 {
971 std::shared_ptr<ODB_LAYER_ENTITY> layer_entity_ptr = std::make_shared<ODB_LAYER_ENTITY>(
972 m_board, m_plugin, elements[layerID], layerID, layerName );
973
974 m_layerEntityMap.emplace( layerName, layer_entity_ptr );
975 }
976}
@ BS_ITEM_TYPE_DIELECTRIC
Definition: board_stackup.h:46
wxString GetBuildVersion()
Get the full KiCad version string.
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
Container for design settings for a BOARD object.
BOARD_STACKUP & GetStackupDescriptor()
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:79
Manage one layer needed to make a physical board.
Definition: board_stackup.h:96
wxString GetTypeName() const
int GetSublayersCount() const
wxString GetLayerName() const
PCB_LAYER_ID GetBrdLayerId() const
BOARD_STACKUP_ITEM_TYPE GetType() const
int GetDielectricLayerId() const
Manage layers needed to make a physical board.
const std::vector< BOARD_STACKUP_ITEM * > & GetList() const
int GetCount() const
bool SynchronizeWithBoard(BOARD_DESIGN_SETTINGS *aSettings)
Synchronize the BOARD_STACKUP_ITEM* list with the board.
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:290
bool GetBoardPolygonOutlines(SHAPE_POLY_SET &aOutlines, OUTLINE_ERROR_HANDLER *aErrorHandler=nullptr, bool aAllowUseArcsInPolygons=false, bool aIncludeNPTHAsOutlines=false)
Extract the board outlines and build a closed polygon from lines, arcs and circle items on edge cut l...
Definition: board.cpp:2497
const NETINFO_LIST & GetNetInfo() const
Definition: board.h:871
LSET GetEnabledLayers() const
A proxy function that calls the corresponding function in m_BoardSettings.
Definition: board.cpp:778
const ZONES & Zones() const
Definition: board.h:335
const FOOTPRINTS & Footprints() const
Definition: board.h:331
const TRACKS & Tracks() const
Definition: board.h:329
const wxString GetLayerName(PCB_LAYER_ID aLayer) const
Return the name of a aLayer.
Definition: board.cpp:574
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:895
T & AddSubnet(Args &&... args)
Definition: odb_eda_data.h:160
const std::shared_ptr< PIN > GetEdaPkgPin(size_t aPadIndex) const
Definition: odb_eda_data.h:241
NET & GetNet(size_t aNetcode)
Definition: odb_eda_data.h:172
const PACKAGE & GetPackage(size_t aHash) const
Definition: odb_eda_data.h:253
void AddNET(const NETINFO_ITEM *aNet)
void AddPackage(const FOOTPRINT *aFp)
void Write(std::ostream &ost) const
std::vector< std::shared_ptr< FOOTPRINT > > GetEdaFootprints() const
Definition: odb_eda_data.h:40
LSEQ is a sequence (and therefore also a set) of PCB_LAYER_IDs.
Definition: lseq.h:47
LSET is a set of PCB_LAYER_IDs.
Definition: lset.h:36
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:686
LSEQ Seq(const LSEQ &aSequence) const
Return an LSEQ from the union of this LSET and a desired sequence.
Definition: lset.cpp:420
Handle the data for a net.
Definition: netinfo.h:56
Container for NETINFO_ITEM elements, which are the nets.
Definition: netinfo.h:346
const size_t m_index
! CMP index number on board to be used in SNT(TOP), 0~n-1
Definition: odb_component.h:53
std::list< TOEPRINT > m_toeprints
Definition: odb_component.h:93
virtual std::string GetEntityName()=0
virtual bool CreateDirectoryTree(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:62
BOARD * m_board
Definition: odb_entity.h:59
PCB_IO_ODBPP * m_plugin
Definition: odb_entity.h:61
void GenFeatures(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:635
PCB_LAYER_ID m_layerID
Definition: odb_entity.h:204
void InitFeatureData()
Definition: odb_entity.cpp:433
void GenComponents(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:620
wxString m_matrixLayerName
Definition: odb_entity.h:205
std::optional< COMPONENTS_MANAGER > m_compTop
Definition: odb_entity.h:208
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:602
std::optional< COMPONENTS_MANAGER > m_compBot
Definition: odb_entity.h:209
std::optional< ODB_DRILL_TOOLS > m_tools
Definition: odb_entity.h:207
void GenTools(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:649
std::map< int, std::vector< BOARD_ITEM * > > m_layerItems
Definition: odb_entity.h:203
ODB_LAYER_ENTITY(BOARD *aBoard, PCB_IO_ODBPP *aPlugin, std::map< int, std::vector< BOARD_ITEM * > > &aMap, const PCB_LAYER_ID &aLayerID, const wxString &aLayerName)
Definition: odb_entity.cpp:408
ODB_COMPONENT & InitComponentData(const FOOTPRINT *aFp, const EDA_DATA::PACKAGE &aPkg)
Definition: odb_entity.cpp:461
virtual void InitEntityData() override
Definition: odb_entity.cpp:418
void GenAttrList(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:643
std::unique_ptr< FEATURES_MANAGER > m_featuresMgr
Definition: odb_entity.h:210
void AddStep(const wxString &aStepName)
Definition: odb_entity.cpp:103
unsigned int m_col
Definition: odb_entity.h:111
void InitMatrixLayerData()
Definition: odb_entity.cpp:117
std::vector< MATRIX_LAYER > m_matrixLayers
Definition: odb_entity.h:109
void AddMatrixLayerField(MATRIX_LAYER &aMLayer, PCB_LAYER_ID aLayer)
Definition: odb_entity.cpp:190
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:355
std::map< wxString, unsigned int > m_matrixSteps
Definition: odb_entity.h:108
unsigned int m_row
Definition: odb_entity.h:110
void AddDrillMatrixLayer()
Definition: odb_entity.cpp:250
virtual void InitEntityData() override
Definition: odb_entity.cpp:109
void AddCOMPMatrixLayer(PCB_LAYER_ID aCompSide)
Definition: odb_entity.cpp:332
std::map< wxString, wxString > m_info
Definition: odb_entity.h:128
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:90
void Write(std::ostream &aStream)
virtual std::string GetEntityName() override
Definition: odb_entity.h:144
std::unordered_map< wxString, wxString > m_stephdr
Definition: odb_entity.h:171
void GenerateProfileFile(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:784
EDA_DATA m_edaData
Definition: odb_entity.h:170
void GenerateStepHeaderFile(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:806
void GenerateEdaFiles(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:846
virtual void InitEntityData() override
Definition: odb_entity.cpp:588
void GenerateLayerFiles(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:833
std::map< wxString, std::shared_ptr< ODB_LAYER_ENTITY > > m_layerEntityMap
Definition: odb_entity.h:167
ODB_NET_LIST m_netlist
Definition: odb_entity.h:172
std::unique_ptr< FEATURES_MANAGER > m_profile
Definition: odb_entity.h:168
virtual bool CreateDirectoryTree(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:862
void GenerateNetlistsFiles(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:854
void MakeLayerEntity()
Definition: odb_entity.cpp:878
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:761
void WriteEquationLine(const std::string &var, int value)
Definition: odb_util.cpp:285
ARRAY_PROXY MakeArrayProxy(const std::string &aStr)
Definition: odb_util.h:301
void write_line_enum(const std::string &var, const T &value)
Definition: odb_util.h:275
const wxString GetRootPath() const
Definition: odb_util.h:256
void CreateEntityDirectory(const wxString &aPareDir, const wxString &aSubDir=wxEmptyString)
Definition: odb_util.cpp:206
ODB_FILE_WRITER CreateFileProxy(const wxString &aFileName)
Definition: odb_util.h:243
void SetCurrentPath(const wxString &aDir)
Definition: odb_util.h:252
const wxString GetCurrentPath() const
Definition: odb_util.h:250
static constexpr PCB_LAYER_ID ALL_LAYERS
! Temporary layer identifier to identify code that is not padstack-aware
Definition: padstack.h:144
Definition: pad.h:54
std::map< std::pair< PCB_LAYER_ID, ZONE * >, EDA_DATA::SUB_NET_PLANE * > & GetPlaneSubnetMap()
Definition: pcb_io_odbpp.h:119
std::map< PCB_TRACK *, EDA_DATA::SUB_NET * > & GetViaTraceSubnetMap()
Definition: pcb_io_odbpp.h:124
std::vector< std::pair< PCB_LAYER_ID, wxString > > & GetLayerNameList()
Definition: pcb_io_odbpp.h:87
std::map< std::pair< PCB_LAYER_ID, PCB_LAYER_ID >, std::vector< BOARD_ITEM * > > & GetSlotHolesMap()
Definition: pcb_io_odbpp.h:109
std::map< const PAD *, EDA_DATA::SUB_NET_TOEPRINT * > & GetPadSubnetMap()
Definition: pcb_io_odbpp.h:114
std::map< PCB_LAYER_ID, std::map< int, std::vector< BOARD_ITEM * > > > & GetLayerElementsMap()
Definition: pcb_io_odbpp.h:92
static std::string m_unitsStr
Definition: pcb_io_odbpp.h:144
std::map< std::pair< PCB_LAYER_ID, PCB_LAYER_ID >, std::vector< BOARD_ITEM * > > & GetDrillLayerItemsMap()
Definition: pcb_io_odbpp.h:103
Represent a set of closed polygons.
Handle a list of polygons defining a copper zone.
Definition: zone.h:73
#define _(s)
static constexpr EDA_ANGLE ANGLE_360
Definition: eda_angle.h:407
size_t hash_fp_item(const EDA_ITEM *aItem, int aFlags)
Calculate hash of an EDA_ITEM.
Definition: hash_eda.cpp:55
@ HASH_POS
use coordinates relative to the parent object
Definition: hash_eda.h:43
@ REL_COORD
use coordinates relative to the shape position
Definition: hash_eda.h:46
bool IsCopperLayer(int aLayerId)
Tests whether a layer is a copper layer.
Definition: layer_ids.h:531
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
@ User_8
Definition: layer_ids.h:131
@ F_CrtYd
Definition: layer_ids.h:116
@ B_Adhes
Definition: layer_ids.h:103
@ Edge_Cuts
Definition: layer_ids.h:112
@ Dwgs_User
Definition: layer_ids.h:107
@ F_Paste
Definition: layer_ids.h:104
@ Cmts_User
Definition: layer_ids.h:108
@ User_6
Definition: layer_ids.h:129
@ User_7
Definition: layer_ids.h:130
@ F_Adhes
Definition: layer_ids.h:102
@ B_Mask
Definition: layer_ids.h:98
@ B_Cu
Definition: layer_ids.h:65
@ User_5
Definition: layer_ids.h:128
@ Eco1_User
Definition: layer_ids.h:109
@ F_Mask
Definition: layer_ids.h:97
@ B_Paste
Definition: layer_ids.h:105
@ User_9
Definition: layer_ids.h:132
@ F_Fab
Definition: layer_ids.h:119
@ Margin
Definition: layer_ids.h:113
@ F_SilkS
Definition: layer_ids.h:100
@ B_CrtYd
Definition: layer_ids.h:115
@ Eco2_User
Definition: layer_ids.h:110
@ User_3
Definition: layer_ids.h:126
@ User_1
Definition: layer_ids.h:124
@ B_SilkS
Definition: layer_ids.h:101
@ User_4
Definition: layer_ids.h:127
@ User_2
Definition: layer_ids.h:125
@ F_Cu
Definition: layer_ids.h:64
@ B_Fab
Definition: layer_ids.h:118
bool IsValidLayer(int aLayerId)
Test whether a given integer is a valid layer index, i.e.
Definition: layer_ids.h:509
std::pair< wxString, wxString > AddXY(const VECTOR2I &aVec)
Definition: odb_util.cpp:167
wxString GenLegalEntityName(const wxString &aStr)
Definition: odb_util.cpp:82
wxString Double2String(double aVal)
Definition: odb_util.cpp:127
wxString SymDouble2String(double aVal)
Definition: odb_util.cpp:155
#define ODB_JOB_NAME
Definition: odb_defines.h:27
#define ODB_UNITS
Definition: odb_defines.h:28
see class PGM_BASE
#define KEY_CORE
std::optional< ODB_DIELECTRIC_TYPE > m_diType
Definition: odb_entity.h:84
std::optional< std::pair< wxString, wxString > > m_span
Definition: odb_entity.h:82
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:97
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87