KiCad PCB EDA Suite
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odb_entity.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
5 * Author: SYSUEric <[email protected]>.
6 *
7 * This program is free software: you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation, either version 3 of the License, or (at your
10 * option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21
22#include <base_units.h>
23#include <optional>
24#include <board.h>
26#include <build_version.h>
27#include <callback_gal.h>
31#include <font/font.h>
32#include <footprint.h>
33#include <hash_eda.h>
34#include <pad.h>
35#include <padstack.h>
36#include <pcb_dimension.h>
37#include <pcb_shape.h>
38#include <pcb_text.h>
39#include <pcb_textbox.h>
40#include <pcb_track.h>
41#include <pcbnew_settings.h>
43#include <pgm_base.h>
44#include <progress_reporter.h>
46#include <wx_fstream_progress.h>
47
52
53#include <wx/log.h>
54#include <wx/numformatter.h>
55#include <wx/mstream.h>
56
57#include "odb_attribute.h"
58#include "odb_entity.h"
59#include "odb_defines.h"
60#include "odb_feature.h"
61#include "odb_util.h"
62#include "pcb_io_odbpp.h"
63
64
66{
67 try
68 {
70 return true;
71 }
72 catch( const std::exception& e )
73 {
74 std::cerr << e.what() << std::endl;
75 return false;
76 }
77}
78
79
81{
82 m_info = { { wxS( ODB_JOB_NAME ), wxS( "job" ) },
84 { wxS( "ODB_VERSION_MAJOR" ), wxS( "8" ) },
85 { wxS( "ODB_VERSION_MINOR" ), wxS( "1" ) },
86 { wxS( "ODB_SOURCE" ), wxS( "KiCad EDA" ) },
87 { wxS( "CREATION_DATE" ), wxDateTime::Now().Format( "%Y%m%d.%H%M%S" ) },
88 { wxS( "SAVE_DATE" ), wxDateTime::Now().Format( "%Y%m%d.%H%M%S" ) },
89 { wxS( "SAVE_APP" ), wxString::Format( wxS( "KiCad EDA %s" ), GetBuildVersion() ) } };
90}
91
92
94{
95 auto fileproxy = writer.CreateFileProxy( "info" );
96
97 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
98
99 for( auto& info : m_info )
100 {
101 twriter.WriteEquationLine( info.first, info.second );
102 }
103}
104
105
106void ODB_MATRIX_ENTITY::AddStep( const wxString& aStepName )
107{
108 m_matrixSteps.emplace( aStepName.Upper(), m_col++ );
109}
110
111
113{
114 AddStep( "PCB" );
115
117}
118
119
121{
122 BOARD_DESIGN_SETTINGS& dsnSettings = m_board->GetDesignSettings();
123 BOARD_STACKUP& stackup = dsnSettings.GetStackupDescriptor();
124 stackup.SynchronizeWithBoard( &dsnSettings );
125
126 std::vector<BOARD_STACKUP_ITEM*> layers = stackup.GetList();
127 std::set<PCB_LAYER_ID> added_layers;
128
130
131 for( int i = 0; i < stackup.GetCount(); i++ )
132 {
133 BOARD_STACKUP_ITEM* stackup_item = layers.at( i );
134
135 for( int sublayer_id = 0; sublayer_id < stackup_item->GetSublayersCount(); sublayer_id++ )
136 {
137 wxString ly_name = stackup_item->GetLayerName();
138
139 if( ly_name.IsEmpty() )
140 {
141 if( IsValidLayer( stackup_item->GetBrdLayerId() ) )
142 ly_name = m_board->GetLayerName( stackup_item->GetBrdLayerId() );
143
144 if( ly_name.IsEmpty() && stackup_item->GetType() == BS_ITEM_TYPE_DIELECTRIC )
145 ly_name = wxString::Format( "DIELECTRIC_%d",
146 stackup_item->GetDielectricLayerId() );
147 }
148
149 MATRIX_LAYER matrix( m_row++, ly_name );
150
151 if( stackup_item->GetType() == BS_ITEM_TYPE_DIELECTRIC )
152 {
153 if( stackup_item->GetTypeName() == KEY_CORE )
154 matrix.m_diType.emplace( ODB_DIELECTRIC_TYPE::CORE );
155 else
156 matrix.m_diType.emplace( ODB_DIELECTRIC_TYPE::PREPREG );
157
161 m_matrixLayers.push_back( matrix );
162 m_plugin->GetLayerNameList().emplace_back(
163 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
164
165 continue;
166 }
167 else
168 {
169 added_layers.insert( stackup_item->GetBrdLayerId() );
170 AddMatrixLayerField( matrix, stackup_item->GetBrdLayerId() );
171 }
172 }
173 }
174
175 for( PCB_LAYER_ID layer : m_board->GetEnabledLayers().Seq() )
176 {
177 if( added_layers.find( layer ) != added_layers.end() )
178 continue;
179
180 MATRIX_LAYER matrix( m_row++, m_board->GetLayerName( layer ) );
181 added_layers.insert( layer );
182 AddMatrixLayerField( matrix, layer );
183 }
184
186
188
190
192}
193
194
196{
199 switch( aLayer )
200 {
201 case F_Paste:
202 case B_Paste: aMLayer.m_type = ODB_TYPE::SOLDER_PASTE; break;
203 case F_SilkS:
204 case B_SilkS: aMLayer.m_type = ODB_TYPE::SILK_SCREEN; break;
205 case F_Mask:
206 case B_Mask: aMLayer.m_type = ODB_TYPE::SOLDER_MASK; break;
207 case B_CrtYd:
208 case F_CrtYd:
209 case Edge_Cuts:
210 case B_Fab:
211 case F_Fab:
212 case F_Adhes:
213 case B_Adhes:
214 case Dwgs_User:
215 case Cmts_User:
216 case Eco1_User:
217 case Eco2_User:
218 case Margin:
219 case User_1:
220 case User_2:
221 case User_3:
222 case User_4:
223 case User_5:
224 case User_6:
225 case User_7:
226 case User_8:
227 case User_9:
228 case User_10:
229 case User_11:
230 case User_12:
231 case User_13:
232 case User_14:
233 case User_15:
234 case User_16:
235 case User_17:
236 case User_18:
237 case User_19:
238 case User_20:
239 case User_21:
240 case User_22:
241 case User_23:
242 case User_24:
243 case User_25:
244 case User_26:
245 case User_27:
246 case User_28:
247 case User_29:
248 case User_30:
249 case User_31:
250 case User_32:
251 case User_33:
252 case User_34:
253 case User_35:
254 case User_36:
255 case User_37:
256 case User_38:
257 case User_39:
258 case User_40:
259 case User_41:
260 case User_42:
261 case User_43:
262 case User_44:
263 case User_45:
265 aMLayer.m_type = ODB_TYPE::DOCUMENT;
266 break;
267
268 default:
269 if( IsCopperLayer( aLayer ) )
270 {
271 aMLayer.m_type = ODB_TYPE::SIGNAL;
272 }
273 else
274 {
275 // Do not handle other layers :
276 aMLayer.m_type = ODB_TYPE::UNDEFINED;
277 m_row--;
278 }
279
280 break;
281 }
282
283 if( aMLayer.m_type != ODB_TYPE::UNDEFINED )
284 {
285 m_matrixLayers.push_back( aMLayer );
286 m_plugin->GetLayerNameList().emplace_back( std::make_pair( aLayer, aMLayer.m_layerName ) );
287 }
288}
289
290
292{
293 std::map<ODB_DRILL_SPAN, std::vector<BOARD_ITEM*>>& drill_layers =
294 m_plugin->GetDrillLayerItemsMap();
295
296 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& slot_holes =
297 m_plugin->GetSlotHolesMap();
298
299 drill_layers.clear();
300
301 std::map<ODB_DRILL_SPAN, wxString>& span_names = m_plugin->GetDrillSpanNameMap();
302 span_names.clear();
303
304 bool has_pth_layer = false;
305 bool has_npth_layer = false;
306
307 for( BOARD_ITEM* item : m_board->Tracks() )
308 {
309 if( item->Type() == PCB_VIA_T )
310 {
311 PCB_VIA* via = static_cast<PCB_VIA*>( item );
312 has_pth_layer = true;
313
314 ODB_DRILL_SPAN platedSpan( via->TopLayer(), via->BottomLayer(), false, false );
315 drill_layers[platedSpan].push_back( via );
316
317 std::set<ODB_DRILL_SPAN> addedBackdrillSpans;
318
319 auto addBackdrillSpan = [&]( const PADSTACK::DRILL_PROPS& aDrill )
320 {
321 if( aDrill.start != UNDEFINED_LAYER && aDrill.end != UNDEFINED_LAYER
322 && ( aDrill.size.x > 0 || aDrill.size.y > 0 ) )
323 {
324 ODB_DRILL_SPAN backSpan( aDrill.start, aDrill.end, true, true );
325
326 if( addedBackdrillSpans.insert( backSpan ).second )
327 drill_layers[backSpan].push_back( via );
328 }
329 };
330
331 addBackdrillSpan( via->Padstack().SecondaryDrill() );
332 addBackdrillSpan( via->Padstack().TertiaryDrill() );
333 }
334 }
335
336 for( FOOTPRINT* fp : m_board->Footprints() )
337 {
338 if( fp->IsFlipped() )
339 {
340 m_hasBotComp = true;
341 }
342
343 for( PAD* pad : fp->Pads() )
344 {
345 if( pad->GetAttribute() == PAD_ATTRIB::PTH )
346 has_pth_layer = true;
347 if( pad->GetAttribute() == PAD_ATTRIB::NPTH )
348 has_npth_layer = true;
349
350 if( pad->HasHole() && pad->GetDrillSizeX() != pad->GetDrillSizeY() )
351 slot_holes[std::make_pair( F_Cu, B_Cu )].push_back( pad );
352 else if( pad->HasHole() )
353 {
354 ODB_DRILL_SPAN padSpan( F_Cu, B_Cu, false, pad->GetAttribute() == PAD_ATTRIB::NPTH );
355 drill_layers[padSpan].push_back( pad );
356 }
357 }
358 }
359
360 if( has_npth_layer )
361 {
362 ODB_DRILL_SPAN npthSpan( F_Cu, B_Cu, false, true );
363 drill_layers[npthSpan];
364 }
365
366 if( has_pth_layer )
367 {
368 ODB_DRILL_SPAN platedSpan( F_Cu, B_Cu, false, false );
369 drill_layers[platedSpan];
370 }
371
372 int backdrillIndex = 1;
373
374 auto assignName = [&]( const ODB_DRILL_SPAN& aSpan )
375 {
376 auto it = span_names.find( aSpan );
377
378 if( it != span_names.end() )
379 return it->second;
380
381 wxString name;
382
383 if( aSpan.m_IsBackdrill )
384 {
385 name.Printf( wxT( "drill%d" ), backdrillIndex++ );
386 }
387 else
388 {
389 wxString platedLabel = aSpan.m_IsNonPlated ? wxT( "non-plated" ) : wxT( "plated" );
390 name.Printf( wxT( "drill_%s_%s-%s" ), platedLabel,
391 m_board->GetLayerName( aSpan.TopLayer() ),
392 m_board->GetLayerName( aSpan.BottomLayer() ) );
393 }
394
395 wxString legalName = ODB::GenLegalEntityName( name );
396 span_names[aSpan] = legalName;
397
398 return legalName;
399 };
400
401 auto InitDrillMatrix = [&]( const ODB_DRILL_SPAN& aSpan )
402 {
403 wxString dLayerName = assignName( aSpan );
404 MATRIX_LAYER matrix( m_row++, dLayerName );
405
406 matrix.m_type = ODB_TYPE::DRILL;
409 matrix.m_span.emplace( std::make_pair(
410 ODB::GenLegalEntityName( m_board->GetLayerName( aSpan.m_StartLayer ) ),
411 ODB::GenLegalEntityName( m_board->GetLayerName( aSpan.m_EndLayer ) ) ) );
412
413 if( aSpan.m_IsBackdrill )
414 matrix.m_addType.emplace( ODB_SUBTYPE::BACKDRILL );
415
416 m_matrixLayers.push_back( matrix );
417 m_plugin->GetLayerNameList().emplace_back(
418 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
419 };
420
421 for( const auto& entry : drill_layers )
422 {
423 InitDrillMatrix( entry.first );
424 }
425}
426
427
429{
430 MATRIX_LAYER matrix( m_row++, "COMP_+_TOP" );
433
434 if( aCompSide == F_Cu )
435 {
436 m_matrixLayers.push_back( matrix );
437 m_plugin->GetLayerNameList().emplace_back(
438 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
439 }
440
441 if( aCompSide == B_Cu && m_hasBotComp )
442 {
443 matrix.m_layerName = ODB::GenLegalEntityName( "COMP_+_BOT" );
444 m_matrixLayers.push_back( matrix );
445 m_plugin->GetLayerNameList().emplace_back(
446 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
447 }
448}
449
451{
452 auto& auxilliary_layers = m_plugin->GetAuxilliaryLayerItemsMap();
453
454 for( BOARD_ITEM* item : m_board->Tracks() )
455 {
456 if( item->Type() == PCB_VIA_T )
457 {
458 PCB_VIA* via = static_cast<PCB_VIA*>( item );
459
460 if( via->Padstack().IsFilled().value_or( false ) )
461 {
462 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::FILLING, via->TopLayer(),
463 via->BottomLayer() )]
464 .push_back( via );
465 }
466
467 if( via->Padstack().IsCapped().value_or( false ) )
468 {
469 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::CAPPING, via->TopLayer(),
470 via->BottomLayer() )]
471 .push_back( via );
472 }
473
474 for( PCB_LAYER_ID layer : { via->TopLayer(), via->BottomLayer() } )
475 {
476 if( via->Padstack().IsPlugged( layer ).value_or( false ) )
477 {
478 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::PLUGGING, layer,
480 .push_back( via );
481 }
482
483 if( via->Padstack().IsCovered( layer ).value_or( false ) )
484 {
485 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::COVERING, layer,
487 .push_back( via );
488 }
489
490 if( via->Padstack().IsTented( layer ).value_or( false ) )
491 {
492 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::TENTING, layer,
494 .push_back( via );
495 }
496 }
497 }
498 }
499
500 auto InitAuxMatrix =
501 [&]( std::tuple<ODB_AUX_LAYER_TYPE, PCB_LAYER_ID, PCB_LAYER_ID> aLayerPair )
502 {
503 wxString featureName = "";
504 switch( std::get<0>( aLayerPair ) )
505 {
506 case ODB_AUX_LAYER_TYPE::TENTING: featureName = "tenting"; break;
507 case ODB_AUX_LAYER_TYPE::COVERING: featureName = "covering"; break;
508 case ODB_AUX_LAYER_TYPE::PLUGGING: featureName = "plugging"; break;
509 case ODB_AUX_LAYER_TYPE::FILLING: featureName = "filling"; break;
510 case ODB_AUX_LAYER_TYPE::CAPPING: featureName = "capping"; break;
511 default: return;
512 }
513
514 wxString dLayerName;
515
516 if( std::get<2>( aLayerPair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
517 {
518 dLayerName = wxString::Format( "%s_%s-%s", featureName,
519 m_board->GetLayerName( std::get<1>( aLayerPair ) ),
520 m_board->GetLayerName( std::get<2>( aLayerPair ) ) );
521 }
522 else
523 {
524 if( m_board->IsFrontLayer( std::get<1>( aLayerPair ) ) )
525 dLayerName = wxString::Format( "%s_front", featureName );
526 else if( m_board->IsBackLayer( std::get<1>( aLayerPair ) ) )
527 dLayerName = wxString::Format( "%s_back", featureName );
528 else
529 return;
530 }
531 MATRIX_LAYER matrix( m_row++, dLayerName );
532
533 matrix.m_type = ODB_TYPE::DOCUMENT;
536
537 if( std::get<2>( aLayerPair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
538 {
539 matrix.m_span.emplace( std::make_pair(
540 ODB::GenLegalEntityName( m_board->GetLayerName( std::get<1>( aLayerPair ) ) ),
542 m_board->GetLayerName( std::get<2>( aLayerPair ) ) ) ) );
543 }
544
545 m_matrixLayers.push_back( matrix );
546
547 if( std::get<2>( aLayerPair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
548 {
549 m_plugin->GetLayerNameList().emplace_back(
550 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
551 }
552 else
553 {
554 m_plugin->GetLayerNameList().emplace_back(
555 std::make_pair( std::get<1>( aLayerPair ), matrix.m_layerName ) );
556 }
557 };
558
559 for( const auto& [layer_pair, vec] : auxilliary_layers )
560 {
561 InitAuxMatrix( layer_pair );
562 }
563}
564
565
567{
568 // Track occurrences of each layer name to detect and handle duplicates
569 std::map<wxString, std::vector<size_t>> name_to_indices;
570
571 // First pass: collect all layer names and their indices
572 for( size_t i = 0; i < m_matrixLayers.size(); ++i )
573 {
574 const wxString& layerName = m_matrixLayers[i].m_layerName;
575 name_to_indices[layerName].push_back( i );
576 }
577
578 // Second pass: for any layer names that appear more than once, add suffixes
579 for( auto& [layerName, indices] : name_to_indices )
580 {
581 if( indices.size() > 1 )
582 {
583 // Multiple layers have the same name, add suffixes to make them unique
584 for( size_t count = 0; count < indices.size(); ++count )
585 {
586 size_t idx = indices[count];
587 wxString newLayerName = wxString::Format( "%s_%zu", m_matrixLayers[idx].m_layerName, count + 1 );
588
589 // Ensure the new name doesn't exceed the 64-character limit
590 if( newLayerName.length() > 64 )
591 {
592 // Truncate the base name if necessary to fit the suffix
593 wxString baseName = m_matrixLayers[idx].m_layerName;
594 size_t suffixLen = wxString::Format( "_%zu", count + 1 ).length();
595
596 if( suffixLen < baseName.length() )
597 {
598 baseName.Truncate( 64 - suffixLen );
599 newLayerName = wxString::Format( "%s_%zu", baseName, count + 1 );
600 }
601 }
602
603 m_matrixLayers[idx].m_layerName = std::move( newLayerName );
604 }
605 }
606 }
607}
608
609
611{
612 auto fileproxy = writer.CreateFileProxy( "matrix" );
613
614 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
615
616 for( const auto& [step_name, column] : m_matrixSteps )
617 {
618 const auto array_proxy = twriter.MakeArrayProxy( "STEP" );
619 twriter.WriteEquationLine( "COL", column );
620 twriter.WriteEquationLine( "NAME", step_name );
621 }
622
623 for( const MATRIX_LAYER& layer : m_matrixLayers )
624 {
625 const auto array_proxy = twriter.MakeArrayProxy( "LAYER" );
626 twriter.WriteEquationLine( "ROW", layer.m_rowNumber );
627 twriter.write_line_enum( "CONTEXT", layer.m_context );
628 twriter.write_line_enum( "TYPE", layer.m_type );
629
630 if( layer.m_addType.has_value() )
631 {
632 twriter.write_line_enum( "ADD_TYPE", layer.m_addType.value() );
633 }
634
635 twriter.WriteEquationLine( "NAME", layer.m_layerName.Upper() );
636 twriter.WriteEquationLine( "OLD_NAME", wxEmptyString );
637 twriter.write_line_enum( "POLARITY", layer.m_polarity );
638
639 if( layer.m_diType.has_value() )
640 {
641 twriter.write_line_enum( "DIELECTRIC_TYPE", layer.m_diType.value() );
642 // twriter.WriteEquationLine( "DIELECTRIC_NAME", wxEmptyString );
643
644 // Can be used with DIELECTRIC_TYPE=CORE
645 // twriter.WriteEquationLine( "CU_TOP", wxEmptyString );
646 // twriter.WriteEquationLine( "CU_BOTTOM", wxEmptyString );
647 }
648
649 // Only applies to: soldermask, silkscreen, solderpaste and specifies the relevant cu layer
650 // twriter.WriteEquationLine( "REF", wxEmptyString );
651
652 if( layer.m_span.has_value() )
653 {
654 twriter.WriteEquationLine( "START_NAME", layer.m_span->first.Upper() );
655 twriter.WriteEquationLine( "END_NAME", layer.m_span->second.Upper() );
656 }
657
658 twriter.WriteEquationLine( "COLOR", "0" );
659 }
660}
661
662
664 std::map<int, std::vector<BOARD_ITEM*>>& aMap,
665 const PCB_LAYER_ID& aLayerID, const wxString& aLayerName ) :
666 ODB_ENTITY_BASE( aBoard, aPlugin ), m_layerItems( aMap ), m_layerID( aLayerID ),
667 m_matrixLayerName( aLayerName )
668{
669 m_featuresMgr = std::make_unique<FEATURES_MANAGER>( aBoard, aPlugin, aLayerName );
670}
671
672
674{
675 if( m_matrixLayerName.Contains( "drill" ) )
676 {
679 return;
680 }
681
682 if( m_matrixLayerName.Contains( "filling" ) || m_matrixLayerName.Contains( "capping" )
683 || m_matrixLayerName.Contains( "covering" ) || m_matrixLayerName.Contains( "plugging" )
684 || m_matrixLayerName.Contains( "tenting" ) )
685 {
688 return;
689 }
690
692 {
694 }
695}
696
698{
699 if( m_layerItems.empty() )
700 return;
701
702 const NETINFO_LIST& nets = m_board->GetNetInfo();
703
704 for( const NETINFO_ITEM* net : nets )
705 {
706 std::vector<BOARD_ITEM*>& vec = m_layerItems[net->GetNetCode()];
707
708 std::stable_sort( vec.begin(), vec.end(),
709 []( BOARD_ITEM* a, BOARD_ITEM* b )
710 {
711 if( a->GetParentFootprint() == b->GetParentFootprint() )
712 return a->Type() < b->Type();
713
714 return a->GetParentFootprint() < b->GetParentFootprint();
715 } );
716
717 if( vec.empty() )
718 continue;
719
720 m_featuresMgr->InitFeatureList( m_layerID, vec );
721 }
722}
723
724
726 const EDA_DATA::PACKAGE& aPkg )
727{
728 if( m_matrixLayerName == "COMP_+_BOT" )
729 {
730 if( !m_compBot.has_value() )
731 {
732 m_compBot.emplace();
733 }
734 return m_compBot.value().AddComponent( aFp, aPkg );
735 }
736 else
737 {
738 if( !m_compTop.has_value() )
739 {
740 m_compTop.emplace();
741 }
742
743 return m_compTop.value().AddComponent( aFp, aPkg );
744 }
745}
746
747
749{
750 std::map<ODB_DRILL_SPAN, std::vector<BOARD_ITEM*>>& drill_layers =
751 m_plugin->GetDrillLayerItemsMap();
752
753 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& slot_holes =
754 m_plugin->GetSlotHolesMap();
755
756 std::map<ODB_DRILL_SPAN, wxString>& span_names = m_plugin->GetDrillSpanNameMap();
757
758 if( !m_layerItems.empty() )
759 {
760 m_layerItems.clear();
761 }
762
764
765 std::optional<ODB_DRILL_SPAN> matchedSpan;
766
767 for( const auto& [span, name] : span_names )
768 {
769 if( name == m_matrixLayerName )
770 {
771 matchedSpan = span;
772 break;
773 }
774 }
775
776 bool useLegacyMatching = !matchedSpan.has_value();
777 bool isBackdrillLayer = matchedSpan.has_value() && matchedSpan->m_IsBackdrill;
778 bool isNonPlatedLayer = matchedSpan.has_value() && matchedSpan->m_IsNonPlated;
779 bool isNPTHLayer = matchedSpan.has_value() && matchedSpan->m_IsNonPlated
780 && !matchedSpan->m_IsBackdrill;
781
782 if( matchedSpan.has_value() && isNPTHLayer )
783 {
784 auto slotIt = slot_holes.find( matchedSpan->Pair() );
785
786 if( slotIt != slot_holes.end() )
787 {
788 for( BOARD_ITEM* item : slotIt->second )
789 {
790 if( item->Type() != PCB_PAD_T )
791 continue;
792
793 PAD* pad = static_cast<PAD*>( item );
794
795 if( pad->GetAttribute() == PAD_ATTRIB::PTH )
796 continue;
797
798 m_tools.value().AddDrillTools( wxT( "NON_PLATED" ),
800 std::min( pad->GetDrillSizeX(),
801 pad->GetDrillSizeY() ) ) );
802
803 m_layerItems[pad->GetNetCode()].push_back( item );
804 }
805 }
806 }
807 else if( useLegacyMatching )
808 {
809 bool is_npth_layer = false;
810 wxString plated_name = wxT( "plated" );
811
812 if( m_matrixLayerName.Contains( wxT( "non-plated" ) ) )
813 {
814 is_npth_layer = true;
815 plated_name = wxT( "non-plated" );
816 }
817
818 for( const auto& [layer_pair, vec] : slot_holes )
819 {
820 wxString dLayerName = wxString::Format( wxT( "drill_%s_%s-%s" ), plated_name,
821 m_board->GetLayerName( layer_pair.first ),
822 m_board->GetLayerName( layer_pair.second ) );
823
824 if( ODB::GenLegalEntityName( dLayerName ) == m_matrixLayerName )
825 {
826 for( BOARD_ITEM* item : vec )
827 {
828 if( item->Type() != PCB_PAD_T )
829 continue;
830
831 PAD* pad = static_cast<PAD*>( item );
832
833 if( ( is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::PTH )
834 || ( !is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::NPTH ) )
835 {
836 continue;
837 }
838
839 m_tools.value().AddDrillTools(
840 pad->GetAttribute() == PAD_ATTRIB::PTH ? wxT( "PLATED" )
841 : wxT( "NON_PLATED" ),
843 std::min( pad->GetDrillSizeX(), pad->GetDrillSizeY() ) ) );
844
845 m_layerItems[pad->GetNetCode()].push_back( item );
846 }
847
848 break;
849 }
850 }
851 }
852
853 if( matchedSpan.has_value() )
854 {
855 auto drillIt = drill_layers.find( *matchedSpan );
856
857 if( drillIt != drill_layers.end() )
858 {
859 for( BOARD_ITEM* item : drillIt->second )
860 {
861 if( item->Type() == PCB_VIA_T )
862 {
863 PCB_VIA* via = static_cast<PCB_VIA*>( item );
864
865 if( isBackdrillLayer )
866 {
867 auto drillMatches = [&]( const PADSTACK::DRILL_PROPS& aDrill )
868 {
869 return aDrill.start == matchedSpan->m_StartLayer
870 && aDrill.end == matchedSpan->m_EndLayer
871 && ( aDrill.size.x > 0 || aDrill.size.y > 0 );
872 };
873
874 const PADSTACK::DRILL_PROPS& secondary = via->Padstack().SecondaryDrill();
875 const PADSTACK::DRILL_PROPS& tertiary = via->Padstack().TertiaryDrill();
876
877 const PADSTACK::DRILL_PROPS* drill = nullptr;
878
879 if( drillMatches( secondary ) )
880 drill = &secondary;
881 else if( drillMatches( tertiary ) )
882 drill = &tertiary;
883 else
884 continue;
885
886 int diameter = drill->size.x;
887
888 if( drill->size.y > 0 )
889 {
890 diameter = ( diameter > 0 ) ? std::min( diameter, drill->size.y )
891 : drill->size.y;
892 }
893
894 if( diameter <= 0 )
895 continue;
896
897 m_tools.value().AddDrillTools( wxT( "NON_PLATED" ),
898 ODB::SymDouble2String( diameter ),
899 wxT( "BLIND" ) );
900 }
901 else if( isNonPlatedLayer )
902 {
903 m_tools.value().AddDrillTools( wxT( "NON_PLATED" ),
904 ODB::SymDouble2String( via->GetDrillValue() ) );
905 }
906 else
907 {
908 m_tools.value().AddDrillTools( wxT( "VIA" ),
909 ODB::SymDouble2String( via->GetDrillValue() ) );
910 }
911
912 m_layerItems[via->GetNetCode()].push_back( item );
913 }
914 else if( item->Type() == PCB_PAD_T )
915 {
916 PAD* pad = static_cast<PAD*>( item );
917
918 bool padIsNPTH = pad->GetAttribute() == PAD_ATTRIB::NPTH;
919
920 if( isNPTHLayer && !padIsNPTH )
921 continue;
922
923 if( !isNonPlatedLayer && padIsNPTH )
924 continue;
925
926 int drillSize = pad->GetDrillSizeX();
927
928 if( pad->GetDrillSizeX() != pad->GetDrillSizeY() )
929 drillSize = std::min( pad->GetDrillSizeX(), pad->GetDrillSizeY() );
930
931 wxString typeLabel = ( padIsNPTH || isNonPlatedLayer ) ? wxT( "NON_PLATED" )
932 : wxT( "PLATED" );
933 wxString type2 = isBackdrillLayer ? wxT( "BLIND" ) : wxT( "STANDARD" );
934
935 m_tools.value().AddDrillTools( typeLabel, ODB::SymDouble2String( drillSize ),
936 type2 );
937
938 m_layerItems[pad->GetNetCode()].push_back( item );
939 }
940 }
941 }
942 }
943 else
944 {
945 bool is_npth_layer = false;
946 wxString plated_name = wxT( "plated" );
947
948 if( m_matrixLayerName.Contains( wxT( "non-plated" ) ) )
949 {
950 is_npth_layer = true;
951 plated_name = wxT( "non-plated" );
952 }
953
954 for( const auto& [span, vec] : drill_layers )
955 {
956 wxString dLayerName = wxString::Format( wxT( "drill_%s_%s-%s" ), plated_name,
957 m_board->GetLayerName( span.TopLayer() ),
958 m_board->GetLayerName( span.BottomLayer() ) );
959
960 if( ODB::GenLegalEntityName( dLayerName ) == m_matrixLayerName )
961 {
962 for( BOARD_ITEM* item : vec )
963 {
964 if( item->Type() == PCB_VIA_T && !is_npth_layer )
965 {
966 PCB_VIA* via = static_cast<PCB_VIA*>( item );
967
968 m_tools.value().AddDrillTools( wxT( "VIA" ),
969 ODB::SymDouble2String( via->GetDrillValue() ) );
970
971 m_layerItems[via->GetNetCode()].push_back( item );
972 }
973 else if( item->Type() == PCB_PAD_T )
974 {
975 PAD* pad = static_cast<PAD*>( item );
976
977 if( ( is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::PTH )
978 || ( !is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::NPTH ) )
979 {
980 continue;
981 }
982
983 m_tools.value().AddDrillTools(
984 pad->GetAttribute() == PAD_ATTRIB::PTH ? wxT( "PLATED" )
985 : wxT( "NON_PLATED" ),
986 ODB::SymDouble2String( pad->GetDrillSizeX() ) );
987
988 m_layerItems[pad->GetNetCode()].push_back( item );
989 }
990 }
991
992 break;
993 }
994 }
995 }
996}
997
999{
1000 auto& auxilliary_layers = m_plugin->GetAuxilliaryLayerItemsMap();
1001
1002 if( !m_layerItems.empty() )
1003 {
1004 m_layerItems.clear();
1005 }
1006
1007 for( const auto& [layer_pair, vec] : auxilliary_layers )
1008 {
1009 wxString featureName = "";
1010 switch( std::get<0>( layer_pair ) )
1011 {
1012 case ODB_AUX_LAYER_TYPE::TENTING: featureName = "tenting"; break;
1013 case ODB_AUX_LAYER_TYPE::COVERING: featureName = "covering"; break;
1014 case ODB_AUX_LAYER_TYPE::PLUGGING: featureName = "plugging"; break;
1015 case ODB_AUX_LAYER_TYPE::FILLING: featureName = "filling"; break;
1016 case ODB_AUX_LAYER_TYPE::CAPPING: featureName = "capping"; break;
1017 default: return;
1018 }
1019
1020 wxString dLayerName;
1021
1022 if( std::get<2>( layer_pair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
1023 {
1024 dLayerName = wxString::Format( "%s_%s-%s", featureName,
1025 m_board->GetLayerName( std::get<1>( layer_pair ) ),
1026 m_board->GetLayerName( std::get<2>( layer_pair ) ) );
1027 }
1028 else
1029 {
1030 if( m_board->IsFrontLayer( std::get<1>( layer_pair ) ) )
1031 dLayerName = wxString::Format( "%s_front", featureName );
1032 else if( m_board->IsBackLayer( std::get<1>( layer_pair ) ) )
1033 dLayerName = wxString::Format( "%s_back", featureName );
1034 else
1035 return;
1036 }
1037
1038 if( ODB::GenLegalEntityName( dLayerName ) == m_matrixLayerName )
1039 {
1040 for( BOARD_ITEM* item : vec )
1041 {
1042 if( item->Type() == PCB_VIA_T )
1043 {
1044 PCB_VIA* via = static_cast<PCB_VIA*>( item );
1045
1046 m_layerItems[via->GetNetCode()].push_back( item );
1047 }
1048 }
1049
1050 break;
1051 }
1052 }
1053}
1054
1056{
1058
1059 InitEdaData();
1060
1061 // Init Layer Entity Data
1062 for( const auto& [layerName, layer_entity_ptr] : m_layerEntityMap )
1063 {
1064 layer_entity_ptr->InitEntityData();
1065 }
1066}
1067
1068
1070{
1071 GenAttrList( writer );
1072
1073 GenFeatures( writer );
1074
1075 if( m_compTop.has_value() || m_compBot.has_value() )
1076 {
1077 GenComponents( writer );
1078 }
1079
1080 if( m_tools.has_value() )
1081 {
1082 GenTools( writer );
1083 }
1084}
1085
1086
1088{
1089 auto fileproxy = writer.CreateFileProxy( "components" );
1090
1091 if( m_compTop.has_value() )
1092 {
1093 m_compTop->Write( fileproxy.GetStream() );
1094 }
1095 else if( m_compBot.has_value() )
1096 {
1097 m_compBot->Write( fileproxy.GetStream() );
1098 }
1099}
1100
1101
1103{
1104 auto fileproxy = writer.CreateFileProxy( "features" );
1105
1106 m_featuresMgr->GenerateFeatureFile( fileproxy.GetStream() );
1107}
1108
1109
1111{
1112 auto fileproxy = writer.CreateFileProxy( "attrlist" );
1113
1114 std::ostream& ost = fileproxy.GetStream();
1115
1116 BOARD_DESIGN_SETTINGS& dsnSettings = m_board->GetDesignSettings();
1117 BOARD_STACKUP& stackup = dsnSettings.GetStackupDescriptor();
1118
1119 BOARD_STACKUP_ITEM* stackupItem = nullptr;
1120
1122 {
1123 for( BOARD_STACKUP_ITEM* item : stackup.GetList() )
1124 {
1125 if( item->GetBrdLayerId() == m_layerID )
1126 {
1127 stackupItem = item;
1128 break;
1129 }
1130 }
1131 }
1132 else
1133 {
1134 for( BOARD_STACKUP_ITEM* item : stackup.GetList() )
1135 {
1136 if( item->GetType() == BS_ITEM_TYPE_DIELECTRIC )
1137 {
1138 wxString dielectricName = wxString::Format( "DIELECTRIC_%d",
1139 item->GetDielectricLayerId() );
1140
1141 if( ODB::GenLegalEntityName( dielectricName ) == m_matrixLayerName )
1142 {
1143 stackupItem = item;
1144 break;
1145 }
1146 }
1147 }
1148 }
1149
1150 if( stackupItem )
1151 {
1152 int thickness = stackupItem->GetThickness();
1153
1154 if( thickness > 0 )
1155 {
1156 double thicknessOut = PCB_IO_ODBPP::m_scale * thickness;
1157 ost << ".layer_dielectric=" << ODB::Double2String( thicknessOut ) << std::endl;
1158 }
1159
1160 if( stackupItem->GetType() == BS_ITEM_TYPE_COPPER )
1161 {
1162 double copperThicknessMM = static_cast<double>( thickness ) / pcbIUScale.mmToIU( 1.0 );
1163 double thicknessOz = copperThicknessMM / 0.035;
1164 ost << ".copper_weight=" << ODB::Double2String( thicknessOz ) << std::endl;
1165 }
1166
1167 if( stackupItem->HasEpsilonRValue() )
1168 {
1169 double epsilonR = stackupItem->GetEpsilonR();
1170
1171 if( epsilonR > 0.0 )
1172 {
1173 ost << ".dielectric_constant=" << ODB::Double2String( epsilonR ) << std::endl;
1174 }
1175 }
1176
1177 if( stackupItem->HasLossTangentValue() )
1178 {
1179 double lossTangent = stackupItem->GetLossTangent();
1180
1181 if( lossTangent > 0.0 )
1182 {
1183 ost << ".loss_tangent=" << ODB::Double2String( lossTangent ) << std::endl;
1184 }
1185 }
1186
1187 wxString material = stackupItem->GetMaterial();
1188
1189 if( !material.IsEmpty() )
1190 {
1191 ost << ".material=" << ODB::GenLegalEntityName( material ).ToStdString() << std::endl;
1192 }
1193 }
1194}
1195
1196
1198{
1199 auto fileproxy = writer.CreateFileProxy( "tools" );
1200
1201 m_tools.value().GenerateFile( fileproxy.GetStream() );
1202}
1203
1204
1206{
1207 //InitPackage
1208 for( const FOOTPRINT* fp : m_board->Footprints() )
1209 {
1210 m_edaData.AddPackage( fp );
1211 }
1212
1213 // for NET
1214 const NETINFO_LIST& nets = m_board->GetNetInfo();
1215
1216 for( const NETINFO_ITEM* net : nets )
1217 {
1218 m_edaData.AddNET( net );
1219 }
1220
1221 // for CMP
1222 size_t j = 0;
1223
1224 for( const FOOTPRINT* fp : m_board->Footprints() )
1225 {
1226 wxString compName = ODB::GenLegalEntityName( "COMP_+_TOP" );
1227 if( fp->IsFlipped() )
1228 compName = ODB::GenLegalEntityName( "COMP_+_BOT" );
1229
1230 auto iter = m_layerEntityMap.find( compName );
1231
1232 if( iter == m_layerEntityMap.end() )
1233 {
1234 wxLogError( _( "Failed to add component data" ) );
1235 return;
1236 }
1237
1238 // ODBPP only need unique PACKAGE in PKG record in eda/data file.
1239 // the PKG index can repeat to be ref in CMP record in component file.
1240 std::shared_ptr<FOOTPRINT> fp_pkg = m_edaData.GetEdaFootprints().at( j );
1241 ++j;
1242
1243 const EDA_DATA::PACKAGE& eda_pkg =
1244 m_edaData.GetPackage( hash_fp_item( fp_pkg.get(), HASH_POS | REL_COORD ) );
1245
1246 if( fp->Pads().empty() )
1247 continue;
1248
1249 ODB_COMPONENT& comp = iter->second->InitComponentData( fp, eda_pkg );
1250
1251 for( int i = 0; i < (int) fp->Pads().size(); ++i )
1252 {
1253 PAD* pad = fp->Pads()[i];
1254 auto& eda_net = m_edaData.GetNet( pad->GetNetCode() );
1255
1256 auto& subnet = eda_net.AddSubnet<EDA_DATA::SUB_NET_TOEPRINT>(
1257 &m_edaData,
1260 comp.m_index, comp.m_toeprints.size() );
1261
1262 m_plugin->GetPadSubnetMap().emplace( pad, &subnet );
1263
1264 const std::shared_ptr<EDA_DATA::PIN> pin = eda_pkg.GetEdaPkgPin( i );
1265 const EDA_DATA::PIN& pin_ref = *pin;
1266 auto& toep = comp.m_toeprints.emplace_back( pin_ref );
1267
1268 toep.m_net_num = eda_net.m_index;
1269 toep.m_subnet_num = subnet.m_index;
1270
1271 toep.m_center = ODB::AddXY( pad->GetPosition() );
1272
1273 toep.m_rot = ODB::Double2String(
1274 ( ANGLE_360 - pad->GetOrientation() ).Normalize().AsDegrees() );
1275
1276 if( pad->IsFlipped() )
1277 toep.m_mirror = wxT( "M" );
1278 else
1279 toep.m_mirror = wxT( "N" );
1280 }
1281 }
1282
1283 for( PCB_TRACK* track : m_board->Tracks() )
1284 {
1285 auto& eda_net = m_edaData.GetNet( track->GetNetCode() );
1286 EDA_DATA::SUB_NET* subnet = nullptr;
1287
1288 if( track->Type() == PCB_VIA_T )
1289 subnet = &( eda_net.AddSubnet<EDA_DATA::SUB_NET_VIA>( &m_edaData ) );
1290 else
1291 subnet = &( eda_net.AddSubnet<EDA_DATA::SUB_NET_TRACE>( &m_edaData ) );
1292
1293 m_plugin->GetViaTraceSubnetMap().emplace( track, subnet );
1294 }
1295
1296 for( ZONE* zone : m_board->Zones() )
1297 {
1298 for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
1299 {
1300 auto& eda_net = m_edaData.GetNet( zone->GetNetCode() );
1301 auto& subnet = eda_net.AddSubnet<EDA_DATA::SUB_NET_PLANE>( &m_edaData,
1304 0 );
1305 m_plugin->GetPlaneSubnetMap().emplace( std::piecewise_construct,
1306 std::forward_as_tuple( layer, zone ),
1307 std::forward_as_tuple( &subnet ) );
1308 }
1309 }
1310}
1311
1312
1314{
1315 wxString step_root = writer.GetCurrentPath();
1316
1317 writer.CreateEntityDirectory( step_root, "layers" );
1318 GenerateLayerFiles( writer );
1319
1320 writer.CreateEntityDirectory( step_root, "eda" );
1321 GenerateEdaFiles( writer );
1322
1323 writer.CreateEntityDirectory( step_root, "netlists/cadnet" );
1324 GenerateNetlistsFiles( writer );
1325
1326 writer.SetCurrentPath( step_root );
1327 GenerateProfileFile( writer );
1328
1329 GenerateStepHeaderFile( writer );
1330
1331 //TODO: system attributes
1332 // GenerateAttrListFile( writer );
1333}
1334
1335
1337{
1338 auto fileproxy = writer.CreateFileProxy( "profile" );
1339
1340 m_profile = std::make_unique<FEATURES_MANAGER>( m_board, m_plugin, wxEmptyString );
1341
1342 SHAPE_POLY_SET board_outline;
1343
1344 if( !m_board->GetBoardPolygonOutlines( board_outline, true ) )
1345 {
1346 wxLogError( "Failed to get board outline" );
1347 }
1348
1349 if( !m_profile->AddContour( board_outline, 0 ) )
1350 {
1351 wxLogError( "Failed to add polygon to profile" );
1352 }
1353
1354 m_profile->GenerateProfileFeatures( fileproxy.GetStream() );
1355}
1356
1357
1359{
1360 auto fileproxy = writer.CreateFileProxy( "stephdr" );
1361
1362 m_stephdr = {
1364 { "X_DATUM", "0" },
1365 { "Y_DATUM", "0" },
1366 { "X_ORIGIN", "0" },
1367 { "Y_ORIGIN", "0" },
1368 { "TOP_ACTIVE", "0" },
1369 { "BOTTOM_ACTIVE", "0" },
1370 { "RIGHT_ACTIVE", "0" },
1371 { "LEFT_ACTIVE", "0" },
1372 { "AFFECTING_BOM", "" },
1373 { "AFFECTING_BOM_CHANGED", "0" },
1374 };
1375
1376 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
1377
1378 for( const auto& [key, value] : m_stephdr )
1379 {
1380 twriter.WriteEquationLine( key, value );
1381 }
1382}
1383
1384
1386{
1387 wxString layers_root = writer.GetCurrentPath();
1388
1389 for( auto& [layerName, layerEntity] : m_layerEntityMap )
1390 {
1391 writer.CreateEntityDirectory( layers_root, layerName );
1392
1393 layerEntity->GenerateFiles( writer );
1394 }
1395}
1396
1397
1399{
1400 auto fileproxy = writer.CreateFileProxy( "data" );
1401
1402 m_edaData.Write( fileproxy.GetStream() );
1403}
1404
1405
1407{
1408 auto fileproxy = writer.CreateFileProxy( "netlist" );
1409
1410 m_netlist.Write( fileproxy.GetStream() );
1411}
1412
1413
1415{
1416 try
1417 {
1418 writer.CreateEntityDirectory( writer.GetRootPath(), "steps" );
1420 return true;
1421 }
1422 catch( const std::exception& e )
1423 {
1424 std::cerr << e.what() << std::endl;
1425 return false;
1426 }
1427}
1428
1429
1431{
1432 LSET layers = m_board->GetEnabledLayers();
1433
1434 // To avoid the overhead of repeatedly cycling through the layers and nets,
1435 // we pre-sort the board items into a map of layer -> net -> items
1436 std::map<PCB_LAYER_ID, std::map<int, std::vector<BOARD_ITEM*>>>& elements = m_plugin->GetLayerElementsMap();
1437
1438 std::for_each( m_board->Tracks().begin(), m_board->Tracks().end(),
1439 [&layers, &elements]( PCB_TRACK* aTrack )
1440 {
1441 if( aTrack->Type() == PCB_VIA_T )
1442 {
1443 PCB_VIA* via = static_cast<PCB_VIA*>( aTrack );
1444
1445 for( PCB_LAYER_ID layer : layers )
1446 {
1447 if( via->FlashLayer( layer ) )
1448 elements[layer][via->GetNetCode()].push_back( via );
1449 }
1450 }
1451 else
1452 {
1453 elements[aTrack->GetLayer()][aTrack->GetNetCode()].push_back( aTrack );
1454 }
1455 } );
1456
1457 std::for_each( m_board->Zones().begin(), m_board->Zones().end(),
1458 [&elements]( ZONE* zone )
1459 {
1460 for( PCB_LAYER_ID layer : zone->GetLayerSet() )
1461 elements[layer][zone->GetNetCode()].push_back( zone );
1462 } );
1463
1464 for( BOARD_ITEM* item : m_board->Drawings() )
1465 {
1466 if( BOARD_CONNECTED_ITEM* conn_it = dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
1467 elements[conn_it->GetLayer()][conn_it->GetNetCode()].push_back( conn_it );
1468 else
1469 elements[item->GetLayer()][0].push_back( item );
1470 }
1471
1472 for( FOOTPRINT* fp : m_board->Footprints() )
1473 {
1474 for( PCB_FIELD* field : fp->GetFields() )
1475 elements[field->GetLayer()][0].push_back( field );
1476
1477 for( BOARD_ITEM* item : fp->GraphicalItems() )
1478 elements[item->GetLayer()][0].push_back( item );
1479
1480 for( PAD* pad : fp->Pads() )
1481 {
1482 VECTOR2I margin;
1483
1484 for( PCB_LAYER_ID layer : pad->GetLayerSet() )
1485 {
1486 bool onCopperLayer = LSET::AllCuMask().test( layer );
1487 bool onSolderMaskLayer = LSET( { F_Mask, B_Mask } ).test( layer );
1488 bool onSolderPasteLayer = LSET( { F_Paste, B_Paste } ).test( layer );
1489
1490 if( onSolderMaskLayer )
1491 margin.x = margin.y = pad->GetSolderMaskExpansion( PADSTACK::ALL_LAYERS );
1492
1493 if( onSolderPasteLayer )
1494 margin = pad->GetSolderPasteMargin( PADSTACK::ALL_LAYERS );
1495
1496 VECTOR2I padPlotsSize = pad->GetSize( PADSTACK::ALL_LAYERS ) + margin * 2;
1497
1498 if( onCopperLayer && !pad->IsOnCopperLayer() )
1499 continue;
1500
1501 if( onCopperLayer && !pad->FlashLayer( layer ) )
1502 continue;
1503
1504 if( pad->GetShape( PADSTACK::ALL_LAYERS ) != PAD_SHAPE::CUSTOM
1505 && ( padPlotsSize.x <= 0 || padPlotsSize.y <= 0 ) )
1506 {
1507 continue;
1508 }
1509
1510 elements[layer][pad->GetNetCode()].push_back( pad );
1511 }
1512 }
1513 }
1514
1515 for( const auto& [layerID, layerName] : m_plugin->GetLayerNameList() )
1516 {
1517 std::shared_ptr<ODB_LAYER_ENTITY> layer_entity_ptr = std::make_shared<ODB_LAYER_ENTITY>(
1518 m_board, m_plugin, elements[layerID], layerID, layerName );
1519
1520 m_layerEntityMap.emplace( layerName, layer_entity_ptr );
1521 }
1522}
const char * name
constexpr EDA_IU_SCALE pcbIUScale
Definition base_units.h:125
@ BS_ITEM_TYPE_COPPER
@ BS_ITEM_TYPE_DIELECTRIC
wxString GetBuildVersion()
Get the full KiCad version string.
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
Container for design settings for a BOARD object.
BOARD_STACKUP & GetStackupDescriptor()
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition board_item.h:84
Manage one layer needed to make a physical board.
wxString GetTypeName() const
int GetSublayersCount() const
double GetEpsilonR(int aDielectricSubLayer=0) const
bool HasEpsilonRValue() const
wxString GetLayerName() const
bool HasLossTangentValue() const
PCB_LAYER_ID GetBrdLayerId() const
int GetThickness(int aDielectricSubLayer=0) const
BOARD_STACKUP_ITEM_TYPE GetType() const
wxString GetMaterial(int aDielectricSubLayer=0) const
int GetDielectricLayerId() const
double GetLossTangent(int aDielectricSubLayer=0) const
Manage layers needed to make a physical board.
const std::vector< BOARD_STACKUP_ITEM * > & GetList() const
int GetCount() const
bool SynchronizeWithBoard(BOARD_DESIGN_SETTINGS *aSettings)
Synchronize the BOARD_STACKUP_ITEM* list with the board.
Information pertinent to a Pcbnew printed circuit board.
Definition board.h:323
const std::shared_ptr< PIN > GetEdaPkgPin(size_t aPadIndex) const
KICAD_T Type() const
Returns the type of object.
Definition eda_item.h:112
LSET is a set of PCB_LAYER_IDs.
Definition lset.h:37
static const LSET & AllCuMask()
return AllCuMask( MAX_CU_LAYERS );
Definition lset.cpp:608
Handle the data for a net.
Definition netinfo.h:50
Container for NETINFO_ITEM elements, which are the nets.
Definition netinfo.h:193
virtual std::string GetEntityName()=0
virtual bool CreateDirectoryTree(ODB_TREE_WRITER &writer)
BOARD * m_board
Definition odb_entity.h:59
PCB_IO_ODBPP * m_plugin
Definition odb_entity.h:61
ODB_ENTITY_BASE(BOARD *aBoard, PCB_IO_ODBPP *aPlugin)
Definition odb_entity.h:45
std::ostream & GetStream()
Definition odb_util.h:236
void GenFeatures(ODB_TREE_WRITER &writer)
PCB_LAYER_ID m_layerID
Definition odb_entity.h:209
void GenComponents(ODB_TREE_WRITER &writer)
wxString m_matrixLayerName
Definition odb_entity.h:210
void InitAuxilliaryData()
std::optional< COMPONENTS_MANAGER > m_compTop
Definition odb_entity.h:213
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
std::optional< COMPONENTS_MANAGER > m_compBot
Definition odb_entity.h:214
std::optional< ODB_DRILL_TOOLS > m_tools
Definition odb_entity.h:212
void GenTools(ODB_TREE_WRITER &writer)
std::map< int, std::vector< BOARD_ITEM * > > m_layerItems
Definition odb_entity.h:208
ODB_LAYER_ENTITY(BOARD *aBoard, PCB_IO_ODBPP *aPlugin, std::map< int, std::vector< BOARD_ITEM * > > &aMap, const PCB_LAYER_ID &aLayerID, const wxString &aLayerName)
ODB_COMPONENT & InitComponentData(const FOOTPRINT *aFp, const EDA_DATA::PACKAGE &aPkg)
virtual void InitEntityData() override
void GenAttrList(ODB_TREE_WRITER &writer)
std::unique_ptr< FEATURES_MANAGER > m_featuresMgr
Definition odb_entity.h:215
void AddStep(const wxString &aStepName)
unsigned int m_col
Definition odb_entity.h:114
std::vector< MATRIX_LAYER > m_matrixLayers
Definition odb_entity.h:112
void AddMatrixLayerField(MATRIX_LAYER &aMLayer, PCB_LAYER_ID aLayer)
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
std::map< wxString, unsigned int > m_matrixSteps
Definition odb_entity.h:111
unsigned int m_row
Definition odb_entity.h:113
void AddAuxilliaryMatrixLayer()
void EnsureUniqueLayerNames()
virtual void InitEntityData() override
void AddCOMPMatrixLayer(PCB_LAYER_ID aCompSide)
std::vector< std::pair< wxString, wxString > > m_info
Definition odb_entity.h:131
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
virtual std::string GetEntityName() override
Definition odb_entity.h:147
std::unordered_map< wxString, wxString > m_stephdr
Definition odb_entity.h:174
void GenerateProfileFile(ODB_TREE_WRITER &writer)
EDA_DATA m_edaData
Definition odb_entity.h:173
void GenerateStepHeaderFile(ODB_TREE_WRITER &writer)
void GenerateEdaFiles(ODB_TREE_WRITER &writer)
virtual void InitEntityData() override
void GenerateLayerFiles(ODB_TREE_WRITER &writer)
std::map< wxString, std::shared_ptr< ODB_LAYER_ENTITY > > m_layerEntityMap
Definition odb_entity.h:170
ODB_NET_LIST m_netlist
Definition odb_entity.h:175
std::unique_ptr< FEATURES_MANAGER > m_profile
Definition odb_entity.h:171
virtual bool CreateDirectoryTree(ODB_TREE_WRITER &writer) override
void GenerateNetlistsFiles(ODB_TREE_WRITER &writer)
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
void WriteEquationLine(const std::string &var, int value)
Definition odb_util.cpp:306
ARRAY_PROXY MakeArrayProxy(const std::string &aStr)
Definition odb_util.h:314
void write_line_enum(const std::string &var, const T &value)
Definition odb_util.h:288
const wxString GetRootPath() const
Definition odb_util.h:269
void CreateEntityDirectory(const wxString &aPareDir, const wxString &aSubDir=wxEmptyString)
Definition odb_util.cpp:230
ODB_FILE_WRITER CreateFileProxy(const wxString &aFileName)
Definition odb_util.h:256
void SetCurrentPath(const wxString &aDir)
Definition odb_util.h:265
const wxString GetCurrentPath() const
Definition odb_util.h:263
static constexpr PCB_LAYER_ID ALL_LAYERS
! Temporary layer identifier to identify code that is not padstack-aware
Definition padstack.h:177
Definition pad.h:55
static std::string m_unitsStr
static double m_scale
Represent a set of closed polygons.
Handle a list of polygons defining a copper zone.
Definition zone.h:74
#define _(s)
static constexpr EDA_ANGLE ANGLE_360
Definition eda_angle.h:417
size_t hash_fp_item(const EDA_ITEM *aItem, int aFlags)
Calculate hash of an EDA_ITEM.
Definition hash_eda.cpp:58
Hashing functions for EDA_ITEMs.
@ HASH_POS
Definition hash_eda.h:47
@ REL_COORD
Use coordinates relative to the parent object.
Definition hash_eda.h:50
bool IsCopperLayer(int aLayerId)
Test whether a layer is a copper layer.
Definition layer_ids.h:679
PCB_LAYER_ID
A quick note on layer IDs:
Definition layer_ids.h:60
@ User_16
Definition layer_ids.h:139
@ User_29
Definition layer_ids.h:152
@ User_40
Definition layer_ids.h:163
@ User_15
Definition layer_ids.h:138
@ User_8
Definition layer_ids.h:131
@ F_CrtYd
Definition layer_ids.h:116
@ User_11
Definition layer_ids.h:134
@ User_25
Definition layer_ids.h:148
@ User_34
Definition layer_ids.h:157
@ User_45
Definition layer_ids.h:168
@ B_Adhes
Definition layer_ids.h:103
@ User_36
Definition layer_ids.h:159
@ Edge_Cuts
Definition layer_ids.h:112
@ Dwgs_User
Definition layer_ids.h:107
@ F_Paste
Definition layer_ids.h:104
@ Cmts_User
Definition layer_ids.h:108
@ User_6
Definition layer_ids.h:129
@ User_7
Definition layer_ids.h:130
@ User_19
Definition layer_ids.h:142
@ User_23
Definition layer_ids.h:146
@ F_Adhes
Definition layer_ids.h:102
@ User_41
Definition layer_ids.h:164
@ B_Mask
Definition layer_ids.h:98
@ B_Cu
Definition layer_ids.h:65
@ User_14
Definition layer_ids.h:137
@ User_39
Definition layer_ids.h:162
@ User_5
Definition layer_ids.h:128
@ User_20
Definition layer_ids.h:143
@ Eco1_User
Definition layer_ids.h:109
@ F_Mask
Definition layer_ids.h:97
@ User_42
Definition layer_ids.h:165
@ User_43
Definition layer_ids.h:166
@ B_Paste
Definition layer_ids.h:105
@ User_10
Definition layer_ids.h:133
@ User_9
Definition layer_ids.h:132
@ User_27
Definition layer_ids.h:150
@ User_28
Definition layer_ids.h:151
@ F_Fab
Definition layer_ids.h:119
@ Margin
Definition layer_ids.h:113
@ F_SilkS
Definition layer_ids.h:100
@ B_CrtYd
Definition layer_ids.h:115
@ UNDEFINED_LAYER
Definition layer_ids.h:61
@ Eco2_User
Definition layer_ids.h:110
@ User_35
Definition layer_ids.h:158
@ User_31
Definition layer_ids.h:154
@ User_3
Definition layer_ids.h:126
@ User_1
Definition layer_ids.h:124
@ User_12
Definition layer_ids.h:135
@ B_SilkS
Definition layer_ids.h:101
@ User_30
Definition layer_ids.h:153
@ User_37
Definition layer_ids.h:160
@ User_22
Definition layer_ids.h:145
@ User_38
Definition layer_ids.h:161
@ User_4
Definition layer_ids.h:127
@ User_21
Definition layer_ids.h:144
@ User_24
Definition layer_ids.h:147
@ User_13
Definition layer_ids.h:136
@ User_2
Definition layer_ids.h:125
@ User_17
Definition layer_ids.h:140
@ User_33
Definition layer_ids.h:156
@ User_26
Definition layer_ids.h:149
@ User_32
Definition layer_ids.h:155
@ User_18
Definition layer_ids.h:141
@ User_44
Definition layer_ids.h:167
@ F_Cu
Definition layer_ids.h:64
@ B_Fab
Definition layer_ids.h:118
bool IsValidLayer(int aLayerId)
Test whether a given integer is a valid layer index, i.e.
Definition layer_ids.h:657
std::pair< wxString, wxString > AddXY(const VECTOR2I &aVec)
Definition odb_util.cpp:191
wxString GenLegalEntityName(const wxString &aStr)
Definition odb_util.cpp:106
wxString Double2String(double aVal)
Definition odb_util.cpp:151
wxString SymDouble2String(double aVal)
Definition odb_util.cpp:179
#define ODB_JOB_NAME
Definition odb_defines.h:27
#define ODB_UNITS
Definition odb_defines.h:28
@ UNDEFINED
Definition odb_util.h:35
@ COMPONENT
Definition odb_util.h:47
@ SOLDER_PASTE
Definition odb_util.h:42
@ SILK_SCREEN
Definition odb_util.h:43
@ DOCUMENT
Definition odb_util.h:46
@ SOLDER_MASK
Definition odb_util.h:41
@ DIELECTRIC
Definition odb_util.h:39
@ NPTH
like PAD_PTH, but not plated mechanical use only, no connection allowed
Definition padstack.h:103
@ PTH
Plated through hole pad.
Definition padstack.h:98
see class PGM_BASE
#define KEY_CORE
std::optional< ODB_SUBTYPE > m_addType
Definition odb_entity.h:83
std::optional< ODB_DIELECTRIC_TYPE > m_diType
Definition odb_entity.h:84
std::optional< std::pair< wxString, wxString > > m_span
Definition odb_entity.h:82
! The properties of a padstack drill. Drill position is always the pad position (origin).
Definition padstack.h:266
VECTOR2I size
Drill diameter (x == y) or slot dimensions (x != y)
Definition padstack.h:267
KIBIS_COMPONENT * comp
KIBIS_PIN * pin
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition typeinfo.h:94
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition typeinfo.h:84
VECTOR2< int32_t > VECTOR2I
Definition vector2d.h:687