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odb_entity.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
5 * Author: SYSUEric <jzzhuang666@gmail.com>.
6 *
7 * This program is free software: you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation, either version 3 of the License, or (at your
10 * option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21
22#include <base_units.h>
24#include <build_version.h>
25#include <callback_gal.h>
29#include <font/font.h>
30#include <footprint.h>
31#include <hash_eda.h>
32#include <pad.h>
33#include <pcb_dimension.h>
34#include <pcb_shape.h>
35#include <pcb_text.h>
36#include <pcb_textbox.h>
37#include <pcb_track.h>
38#include <pcbnew_settings.h>
40#include <pgm_base.h>
41#include <progress_reporter.h>
43#include <wx_fstream_progress.h>
44
49
50#include <wx/log.h>
51#include <wx/numformatter.h>
52#include <wx/mstream.h>
53
54#include "odb_attribute.h"
55#include "odb_entity.h"
56#include "odb_defines.h"
57#include "odb_feature.h"
58#include "odb_util.h"
59#include "pcb_io_odbpp.h"
60
61
63{
64 try
65 {
67 return true;
68 }
69 catch( const std::exception& e )
70 {
71 std::cerr << e.what() << std::endl;
72 return false;
73 }
74}
75
76
78{
79 m_info = { { wxS( ODB_JOB_NAME ), wxS( "job" ) },
81 { wxS( "ODB_VERSION_MAJOR" ), wxS( "8" ) },
82 { wxS( "ODB_VERSION_MINOR" ), wxS( "1" ) },
83 { wxS( "ODB_SOURCE" ), wxS( "KiCad EDA" ) },
84 { wxS( "CREATION_DATE" ), wxDateTime::Now().Format( "%Y%m%d.%H%M%S" ) },
85 { wxS( "SAVE_DATE" ), wxDateTime::Now().Format( "%Y%m%d.%H%M%S" ) },
86 { wxS( "SAVE_APP" ), wxString::Format( wxS( "KiCad EDA %s" ), GetBuildVersion() ) } };
87}
88
89
91{
92 auto fileproxy = writer.CreateFileProxy( "info" );
93
94 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
95
96 for( auto& info : m_info )
97 {
98 twriter.WriteEquationLine( info.first, info.second );
99 }
100}
101
102
103void ODB_MATRIX_ENTITY::AddStep( const wxString& aStepName )
104{
105 m_matrixSteps.emplace( aStepName.Upper(), m_col++ );
106}
107
108
110{
111 AddStep( "PCB" );
112
114}
115
116
118{
120 BOARD_STACKUP& stackup = dsnSettings.GetStackupDescriptor();
121 stackup.SynchronizeWithBoard( &dsnSettings );
122
123 std::vector<BOARD_STACKUP_ITEM*> layers = stackup.GetList();
124 std::set<PCB_LAYER_ID> added_layers;
125
127
128 for( int i = 0; i < stackup.GetCount(); i++ )
129 {
130 BOARD_STACKUP_ITEM* stackup_item = layers.at( i );
131
132 for( int sublayer_id = 0; sublayer_id < stackup_item->GetSublayersCount(); sublayer_id++ )
133 {
134 wxString ly_name = stackup_item->GetLayerName();
135
136 if( ly_name.IsEmpty() )
137 {
138 if( IsValidLayer( stackup_item->GetBrdLayerId() ) )
139 ly_name = m_board->GetLayerName( stackup_item->GetBrdLayerId() );
140
141 if( ly_name.IsEmpty() && stackup_item->GetType() == BS_ITEM_TYPE_DIELECTRIC )
142 ly_name = wxString::Format( "DIELECTRIC_%d",
143 stackup_item->GetDielectricLayerId() );
144 }
145
146 MATRIX_LAYER matrix( m_row++, ly_name );
147
148 if( stackup_item->GetType() == BS_ITEM_TYPE_DIELECTRIC )
149 {
150 if( stackup_item->GetTypeName() == KEY_CORE )
151 matrix.m_diType.emplace( ODB_DIELECTRIC_TYPE::CORE );
152 else
153 matrix.m_diType.emplace( ODB_DIELECTRIC_TYPE::PREPREG );
154
155 matrix.m_type = ODB_TYPE::DIELECTRIC;
156 matrix.m_context = ODB_CONTEXT::BOARD;
157 matrix.m_polarity = ODB_POLARITY::POSITIVE;
158 m_matrixLayers.push_back( matrix );
159 m_plugin->GetLayerNameList().emplace_back(
160 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
161
162 continue;
163 }
164 else
165 {
166 added_layers.insert( stackup_item->GetBrdLayerId() );
167 AddMatrixLayerField( matrix, stackup_item->GetBrdLayerId() );
168 }
169 }
170 }
171
172 LSEQ layer_seq = m_board->GetEnabledLayers().Seq();
173
174 for( PCB_LAYER_ID layer : layer_seq )
175 {
176 if( added_layers.find( layer ) != added_layers.end() )
177 continue;
178
179 MATRIX_LAYER matrix( m_row++, m_board->GetLayerName( layer ) );
180 added_layers.insert( layer );
181 AddMatrixLayerField( matrix, layer );
182 }
183
185
187
189}
190
191
193{
194 aMLayer.m_polarity = ODB_POLARITY::POSITIVE;
195 aMLayer.m_context = ODB_CONTEXT::BOARD;
196 switch( aLayer )
197 {
198 case F_Paste:
199 case B_Paste: aMLayer.m_type = ODB_TYPE::SOLDER_PASTE; break;
200 case F_SilkS:
201 case B_SilkS: aMLayer.m_type = ODB_TYPE::SILK_SCREEN; break;
202 case F_Mask:
203 case B_Mask: aMLayer.m_type = ODB_TYPE::SOLDER_MASK; break;
204 case B_CrtYd:
205 case F_CrtYd:
206 case Edge_Cuts:
207 case B_Fab:
208 case F_Fab:
209 case F_Adhes:
210 case B_Adhes:
211 case Dwgs_User:
212 case Cmts_User:
213 case Eco1_User:
214 case Eco2_User:
215 case Margin:
216 case User_1:
217 case User_2:
218 case User_3:
219 case User_4:
220 case User_5:
221 case User_6:
222 case User_7:
223 case User_8:
224 case User_9:
225 case User_10:
226 case User_11:
227 case User_12:
228 case User_13:
229 case User_14:
230 case User_15:
231 case User_16:
232 case User_17:
233 case User_18:
234 case User_19:
235 case User_20:
236 case User_21:
237 case User_22:
238 case User_23:
239 case User_24:
240 case User_25:
241 case User_26:
242 case User_27:
243 case User_28:
244 case User_29:
245 case User_30:
246 case User_31:
247 case User_32:
248 case User_33:
249 case User_34:
250 case User_35:
251 case User_36:
252 case User_37:
253 case User_38:
254 case User_39:
255 case User_40:
256 case User_41:
257 case User_42:
258 case User_43:
259 case User_44:
260 case User_45:
261 aMLayer.m_context = ODB_CONTEXT::MISC;
262 aMLayer.m_type = ODB_TYPE::DOCUMENT;
263 break;
264
265 default:
266 if( IsCopperLayer( aLayer ) )
267 {
268 aMLayer.m_type = ODB_TYPE::SIGNAL;
269 }
270 else
271 {
272 // Do not handle other layers :
273 aMLayer.m_type = ODB_TYPE::UNDEFINED;
274 m_row--;
275 }
276
277 break;
278 }
279
280 if( aMLayer.m_type != ODB_TYPE::UNDEFINED )
281 {
282 m_matrixLayers.push_back( aMLayer );
283 m_plugin->GetLayerNameList().emplace_back( std::make_pair( aLayer, aMLayer.m_layerName ) );
284 }
285}
286
287
289{
290 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& drill_layers =
292
293 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& slot_holes =
295
296 bool has_pth_layer = false;
297 bool has_npth_layer = false;
298
299 for( BOARD_ITEM* item : m_board->Tracks() )
300 {
301 if( item->Type() == PCB_VIA_T )
302 {
303 PCB_VIA* via = static_cast<PCB_VIA*>( item );
304 drill_layers[std::make_pair( via->TopLayer(), via->BottomLayer() )].push_back( via );
305 }
306 }
307
308 for( FOOTPRINT* fp : m_board->Footprints() )
309 {
310 // std::shared_ptr<FOOTPRINT> fp( static_cast<FOOTPRINT*>( it_fp->Clone() ) );
311
312 if( fp->IsFlipped() )
313 {
314 m_hasBotComp = true;
315 }
316
317 for( PAD* pad : fp->Pads() )
318 {
319 if( !has_pth_layer && pad->GetAttribute() == PAD_ATTRIB::PTH )
320 has_pth_layer = true;
321 if( !has_npth_layer && pad->GetAttribute() == PAD_ATTRIB::NPTH )
322 has_npth_layer = true;
323
324 if( pad->HasHole() && pad->GetDrillSizeX() != pad->GetDrillSizeY() )
325 slot_holes[std::make_pair( F_Cu, B_Cu )].push_back( pad );
326 else if( pad->HasHole() )
327 drill_layers[std::make_pair( F_Cu, B_Cu )].push_back( pad );
328 }
329
330 // m_plugin->GetLoadedFootprintList().push_back( std::move( fp ) );
331 }
332
333 auto InitDrillMatrix =
334 [&]( const wxString& aHasPlated, std::pair<PCB_LAYER_ID, PCB_LAYER_ID> aLayerPair )
335 {
336 wxString dLayerName = wxString::Format( "drill_%s_%s-%s", aHasPlated,
337 m_board->GetLayerName( aLayerPair.first ),
338 m_board->GetLayerName( aLayerPair.second ) );
339 MATRIX_LAYER matrix( m_row++, dLayerName );
340
341 matrix.m_type = ODB_TYPE::DRILL;
342 matrix.m_context = ODB_CONTEXT::BOARD;
343 matrix.m_polarity = ODB_POLARITY::POSITIVE;
344 matrix.m_span.emplace( std::make_pair(
345 ODB::GenLegalEntityName( m_board->GetLayerName( aLayerPair.first ) ),
346 ODB::GenLegalEntityName( m_board->GetLayerName( aLayerPair.second ) ) ) );
347 m_matrixLayers.push_back( matrix );
348 m_plugin->GetLayerNameList().emplace_back(
349 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
350 };
351
352 if( has_npth_layer )
353 InitDrillMatrix( "non-plated", std::make_pair( F_Cu, B_Cu ) );
354 // at least one non plated hole is present.
355
356 if( has_pth_layer && drill_layers.find( std::make_pair( F_Cu, B_Cu ) ) == drill_layers.end() )
357 InitDrillMatrix( "plated", std::make_pair( F_Cu, B_Cu ) );
358 // there is no circular plated dril hole present.
359
360 for( const auto& [layer_pair, vec] : drill_layers )
361 {
362 InitDrillMatrix( "plated", layer_pair );
363 }
364}
365
366
368{
369 MATRIX_LAYER matrix( m_row++, "COMP_+_TOP" );
370 matrix.m_type = ODB_TYPE::COMPONENT;
371 matrix.m_context = ODB_CONTEXT::BOARD;
372
373 if( aCompSide == F_Cu )
374 {
375 m_matrixLayers.push_back( matrix );
376 m_plugin->GetLayerNameList().emplace_back(
377 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
378 }
379
380 if( aCompSide == B_Cu && m_hasBotComp )
381 {
382 matrix.m_layerName = ODB::GenLegalEntityName( "COMP_+_BOT" );
383 m_matrixLayers.push_back( matrix );
384 m_plugin->GetLayerNameList().emplace_back(
385 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
386 }
387}
388
390{
391 auto& auxilliary_layers = m_plugin->GetAuxilliaryLayerItemsMap();
392
393 for( BOARD_ITEM* item : m_board->Tracks() )
394 {
395 if( item->Type() == PCB_VIA_T )
396 {
397 PCB_VIA* via = static_cast<PCB_VIA*>( item );
398
399 if( via->Padstack().IsFilled().value_or( false ) )
400 {
401 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::FILLING, via->TopLayer(),
402 via->BottomLayer() )]
403 .push_back( via );
404 }
405
406 if( via->Padstack().IsCapped().value_or( false ) )
407 {
408 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::CAPPING, via->TopLayer(),
409 via->BottomLayer() )]
410 .push_back( via );
411 }
412
413 for( PCB_LAYER_ID layer : { via->TopLayer(), via->BottomLayer() } )
414 {
415 if( via->Padstack().IsPlugged( layer ).value_or( false ) )
416 {
417 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::PLUGGING, layer,
418 PCB_LAYER_ID::UNDEFINED_LAYER )]
419 .push_back( via );
420 }
421
422 if( via->Padstack().IsCovered( layer ).value_or( false ) )
423 {
424 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::COVERING, layer,
425 PCB_LAYER_ID::UNDEFINED_LAYER )]
426 .push_back( via );
427 }
428
429 if( via->Padstack().IsTented( layer ).value_or( false ) )
430 {
431 auxilliary_layers[std::make_tuple( ODB_AUX_LAYER_TYPE::TENTING, layer,
432 PCB_LAYER_ID::UNDEFINED_LAYER )]
433 .push_back( via );
434 }
435 }
436 }
437 }
438
439 auto InitAuxMatrix =
440 [&]( std::tuple<ODB_AUX_LAYER_TYPE, PCB_LAYER_ID, PCB_LAYER_ID> aLayerPair )
441 {
442 wxString featureName = "";
443 switch( std::get<0>( aLayerPair ) )
444 {
445 case ODB_AUX_LAYER_TYPE::TENTING: featureName = "tenting"; break;
446 case ODB_AUX_LAYER_TYPE::COVERING: featureName = "covering"; break;
447 case ODB_AUX_LAYER_TYPE::PLUGGING: featureName = "plugging"; break;
448 case ODB_AUX_LAYER_TYPE::FILLING: featureName = "filling"; break;
449 case ODB_AUX_LAYER_TYPE::CAPPING: featureName = "capping"; break;
450 default: return;
451 }
452
453 wxString dLayerName;
454
455 if( std::get<2>( aLayerPair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
456 {
457 dLayerName = wxString::Format( "%s_%s-%s", featureName,
458 m_board->GetLayerName( std::get<1>( aLayerPair ) ),
459 m_board->GetLayerName( std::get<2>( aLayerPair ) ) );
460 }
461 else
462 {
463 if( IsFrontLayer( std::get<1>( aLayerPair ) ) )
464 dLayerName = wxString::Format( "%s_front", featureName );
465 else if( IsBackLayer( std::get<1>( aLayerPair ) ) )
466 dLayerName = wxString::Format( "%s_back", featureName );
467 else
468 return;
469 }
470 MATRIX_LAYER matrix( m_row++, dLayerName );
471
472 matrix.m_type = ODB_TYPE::DOCUMENT;
473 matrix.m_context = ODB_CONTEXT::BOARD;
474 matrix.m_polarity = ODB_POLARITY::POSITIVE;
475
476 if( std::get<2>( aLayerPair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
477 {
478 matrix.m_span.emplace( std::make_pair(
479 ODB::GenLegalEntityName( m_board->GetLayerName( std::get<1>( aLayerPair ) ) ),
481 m_board->GetLayerName( std::get<2>( aLayerPair ) ) ) ) );
482 }
483
484 m_matrixLayers.push_back( matrix );
485
486 if( std::get<2>( aLayerPair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
487 {
488 m_plugin->GetLayerNameList().emplace_back(
489 std::make_pair( PCB_LAYER_ID::UNDEFINED_LAYER, matrix.m_layerName ) );
490 }
491 else
492 {
493 m_plugin->GetLayerNameList().emplace_back(
494 std::make_pair( std::get<1>( aLayerPair ), matrix.m_layerName ) );
495 }
496 };
497
498 for( const auto& [layer_pair, vec] : auxilliary_layers )
499 {
500 InitAuxMatrix( layer_pair );
501 }
502}
503
504
506{
507 auto fileproxy = writer.CreateFileProxy( "matrix" );
508
509 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
510
511 for( const auto& [step_name, column] : m_matrixSteps )
512 {
513 const auto array_proxy = twriter.MakeArrayProxy( "STEP" );
514 twriter.WriteEquationLine( "COL", column );
515 twriter.WriteEquationLine( "NAME", step_name );
516 }
517
518 for( const MATRIX_LAYER& layer : m_matrixLayers )
519 {
520 const auto array_proxy = twriter.MakeArrayProxy( "LAYER" );
521 twriter.WriteEquationLine( "ROW", layer.m_rowNumber );
522 twriter.write_line_enum( "CONTEXT", layer.m_context );
523 twriter.write_line_enum( "TYPE", layer.m_type );
524
525 if( layer.m_addType.has_value() )
526 {
527 twriter.write_line_enum( "ADD_TYPE", layer.m_addType.value() );
528 }
529
530 twriter.WriteEquationLine( "NAME", layer.m_layerName.Upper() );
531 twriter.WriteEquationLine( "OLD_NAME", wxEmptyString );
532 twriter.write_line_enum( "POLARITY", layer.m_polarity );
533
534 if( layer.m_diType.has_value() )
535 {
536 twriter.write_line_enum( "DIELECTRIC_TYPE", layer.m_diType.value() );
537 // twriter.WriteEquationLine( "DIELECTRIC_NAME", wxEmptyString );
538
539 // Can be used with DIELECTRIC_TYPE=CORE
540 // twriter.WriteEquationLine( "CU_TOP", wxEmptyString );
541 // twriter.WriteEquationLine( "CU_BOTTOM", wxEmptyString );
542 }
543
544 // Only applies to: soldermask, silkscreen, solderpaste and specifies the relevant cu layer
545 // twriter.WriteEquationLine( "REF", wxEmptyString );
546
547 if( layer.m_span.has_value() )
548 {
549 twriter.WriteEquationLine( "START_NAME", layer.m_span->first.Upper() );
550 twriter.WriteEquationLine( "END_NAME", layer.m_span->second.Upper() );
551 }
552
553 twriter.WriteEquationLine( "COLOR", "0" );
554 }
555}
556
557
559 std::map<int, std::vector<BOARD_ITEM*>>& aMap,
560 const PCB_LAYER_ID& aLayerID, const wxString& aLayerName ) :
561 ODB_ENTITY_BASE( aBoard, aPlugin ), m_layerItems( aMap ), m_layerID( aLayerID ),
562 m_matrixLayerName( aLayerName )
563{
564 m_featuresMgr = std::make_unique<FEATURES_MANAGER>( aBoard, aPlugin, aLayerName );
565}
566
567
569{
570 if( m_matrixLayerName.Contains( "drill" ) )
571 {
574 return;
575 }
576
577 if( m_matrixLayerName.Contains( "filling" ) || m_matrixLayerName.Contains( "capping" )
578 || m_matrixLayerName.Contains( "covering" ) || m_matrixLayerName.Contains( "plugging" )
579 || m_matrixLayerName.Contains( "tenting" ) )
580 {
583 return;
584 }
585
586 if( m_layerID != PCB_LAYER_ID::UNDEFINED_LAYER )
587 {
589 }
590}
591
593{
594 if( m_layerItems.empty() )
595 return;
596
597 const NETINFO_LIST& nets = m_board->GetNetInfo();
598
599 for( const NETINFO_ITEM* net : nets )
600 {
601 std::vector<BOARD_ITEM*>& vec = m_layerItems[net->GetNetCode()];
602
603 std::stable_sort( vec.begin(), vec.end(),
604 []( BOARD_ITEM* a, BOARD_ITEM* b )
605 {
606 if( a->GetParentFootprint() == b->GetParentFootprint() )
607 return a->Type() < b->Type();
608
609 return a->GetParentFootprint() < b->GetParentFootprint();
610 } );
611
612 if( vec.empty() )
613 continue;
614
615 m_featuresMgr->InitFeatureList( m_layerID, vec );
616 }
617}
618
619
621 const EDA_DATA::PACKAGE& aPkg )
622{
623 if( m_matrixLayerName == "COMP_+_BOT" )
624 {
625 if( !m_compBot.has_value() )
626 {
627 m_compBot.emplace();
628 }
629 return m_compBot.value().AddComponent( aFp, aPkg );
630 }
631 else
632 {
633 if( !m_compTop.has_value() )
634 {
635 m_compTop.emplace();
636 }
637
638 return m_compTop.value().AddComponent( aFp, aPkg );
639 }
640}
641
642
644{
645 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& drill_layers =
647
648 std::map<std::pair<PCB_LAYER_ID, PCB_LAYER_ID>, std::vector<BOARD_ITEM*>>& slot_holes =
650
651 if( !m_layerItems.empty() )
652 {
653 m_layerItems.clear();
654 }
655
657
658 bool is_npth_layer = false;
659 wxString plated_name = "plated";
660
661 if( m_matrixLayerName.Contains( "non-plated" ) )
662 {
663 is_npth_layer = true;
664 plated_name = "non-plated";
665 }
666
667
668 for( const auto& [layer_pair, vec] : slot_holes )
669 {
670 wxString dLayerName = wxString::Format( "drill_%s_%s-%s", plated_name,
671 m_board->GetLayerName( layer_pair.first ),
672 m_board->GetLayerName( layer_pair.second ) );
673
674 if( ODB::GenLegalEntityName( dLayerName ) == m_matrixLayerName )
675 {
676 for( BOARD_ITEM* item : vec )
677 {
678 if( item->Type() == PCB_PAD_T )
679 {
680 PAD* pad = static_cast<PAD*>( item );
681
682 if( ( is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::PTH )
683 || ( !is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::NPTH ) )
684 {
685 continue;
686 }
687
688 m_tools.value().AddDrillTools(
689 pad->GetAttribute() == PAD_ATTRIB::PTH ? "PLATED" : "NON_PLATED",
691 std::min( pad->GetDrillSizeX(), pad->GetDrillSizeY() ) ) );
692
693 // for drill features
694 m_layerItems[pad->GetNetCode()].push_back( item );
695 }
696 }
697
698 break;
699 }
700 }
701
702 for( const auto& [layer_pair, vec] : drill_layers )
703 {
704 wxString dLayerName = wxString::Format( "drill_%s_%s-%s", plated_name,
705 m_board->GetLayerName( layer_pair.first ),
706 m_board->GetLayerName( layer_pair.second ) );
707
708 if( ODB::GenLegalEntityName( dLayerName ) == m_matrixLayerName )
709 {
710 for( BOARD_ITEM* item : vec )
711 {
712 if( item->Type() == PCB_VIA_T && !is_npth_layer )
713 {
714 PCB_VIA* via = static_cast<PCB_VIA*>( item );
715
716 m_tools.value().AddDrillTools( "VIA",
717 ODB::SymDouble2String( via->GetDrillValue() ) );
718
719 // for drill features
720 m_layerItems[via->GetNetCode()].push_back( item );
721 }
722 else if( item->Type() == PCB_PAD_T )
723 {
724 PAD* pad = static_cast<PAD*>( item );
725
726 if( ( is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::PTH )
727 || ( !is_npth_layer && pad->GetAttribute() == PAD_ATTRIB::NPTH ) )
728 {
729 continue;
730 }
731
732 m_tools.value().AddDrillTools(
733 pad->GetAttribute() == PAD_ATTRIB::PTH ? "PLATED" : "NON_PLATED",
734 ODB::SymDouble2String( pad->GetDrillSizeX() ) );
735
736 // for drill features
737 m_layerItems[pad->GetNetCode()].push_back( item );
738 }
739 }
740
741 break;
742 }
743 }
744}
745
747{
748 auto& auxilliary_layers = m_plugin->GetAuxilliaryLayerItemsMap();
749
750 if( !m_layerItems.empty() )
751 {
752 m_layerItems.clear();
753 }
754
755 for( const auto& [layer_pair, vec] : auxilliary_layers )
756 {
757 wxString featureName = "";
758 switch( std::get<0>( layer_pair ) )
759 {
760 case ODB_AUX_LAYER_TYPE::TENTING: featureName = "tenting"; break;
761 case ODB_AUX_LAYER_TYPE::COVERING: featureName = "covering"; break;
762 case ODB_AUX_LAYER_TYPE::PLUGGING: featureName = "plugging"; break;
763 case ODB_AUX_LAYER_TYPE::FILLING: featureName = "filling"; break;
764 case ODB_AUX_LAYER_TYPE::CAPPING: featureName = "capping"; break;
765 default: return;
766 }
767
768 wxString dLayerName;
769 bool drill_value = false;
770
771 if( std::get<2>( layer_pair ) != PCB_LAYER_ID::UNDEFINED_LAYER )
772 {
773 drill_value = true;
774 dLayerName = wxString::Format( "%s_%s-%s", featureName,
775 m_board->GetLayerName( std::get<1>( layer_pair ) ),
776 m_board->GetLayerName( std::get<2>( layer_pair ) ) );
777 }
778 else
779 {
780 if( IsFrontLayer( std::get<1>( layer_pair ) ) )
781 dLayerName = wxString::Format( "%s_front", featureName );
782 else if( IsBackLayer( std::get<1>( layer_pair ) ) )
783 dLayerName = wxString::Format( "%s_back", featureName );
784 else
785 return;
786 }
787
788 if( ODB::GenLegalEntityName( dLayerName ) == m_matrixLayerName )
789 {
790 for( BOARD_ITEM* item : vec )
791 {
792 if( item->Type() == PCB_VIA_T )
793 {
794 PCB_VIA* via = static_cast<PCB_VIA*>( item );
795
796 m_layerItems[via->GetNetCode()].push_back( item );
797 }
798 }
799
800 break;
801 }
802 }
803}
804
806{
808
809 InitEdaData();
810
811 // Init Layer Entity Data
812 for( const auto& [layerName, layer_entity_ptr] : m_layerEntityMap )
813 {
814 layer_entity_ptr->InitEntityData();
815 }
816}
817
818
820{
821 GenAttrList( writer );
822
823 GenFeatures( writer );
824
825 if( m_compTop.has_value() || m_compBot.has_value() )
826 {
827 GenComponents( writer );
828 }
829
830 if( m_tools.has_value() )
831 {
832 GenTools( writer );
833 }
834}
835
836
838{
839 auto fileproxy = writer.CreateFileProxy( "components" );
840
841 if( m_compTop.has_value() )
842 {
843 m_compTop->Write( fileproxy.GetStream() );
844 }
845 else if( m_compBot.has_value() )
846 {
847 m_compBot->Write( fileproxy.GetStream() );
848 }
849}
850
851
853{
854 auto fileproxy = writer.CreateFileProxy( "features" );
855
856 m_featuresMgr->GenerateFeatureFile( fileproxy.GetStream() );
857}
858
859
861{
862 auto fileproxy = writer.CreateFileProxy( "attrlist" );
863}
864
865
867{
868 auto fileproxy = writer.CreateFileProxy( "tools" );
869
870 m_tools.value().GenerateFile( fileproxy.GetStream() );
871}
872
873
875{
876 //InitPackage
877 for( const FOOTPRINT* fp : m_board->Footprints() )
878 {
879 m_edaData.AddPackage( fp );
880 }
881
882 // for NET
883 const NETINFO_LIST& nets = m_board->GetNetInfo();
884
885 for( const NETINFO_ITEM* net : nets )
886 {
887 m_edaData.AddNET( net );
888 }
889
890 // for CMP
891 size_t j = 0;
892
893 for( const FOOTPRINT* fp : m_board->Footprints() )
894 {
895 wxString compName = ODB::GenLegalEntityName( "COMP_+_TOP" );
896 if( fp->IsFlipped() )
897 compName = ODB::GenLegalEntityName( "COMP_+_BOT" );
898
899 auto iter = m_layerEntityMap.find( compName );
900
901 if( iter == m_layerEntityMap.end() )
902 {
903 wxLogError( _( "Failed to add component data" ) );
904 return;
905 }
906
907 // ODBPP only need unique PACKAGE in PKG record in eda/data file.
908 // the PKG index can repeat to be ref in CMP record in component file.
909 std::shared_ptr<FOOTPRINT> fp_pkg = m_edaData.GetEdaFootprints().at( j );
910 ++j;
911
912 const EDA_DATA::PACKAGE& eda_pkg =
913 m_edaData.GetPackage( hash_fp_item( fp_pkg.get(), HASH_POS | REL_COORD ) );
914
915 ODB_COMPONENT& comp = iter->second->InitComponentData( fp, eda_pkg );
916
917 for( int i = 0; i < fp->Pads().size(); ++i )
918 {
919 PAD* pad = fp->Pads()[i];
920 auto& eda_net = m_edaData.GetNet( pad->GetNetCode() );
921
922 auto& subnet = eda_net.AddSubnet<EDA_DATA::SUB_NET_TOEPRINT>(
923 &m_edaData,
926 comp.m_index, comp.m_toeprints.size() );
927
928 m_plugin->GetPadSubnetMap().emplace( pad, &subnet );
929
930 const std::shared_ptr<EDA_DATA::PIN> pin = eda_pkg.GetEdaPkgPin( i );
931 const EDA_DATA::PIN& pin_ref = *pin;
932 auto& toep = comp.m_toeprints.emplace_back( pin_ref );
933
934 toep.m_net_num = eda_net.m_index;
935 toep.m_subnet_num = subnet.m_index;
936
937 toep.m_center = ODB::AddXY( pad->GetPosition() );
938
939 toep.m_rot = ODB::Double2String(
940 ( ANGLE_360 - pad->GetOrientation() ).Normalize().AsDegrees() );
941
942 if( pad->IsFlipped() )
943 toep.m_mirror = wxT( "M" );
944 else
945 toep.m_mirror = wxT( "N" );
946 }
947 }
948
949 for( PCB_TRACK* track : m_board->Tracks() )
950 {
951 auto& eda_net = m_edaData.GetNet( track->GetNetCode() );
952 EDA_DATA::SUB_NET* subnet = nullptr;
953
954 if( track->Type() == PCB_VIA_T )
955 subnet = &( eda_net.AddSubnet<EDA_DATA::SUB_NET_VIA>( &m_edaData ) );
956 else
957 subnet = &( eda_net.AddSubnet<EDA_DATA::SUB_NET_TRACE>( &m_edaData ) );
958
959 m_plugin->GetViaTraceSubnetMap().emplace( track, subnet );
960 }
961
962 for( ZONE* zone : m_board->Zones() )
963 {
964 for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() )
965 {
966 auto& eda_net = m_edaData.GetNet( zone->GetNetCode() );
967 auto& subnet = eda_net.AddSubnet<EDA_DATA::SUB_NET_PLANE>(
970 m_plugin->GetPlaneSubnetMap().emplace( std::piecewise_construct,
971 std::forward_as_tuple( layer, zone ),
972 std::forward_as_tuple( &subnet ) );
973 }
974 }
975}
976
977
979{
980 wxString step_root = writer.GetCurrentPath();
981
982 writer.CreateEntityDirectory( step_root, "layers" );
983 GenerateLayerFiles( writer );
984
985 writer.CreateEntityDirectory( step_root, "eda" );
986 GenerateEdaFiles( writer );
987
988 writer.CreateEntityDirectory( step_root, "netlists/cadnet" );
989 GenerateNetlistsFiles( writer );
990
991 writer.SetCurrentPath( step_root );
992 GenerateProfileFile( writer );
993
994 GenerateStepHeaderFile( writer );
995
996 //TODO: system attributes
997 // GenerateAttrListFile( writer );
998}
999
1000
1002{
1003 auto fileproxy = writer.CreateFileProxy( "profile" );
1004
1005 m_profile = std::make_unique<FEATURES_MANAGER>( m_board, m_plugin, wxEmptyString );
1006
1007 SHAPE_POLY_SET board_outline;
1008
1009 if( !m_board->GetBoardPolygonOutlines( board_outline ) )
1010 {
1011 wxLogError( "Failed to get board outline" );
1012 }
1013
1014 if( !m_profile->AddContour( board_outline, 0 ) )
1015 {
1016 wxLogError( "Failed to add polygon to profile" );
1017 }
1018
1019 m_profile->GenerateProfileFeatures( fileproxy.GetStream() );
1020}
1021
1022
1024{
1025 auto fileproxy = writer.CreateFileProxy( "stephdr" );
1026
1027 m_stephdr = {
1029 { "X_DATUM", "0" },
1030 { "Y_DATUM", "0" },
1031 { "X_ORIGIN", "0" },
1032 { "Y_ORIGIN", "0" },
1033 { "TOP_ACTIVE", "0" },
1034 { "BOTTOM_ACTIVE", "0" },
1035 { "RIGHT_ACTIVE", "0" },
1036 { "LEFT_ACTIVE", "0" },
1037 { "AFFECTING_BOM", "" },
1038 { "AFFECTING_BOM_CHANGED", "0" },
1039 };
1040
1041 ODB_TEXT_WRITER twriter( fileproxy.GetStream() );
1042
1043 for( const auto& [key, value] : m_stephdr )
1044 {
1045 twriter.WriteEquationLine( key, value );
1046 }
1047}
1048
1049
1051{
1052 wxString layers_root = writer.GetCurrentPath();
1053
1054 for( auto& [layerName, layerEntity] : m_layerEntityMap )
1055 {
1056 writer.CreateEntityDirectory( layers_root, layerName );
1057
1058 layerEntity->GenerateFiles( writer );
1059 }
1060}
1061
1062
1064{
1065 auto fileproxy = writer.CreateFileProxy( "data" );
1066
1067 m_edaData.Write( fileproxy.GetStream() );
1068}
1069
1070
1072{
1073 auto fileproxy = writer.CreateFileProxy( "netlist" );
1074
1075 m_netlist.Write( fileproxy.GetStream() );
1076}
1077
1078
1080{
1081 try
1082 {
1083 writer.CreateEntityDirectory( writer.GetRootPath(), "steps" );
1085 return true;
1086 }
1087 catch( const std::exception& e )
1088 {
1089 std::cerr << e.what() << std::endl;
1090 return false;
1091 }
1092}
1093
1094
1096{
1097 LSEQ layers = m_board->GetEnabledLayers().Seq();
1098 const NETINFO_LIST& nets = m_board->GetNetInfo();
1099
1100 // To avoid the overhead of repeatedly cycling through the layers and nets,
1101 // we pre-sort the board items into a map of layer -> net -> items
1102 std::map<PCB_LAYER_ID, std::map<int, std::vector<BOARD_ITEM*>>>& elements =
1104
1105 std::for_each( m_board->Tracks().begin(), m_board->Tracks().end(),
1106 [&layers, &elements]( PCB_TRACK* aTrack )
1107 {
1108 if( aTrack->Type() == PCB_VIA_T )
1109 {
1110 PCB_VIA* via = static_cast<PCB_VIA*>( aTrack );
1111
1112 for( PCB_LAYER_ID layer : layers )
1113 {
1114 if( via->FlashLayer( layer ) )
1115 elements[layer][via->GetNetCode()].push_back( via );
1116 }
1117 }
1118 else
1119 {
1120 elements[aTrack->GetLayer()][aTrack->GetNetCode()].push_back( aTrack );
1121 }
1122 } );
1123
1124 std::for_each( m_board->Zones().begin(), m_board->Zones().end(),
1125 [&elements]( ZONE* zone )
1126 {
1127 LSEQ zone_layers = zone->GetLayerSet().Seq();
1128
1129 for( PCB_LAYER_ID layer : zone_layers )
1130 {
1131 elements[layer][zone->GetNetCode()].push_back( zone );
1132 }
1133 } );
1134
1135 for( BOARD_ITEM* item : m_board->Drawings() )
1136 {
1137 if( BOARD_CONNECTED_ITEM* conn_it = dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
1138 elements[conn_it->GetLayer()][conn_it->GetNetCode()].push_back( conn_it );
1139 else
1140 elements[item->GetLayer()][0].push_back( item );
1141 }
1142
1143 for( FOOTPRINT* fp : m_board->Footprints() )
1144 {
1145 for( PCB_FIELD* field : fp->GetFields() )
1146 elements[field->GetLayer()][0].push_back( field );
1147
1148 for( BOARD_ITEM* item : fp->GraphicalItems() )
1149 elements[item->GetLayer()][0].push_back( item );
1150
1151 for( PAD* pad : fp->Pads() )
1152 {
1153 LSEQ pad_layers = pad->GetLayerSet().Seq();
1154 VECTOR2I margin;
1155
1156 for( PCB_LAYER_ID layer : pad_layers )
1157 {
1158 bool onCopperLayer = ( LSET::AllCuMask() & LSET( { layer } ) ).any();
1159 bool onSolderMaskLayer = ( LSET( { F_Mask, B_Mask } ) & LSET( { layer } ) ).any();
1160 bool onSolderPasteLayer =
1161 ( LSET( { F_Paste, B_Paste } ) & LSET( { layer } ) ).any();
1162
1163 if( onSolderMaskLayer )
1164 margin.x = margin.y = pad->GetSolderMaskExpansion( PADSTACK::ALL_LAYERS );
1165
1166 if( onSolderPasteLayer )
1167 margin = pad->GetSolderPasteMargin( PADSTACK::ALL_LAYERS );
1168
1169 VECTOR2I padPlotsSize = pad->GetSize( PADSTACK::ALL_LAYERS ) + margin * 2;
1170
1171 if( onCopperLayer && !pad->IsOnCopperLayer() )
1172 continue;
1173
1174 if( onCopperLayer && !pad->FlashLayer( layer ) )
1175 continue;
1176
1177 if( pad->GetShape( PADSTACK::ALL_LAYERS ) != PAD_SHAPE::CUSTOM
1178 && ( padPlotsSize.x <= 0 || padPlotsSize.y <= 0 ) )
1179 continue;
1180
1181 elements[layer][pad->GetNetCode()].push_back( pad );
1182 }
1183 }
1184 }
1185
1186 for( const auto& [layerID, layerName] : m_plugin->GetLayerNameList() )
1187 {
1188 std::shared_ptr<ODB_LAYER_ENTITY> layer_entity_ptr = std::make_shared<ODB_LAYER_ENTITY>(
1189 m_board, m_plugin, elements[layerID], layerID, layerName );
1190
1191 m_layerEntityMap.emplace( layerName, layer_entity_ptr );
1192 }
1193}
@ BS_ITEM_TYPE_DIELECTRIC
Definition: board_stackup.h:46
wxString GetBuildVersion()
Get the full KiCad version string.
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
Container for design settings for a BOARD object.
BOARD_STACKUP & GetStackupDescriptor()
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:78
Manage one layer needed to make a physical board.
Definition: board_stackup.h:96
wxString GetTypeName() const
int GetSublayersCount() const
wxString GetLayerName() const
PCB_LAYER_ID GetBrdLayerId() const
BOARD_STACKUP_ITEM_TYPE GetType() const
int GetDielectricLayerId() const
Manage layers needed to make a physical board.
const std::vector< BOARD_STACKUP_ITEM * > & GetList() const
int GetCount() const
bool SynchronizeWithBoard(BOARD_DESIGN_SETTINGS *aSettings)
Synchronize the BOARD_STACKUP_ITEM* list with the board.
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:297
bool GetBoardPolygonOutlines(SHAPE_POLY_SET &aOutlines, OUTLINE_ERROR_HANDLER *aErrorHandler=nullptr, bool aAllowUseArcsInPolygons=false, bool aIncludeNPTHAsOutlines=false)
Extract the board outlines and build a closed polygon from lines, arcs and circle items on edge cut l...
Definition: board.cpp:2531
const NETINFO_LIST & GetNetInfo() const
Definition: board.h:897
LSET GetEnabledLayers() const
A proxy function that calls the corresponding function in m_BoardSettings.
Definition: board.cpp:829
const ZONES & Zones() const
Definition: board.h:342
const FOOTPRINTS & Footprints() const
Definition: board.h:338
const TRACKS & Tracks() const
Definition: board.h:336
const wxString GetLayerName(PCB_LAYER_ID aLayer) const
Return the name of a aLayer.
Definition: board.cpp:614
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:946
T & AddSubnet(Args &&... args)
Definition: odb_eda_data.h:160
const std::shared_ptr< PIN > GetEdaPkgPin(size_t aPadIndex) const
Definition: odb_eda_data.h:241
NET & GetNet(size_t aNetcode)
Definition: odb_eda_data.h:172
const PACKAGE & GetPackage(size_t aHash) const
Definition: odb_eda_data.h:253
void AddNET(const NETINFO_ITEM *aNet)
void AddPackage(const FOOTPRINT *aFp)
void Write(std::ostream &ost) const
std::vector< std::shared_ptr< FOOTPRINT > > GetEdaFootprints() const
Definition: odb_eda_data.h:40
LSEQ is a sequence (and therefore also a set) of PCB_LAYER_IDs.
Definition: lseq.h:47
LSET is a set of PCB_LAYER_IDs.
Definition: lset.h:37
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:572
LSEQ Seq(const LSEQ &aSequence) const
Return an LSEQ from the union of this LSET and a desired sequence.
Definition: lset.cpp:297
Handle the data for a net.
Definition: netinfo.h:56
Container for NETINFO_ITEM elements, which are the nets.
Definition: netinfo.h:346
const size_t m_index
! CMP index number on board to be used in SNT(TOP), 0~n-1
Definition: odb_component.h:53
std::list< TOEPRINT > m_toeprints
Definition: odb_component.h:93
virtual std::string GetEntityName()=0
virtual bool CreateDirectoryTree(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:62
BOARD * m_board
Definition: odb_entity.h:59
PCB_IO_ODBPP * m_plugin
Definition: odb_entity.h:61
void GenFeatures(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:852
PCB_LAYER_ID m_layerID
Definition: odb_entity.h:207
void InitFeatureData()
Definition: odb_entity.cpp:592
void GenComponents(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:837
wxString m_matrixLayerName
Definition: odb_entity.h:208
void InitAuxilliaryData()
Definition: odb_entity.cpp:746
std::optional< COMPONENTS_MANAGER > m_compTop
Definition: odb_entity.h:211
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:819
std::optional< COMPONENTS_MANAGER > m_compBot
Definition: odb_entity.h:212
std::optional< ODB_DRILL_TOOLS > m_tools
Definition: odb_entity.h:210
void GenTools(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:866
std::map< int, std::vector< BOARD_ITEM * > > m_layerItems
Definition: odb_entity.h:206
ODB_LAYER_ENTITY(BOARD *aBoard, PCB_IO_ODBPP *aPlugin, std::map< int, std::vector< BOARD_ITEM * > > &aMap, const PCB_LAYER_ID &aLayerID, const wxString &aLayerName)
Definition: odb_entity.cpp:558
ODB_COMPONENT & InitComponentData(const FOOTPRINT *aFp, const EDA_DATA::PACKAGE &aPkg)
Definition: odb_entity.cpp:620
virtual void InitEntityData() override
Definition: odb_entity.cpp:568
void GenAttrList(ODB_TREE_WRITER &writer)
Definition: odb_entity.cpp:860
std::unique_ptr< FEATURES_MANAGER > m_featuresMgr
Definition: odb_entity.h:213
void AddStep(const wxString &aStepName)
Definition: odb_entity.cpp:103
unsigned int m_col
Definition: odb_entity.h:112
void InitMatrixLayerData()
Definition: odb_entity.cpp:117
std::vector< MATRIX_LAYER > m_matrixLayers
Definition: odb_entity.h:110
void AddMatrixLayerField(MATRIX_LAYER &aMLayer, PCB_LAYER_ID aLayer)
Definition: odb_entity.cpp:192
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:505
std::map< wxString, unsigned int > m_matrixSteps
Definition: odb_entity.h:109
unsigned int m_row
Definition: odb_entity.h:111
void AddAuxilliaryMatrixLayer()
Definition: odb_entity.cpp:389
void AddDrillMatrixLayer()
Definition: odb_entity.cpp:288
virtual void InitEntityData() override
Definition: odb_entity.cpp:109
void AddCOMPMatrixLayer(PCB_LAYER_ID aCompSide)
Definition: odb_entity.cpp:367
std::vector< std::pair< wxString, wxString > > m_info
Definition: odb_entity.h:129
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:90
void Write(std::ostream &aStream)
virtual std::string GetEntityName() override
Definition: odb_entity.h:145
std::unordered_map< wxString, wxString > m_stephdr
Definition: odb_entity.h:172
void GenerateProfileFile(ODB_TREE_WRITER &writer)
EDA_DATA m_edaData
Definition: odb_entity.h:171
void GenerateStepHeaderFile(ODB_TREE_WRITER &writer)
void GenerateEdaFiles(ODB_TREE_WRITER &writer)
virtual void InitEntityData() override
Definition: odb_entity.cpp:805
void GenerateLayerFiles(ODB_TREE_WRITER &writer)
std::map< wxString, std::shared_ptr< ODB_LAYER_ENTITY > > m_layerEntityMap
Definition: odb_entity.h:168
ODB_NET_LIST m_netlist
Definition: odb_entity.h:173
std::unique_ptr< FEATURES_MANAGER > m_profile
Definition: odb_entity.h:169
virtual bool CreateDirectoryTree(ODB_TREE_WRITER &writer) override
void GenerateNetlistsFiles(ODB_TREE_WRITER &writer)
void MakeLayerEntity()
virtual void GenerateFiles(ODB_TREE_WRITER &writer) override
Definition: odb_entity.cpp:978
void WriteEquationLine(const std::string &var, int value)
Definition: odb_util.cpp:285
ARRAY_PROXY MakeArrayProxy(const std::string &aStr)
Definition: odb_util.h:310
void write_line_enum(const std::string &var, const T &value)
Definition: odb_util.h:284
const wxString GetRootPath() const
Definition: odb_util.h:265
void CreateEntityDirectory(const wxString &aPareDir, const wxString &aSubDir=wxEmptyString)
Definition: odb_util.cpp:206
ODB_FILE_WRITER CreateFileProxy(const wxString &aFileName)
Definition: odb_util.h:252
void SetCurrentPath(const wxString &aDir)
Definition: odb_util.h:261
const wxString GetCurrentPath() const
Definition: odb_util.h:259
static constexpr PCB_LAYER_ID ALL_LAYERS
! Temporary layer identifier to identify code that is not padstack-aware
Definition: padstack.h:144
Definition: pad.h:54
std::map< std::pair< PCB_LAYER_ID, ZONE * >, EDA_DATA::SUB_NET_PLANE * > & GetPlaneSubnetMap()
Definition: pcb_io_odbpp.h:127
std::map< PCB_TRACK *, EDA_DATA::SUB_NET * > & GetViaTraceSubnetMap()
Definition: pcb_io_odbpp.h:132
std::vector< std::pair< PCB_LAYER_ID, wxString > > & GetLayerNameList()
Definition: pcb_io_odbpp.h:88
std::map< std::pair< PCB_LAYER_ID, PCB_LAYER_ID >, std::vector< BOARD_ITEM * > > & GetSlotHolesMap()
Definition: pcb_io_odbpp.h:117
std::map< const PAD *, EDA_DATA::SUB_NET_TOEPRINT * > & GetPadSubnetMap()
Definition: pcb_io_odbpp.h:122
std::map< PCB_LAYER_ID, std::map< int, std::vector< BOARD_ITEM * > > > & GetLayerElementsMap()
Definition: pcb_io_odbpp.h:93
std::map< std::tuple< ODB_AUX_LAYER_TYPE, PCB_LAYER_ID, PCB_LAYER_ID >, std::vector< BOARD_ITEM * > > & GetAuxilliaryLayerItemsMap()
Definition: pcb_io_odbpp.h:111
static std::string m_unitsStr
Definition: pcb_io_odbpp.h:152
std::map< std::pair< PCB_LAYER_ID, PCB_LAYER_ID >, std::vector< BOARD_ITEM * > > & GetDrillLayerItemsMap()
Definition: pcb_io_odbpp.h:104
Represent a set of closed polygons.
Handle a list of polygons defining a copper zone.
Definition: zone.h:74
#define _(s)
static constexpr EDA_ANGLE ANGLE_360
Definition: eda_angle.h:407
size_t hash_fp_item(const EDA_ITEM *aItem, int aFlags)
Calculate hash of an EDA_ITEM.
Definition: hash_eda.cpp:55
Hashing functions for EDA_ITEMs.
@ HASH_POS
Definition: hash_eda.h:47
@ REL_COORD
Use coordinates relative to the parent object.
Definition: hash_eda.h:50
bool IsFrontLayer(PCB_LAYER_ID aLayerId)
Layer classification: check if it's a front layer.
Definition: layer_ids.h:765
bool IsBackLayer(PCB_LAYER_ID aLayerId)
Layer classification: check if it's a back layer.
Definition: layer_ids.h:788
bool IsCopperLayer(int aLayerId)
Test whether a layer is a copper layer.
Definition: layer_ids.h:663
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
@ User_16
Definition: layer_ids.h:139
@ User_29
Definition: layer_ids.h:152
@ User_40
Definition: layer_ids.h:163
@ User_15
Definition: layer_ids.h:138
@ User_8
Definition: layer_ids.h:131
@ F_CrtYd
Definition: layer_ids.h:116
@ User_11
Definition: layer_ids.h:134
@ User_25
Definition: layer_ids.h:148
@ User_34
Definition: layer_ids.h:157
@ User_45
Definition: layer_ids.h:168
@ B_Adhes
Definition: layer_ids.h:103
@ User_36
Definition: layer_ids.h:159
@ Edge_Cuts
Definition: layer_ids.h:112
@ Dwgs_User
Definition: layer_ids.h:107
@ F_Paste
Definition: layer_ids.h:104
@ Cmts_User
Definition: layer_ids.h:108
@ User_6
Definition: layer_ids.h:129
@ User_7
Definition: layer_ids.h:130
@ User_19
Definition: layer_ids.h:142
@ User_23
Definition: layer_ids.h:146
@ F_Adhes
Definition: layer_ids.h:102
@ User_41
Definition: layer_ids.h:164
@ B_Mask
Definition: layer_ids.h:98
@ B_Cu
Definition: layer_ids.h:65
@ User_14
Definition: layer_ids.h:137
@ User_39
Definition: layer_ids.h:162
@ User_5
Definition: layer_ids.h:128
@ User_20
Definition: layer_ids.h:143
@ Eco1_User
Definition: layer_ids.h:109
@ F_Mask
Definition: layer_ids.h:97
@ User_42
Definition: layer_ids.h:165
@ User_43
Definition: layer_ids.h:166
@ B_Paste
Definition: layer_ids.h:105
@ User_10
Definition: layer_ids.h:133
@ User_9
Definition: layer_ids.h:132
@ User_27
Definition: layer_ids.h:150
@ User_28
Definition: layer_ids.h:151
@ F_Fab
Definition: layer_ids.h:119
@ Margin
Definition: layer_ids.h:113
@ F_SilkS
Definition: layer_ids.h:100
@ B_CrtYd
Definition: layer_ids.h:115
@ Eco2_User
Definition: layer_ids.h:110
@ User_35
Definition: layer_ids.h:158
@ User_31
Definition: layer_ids.h:154
@ User_3
Definition: layer_ids.h:126
@ User_1
Definition: layer_ids.h:124
@ User_12
Definition: layer_ids.h:135
@ B_SilkS
Definition: layer_ids.h:101
@ User_30
Definition: layer_ids.h:153
@ User_37
Definition: layer_ids.h:160
@ User_22
Definition: layer_ids.h:145
@ User_38
Definition: layer_ids.h:161
@ User_4
Definition: layer_ids.h:127
@ User_21
Definition: layer_ids.h:144
@ User_24
Definition: layer_ids.h:147
@ User_13
Definition: layer_ids.h:136
@ User_2
Definition: layer_ids.h:125
@ User_17
Definition: layer_ids.h:140
@ User_33
Definition: layer_ids.h:156
@ User_26
Definition: layer_ids.h:149
@ User_32
Definition: layer_ids.h:155
@ User_18
Definition: layer_ids.h:141
@ User_44
Definition: layer_ids.h:167
@ F_Cu
Definition: layer_ids.h:64
@ B_Fab
Definition: layer_ids.h:118
bool IsValidLayer(int aLayerId)
Test whether a given integer is a valid layer index, i.e.
Definition: layer_ids.h:641
std::pair< wxString, wxString > AddXY(const VECTOR2I &aVec)
Definition: odb_util.cpp:167
wxString GenLegalEntityName(const wxString &aStr)
Definition: odb_util.cpp:82
wxString Double2String(double aVal)
Definition: odb_util.cpp:127
wxString SymDouble2String(double aVal)
Definition: odb_util.cpp:155
#define ODB_JOB_NAME
Definition: odb_defines.h:27
#define ODB_UNITS
Definition: odb_defines.h:28
see class PGM_BASE
#define KEY_CORE
std::optional< ODB_DIELECTRIC_TYPE > m_diType
Definition: odb_entity.h:84
std::optional< std::pair< wxString, wxString > > m_span
Definition: odb_entity.h:82
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:97
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87