KiCad PCB EDA Suite
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gerber_jobfile_writer.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2018 Jean_Pierre Charras <jp.charras at wanadoo.fr>
5 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <https://www.gnu.org/licenses/>.
19 */
20
25
26#include <fstream>
27#include <iomanip>
28#include <vector>
29
30#include <build_version.h>
31#include <common.h>
32#include <locale_io.h>
33#include <pcb_edit_frame.h>
34#include <plotters/plotter.h>
35
36#include <board.h>
39#include <footprint.h>
40#include <pad.h>
41#include <pcb_track.h>
42#include <zone.h>
43
45#include <gbr_metadata.h>
47#include <pcbplot.h>
48#include <reporter.h>
50
51
53{
54 m_pcb = aPcb;
55 m_reporter = aReporter;
56 m_conversionUnits = 1.0 / pcbIUScale.IU_PER_MM; // Gerber units = mm
57}
58
59std::string GERBER_JOBFILE_WRITER::formatStringFromUTF32( const wxString& aText )
60{
61 std::string fmt_text; // the text after UTF32 to UTF8 conversion
62 fmt_text = aText.utf8_string();
63
64 return fmt_text;
65}
66
67
69{
70 int flag = SIDE_NONE;
71
72 for( PCB_LAYER_ID layer : m_params.m_LayerId )
73 {
74 if( layer == B_SilkS )
76
77 if( layer == F_SilkS )
78 flag |= SIDE_TOP;
79 }
80
81 return (enum ONSIDE) flag;
82}
83
84
86{
87 int flag = SIDE_NONE;
88
89 for( PCB_LAYER_ID layer : m_params.m_LayerId )
90 {
91 if( layer == B_Mask )
93
94 if( layer == F_Mask )
95 flag |= SIDE_TOP;
96 }
97
98 return (enum ONSIDE) flag;
99}
100
102{
103 // return the key associated to sides used for some layers
104 // "No, TopOnly, BotOnly or Both"
105 const char* value = nullptr;
106
107 switch( aValue )
108 {
109 case SIDE_NONE: value = "No"; break;
110 case SIDE_TOP: value = "TopOnly"; break;
111 case SIDE_BOTTOM: value = "BotOnly"; break;
112 case SIDE_BOTH: value = "Both"; break;
113 }
114
115 return value;
116}
117
118
119bool GERBER_JOBFILE_WRITER::CreateJobFile( const wxString& aFullFilename )
120{
121 bool success;
122 wxString msg;
123
124 success = WriteJSONJobFile( aFullFilename );
125
126 if( !success )
127 {
128 if( m_reporter )
129 {
130 msg.Printf( _( "Failed to create file '%s'." ), aFullFilename );
131 m_reporter->Report( msg, RPT_SEVERITY_ERROR );
132 }
133 }
134 else if( m_reporter )
135 {
136 msg.Printf( _( "Created Gerber job file '%s'." ), aFullFilename );
137 m_reporter->Report( msg, RPT_SEVERITY_ACTION );
138 }
139
140 return success;
141}
142
143
145{
146 m_json["Header"] = {
147 {
148 "GenerationSoftware",
149 {
150 { "Vendor", "KiCad" },
151 { "Application", "Pcbnew" },
152 { "Version", GetBuildVersion() }
153 }
154 },
155 {
156 // The attribute value must conform to the full version of the ISO 8601
157 // date and time format, including time and time zone.
159 }
160 };
161}
162
163
164bool GERBER_JOBFILE_WRITER::WriteJSONJobFile( const wxString& aFullFilename )
165{
166 // Note: in Gerber job file, dimensions are in mm, and are floating numbers
167 std::ofstream file( aFullFilename.ToUTF8() );
168
169 m_json = nlohmann::ordered_json( {} );
170
171 // output the job file header
173
174 // Add the General Specs
176
177 // Job file support a few design rules:
179
180 // output the gerber file list:
182
183 // output the board stackup:
185
186 file << std::setw( 2 ) << m_json << std::endl;
187
188 return true;
189}
190
191
192double GERBER_JOBFILE_WRITER::mapValue( double aUiValue )
193{
194 // A helper function to convert aUiValue in Json units (mm) and to have
195 // 4 digits in Json in mantissa when using %g to print it
196 // i.e. displays values truncated in 0.1 microns.
197 // This is enough for a Json file
198 char buffer[128];
199 std::snprintf( buffer, sizeof( buffer ), "%.4f", aUiValue * m_conversionUnits );
200
201 long double output;
202 sscanf( buffer, "%Lg", &output );
203
204 return output;
205
206}
207
208
210{
211 m_json["GeneralSpecs"] = nlohmann::ordered_json( {} );
212 m_json["GeneralSpecs"]["ProjectId"] = nlohmann::ordered_json( {} );
213
214 // Creates the ProjectId. Format is (from Gerber file format doc):
215 // ProjectId,<project id>,<project GUID>,<revision id>*%
216 // <project id> is the name of the project, restricted to basic ASCII symbols only,
217 // and comma not accepted
218 // All illegal chars will be replaced by underscore
219 // Rem: <project id> accepts only ASCII 7 code (only basic ASCII codes are allowed in gerber files).
220 //
221 // <project GUID> is a string which is an unique id of a project.
222 // However Kicad does not handle such a project GUID, so it is built from the board name
223 wxFileName fn = m_pcb->GetFileName();
224 wxString msg = fn.GetFullName();
225
226 // Build a <project GUID>, from the board name
227 wxString guid = GbrMakeProjectGUIDfromString( msg );
228
229 // build the <project id> string: this is the board short filename (without ext)
230 // and in UTF8 format.
231 msg = fn.GetName();
232
233 // build the <rev> string. All non ASCII chars are in UTF8 form
234 wxString rev = ExpandTextVars( m_pcb->GetTitleBlock().GetRevision(), m_pcb->GetProject(), FOR_GUI );
235
236 if( rev.IsEmpty() )
237 rev = wxT( "rev?" );
238
239 m_json["GeneralSpecs"]["ProjectId"]["Name"] = msg.utf8_string().c_str();
240 m_json["GeneralSpecs"]["ProjectId"]["GUID"] = guid;
241 m_json["GeneralSpecs"]["ProjectId"]["Revision"] = rev.utf8_string().c_str();
242
243 // output the board size in mm:
244 BOX2I brect = m_pcb->GetBoardEdgesBoundingBox();
245
246 m_json["GeneralSpecs"]["Size"]["X"] = mapValue( brect.GetWidth() );
247 m_json["GeneralSpecs"]["Size"]["Y"] = mapValue( brect.GetHeight() );
248
249
250 // Add some data to the JSON header, GeneralSpecs:
251 // number of copper layers
252 m_json["GeneralSpecs"]["LayerNumber"] = m_pcb->GetCopperLayerCount();
253
254 // Board thickness
255 m_json["GeneralSpecs"]["BoardThickness"] =
256 mapValue( m_pcb->GetDesignSettings().GetBoardThickness() );
257
258 // Copper finish
259 const BOARD_STACKUP brd_stackup = m_pcb->GetDesignSettings().GetStackupDescriptor();
260
261 if( !brd_stackup.m_FinishType.IsEmpty() )
262 m_json["GeneralSpecs"]["Finish"] = brd_stackup.m_FinishType;
263
264 if( brd_stackup.m_HasDielectricConstrains )
265 m_json["GeneralSpecs"]["ImpedanceControlled"] = true;
266
267 #if 0 // Old way to set property
268 if( brd_stackup.m_CastellatedPads )
269 m_json["GeneralSpecs"]["Castellated"] = true;
270 #endif
271 if( m_pcb->GetPadWithCastellatedAttrCount() )
272 m_json["GeneralSpecs"]["Castellated"] = true;
273
274 if( m_pcb->GetPadWithPressFitAttrCount() )
275 m_json["GeneralSpecs"]["Press-fit"] = true;
276
277 if( brd_stackup.m_EdgePlating )
278 m_json["GeneralSpecs"]["EdgePlating"] = true;
279
280 if( brd_stackup.m_EdgeConnectorConstraints )
281 {
282 m_json["GeneralSpecs"]["EdgeConnector"] = true;
283
284 m_json["GeneralSpecs"]["EdgeConnectorBevelled"] =
286 }
287
288#if 0 // Not yet in use
289 /* The board type according to IPC-2221. There are six primary board types:
290 - Type 1 - Single-sided
291 - Type 2 - Double-sided
292 - Type 3 - Multilayer, TH components only
293 - Type 4 - Multilayer, with TH, blind and/or buried vias.
294 - Type 5 - Multilayer metal-core board, TH components only
295 - Type 6 - Multilayer metal-core
296 */
297 m_json["GeneralSpecs"]["IPC-2221-Type"] = 4;
298
299 /* Via protection: key words:
300 Ia Tented - Single-sided
301 Ib Tented - Double-sided
302 IIa Tented and Covered - Single-sided
303 IIb Tented and Covered - Double-sided
304 IIIa Plugged - Single-sided
305 IIIb Plugged - Double-sided
306 IVa Plugged and Covered - Single-sided
307 IVb Plugged and Covered - Double-sided
308 V Filled (fully plugged)
309 VI Filled and Covered
310 VIII Filled and Capped
311 None...No protection
312 */
313 m_json["GeneralSpecs"]["ViaProtection"] = "Ib";
314#endif
315}
316
317
319{
320 // Add the Files Attributes section in JSON format to m_JSONbuffer
321 m_json["FilesAttributes"] = nlohmann::ordered_json::array();
322
323 for( unsigned ii = 0; ii < m_params.m_GerberFileList.GetCount(); ii++ )
324 {
325 wxString& name = m_params.m_GerberFileList[ii];
326 PCB_LAYER_ID layer = m_params.m_LayerId[ii];
327 wxString gbr_layer_id;
328 bool skip_file = false; // true to skip files which should not be in job file
329 const char* polarity = "Positive";
330
331 nlohmann::ordered_json file_json;
332
333 if( IsCopperLayer( layer ) )
334 {
335 gbr_layer_id = wxT( "Copper,L" );
336
337 if( layer == B_Cu )
338 gbr_layer_id << m_pcb->GetCopperLayerCount();
339 else if( layer == F_Cu )
340 gbr_layer_id << 1;
341 else // Copper layers are numbered B_Cu + n*2 for inner layer n (n = 1 ... val max)
342 // and gbr_layer_id = 2 ... val max
343 gbr_layer_id << (layer-B_Cu) / 2 + 1;
344
345 gbr_layer_id << wxT( "," );
346
347 if( layer == B_Cu )
348 gbr_layer_id << wxT( "Bot" );
349 else if( layer == F_Cu )
350 gbr_layer_id << wxT( "Top" );
351 else
352 gbr_layer_id << wxT( "Inr" );
353 }
354
355 else if( IsUserLayer( layer ) )
356 {
357 gbr_layer_id = wxT( "Other,User" );
358 }
359
360 else
361 {
362 switch( layer )
363 {
364 case B_Adhes:
365 gbr_layer_id = wxT( "Glue,Bot" );
366 break;
367 case F_Adhes:
368 gbr_layer_id = wxT( "Glue,Top" );
369 break;
370
371 case B_Paste:
372 gbr_layer_id = wxT( "SolderPaste,Bot" );
373 break;
374 case F_Paste:
375 gbr_layer_id = wxT( "SolderPaste,Top" );
376 break;
377
378 case B_SilkS:
379 gbr_layer_id = wxT( "Legend,Bot" );
380 break;
381 case F_SilkS:
382 gbr_layer_id = wxT( "Legend,Top" );
383 break;
384
385 case B_Mask:
386 gbr_layer_id = wxT( "SolderMask,Bot" );
387 polarity = "Negative";
388 break;
389 case F_Mask:
390 gbr_layer_id = wxT( "SolderMask,Top" );
391 polarity = "Negative";
392 break;
393
394 case Edge_Cuts:
395 gbr_layer_id = wxT( "Profile" );
396 break;
397
398 case B_Fab:
399 gbr_layer_id = wxT( "AssemblyDrawing,Bot" );
400 break;
401 case F_Fab:
402 gbr_layer_id = wxT( "AssemblyDrawing,Top" );
403 break;
404
405 case Margin:
406 case B_CrtYd:
407 case F_CrtYd:
408 skip_file = true;
409 break;
410
411 default:
412 skip_file = true;
413
414 if( m_reporter )
415 m_reporter->Report( wxT( "Unexpected layer id in job file" ), RPT_SEVERITY_ERROR );
416
417 break;
418 }
419 }
420
421 if( !skip_file )
422 {
423 // name can contain non ASCII7 chars.
424 // Ensure the name is JSON compatible.
425 std::string strname = formatStringFromUTF32( name );
426
427 file_json["Path"] = strname.c_str();
428 file_json["FileFunction"] = gbr_layer_id;
429 file_json["FilePolarity"] = polarity;
430
431 m_json["FilesAttributes"] += file_json;
432 }
433 }
434}
435
436
438{
439 // Add the Design Rules section in JSON format to m_JSONbuffer
440 // Job file support a few design rules:
441 std::shared_ptr<NET_SETTINGS>& netSettings = m_pcb->GetDesignSettings().m_NetSettings;
442
443 int minclearanceOuter = netSettings->GetDefaultNetclass()->GetClearance();
444 bool hasInnerLayers = m_pcb->GetCopperLayerCount() > 2;
445
446 // Search a smaller clearance in other net classes, if any.
447 for( const auto& [name, netclass] : netSettings->GetNetclasses() )
448 {
449 if( netclass->HasClearance() )
450 minclearanceOuter = std::min( minclearanceOuter, netclass->GetClearance() );
451 }
452
453 // job file knows different clearance types.
454 // Kicad knows only one clearance for pads and tracks
455 int minclearance_track2track = minclearanceOuter;
456
457 // However, pads can have a specific clearance defined for a pad or a footprint,
458 // and min clearance can be dependent on layers.
459 // Search for a minimal pad clearance:
460 int minPadClearanceOuter = netSettings->GetDefaultNetclass()->GetClearance();
461 int minPadClearanceInner = netSettings->GetDefaultNetclass()->GetClearance();
462
463 for( FOOTPRINT* footprint : m_pcb->Footprints() )
464 {
465 for( PAD* pad : footprint->Pads() )
466 {
467 for( PCB_LAYER_ID layer : pad->GetLayerSet() )
468 {
469 int padClearance = pad->GetOwnClearance( layer );
470
471 if( layer == B_Cu || layer == F_Cu )
472 minPadClearanceOuter = std::min( minPadClearanceOuter, padClearance );
473 else
474 minPadClearanceInner = std::min( minPadClearanceInner, padClearance );
475 }
476 }
477 }
478
479 m_json["DesignRules"] = { {
480 { "Layers", "Outer" },
481 { "PadToPad", mapValue( minPadClearanceOuter ) },
482 { "PadToTrack", mapValue( minPadClearanceOuter ) },
483 { "TrackToTrack", mapValue( minclearance_track2track ) }
484 } };
485
486 // Until this is changed in Kicad, use the same value for internal tracks
487 int minclearanceInner = minclearanceOuter;
488
489 // Output the minimal track width
490 int mintrackWidthOuter = INT_MAX;
491 int mintrackWidthInner = INT_MAX;
492
493 for( PCB_TRACK* track : m_pcb->Tracks() )
494 {
495 if( track->Type() == PCB_VIA_T )
496 continue;
497
498 if( track->GetLayer() == B_Cu || track->GetLayer() == F_Cu )
499 mintrackWidthOuter = std::min( mintrackWidthOuter, track->GetWidth() );
500 else
501 mintrackWidthInner = std::min( mintrackWidthInner, track->GetWidth() );
502 }
503
504 if( mintrackWidthOuter != INT_MAX )
505 m_json["DesignRules"][0]["MinLineWidth"] = mapValue( mintrackWidthOuter );
506
507 // Output the minimal zone to xx clearance
508 // Note: zones can have a zone clearance set to 0
509 // if happens, the actual zone clearance is the clearance of its class
510 minclearanceOuter = INT_MAX;
511 minclearanceInner = INT_MAX;
512
513 for( ZONE* zone : m_pcb->Zones() )
514 {
515 if( zone->GetIsRuleArea() || !zone->IsOnCopperLayer() )
516 continue;
517
518 for( PCB_LAYER_ID layer : zone->GetLayerSet() )
519 {
520 int zclerance = zone->GetOwnClearance( layer );
521
522 if( layer == B_Cu || layer == F_Cu )
523 minclearanceOuter = std::min( minclearanceOuter, zclerance );
524 else
525 minclearanceInner = std::min( minclearanceInner, zclerance );
526 }
527 }
528
529 if( minclearanceOuter != INT_MAX )
530 m_json["DesignRules"][0]["TrackToRegion"] = mapValue( minclearanceOuter );
531
532 if( minclearanceOuter != INT_MAX )
533 m_json["DesignRules"][0]["RegionToRegion"] = mapValue( minclearanceOuter );
534
535 if( hasInnerLayers )
536 {
537 m_json["DesignRules"] += nlohmann::ordered_json( {
538 { "Layers", "Inner" },
539 { "PadToPad", mapValue( minPadClearanceInner ) },
540 { "PadToTrack", mapValue( minPadClearanceInner ) },
541 { "TrackToTrack", mapValue( minclearance_track2track ) }
542 } );
543
544 if( mintrackWidthInner != INT_MAX )
545 m_json["DesignRules"][1]["MinLineWidth"] = mapValue( mintrackWidthInner );
546
547 if( minclearanceInner != INT_MAX )
548 m_json["DesignRules"][1]["TrackToRegion"] = mapValue( minclearanceInner );
549
550 if( minclearanceInner != INT_MAX )
551 m_json["DesignRules"][1]["RegionToRegion"] = mapValue( minclearanceInner );
552 }
553}
554
555
557{
558 // Add the Material Stackup section in JSON format to m_JSONbuffer
559 m_json["MaterialStackup"] = nlohmann::ordered_json::array();
560
561 // Build the candidates list:
562 LSET maskLayer;
563 BOARD_STACKUP brd_stackup = m_pcb->GetDesignSettings().GetStackupDescriptor();
564
565 // Ensure brd_stackup is up to date (i.e. no change made by SynchronizeWithBoard() )
566 bool uptodate = not brd_stackup.SynchronizeWithBoard( &m_pcb->GetDesignSettings() );
567
568 if( m_reporter && !uptodate && m_pcb->GetDesignSettings().m_HasStackup )
569 m_reporter->Report( _( "Board stackup settings not up to date." ), RPT_SEVERITY_ERROR );
570
571 PCB_LAYER_ID last_copper_layer = F_Cu;
572
573 // Generate the list (top to bottom):
574 for( int ii = 0; ii < brd_stackup.GetCount(); ++ii )
575 {
576 BOARD_STACKUP_ITEM* item = brd_stackup.GetStackupLayer( ii );
577
578 int sub_layer_count =
579 item->GetType() == BS_ITEM_TYPE_DIELECTRIC ? item->GetSublayersCount() : 1;
580
581 for( int sub_idx = 0; sub_idx < sub_layer_count; sub_idx++ )
582 {
583 // layer thickness is always in mm
584 double thickness = mapValue( item->GetThickness( sub_idx ) );
585 wxString layer_type;
586 std::string layer_name; // for comment
587
588 nlohmann::ordered_json layer_json;
589
590 switch( item->GetType() )
591 {
593 layer_type = wxT( "Copper" );
594 layer_name = formatStringFromUTF32( m_pcb->GetLayerName( item->GetBrdLayerId() ) );
595 last_copper_layer = item->GetBrdLayerId();
596 break;
597
599 layer_type = wxT( "Legend" );
600 layer_name = formatStringFromUTF32( item->GetTypeName() );
601 break;
602
604 layer_type = wxT( "SolderMask" );
605 layer_name = formatStringFromUTF32( item->GetTypeName() );
606 break;
607
609 layer_type = wxT( "SolderPaste" );
610 layer_name = formatStringFromUTF32( item->GetTypeName() );
611 break;
612
614 layer_type = wxT( "Dielectric" );
615 // The option core or prepreg is not added here, as it creates constraints
616 // in build process, not necessary wanted.
617 if( sub_layer_count > 1 )
618 {
619 layer_name =
620 formatStringFromUTF32( wxString::Format( wxT( "dielectric layer %d - %d/%d" ),
621 item->GetDielectricLayerId(), sub_idx + 1, sub_layer_count ) );
622 }
623 else
624 layer_name = formatStringFromUTF32( wxString::Format(
625 wxT( "dielectric layer %d" ), item->GetDielectricLayerId() ) );
626 break;
627
628 default:
629 break;
630 }
631
632 layer_json["Type"] = layer_type;
633
634 if( item->IsColorEditable() && uptodate )
635 {
636 if( IsPrmSpecified( item->GetColor( sub_idx ) ) )
637 {
638 wxString colorName = item->GetColor( sub_idx );
639
640 if( colorName.StartsWith( wxT( "#" ) ) ) // This is a user defined color,
641 // not in standard color list.
642 {
643 // In job file a color can be given by its RGB values (0...255)
644 // like R<number><G<number>B<number> notation
645 wxColor color( COLOR4D( colorName ).ToColour() );
646 colorName.Printf( wxT( "R%dG%dB%d" ),
647 color.Red(),
648 color.Green(),
649 color.Blue() );
650 }
651 else
652 {
653 const std::vector<FAB_LAYER_COLOR>& color_list =
654 GetStandardColors( item->GetType() );
655
656 // Colors for dielectric use a color list that is mainly not normalized in
657 // job file names. So if a color is in the dielectric standard color list
658 // it can be a standard name or not.
659 // Colors for solder mask and silk screen use a mainly normalized
660 // color list, but this list can also contain not normalized colors.
661 // If not normalized, use the R<number><G<number>B<number> notation
662 for( const FAB_LAYER_COLOR& prm_color : color_list )
663 {
664 if( colorName == prm_color.GetName() )
665 {
666 colorName = prm_color.GetColorAsString();
667 break;
668 }
669 }
670 }
671
672 layer_json["Color"] = colorName;
673 }
674 }
675
676 if( item->IsThicknessEditable() && uptodate )
677 layer_json["Thickness"] = thickness;
678
679 if( item->GetType() == BS_ITEM_TYPE_DIELECTRIC )
680 {
681 if( item->HasMaterialValue() )
682 {
683 layer_json["Material"] = item->GetMaterial( sub_idx );
684
685 // These constrains are only written if the board has impedance controlled tracks.
686 // If the board is not impedance controlled, they are useless.
687 // Do not add constrains that create more expensive boards.
688
689 if( brd_stackup.m_HasDielectricConstrains )
690 {
691 // Generate Epsilon R if > 1.0 (value <= 1.0 means not specified: it is not
692 // a possible value
693 if( item->GetEpsilonR() > 1.0 )
694 layer_json["DielectricConstant"] = item->FormatEpsilonR( sub_idx );
695
696 // Generate LossTangent > 0.0 (value <= 0.0 means not specified: it is not
697 // a possible value
698 if( item->GetLossTangent() > 0.0 )
699 layer_json["LossTangent"] = item->FormatLossTangent( sub_idx );
700 }
701 }
702
703 // Copper layers IDs use only even values like 0, 2, 4 ...
704 // and first layer = F_Cu = 0, last layer = B_Cu = 2
705 // inner layers Ids are 4, 6 , 8 ...
706 PCB_LAYER_ID next_copper_layer = ( PCB_LAYER_ID )( last_copper_layer + 2 );
707
708 if( last_copper_layer == F_Cu )
709 next_copper_layer = In1_Cu;
710
711 // If the next_copper_layer is the last copper layer, the next layer id is B_Cu
712 if( next_copper_layer/2 >= m_pcb->GetCopperLayerCount() )
713 next_copper_layer = B_Cu;
714
715 wxString subLayerName;
716
717 if( sub_layer_count > 1 )
718 subLayerName.Printf( wxT( " (%d/%d)" ), sub_idx + 1, sub_layer_count );
719
720 wxString name = wxString::Format( wxT( "%s/%s%s" ),
721 formatStringFromUTF32( m_pcb->GetLayerName( last_copper_layer ) ),
722 formatStringFromUTF32( m_pcb->GetLayerName( next_copper_layer ) ),
723 subLayerName );
724
725 layer_json["Name"] = name;
726
727 // Add a comment ("Notes"):
728 wxString note;
729
730 note << wxString::Format( wxT( "Type: %s" ), layer_name.c_str() );
731
732 note << wxString::Format( wxT( " (from %s to %s)" ),
733 formatStringFromUTF32( m_pcb->GetLayerName( last_copper_layer ) ),
734 formatStringFromUTF32( m_pcb->GetLayerName( next_copper_layer ) ) );
735
736 layer_json["Notes"] = note;
737 }
738 else if( item->GetType() == BS_ITEM_TYPE_SOLDERMASK
739 || item->GetType() == BS_ITEM_TYPE_SILKSCREEN )
740 {
741 if( item->HasMaterialValue() )
742 {
743 layer_json["Material"] = item->GetMaterial();
744
745 // These constrains are only written if the board has impedance controlled tracks.
746 // If the board is not impedance controlled, they are useless.
747 // Do not add constrains that create more expensive boards.
748 if( brd_stackup.m_HasDielectricConstrains )
749 {
750 // Generate Epsilon R if > 1.0 (value <= 1.0 means not specified: it is not
751 // a possible value
752 if( item->GetEpsilonR() > 1.0 )
753 layer_json["DielectricConstant"] = item->FormatEpsilonR();
754
755 // Generate LossTangent > 0.0 (value <= 0.0 means not specified: it is not
756 // a possible value
757 if( item->GetLossTangent() > 0.0 )
758 layer_json["LossTangent"] = item->FormatLossTangent();
759 }
760 }
761
762 layer_json["Name"] = layer_name.c_str();
763 }
764 else
765 {
766 layer_json["Name"] = layer_name.c_str();
767 }
768
769 m_json["MaterialStackup"].insert( m_json["MaterialStackup"].end(), layer_json );
770 }
771 }
772}
const char * name
constexpr EDA_IU_SCALE pcbIUScale
Definition base_units.h:121
bool IsPrmSpecified(const wxString &aPrmValue)
@ BS_EDGE_CONNECTOR_BEVELLED
@ BS_ITEM_TYPE_COPPER
@ BS_ITEM_TYPE_SILKSCREEN
@ BS_ITEM_TYPE_DIELECTRIC
@ BS_ITEM_TYPE_SOLDERPASTE
@ BS_ITEM_TYPE_SOLDERMASK
BOX2< VECTOR2I > BOX2I
Definition box2.h:927
wxString GetBuildVersion()
Get the full KiCad version string.
Manage one layer needed to make a physical board.
wxString GetTypeName() const
int GetSublayersCount() const
double GetEpsilonR(int aDielectricSubLayer=0) const
wxString GetColor(int aDielectricSubLayer=0) const
bool HasMaterialValue(int aDielectricSubLayer=0) const
PCB_LAYER_ID GetBrdLayerId() const
bool IsThicknessEditable() const
int GetThickness(int aDielectricSubLayer=0) const
BOARD_STACKUP_ITEM_TYPE GetType() const
wxString GetMaterial(int aDielectricSubLayer=0) const
wxString FormatEpsilonR(int aDielectricSubLayer=0) const
int GetDielectricLayerId() const
bool IsColorEditable() const
wxString FormatLossTangent(int aDielectricSubLayer=0) const
double GetLossTangent(int aDielectricSubLayer=0) const
Manage layers needed to make a physical board.
int GetCount() const
bool SynchronizeWithBoard(BOARD_DESIGN_SETTINGS *aSettings)
Synchronize the BOARD_STACKUP_ITEM* list with the board.
bool m_HasDielectricConstrains
True if some layers have impedance controlled tracks or have specific constrains for micro-wave appli...
BOARD_STACKUP_ITEM * GetStackupLayer(int aIndex)
bool m_EdgePlating
True if the edge board is plated.
BS_EDGE_CONNECTOR_CONSTRAINTS m_EdgeConnectorConstraints
If the board has edge connector cards, some constrains can be specified in job file: BS_EDGE_CONNECTO...
wxString m_FinishType
The name of external copper finish.
Information pertinent to a Pcbnew printed circuit board.
Definition board.h:409
constexpr size_type GetWidth() const
Definition box2.h:211
constexpr size_type GetHeight() const
Definition box2.h:212
void addJSONHeader()
Add the job file header in JSON format to m_JSONbuffer.
void addJSONMaterialStackup()
Add the Material Stackup section in JSON format to m_JSONbuffer This is the ordered list of stackup l...
void addJSONFilesAttributes()
Add the Files Attributes section in JSON format to m_JSONbuffer.
nlohmann::ordered_json m_json
bool CreateJobFile(const wxString &aFullFilename)
Creates a Gerber job file.
void addJSONGeneralSpecs()
Add the General Specs in JSON format to m_JSONbuffer.
bool WriteJSONJobFile(const wxString &aFullFilename)
Creates an Gerber job file in JSON format.
double mapValue(double aUiValue)
A helper function to convert a double in Pcbnew internal units to a JSON double value (in mm),...
const char * sideKeyValue(enum ONSIDE aValue)
void addJSONDesignRules()
Add the Design Rules section in JSON format to m_JSONbuffer.
std::string formatStringFromUTF32(const wxString &aText)
A helper function to convert a wxString ( therefore a Unicode text ) to a JSON compatible string (a e...
GERBER_JOBFILE_WRITER(BOARD *aPcb, REPORTER *aReporter=nullptr)
A color representation with 4 components: red, green, blue, alpha.
Definition color4d.h:101
LSET is a set of PCB_LAYER_IDs.
Definition lset.h:37
Definition pad.h:61
A pure virtual class used to derive REPORTER objects from.
Definition reporter.h:73
Handle a list of polygons defining a copper zone.
Definition zone.h:70
wxString ExpandTextVars(const wxString &aSource, const PROJECT *aProject, RESOLUTION_CONTEXT aContext)
Definition common.cpp:60
@ FOR_GUI
Definition common.h:89
#define _(s)
wxString GbrMakeProjectGUIDfromString(const wxString &aText)
Build a project GUID using format RFC4122 Version 1 or 4 from the project name, because a KiCad proje...
wxString GbrMakeCreationDateAttributeString(GBR_NC_STRING_FORMAT aFormat)
Handle special data (items attributes) during plot.
@ GBR_NC_STRING_FORMAT_GBRJOB
Classes used to generate a Gerber job file in JSON.
bool IsUserLayer(PCB_LAYER_ID aLayerId)
Test whether a layer is a non copper and a non tech layer.
Definition layer_ids.h:785
bool IsCopperLayer(int aLayerId)
Test whether a layer is a copper layer.
Definition layer_ids.h:703
PCB_LAYER_ID
A quick note on layer IDs:
Definition layer_ids.h:56
@ F_CrtYd
Definition layer_ids.h:112
@ B_Adhes
Definition layer_ids.h:99
@ Edge_Cuts
Definition layer_ids.h:108
@ F_Paste
Definition layer_ids.h:100
@ F_Adhes
Definition layer_ids.h:98
@ B_Mask
Definition layer_ids.h:94
@ B_Cu
Definition layer_ids.h:61
@ F_Mask
Definition layer_ids.h:93
@ B_Paste
Definition layer_ids.h:101
@ F_Fab
Definition layer_ids.h:115
@ Margin
Definition layer_ids.h:109
@ F_SilkS
Definition layer_ids.h:96
@ B_CrtYd
Definition layer_ids.h:111
@ In1_Cu
Definition layer_ids.h:62
@ B_SilkS
Definition layer_ids.h:97
@ F_Cu
Definition layer_ids.h:60
@ B_Fab
Definition layer_ids.h:114
@ RPT_SEVERITY_ERROR
@ RPT_SEVERITY_ACTION
const std::vector< FAB_LAYER_COLOR > & GetStandardColors(BOARD_STACKUP_ITEM_TYPE aType)
VECTOR2I end
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition typeinfo.h:89
Definition of file extensions used in Kicad.