KiCad PCB EDA Suite
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connectivity_data.cpp
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1/*
2 * This program source code file is part of KICAD, a free EDA CAD application.
3 *
4 * Copyright (C) 2017 CERN
5 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
6 * @author Tomasz Wlostowski <[email protected]>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, you may find one here:
20 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
21 * or you may search the http://www.gnu.org website for the version 2 license,
22 * or you may write to the Free Software Foundation, Inc.,
23 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
24 */
25
26#ifdef PROFILE
27#include <core/profile.h>
28#endif
29
30#include <algorithm>
31#include <future>
32#include <initializer_list>
33
37#include <board_item.h>
43#include <progress_reporter.h>
44#include <thread_pool.h>
45#include <trigo.h>
46#include <drc/drc_rtree.h>
47
55
56
57CONNECTIVITY_DATA::CONNECTIVITY_DATA( std::shared_ptr<CONNECTIVITY_DATA> aGlobalConnectivity,
58 const std::vector<BOARD_ITEM*>& aLocalItems,
59 bool aSkipRatsnestUpdate ) :
60 m_skipRatsnestUpdate( aSkipRatsnestUpdate )
61{
62 Build( aGlobalConnectivity, aLocalItems );
63 m_progressReporter = nullptr;
64 m_fromToCache.reset( new FROM_TO_CACHE );
65}
66
67
69{
70 for( RN_NET* net : m_nets )
71 delete net;
72
73 m_nets.clear();
74}
75
76
78{
79 m_connAlgo->Add( aItem );
80 return true;
81}
82
83
85{
86 m_connAlgo->Remove( aItem );
87 return true;
88}
89
90
92{
93 m_connAlgo->Remove( aItem );
94 m_connAlgo->Add( aItem );
95 return true;
96}
97
98
100{
101 aBoard->CacheTriangulation( aReporter );
102
103 std::unique_lock<KISPINLOCK> lock( m_lock, std::try_to_lock );
104
105 if( !lock )
106 return false;
107
108 if( aReporter )
109 {
110 aReporter->Report( _( "Updating nets..." ) );
111 aReporter->KeepRefreshing( false );
112 }
113
114 for( RN_NET* net : m_nets )
115 delete net;
116
117 m_nets.clear();
118
119 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO( this ) );
120 m_connAlgo->Build( aBoard, aReporter );
121
123
124 RefreshNetcodeMap( aBoard );
125
126 if( aReporter )
127 {
128 aReporter->SetCurrentProgress( 0.75 );
129 aReporter->KeepRefreshing( false );
130 }
131
133
134 if( aReporter )
135 {
136 aReporter->SetCurrentProgress( 1.0 );
137 aReporter->KeepRefreshing( false );
138 }
139
140 return true;
141}
142
143
145{
146 m_netcodeMap.clear();
147
148 for( NETINFO_ITEM* net : aBoard->GetNetInfo() )
149 m_netcodeMap[net->GetNetCode()] = net->GetNetname();
150}
151
152
153void CONNECTIVITY_DATA::Build( std::shared_ptr<CONNECTIVITY_DATA>& aGlobalConnectivity,
154 const std::vector<BOARD_ITEM*>& aLocalItems )
155{
156 std::unique_lock<KISPINLOCK> lock( m_lock, std::try_to_lock );
157
158 if( !lock )
159 return;
160
161 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO( this ) );
162 m_connAlgo->LocalBuild( aGlobalConnectivity, aLocalItems );
163
165}
166
167
169{
170 m_connAlgo->ForEachAnchor( [&aDelta]( CN_ANCHOR& anchor )
171 {
172 anchor.Move( aDelta );
173 } );
174}
175
176
178{
179#ifdef PROFILE
180 PROF_TIMER rnUpdate( "update-ratsnest" );
181#endif
182
183 std::vector<RN_NET*> dirty_nets;
184
185 // Start with net 1 as net 0 is reserved for not-connected
186 // Nets without nodes are also ignored
187 std::copy_if( m_nets.begin() + 1, m_nets.end(), std::back_inserter( dirty_nets ),
188 [] ( RN_NET* aNet )
189 {
190 return aNet->IsDirty() && aNet->GetNodeCount() > 0;
191 } );
192
194
195 auto results = tp.submit_loop( 0, dirty_nets.size(),
196 [&]( const int ii )
197 {
198 dirty_nets[ii]->UpdateNet();
199 } );
200 results.wait();
201
202 auto results2 = tp.submit_loop( 0, dirty_nets.size(),
203 [&]( const int ii )
204 {
205 dirty_nets[ii]->OptimizeRNEdges();
206 } );
207 results2.wait();
208
209#ifdef PROFILE
210 rnUpdate.Show();
211#endif
212}
213
214
215void CONNECTIVITY_DATA::addRatsnestCluster( const std::shared_ptr<CN_CLUSTER>& aCluster )
216{
217 RN_NET* rnNet = m_nets[ aCluster->OriginNet() ];
218
219 rnNet->AddCluster( aCluster );
220}
221
222
224{
225
226 // We can take over the lock here if called in the same thread
227 // This is to prevent redraw during a RecalculateRatsnets process
228 std::unique_lock<KISPINLOCK> lock( m_lock );
229
231
232}
233
235{
236 m_connAlgo->PropagateNets( aCommit );
237
238 int lastNet = m_connAlgo->NetCount();
239
240 if( lastNet >= (int) m_nets.size() )
241 {
242 unsigned int prevSize = m_nets.size();
243 m_nets.resize( lastNet + 1 );
244
245 for( unsigned int i = prevSize; i < m_nets.size(); i++ )
246 m_nets[i] = new RN_NET;
247 }
248 else
249 {
250 for( size_t ii = lastNet; ii < m_nets.size(); ++ii )
251 m_nets[ii]->Clear();
252 }
253
254 const std::vector<std::shared_ptr<CN_CLUSTER>>& clusters = m_connAlgo->GetClusters();
255
256 for( int net = 0; net < lastNet; net++ )
257 {
258 if( m_connAlgo->IsNetDirty( net ) )
259 m_nets[net]->Clear();
260 }
261
262 for( const std::shared_ptr<CN_CLUSTER>& c : clusters )
263 {
264 int net = c->OriginNet();
265
266 // Don't add intentionally-kept zone islands to the ratsnest
267 if( c->IsOrphaned() && c->Size() == 1 )
268 {
269 if( dynamic_cast<CN_ZONE_LAYER*>( *c->begin() ) )
270 continue;
271 }
272
273 if( m_connAlgo->IsNetDirty( net ) )
275 }
276
277 m_connAlgo->ClearDirtyFlags();
278
281}
282
283
284void CONNECTIVITY_DATA::BlockRatsnestItems( const std::vector<BOARD_ITEM*>& aItems )
285{
286 std::vector<BOARD_CONNECTED_ITEM*> citems;
287
288 for( BOARD_ITEM* item : aItems )
289 {
290 if( item->Type() == PCB_FOOTPRINT_T )
291 {
292 for( PAD* pad : static_cast<FOOTPRINT*>(item)->Pads() )
293 citems.push_back( pad );
294 }
295 else
296 {
297 if( BOARD_CONNECTED_ITEM* citem = dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
298 citems.push_back( citem );
299 }
300 }
301
302 for( const BOARD_CONNECTED_ITEM* item : citems )
303 {
304 if ( m_connAlgo->ItemExists( item ) )
305 {
306 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( item );
307
308 for( CN_ITEM* cnItem : entry.GetItems() )
309 {
310 for( const std::shared_ptr<CN_ANCHOR>& anchor : cnItem->Anchors() )
311 anchor->SetNoLine( true );
312 }
313 }
314 }
315}
316
317
319{
320 return m_connAlgo->NetCount();
321}
322
323
324void CONNECTIVITY_DATA::FillIsolatedIslandsMap( std::map<ZONE*, std::map<PCB_LAYER_ID, ISOLATED_ISLANDS>>& aMap,
325 bool aConnectivityAlreadyRebuilt )
326{
327 m_connAlgo->FillIsolatedIslandsMap( aMap, aConnectivityAlreadyRebuilt );
328}
329
330
331void CONNECTIVITY_DATA::ComputeLocalRatsnest( const std::vector<BOARD_ITEM*>& aItems,
332 const CONNECTIVITY_DATA* aDynamicData,
333 VECTOR2I aInternalOffset )
334{
335 if( !aDynamicData )
336 return;
337
338 m_dynamicRatsnest.clear();
339 std::mutex dynamic_ratsnest_mutex;
340
341 // This gets connections between the stationary board and the
342 // moving selection
343
344 auto update_lambda = [&]( int nc )
345 {
346 RN_NET* dynamicNet = aDynamicData->m_nets[nc];
347 RN_NET* staticNet = m_nets[nc];
348
352 if( dynamicNet->GetNodeCount() != 0 && dynamicNet->GetNodeCount() != staticNet->GetNodeCount() )
353 {
354 VECTOR2I pos1, pos2;
355
356 if( staticNet->NearestBicoloredPair( dynamicNet, pos1, pos2 ) )
357 {
359 l.a = pos1;
360 l.b = pos2;
361 l.netCode = nc;
362
363 std::lock_guard<std::mutex> lock( dynamic_ratsnest_mutex );
364 m_dynamicRatsnest.push_back( l );
365 }
366 }
367 };
368
370 size_t num_nets = std::min( m_nets.size(), aDynamicData->m_nets.size() );
371
372 auto results = tp.submit_loop( 1, num_nets,
373 [&]( const int ii )
374 {
375 update_lambda( ii );
376 });
377 results.wait();
378
379 // This gets the ratsnest for internal connections in the moving set
380 const std::vector<CN_EDGE>& edges = GetRatsnestForItems( aItems );
381
382 for( const CN_EDGE& edge : edges )
383 {
384 const std::shared_ptr<const CN_ANCHOR>& nodeA = edge.GetSourceNode();
385 const std::shared_ptr<const CN_ANCHOR>& nodeB = edge.GetTargetNode();
386
387 if( !nodeA || nodeA->Dirty() || !nodeB || nodeB->Dirty() )
388 continue;
389
391
392 // Use the parents' positions
393 l.a = nodeA->Parent()->GetPosition() + aInternalOffset;
394 l.b = nodeB->Parent()->GetPosition() + aInternalOffset;
395 l.netCode = 0;
396 m_dynamicRatsnest.push_back( l );
397 }
398}
399
400
402{
403 m_connAlgo->ForEachAnchor( []( CN_ANCHOR& anchor )
404 {
405 anchor.SetNoLine( false );
406 } );
408}
409
410
415
416
418{
419 m_connAlgo->PropagateNets( aCommit );
420}
421
422
424 const std::initializer_list<KICAD_T>& aTypes ) const
425{
426 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY &entry = m_connAlgo->ItemEntry( aItem );
427
428 FOOTPRINT* parentFootprint = aItem->GetParentFootprint();
429
430 auto matchType =
431 [&]( KICAD_T aItemType )
432 {
433 if( aTypes.size() == 0 )
434 return true;
435
436 return alg::contains( aTypes, aItemType);
437 };
438
439 for( CN_ITEM* citem : entry.GetItems() )
440 {
441 for( CN_ITEM* connected : citem->ConnectedItems() )
442 {
443 CN_ZONE_LAYER* zoneLayer = dynamic_cast<CN_ZONE_LAYER*>( connected );
444
445 // lyIdx is compatible with StartLayer() and EndLayer() notation in CN_ITEM
446 // items, where B_Cu is set to INT_MAX (std::numeric_limits<int>::max())
447 int lyIdx = aLayer;
448
449 if( aLayer == B_Cu )
450 lyIdx = std::numeric_limits<int>::max();
451
452 if( connected->Valid()
453 && connected->StartLayer() <= lyIdx && connected->EndLayer() >= lyIdx
454 && matchType( connected->Parent()->Type() )
455 && connected->Net() == aItem->GetNetCode() )
456 {
457 BOARD_ITEM* connectedItem = connected->Parent();
458
459 if( connectedItem == aItem )
460 continue;
461
462 if( parentFootprint && connectedItem
463 && connectedItem->GetParentFootprint() == parentFootprint )
464 {
465 continue;
466 }
467
468 if( aItem->Type() == PCB_PAD_T && connectedItem
469 && connectedItem->Type() == PCB_PAD_T )
470 {
471 const PAD* thisPad = static_cast<const PAD*>( aItem );
472 const PAD* otherPad = static_cast<const PAD*>( connectedItem );
473
474 auto flashesConditionally = []( PADSTACK::UNCONNECTED_LAYER_MODE aMode )
475 {
478 };
479
480 if( flashesConditionally( thisPad->Padstack().UnconnectedLayerMode() )
481 && flashesConditionally( otherPad->Padstack().UnconnectedLayerMode() ) )
482 {
483 continue;
484 }
485 }
486
487 if( aItem->Type() == PCB_PAD_T && zoneLayer )
488 {
489 const PAD* pad = static_cast<const PAD*>( aItem );
490 ZONE* zone = static_cast<ZONE*>( zoneLayer->Parent() );
491 int islandIdx = zoneLayer->SubpolyIndex();
492
493 if( zone->IsFilled() )
494 {
495 PCB_LAYER_ID pcbLayer = ToLAYER_ID( aLayer );
496 const SHAPE_POLY_SET* zoneFill = zone->GetFill( pcbLayer );
497 const SHAPE_LINE_CHAIN& padHull = pad->GetEffectivePolygon( pcbLayer,
498 ERROR_INSIDE )->Outline( 0 );
499
500 for( const VECTOR2I& pt : zoneFill->COutline( islandIdx ).CPoints() )
501 {
502 // If the entire island is inside the pad's flashing then the pad
503 // won't actually connect to anything else, so only return true if
504 // part of the island is *outside* the pad's flashing.
505
506 if( !padHull.PointInside( pt ) )
507 return true;
508 }
509 }
510
511 continue;
512 }
513 else if( aItem->Type() == PCB_VIA_T && zoneLayer )
514 {
515 const PCB_VIA* via = static_cast<const PCB_VIA*>( aItem );
516 ZONE* zone = static_cast<ZONE*>( zoneLayer->Parent() );
517 int islandIdx = zoneLayer->SubpolyIndex();
518
519 if( zone->IsFilled() )
520 {
521 PCB_LAYER_ID layer = ToLAYER_ID( aLayer );
522 const SHAPE_POLY_SET* zoneFill = zone->GetFill( layer );
523 SHAPE_CIRCLE viaHull( via->GetCenter(), via->GetWidth( layer ) / 2 );
524
525 for( const VECTOR2I& pt : zoneFill->COutline( islandIdx ).CPoints() )
526 {
527 // If the entire island is inside the via's flashing then the via
528 // won't actually connect to anything else, so only return true if
529 // part of the island is *outside* the via's flashing.
530
531 if( !viaHull.SHAPE::Collide( pt ) )
532 return true;
533 }
534 }
535
536 continue;
537 }
538
539 return true;
540 }
541 }
542 }
543
544 return false;
545}
546
547
548unsigned int CONNECTIVITY_DATA::GetUnconnectedCount( bool aVisibleOnly ) const
549{
550 unsigned int unconnected = 0;
551
552 for( RN_NET* net : m_nets )
553 {
554 if( !net )
555 continue;
556
557 for( const CN_EDGE& edge : net->GetEdges() )
558 {
559 if( edge.IsVisible() || !aVisibleOnly )
560 ++unconnected;
561 }
562 }
563
564 return unconnected;
565}
566
567
569{
570 for( RN_NET* net : m_nets )
571 net->Clear();
572}
573
574
575const std::vector<BOARD_CONNECTED_ITEM*>
577{
580
581 std::vector<BOARD_CONNECTED_ITEM*> rv;
582
583 auto clusters = m_connAlgo->SearchClusters( ( aFlags & IGNORE_NETS ) ? CSM_PROPAGATE : CSM_CONNECTIVITY_CHECK,
584 ( aFlags & EXCLUDE_ZONES ),
585 ( aFlags & IGNORE_NETS ) ? -1 : aItem->GetNetCode() );
586
587 for( const std::shared_ptr<CN_CLUSTER>& cl : clusters )
588 {
589 if( cl->Contains( aItem ) )
590 {
591 for( const CN_ITEM* item : *cl )
592 {
593 if( item->Valid() )
594 rv.push_back( item->Parent() );
595 }
596 }
597 }
598
599 return rv;
600}
601
602
603const std::vector<BOARD_CONNECTED_ITEM*>
604CONNECTIVITY_DATA::GetNetItems( int aNetCode, const std::vector<KICAD_T>& aTypes ) const
605{
606 std::vector<BOARD_CONNECTED_ITEM*> items;
607 items.reserve( 32 );
608
609 std::bitset<MAX_STRUCT_TYPE_ID> type_bits;
610
611 for( KICAD_T scanType : aTypes )
612 {
613 wxASSERT( scanType < MAX_STRUCT_TYPE_ID );
614 type_bits.set( scanType );
615 }
616
617 m_connAlgo->ForEachItem(
618 [&]( CN_ITEM& aItem )
619 {
620 if( aItem.Valid() && ( aItem.Net() == aNetCode ) && type_bits[aItem.Parent()->Type()] )
621 items.push_back( aItem.Parent() );
622 } );
623
624 std::sort( items.begin(), items.end() );
625 items.erase( std::unique( items.begin(), items.end() ), items.end() );
626 return items;
627}
628
629
630const std::vector<PCB_TRACK*>
632{
633 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( aItem );
634
635 std::set<PCB_TRACK*> tracks;
636 std::vector<PCB_TRACK*> rv;
637
638 for( CN_ITEM* citem : entry.GetItems() )
639 {
640 for( CN_ITEM* connected : citem->ConnectedItems() )
641 {
642 if( connected->Valid() &&
643 ( connected->Parent()->Type() == PCB_TRACE_T ||
644 connected->Parent()->Type() == PCB_VIA_T ||
645 connected->Parent()->Type() == PCB_ARC_T ) )
646 {
647 tracks.insert( static_cast<PCB_TRACK*> ( connected->Parent() ) );
648 }
649 }
650 }
651
652 std::copy( tracks.begin(), tracks.end(), std::back_inserter( rv ) );
653 return rv;
654}
655
656
657void CONNECTIVITY_DATA::GetConnectedPads( const BOARD_CONNECTED_ITEM* aItem, std::set<PAD*>* pads ) const
658{
659 for( CN_ITEM* citem : m_connAlgo->ItemEntry( aItem ).GetItems() )
660 {
661 for( CN_ITEM* connected : citem->ConnectedItems() )
662 {
663 if( connected->Valid() && connected->Parent()->Type() == PCB_PAD_T )
664 pads->insert( static_cast<PAD*> ( connected->Parent() ) );
665 }
666 }
667}
668
669
670const std::vector<PAD*> CONNECTIVITY_DATA::GetConnectedPads( const BOARD_CONNECTED_ITEM* aItem )
671const
672{
673 std::set<PAD*> pads;
674 std::vector<PAD*> rv;
675
676 GetConnectedPads( aItem, &pads );
677
678 std::copy( pads.begin(), pads.end(), std::back_inserter( rv ) );
679 return rv;
680}
681
682
683void CONNECTIVITY_DATA::GetConnectedPadsAndVias( const BOARD_CONNECTED_ITEM* aItem, std::vector<PAD*>* pads,
684 std::vector<PCB_VIA*>* vias )
685{
686 for( CN_ITEM* citem : m_connAlgo->ItemEntry( aItem ).GetItems() )
687 {
688 for( CN_ITEM* connected : citem->ConnectedItems() )
689 {
690 if( connected->Valid() )
691 {
692 BOARD_CONNECTED_ITEM* parent = connected->Parent();
693
694 if( parent->Type() == PCB_PAD_T )
695 pads->push_back( static_cast<PAD*>( parent ) );
696 else if( parent->Type() == PCB_VIA_T )
697 vias->push_back( static_cast<PCB_VIA*>( parent ) );
698 }
699 }
700 }
701}
702
703
704unsigned int CONNECTIVITY_DATA::GetNodeCount( int aNet ) const
705{
706 int sum = 0;
707
708 if( aNet < 0 ) // Node count for all nets
709 {
710 for( const RN_NET* net : m_nets )
711 sum += net->GetNodeCount();
712 }
713 else if( aNet < (int) m_nets.size() )
714 {
715 sum = m_nets[aNet]->GetNodeCount();
716 }
717
718 return sum;
719}
720
721
722unsigned int CONNECTIVITY_DATA::GetPadCount( int aNet ) const
723{
724 int n = 0;
725
726 for( CN_ITEM* pad : m_connAlgo->ItemList() )
727 {
728 if( !pad->Valid() || pad->Parent()->Type() != PCB_PAD_T)
729 continue;
730
731 PAD* dpad = static_cast<PAD*>( pad->Parent() );
732
733 if( aNet < 0 || aNet == dpad->GetNetCode() )
734 n++;
735 }
736
737 return n;
738}
739
740
741void CONNECTIVITY_DATA::RunOnUnconnectedEdges( std::function<bool( CN_EDGE& )> aFunc )
742{
743 for( RN_NET* rnNet : m_nets )
744 {
745 if( rnNet )
746 {
747 for( CN_EDGE& edge : rnNet->GetEdges() )
748 {
749 if( !aFunc( edge ) )
750 return;
751 }
752 }
753 }
754}
755
756
757static int getMinDist( BOARD_CONNECTED_ITEM* aItem, const VECTOR2I& aPoint )
758{
759 switch( aItem->Type() )
760 {
761 case PCB_TRACE_T:
762 case PCB_ARC_T:
763 {
764 PCB_TRACK* track = static_cast<PCB_TRACK*>( aItem );
765
766 return std::min( track->GetStart().Distance(aPoint ), track->GetEnd().Distance( aPoint ) );
767 }
768
769 default:
770 return aItem->GetPosition().Distance( aPoint );
771 }
772}
773
774
775bool CONNECTIVITY_DATA::TestTrackEndpointDangling( PCB_TRACK* aTrack, bool aIgnoreTracksInPads,
776 VECTOR2I* aPos ) const
777{
778 const std::list<CN_ITEM*>& items = GetConnectivityAlgo()->ItemEntry( aTrack ).GetItems();
779
780 // Not in the connectivity system. This is a bug!
781 if( items.empty() )
782 {
783 wxFAIL_MSG( wxT( "track not in connectivity system" ) );
784 return false;
785 }
786
787 CN_ITEM* citem = items.front();
788
789 if( !citem->Valid() )
790 return false;
791
792 if( aTrack->Type() == PCB_TRACE_T || aTrack->Type() == PCB_ARC_T )
793 {
794 // Test if a segment is connected on each end.
795 //
796 // NB: be wary of short segments which can be connected to the *same* other item on
797 // each end. If that's their only connection then they're still dangling.
798
799 PCB_LAYER_ID layer = aTrack->GetLayer();
800 int accuracy = KiROUND( aTrack->GetWidth() / 2.0 );
801 int start_count = 0;
802 int end_count = 0;
803
804 for( CN_ITEM* connected : citem->ConnectedItems() )
805 {
806 BOARD_CONNECTED_ITEM* item = connected->Parent();
807 ZONE* zone = dynamic_cast<ZONE*>( item );
808 DRC_RTREE* rtree = nullptr;
809 bool hitStart = false;
810 bool hitEnd = false;
811
812 if( item->GetFlags() & IS_DELETED )
813 continue;
814
815 if( zone )
816 rtree = zone->GetBoard()->m_CopperZoneRTreeCache[ zone ].get();
817
818 if( rtree )
819 {
820 SHAPE_CIRCLE start( aTrack->GetStart(), accuracy );
821 SHAPE_CIRCLE end( aTrack->GetEnd(), accuracy );
822
823 hitStart = rtree->QueryColliding( start.BBox(), &start, layer );
824 hitEnd = rtree->QueryColliding( end.BBox(), &end, layer );
825 }
826 else
827 {
828 std::shared_ptr<SHAPE> shape = item->GetEffectiveShape( layer );
829
830 hitStart = shape->Collide( aTrack->GetStart(), accuracy );
831 hitEnd = shape->Collide( aTrack->GetEnd(), accuracy );
832 }
833
834 if( hitStart && hitEnd )
835 {
836 if( zone )
837 {
838 // Both start and end in a zone: track may be redundant, but it's not dangling
839 return false;
840 }
841 else if( item->Type() == PCB_PAD_T || item->Type() == PCB_VIA_T )
842 {
843 // Both start and end are under a pad: see what the caller wants us to do
844 if( aIgnoreTracksInPads )
845 return false;
846 }
847
848 if( getMinDist( item, aTrack->GetStart() ) < getMinDist( item, aTrack->GetEnd() ) )
849 start_count++;
850 else
851 end_count++;
852 }
853 else if( hitStart )
854 {
855 start_count++;
856 }
857 else if( hitEnd )
858 {
859 end_count++;
860 }
861
862 if( start_count > 0 && end_count > 0 )
863 return false;
864 }
865
866 if( aPos )
867 *aPos = (start_count == 0 ) ? aTrack->GetStart() : aTrack->GetEnd();
868
869 return true;
870 }
871 else if( aTrack->Type() == PCB_VIA_T )
872 {
873 // Test if a via is only connected on one layer
874
875 const std::vector<CN_ITEM*>& connected = citem->ConnectedItems();
876
877 if( connected.empty() )
878 {
879 // No connections AND no-net is not an error
880 if( aTrack->GetNetCode() <= 0 )
881 return false;
882
883 if( aPos )
884 *aPos = aTrack->GetPosition();
885
886 return true;
887 }
888
889 // Here, we check if the via is connected only to items on a single layer
890 int first_layer = UNDEFINED_LAYER;
891
892 for( CN_ITEM* item : connected )
893 {
894 if( item->Parent()->GetFlags() & IS_DELETED )
895 continue;
896
897 if( first_layer == UNDEFINED_LAYER )
898 first_layer = item->Layer();
899 else if( item->Layer() != first_layer )
900 return false;
901 }
902
903 if( aPos )
904 *aPos = aTrack->GetPosition();
905
906 return true;
907 }
908 else
909 {
910 wxFAIL_MSG( wxT( "CONNECTIVITY_DATA::TestTrackEndpointDangling: unknown track type" ) );
911 }
912
913 return false;
914}
915
916
917const std::vector<BOARD_CONNECTED_ITEM*>
919 const std::vector<KICAD_T>& aTypes, const int& aMaxError ) const
920{
921 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( aItem );
922 std::vector<BOARD_CONNECTED_ITEM*> rv;
923 SEG::ecoord maxError_sq = (SEG::ecoord) aMaxError * aMaxError;
924
925 for( CN_ITEM* cnItem : entry.GetItems() )
926 {
927 for( CN_ITEM* connected : cnItem->ConnectedItems() )
928 {
929 for( const std::shared_ptr<CN_ANCHOR>& anchor : connected->Anchors() )
930 {
931 if( ( anchor->Pos() - aAnchor ).SquaredEuclideanNorm() <= maxError_sq )
932 {
933 for( KICAD_T type : aTypes )
934 {
935 if( connected->Valid() && connected->Parent()->Type() == type )
936 {
937 rv.push_back( connected->Parent() );
938 break;
939 }
940 }
941
942 break;
943 }
944 }
945 }
946 }
947
948 return rv;
949}
950
951
953{
954 if ( aNet < 0 || aNet >= (int) m_nets.size() )
955 return nullptr;
956
957 return m_nets[ aNet ];
958}
959
960
962{
963 if ( aItem->Type() == PCB_FOOTPRINT_T)
964 {
965 for( PAD* pad : static_cast<FOOTPRINT*>( aItem )->Pads() )
966 m_connAlgo->MarkNetAsDirty( pad->GetNetCode() );
967 }
968
969 if (aItem->IsConnected() )
970 m_connAlgo->MarkNetAsDirty( static_cast<BOARD_CONNECTED_ITEM*>( aItem )->GetNetCode() );
971}
972
973
975{
976 m_connAlgo->RemoveInvalidRefs();
977
978 for( RN_NET* rnNet : m_nets )
979 rnNet->RemoveInvalidRefs();
980}
981
982
984{
985 m_progressReporter = aReporter;
986 m_connAlgo->SetProgressReporter( m_progressReporter );
987}
988
989
990const std::vector<CN_EDGE>
991CONNECTIVITY_DATA::GetRatsnestForItems( const std::vector<BOARD_ITEM*>& aItems )
992{
993 std::set<int> nets;
994 std::vector<CN_EDGE> edges;
995 std::set<BOARD_CONNECTED_ITEM*> item_set;
996
997 for( BOARD_ITEM* item : aItems )
998 {
999 if( item->Type() == PCB_FOOTPRINT_T )
1000 {
1001 FOOTPRINT* footprint = static_cast<FOOTPRINT*>( item );
1002
1003 for( PAD* pad : footprint->Pads() )
1004 {
1005 nets.insert( pad->GetNetCode() );
1006 item_set.insert( pad );
1007 }
1008 }
1009 else if( item->IsConnected() )
1010 {
1011 BOARD_CONNECTED_ITEM* conn_item = static_cast<BOARD_CONNECTED_ITEM*>( item );
1012
1013 item_set.insert( conn_item );
1014 nets.insert( conn_item->GetNetCode() );
1015 }
1016 }
1017
1018 for( int netcode : nets )
1019 {
1020 RN_NET* net = GetRatsnestForNet( netcode );
1021
1022 if( !net )
1023 continue;
1024
1025 for( const CN_EDGE& edge : net->GetEdges() )
1026 {
1027 std::shared_ptr<const CN_ANCHOR> srcNode = edge.GetSourceNode();
1028 std::shared_ptr<const CN_ANCHOR> dstNode = edge.GetTargetNode();
1029
1030 if( !srcNode || srcNode->Dirty() || !dstNode || dstNode->Dirty() )
1031 continue;
1032
1033 BOARD_CONNECTED_ITEM* srcParent = srcNode->Parent();
1034 BOARD_CONNECTED_ITEM* dstParent = dstNode->Parent();
1035
1036 bool srcFound = ( item_set.find( srcParent ) != item_set.end() );
1037 bool dstFound = ( item_set.find( dstParent ) != item_set.end() );
1038
1039 if ( srcFound && dstFound )
1040 edges.push_back( edge );
1041 }
1042 }
1043
1044 return edges;
1045}
1046
1047
1048const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForPad( const PAD* aPad )
1049{
1050 std::vector<CN_EDGE> edges;
1051 RN_NET* net = GetRatsnestForNet( aPad->GetNetCode() );
1052
1053 if( !net )
1054 return edges;
1055
1056 for( const CN_EDGE& edge : net->GetEdges() )
1057 {
1058 if( !edge.GetSourceNode() || edge.GetSourceNode()->Dirty() )
1059 continue;
1060
1061 if( !edge.GetTargetNode() || edge.GetTargetNode()->Dirty() )
1062 continue;
1063
1064 if( edge.GetSourceNode()->Parent() == aPad || edge.GetTargetNode()->Parent() == aPad )
1065 edges.push_back( edge );
1066 }
1067
1068 return edges;
1069}
1070
1071
1072const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForComponent( FOOTPRINT* aComponent,
1073 bool aSkipInternalConnections )
1074{
1075 std::set<int> nets;
1076 std::set<const PAD*> pads;
1077 std::vector<CN_EDGE> edges;
1078
1079 for( PAD* pad : aComponent->Pads() )
1080 {
1081 nets.insert( pad->GetNetCode() );
1082 pads.insert( pad );
1083 }
1084
1085 for( int netcode : nets )
1086 {
1087 RN_NET* net = GetRatsnestForNet( netcode );
1088
1089 if( !net )
1090 continue;
1091
1092 for( const CN_EDGE& edge : net->GetEdges() )
1093 {
1094 const std::shared_ptr<const CN_ANCHOR>& srcNode = edge.GetSourceNode();
1095 const std::shared_ptr<const CN_ANCHOR>& dstNode = edge.GetTargetNode();
1096
1097 if( !srcNode || srcNode->Dirty() || !dstNode || dstNode->Dirty() )
1098 continue;
1099
1100 const PAD* srcParent = static_cast<const PAD*>( srcNode->Parent() );
1101 const PAD* dstParent = static_cast<const PAD*>( dstNode->Parent() );
1102
1103 bool srcFound = ( pads.find(srcParent) != pads.end() );
1104 bool dstFound = ( pads.find(dstParent) != pads.end() );
1105
1106 if ( srcFound && dstFound && !aSkipInternalConnections )
1107 edges.push_back( edge );
1108 else if ( srcFound || dstFound )
1109 edges.push_back( edge );
1110 }
1111 }
1112
1113 return edges;
1114}
1115
1116
1118{
1119 if( std::shared_ptr<NET_SETTINGS> netSettings = m_netSettings.lock() )
1120 return netSettings.get();
1121 else
1122 return nullptr;
1123}
@ ERROR_INSIDE
constexpr BOX2I KiROUND(const BOX2D &aBoxD)
Definition box2.h:990
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
std::shared_ptr< NET_SETTINGS > m_NetSettings
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition board_item.h:79
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition board_item.h:232
virtual bool IsConnected() const
Returns information if the object is derived from BOARD_CONNECTED_ITEM.
Definition board_item.h:134
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
virtual const BOARD * GetBoard() const
Return the BOARD in which this BOARD_ITEM resides, or NULL if none.
FOOTPRINT * GetParentFootprint() const
Information pertinent to a Pcbnew printed circuit board.
Definition board.h:317
const NETINFO_LIST & GetNetInfo() const
Definition board.h:933
std::unordered_map< ZONE *, std::unique_ptr< DRC_RTREE > > m_CopperZoneRTreeCache
Definition board.h:1374
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition board.cpp:1040
void CacheTriangulation(PROGRESS_REPORTER *aReporter=nullptr, const std::vector< ZONE * > &aZones={})
Definition board.cpp:1084
CN_ANCHOR represents a physical location that can be connected: a pad or a track/arc/via endpoint.
const std::list< CN_ITEM * > & GetItems() const
ITEM_MAP_ENTRY & ItemEntry(const BOARD_CONNECTED_ITEM *aItem)
CN_EDGE represents a point-to-point connection, whether realized or unrealized (ie: tracks etc.
CN_ITEM represents a BOARD_CONNETED_ITEM in the connectivity system (ie: a pad, track/arc/via,...
const std::vector< CN_ITEM * > & ConnectedItems() const
int Net() const
bool Valid() const
BOARD_CONNECTED_ITEM * Parent() const
int SubpolyIndex() const
void FillIsolatedIslandsMap(std::map< ZONE *, std::map< PCB_LAYER_ID, ISOLATED_ISLANDS > > &aMap, bool aConnectivityAlreadyRebuilt=false)
Fill the isolate islands list for each layer of each zone.
void RecalculateRatsnest(BOARD_COMMIT *aCommit=nullptr)
Function RecalculateRatsnest() Updates the ratsnest for the board.
void ClearLocalRatsnest()
Function ClearLocalRatsnest() Erases the temporary, selection-based ratsnest (i.e.
PROGRESS_REPORTER * m_progressReporter
unsigned int GetPadCount(int aNet=-1) const
void MarkItemNetAsDirty(BOARD_ITEM *aItem)
std::weak_ptr< NET_SETTINGS > m_netSettings
Used to get netclass data when drawing ratsnests.
const std::vector< BOARD_CONNECTED_ITEM * > GetConnectedItems(const BOARD_CONNECTED_ITEM *aItem, int aFlags=0) const
void PropagateNets(BOARD_COMMIT *aCommit=nullptr)
Propagates the net codes from the source pads to the tracks/vias.
void RunOnUnconnectedEdges(std::function< bool(CN_EDGE &)> aFunc)
std::vector< RN_DYNAMIC_LINE > m_dynamicRatsnest
bool m_skipRatsnestUpdate
Used to suppress ratsnest calculations on dynamic ratsnests.
const std::vector< CN_EDGE > GetRatsnestForPad(const PAD *aPad)
RN_NET * GetRatsnestForNet(int aNet)
Function GetRatsnestForNet() Returns the ratsnest, expressed as a set of graph edges for a given net.
const std::vector< BOARD_CONNECTED_ITEM * > GetConnectedItemsAtAnchor(const BOARD_CONNECTED_ITEM *aItem, const VECTOR2I &aAnchor, const std::vector< KICAD_T > &aTypes, const int &aMaxError=0) const
Function GetConnectedItemsAtAnchor() Returns a list of items connected to a source item aItem at posi...
void ClearRatsnest()
Function Clear() Erases the connectivity database.
bool Remove(BOARD_ITEM *aItem)
Function Remove() Removes an item from the connectivity data.
void GetConnectedPadsAndVias(const BOARD_CONNECTED_ITEM *aItem, std::vector< PAD * > *pads, std::vector< PCB_VIA * > *vias)
const NET_SETTINGS * GetNetSettings() const
void ComputeLocalRatsnest(const std::vector< BOARD_ITEM * > &aItems, const CONNECTIVITY_DATA *aDynamicData, VECTOR2I aInternalOffset={ 0, 0 })
Function ComputeLocalRatsnest() Calculates the temporary (usually selection-based) ratsnest for the s...
bool TestTrackEndpointDangling(PCB_TRACK *aTrack, bool aIgnoreTracksInPads, VECTOR2I *aPos=nullptr) const
unsigned int GetNodeCount(int aNet=-1) const
void SetProgressReporter(PROGRESS_REPORTER *aReporter)
void BlockRatsnestItems(const std::vector< BOARD_ITEM * > &aItems)
bool IsConnectedOnLayer(const BOARD_CONNECTED_ITEM *aItem, int aLayer, const std::initializer_list< KICAD_T > &aTypes={}) const
const std::vector< PCB_TRACK * > GetConnectedTracks(const BOARD_CONNECTED_ITEM *aItem) const
const std::vector< CN_EDGE > GetRatsnestForComponent(FOOTPRINT *aComponent, bool aSkipInternalConnections=false)
const std::vector< BOARD_CONNECTED_ITEM * > GetNetItems(int aNetCode, const std::vector< KICAD_T > &aTypes) const
Function GetNetItems() Returns the list of items that belong to a certain net.
bool Add(BOARD_ITEM *aItem)
Function Add() Adds an item to the connectivity data.
std::shared_ptr< CN_CONNECTIVITY_ALGO > m_connAlgo
bool Build(BOARD *aBoard, PROGRESS_REPORTER *aReporter=nullptr)
Function Build() Builds the connectivity database for the board aBoard.
std::shared_ptr< FROM_TO_CACHE > m_fromToCache
const std::vector< PAD * > GetConnectedPads(const BOARD_CONNECTED_ITEM *aItem) const
unsigned int GetUnconnectedCount(bool aVisibileOnly) const
std::map< int, wxString > m_netcodeMap
Used to map netcode to net name.
void internalRecalculateRatsnest(BOARD_COMMIT *aCommit=nullptr)
Updates the ratsnest for the board without locking the connectivity mutex.
void RefreshNetcodeMap(BOARD *aBoard)
Refresh the map of netcodes to net names.
void HideLocalRatsnest()
Hides the temporary, selection-based ratsnest lines.
const std::vector< CN_EDGE > GetRatsnestForItems(const std::vector< BOARD_ITEM * > &aItems)
void addRatsnestCluster(const std::shared_ptr< CN_CLUSTER > &aCluster)
std::vector< RN_NET * > m_nets
bool Update(BOARD_ITEM *aItem)
Function Update() Updates the connectivity data for an item.
void Move(const VECTOR2I &aDelta)
Moves the connectivity list anchors.
int GetNetCount() const
Function GetNetCount() Returns the total number of nets in the connectivity database.
std::shared_ptr< CN_CONNECTIVITY_ALGO > GetConnectivityAlgo() const
Implement an R-tree for fast spatial and layer indexing of connectable items.
Definition drc_rtree.h:48
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
Definition drc_rtree.h:214
virtual VECTOR2I GetPosition() const
Definition eda_item.h:272
KICAD_T Type() const
Returns the type of object.
Definition eda_item.h:110
EDA_ITEM_FLAGS GetFlags() const
Definition eda_item.h:145
std::deque< PAD * > & Pads()
Definition footprint.h:224
Handle the data for a net.
Definition netinfo.h:54
NET_SETTINGS stores various net-related settings in a project context.
UNCONNECTED_LAYER_MODE UnconnectedLayerMode() const
Definition padstack.h:314
UNCONNECTED_LAYER_MODE
! Whether or not to remove the copper shape for unconnected layers
Definition padstack.h:152
Definition pad.h:54
const PADSTACK & Padstack() const
Definition pad.h:321
const VECTOR2I & GetStart() const
Definition pcb_track.h:152
VECTOR2I GetPosition() const override
Definition pcb_track.h:142
const VECTOR2I & GetEnd() const
Definition pcb_track.h:149
virtual int GetWidth() const
Definition pcb_track.h:146
A small class to help profiling.
Definition profile.h:49
void Show(std::ostream &aStream=std::cerr)
Print the elapsed time (in a suitable unit) to a stream.
Definition profile.h:105
A progress reporter interface for use in multi-threaded environments.
virtual bool KeepRefreshing(bool aWait=false)=0
Update the UI (if any).
virtual void Report(const wxString &aMessage)=0
Display aMessage in the progress bar dialog.
virtual void SetCurrentProgress(double aProgress)=0
Set the progress value to aProgress (0..1).
Describe ratsnest for a single net.
unsigned int GetNodeCount() const
const std::vector< CN_EDGE > & GetEdges() const
bool NearestBicoloredPair(RN_NET *aOtherNet, VECTOR2I &aPos1, VECTOR2I &aPos2) const
void AddCluster(std::shared_ptr< CN_CLUSTER > aCluster)
VECTOR2I::extended_type ecoord
Definition seg.h:44
const BOX2I BBox(int aClearance=0) const override
Compute a bounding box of the shape, with a margin of aClearance a collision.
bool PointInside(const VECTOR2I &aPt, int aAccuracy=0, bool aUseBBoxCache=false) const override
Check if point aP lies inside a closed shape.
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
const std::vector< VECTOR2I > & CPoints() const
Represent a set of closed polygons.
const SHAPE_LINE_CHAIN & COutline(int aIndex) const
double Distance(const VECTOR2< extended_type > &aVector) const
Compute the distance between two vectors.
Definition vector2d.h:561
Handle a list of polygons defining a copper zone.
Definition zone.h:74
bool IsFilled() const
Definition zone.h:292
SHAPE_POLY_SET * GetFill(PCB_LAYER_ID aLayer)
Definition zone.h:606
static int getMinDist(BOARD_CONNECTED_ITEM *aItem, const VECTOR2I &aPoint)
#define EXCLUDE_ZONES
#define IGNORE_NETS
Function GetConnectedItems() Returns a list of items connected to a source item aItem.
#define _(s)
#define IS_DELETED
PCB_LAYER_ID
A quick note on layer IDs:
Definition layer_ids.h:60
@ B_Cu
Definition layer_ids.h:65
@ UNDEFINED_LAYER
Definition layer_ids.h:61
PCB_LAYER_ID ToLAYER_ID(int aLayer)
Definition lset.cpp:737
bool contains(const _Container &__container, _Value __value)
Returns true if the container contains the given value.
Definition kicad_algo.h:100
Class that computes missing connections on a PCB.
VECTOR2I end
const int accuracy
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
static thread_pool * tp
BS::thread_pool< 0 > thread_pool
Definition thread_pool.h:31
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition typeinfo.h:78
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition typeinfo.h:97
@ MAX_STRUCT_TYPE_ID
Definition typeinfo.h:240
@ PCB_FOOTPRINT_T
class FOOTPRINT, a footprint
Definition typeinfo.h:86
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition typeinfo.h:87
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition typeinfo.h:98
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition typeinfo.h:96
VECTOR2< int32_t > VECTOR2I
Definition vector2d.h:695