KiCad PCB EDA Suite
connectivity_data.cpp
Go to the documentation of this file.
1/*
2 * This program source code file is part of KICAD, a free EDA CAD application.
3 *
4 * Copyright (C) 2017 CERN
5 * Copyright (C) 2018-2022 KiCad Developers, see AUTHORS.txt for contributors.
6 * @author Tomasz Wlostowski <[email protected]>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, you may find one here:
20 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
21 * or you may search the http://www.gnu.org website for the version 2 license,
22 * or you may write to the Free Software Foundation, Inc.,
23 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
24 */
25
26#ifdef PROFILE
27#include <profile.h>
28#endif
29
30#include <algorithm>
31#include <future>
32#include <initializer_list>
33
42#include <progress_reporter.h>
43#include <thread_pool.h>
44#include <trigo.h>
45#include <drc/drc_rtree.h>
46
48{
50 m_progressReporter = nullptr;
51 m_fromToCache.reset( new FROM_TO_CACHE );
52}
53
54
55CONNECTIVITY_DATA::CONNECTIVITY_DATA( const std::vector<BOARD_ITEM*>& aItems, bool aSkipRatsnest )
56 : m_skipRatsnest( aSkipRatsnest )
57{
58 Build( aItems );
59 m_progressReporter = nullptr;
60 m_fromToCache.reset( new FROM_TO_CACHE );
61}
62
63
65{
66 for( RN_NET* net : m_nets )
67 delete net;
68
69 m_nets.clear();
70}
71
72
74{
75 m_connAlgo->Add( aItem );
76 return true;
77}
78
79
81{
82 m_connAlgo->Remove( aItem );
83 return true;
84}
85
86
88{
89 m_connAlgo->Remove( aItem );
90 m_connAlgo->Add( aItem );
91 return true;
92}
93
94
96{
97 aBoard->CacheTriangulation( aReporter );
98
99 std::unique_lock<KISPINLOCK> lock( m_lock, std::try_to_lock );
100
101 if( !lock )
102 return;
103
104 if( aReporter )
105 {
106 aReporter->Report( _( "Updating nets..." ) );
107 aReporter->KeepRefreshing( false );
108 }
109
110 std::shared_ptr<NET_SETTINGS>& netSettings = aBoard->GetDesignSettings().m_NetSettings;
111
112 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO );
113 m_connAlgo->Build( aBoard, aReporter );
114
115 m_netclassMap.clear();
116
117 for( NETINFO_ITEM* net : aBoard->GetNetInfo() )
118 {
119 net->SetNetClass( netSettings->GetEffectiveNetClass( net->GetNetname() ) );
120
121 if( net->GetNetClass()->GetName() != NETCLASS::Default )
122 m_netclassMap[ net->GetNetCode() ] = net->GetNetClass()->GetName();
123 }
124
125 if( aReporter )
126 {
127 aReporter->SetCurrentProgress( 0.75 );
128 aReporter->KeepRefreshing( false );
129 }
130
132
133 if( aReporter )
134 {
135 aReporter->SetCurrentProgress( 1.0 );
136 aReporter->KeepRefreshing( false );
137 }
138}
139
140
141void CONNECTIVITY_DATA::Build( const std::vector<BOARD_ITEM*>& aItems )
142{
143 std::unique_lock<KISPINLOCK> lock( m_lock, std::try_to_lock );
144
145 if( !lock )
146 return;
147
148 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO );
149 m_connAlgo->LocalBuild( aItems );
150
152}
153
154
156{
157 m_connAlgo->ForEachAnchor( [&aDelta]( CN_ANCHOR& anchor )
158 {
159 anchor.Move( aDelta );
160 } );
161}
162
163
165{
166#ifdef PROFILE
167 PROF_TIMER rnUpdate( "update-ratsnest" );
168#endif
169
170 std::vector<RN_NET*> dirty_nets;
171
172 // Start with net 1 as net 0 is reserved for not-connected
173 // Nets without nodes are also ignored
174 std::copy_if( m_nets.begin() + 1, m_nets.end(), std::back_inserter( dirty_nets ),
175 [] ( RN_NET* aNet )
176 {
177 return aNet->IsDirty() && aNet->GetNodeCount() > 0;
178 } );
179
181
182 tp.push_loop( dirty_nets.size(),
183 [&]( const int a, const int b)
184 {
185 for( int ii = a; ii < b; ++ii )
186 dirty_nets[ii]->UpdateNet();
187 } );
188 tp.wait_for_tasks();
189
190#ifdef PROFILE
191 rnUpdate.Show();
192#endif
193}
194
195
196void CONNECTIVITY_DATA::addRatsnestCluster( const std::shared_ptr<CN_CLUSTER>& aCluster )
197{
198 RN_NET* rnNet = m_nets[ aCluster->OriginNet() ];
199
200 rnNet->AddCluster( aCluster );
201}
202
203
205{
206 m_connAlgo->PropagateNets( aCommit );
207
208 int lastNet = m_connAlgo->NetCount();
209
210 if( lastNet >= (int) m_nets.size() )
211 {
212 unsigned int prevSize = m_nets.size();
213 m_nets.resize( lastNet + 1 );
214
215 for( unsigned int i = prevSize; i < m_nets.size(); i++ )
216 m_nets[i] = new RN_NET;
217 }
218 else
219 {
220 for( size_t ii = lastNet; ii < m_nets.size(); ++ii )
221 m_nets[ii]->Clear();
222 }
223
224 const std::vector<std::shared_ptr<CN_CLUSTER>>& clusters = m_connAlgo->GetClusters();
225
226 int dirtyNets = 0;
227
228 for( int net = 0; net < lastNet; net++ )
229 {
230 if( m_connAlgo->IsNetDirty( net ) )
231 {
232 m_nets[net]->Clear();
233 dirtyNets++;
234 }
235 }
236
237 for( const std::shared_ptr<CN_CLUSTER>& c : clusters )
238 {
239 int net = c->OriginNet();
240
241 // Don't add intentionally-kept zone islands to the ratsnest
242 if( c->IsOrphaned() && c->Size() == 1 )
243 {
244 if( dynamic_cast<CN_ZONE_LAYER*>( *c->begin() ) )
245 continue;
246 }
247
248 if( m_connAlgo->IsNetDirty( net ) )
250 }
251
252 m_connAlgo->ClearDirtyFlags();
253
254 if( !m_skipRatsnest )
256}
257
258
259void CONNECTIVITY_DATA::BlockRatsnestItems( const std::vector<BOARD_ITEM*>& aItems )
260{
261 std::vector<BOARD_CONNECTED_ITEM*> citems;
262
263 for( BOARD_ITEM* item : aItems )
264 {
265 if( item->Type() == PCB_FOOTPRINT_T )
266 {
267 for( PAD* pad : static_cast<FOOTPRINT*>(item)->Pads() )
268 citems.push_back( pad );
269 }
270 else
271 {
272 if( BOARD_CONNECTED_ITEM* citem = dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
273 citems.push_back( citem );
274 }
275 }
276
277 for( const BOARD_CONNECTED_ITEM* item : citems )
278 {
279 if ( m_connAlgo->ItemExists( item ) )
280 {
281 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( item );
282
283 for( CN_ITEM* cnItem : entry.GetItems() )
284 {
285 for( const std::shared_ptr<CN_ANCHOR>& anchor : cnItem->Anchors() )
286 anchor->SetNoLine( true );
287 }
288 }
289 }
290}
291
292
294{
295 return m_connAlgo->NetCount();
296}
297
298
299void CONNECTIVITY_DATA::FindIsolatedCopperIslands( ZONE* aZone, std::vector<int>& aIslands )
300{
301 // TODO(JE) ZONES
302#if 0
303 m_connAlgo->FindIsolatedCopperIslands( aZone, aIslands );
304#endif
305}
306
307void CONNECTIVITY_DATA::FindIsolatedCopperIslands( std::vector<CN_ZONE_ISOLATED_ISLAND_LIST>& aZones,
308 bool aConnectivityAlreadyRebuilt )
309{
310 m_connAlgo->FindIsolatedCopperIslands( aZones, aConnectivityAlreadyRebuilt );
311}
312
313
314void CONNECTIVITY_DATA::ComputeLocalRatsnest( const std::vector<BOARD_ITEM*>& aItems,
315 const CONNECTIVITY_DATA* aDynamicData,
316 VECTOR2I aInternalOffset )
317{
318 if( !aDynamicData )
319 return;
320
321 m_dynamicRatsnest.clear();
322 std::mutex dynamic_ratsnest_mutex;
323
324 // This gets connections between the stationary board and the
325 // moving selection
326
327 auto update_lambda = [&]( int nc )
328 {
329 RN_NET* dynamicNet = aDynamicData->m_nets[nc];
330 RN_NET* staticNet = m_nets[nc];
331
335 if( dynamicNet->GetNodeCount() != 0
336 && dynamicNet->GetNodeCount() != staticNet->GetNodeCount() )
337 {
338 VECTOR2I pos1, pos2;
339
340 if( staticNet->NearestBicoloredPair( dynamicNet, pos1, pos2 ) )
341 {
343 l.a = pos1;
344 l.b = pos2;
345 l.netCode = nc;
346
347 std::lock_guard<std::mutex> lock( dynamic_ratsnest_mutex );
348 m_dynamicRatsnest.push_back( l );
349 }
350 }
351 };
352
354
355 tp.push_loop( 1, aDynamicData->m_nets.size(),
356 [&]( const int a, const int b)
357 {
358 for( int ii = a; ii < b; ++ii )
359 update_lambda( ii );
360 });
361 tp.wait_for_tasks();
362
363 // This gets the ratsnest for internal connections in the moving set
364 const std::vector<CN_EDGE>& edges = GetRatsnestForItems( aItems );
365
366 for( const CN_EDGE& edge : edges )
367 {
368 const std::shared_ptr<const CN_ANCHOR>& nodeA = edge.GetSourceNode();
369 const std::shared_ptr<const CN_ANCHOR>& nodeB = edge.GetTargetNode();
371
372 // Use the parents' positions
373 l.a = nodeA->Parent()->GetPosition() + aInternalOffset;
374 l.b = nodeB->Parent()->GetPosition() + aInternalOffset;
375 l.netCode = 0;
376 m_dynamicRatsnest.push_back( l );
377 }
378}
379
380
382{
383 m_connAlgo->ForEachAnchor( []( CN_ANCHOR& anchor )
384 {
385 anchor.SetNoLine( false );
386 } );
388}
389
390
392{
393 m_dynamicRatsnest.clear();
394}
395
396
398{
399 m_connAlgo->PropagateNets( aCommit, aMode );
400}
401
402
404 const std::initializer_list<KICAD_T>& aTypes ) const
405{
406 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY &entry = m_connAlgo->ItemEntry( aItem );
407
408 auto matchType =
409 [&]( KICAD_T aItemType )
410 {
411 if( aTypes.size() == 0 )
412 return true;
413
414 return alg::contains( aTypes, aItemType);
415 };
416
417 for( CN_ITEM* citem : entry.GetItems() )
418 {
419 for( CN_ITEM* connected : citem->ConnectedItems() )
420 {
421 CN_ZONE_LAYER* zoneLayer = dynamic_cast<CN_ZONE_LAYER*>( connected );
422
423 if( connected->Valid()
424 && connected->Layers().Overlaps( aLayer )
425 && matchType( connected->Parent()->Type() )
426 && connected->Net() == aItem->GetNetCode() )
427 {
428 if( aItem->Type() == PCB_PAD_T && zoneLayer )
429 {
430 const PAD* pad = static_cast<const PAD*>( aItem );
431 ZONE* zone = static_cast<ZONE*>( zoneLayer->Parent() );
432 int islandIdx = zoneLayer->SubpolyIndex();
433
434 if( zone->IsFilled() )
435 {
436 const SHAPE_POLY_SET* zoneFill = zone->GetFill( ToLAYER_ID( aLayer ) );
437 const SHAPE_LINE_CHAIN& padHull = pad->GetEffectivePolygon()->Outline( 0 );
438
439 for( const VECTOR2I& pt : zoneFill->COutline( islandIdx ).CPoints() )
440 {
441 // If the entire island is inside the pad's flashing then the pad
442 // won't actually connect to anything else, so only return true if
443 // part of the island is *outside* the pad's flashing.
444
445 if( !padHull.PointInside( pt ) )
446 return true;
447 }
448 }
449
450 continue;
451 }
452 else if( aItem->Type() == PCB_VIA_T && zoneLayer )
453 {
454 const PCB_VIA* via = static_cast<const PCB_VIA*>( aItem );
455 ZONE* zone = static_cast<ZONE*>( zoneLayer->Parent() );
456 int islandIdx = zoneLayer->SubpolyIndex();
457
458 if( zone->IsFilled() )
459 {
460 const SHAPE_POLY_SET* zoneFill = zone->GetFill( ToLAYER_ID( aLayer ) );
461 SHAPE_CIRCLE viaHull( via->GetCenter(), via->GetWidth() / 2 );
462
463 for( const VECTOR2I& pt : zoneFill->COutline( islandIdx ).CPoints() )
464 {
465 // If the entire island is inside the via's flashing then the via
466 // won't actually connect to anything else, so only return true if
467 // part of the island is *outside* the via's flashing.
468
469 if( !viaHull.SHAPE::Collide( pt ) )
470 return true;
471 }
472 }
473
474 continue;
475 }
476
477 return true;
478 }
479 }
480 }
481
482 return false;
483}
484
485
486unsigned int CONNECTIVITY_DATA::GetUnconnectedCount( bool aVisibleOnly ) const
487{
488 unsigned int unconnected = 0;
489
490 for( RN_NET* net : m_nets )
491 {
492 if( !net )
493 continue;
494
495 for( const CN_EDGE& edge : net->GetEdges() )
496 {
497 if( edge.IsVisible() || !aVisibleOnly )
498 ++unconnected;
499 }
500 }
501
502 return unconnected;
503}
504
505
507{
508 for( RN_NET* net : m_nets )
509 net->Clear();
510}
511
512
513const std::vector<BOARD_CONNECTED_ITEM*>
515 const std::initializer_list<KICAD_T>& aTypes,
516 bool aIgnoreNetcodes ) const
517{
518 std::vector<BOARD_CONNECTED_ITEM*> rv;
520
521 if( aIgnoreNetcodes )
523 else
525
526 const auto clusters = m_connAlgo->SearchClusters( searchMode, aTypes,
527 aIgnoreNetcodes ? -1 : aItem->GetNetCode() );
528
529 for( const std::shared_ptr<CN_CLUSTER>& cl : clusters )
530 {
531 if( cl->Contains( aItem ) )
532 {
533 for( const CN_ITEM* item : *cl )
534 {
535 if( item->Valid() )
536 rv.push_back( item->Parent() );
537 }
538 }
539 }
540
541 return rv;
542}
543
544
545const std::vector<BOARD_CONNECTED_ITEM*>
546CONNECTIVITY_DATA::GetNetItems( int aNetCode, const std::initializer_list<KICAD_T>& aTypes ) const
547{
548 std::vector<BOARD_CONNECTED_ITEM*> items;
549 items.reserve( 32 );
550
551 std::bitset<MAX_STRUCT_TYPE_ID> type_bits;
552
553 for( KICAD_T scanType : aTypes )
554 {
555 wxASSERT( scanType < MAX_STRUCT_TYPE_ID );
556 type_bits.set( scanType );
557 }
558
559 m_connAlgo->ForEachItem(
560 [&]( CN_ITEM& aItem )
561 {
562 if( aItem.Valid() && ( aItem.Net() == aNetCode ) && type_bits[aItem.Parent()->Type()] )
563 items.push_back( aItem.Parent() );
564 } );
565
566 std::sort( items.begin(), items.end() );
567 items.erase( std::unique( items.begin(), items.end() ), items.end() );
568 return items;
569}
570
571
572const std::vector<PCB_TRACK*>
574{
575 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( aItem );
576
577 std::set<PCB_TRACK*> tracks;
578 std::vector<PCB_TRACK*> rv;
579
580 for( CN_ITEM* citem : entry.GetItems() )
581 {
582 for( CN_ITEM* connected : citem->ConnectedItems() )
583 {
584 if( connected->Valid() &&
585 ( connected->Parent()->Type() == PCB_TRACE_T ||
586 connected->Parent()->Type() == PCB_VIA_T ||
587 connected->Parent()->Type() == PCB_ARC_T ) )
588 {
589 tracks.insert( static_cast<PCB_TRACK*> ( connected->Parent() ) );
590 }
591 }
592 }
593
594 std::copy( tracks.begin(), tracks.end(), std::back_inserter( rv ) );
595 return rv;
596}
597
598
600 std::set<PAD*>* pads ) const
601{
602 for( CN_ITEM* citem : m_connAlgo->ItemEntry( aItem ).GetItems() )
603 {
604 for( CN_ITEM* connected : citem->ConnectedItems() )
605 {
606 if( connected->Valid() && connected->Parent()->Type() == PCB_PAD_T )
607 pads->insert( static_cast<PAD*> ( connected->Parent() ) );
608 }
609 }
610}
611
612
613const std::vector<PAD*> CONNECTIVITY_DATA::GetConnectedPads( const BOARD_CONNECTED_ITEM* aItem )
614const
615{
616 std::set<PAD*> pads;
617 std::vector<PAD*> rv;
618
619 GetConnectedPads( aItem, &pads );
620
621 std::copy( pads.begin(), pads.end(), std::back_inserter( rv ) );
622 return rv;
623}
624
625
626unsigned int CONNECTIVITY_DATA::GetNodeCount( int aNet ) const
627{
628 int sum = 0;
629
630 if( aNet < 0 ) // Node count for all nets
631 {
632 for( const RN_NET* net : m_nets )
633 sum += net->GetNodeCount();
634 }
635 else if( aNet < (int) m_nets.size() )
636 {
637 sum = m_nets[aNet]->GetNodeCount();
638 }
639
640 return sum;
641}
642
643
644unsigned int CONNECTIVITY_DATA::GetPadCount( int aNet ) const
645{
646 int n = 0;
647
648 for( CN_ITEM* pad : m_connAlgo->ItemList() )
649 {
650 if( !pad->Valid() || pad->Parent()->Type() != PCB_PAD_T)
651 continue;
652
653 PAD* dpad = static_cast<PAD*>( pad->Parent() );
654
655 if( aNet < 0 || aNet == dpad->GetNetCode() )
656 n++;
657 }
658
659 return n;
660}
661
662
663void CONNECTIVITY_DATA::RunOnUnconnectedEdges( std::function<bool( CN_EDGE& )> aFunc )
664{
665 for( RN_NET* rnNet : m_nets )
666 {
667 if( rnNet )
668 {
669 for( CN_EDGE& edge : rnNet->GetEdges() )
670 {
671 if( !aFunc( edge ) )
672 return;
673 }
674 }
675 }
676}
677
678
679static int getMinDist( BOARD_CONNECTED_ITEM* aItem, const VECTOR2I& aPoint )
680{
681 switch( aItem->Type() )
682 {
683 case PCB_TRACE_T:
684 case PCB_ARC_T:
685 {
686 PCB_TRACK* track = static_cast<PCB_TRACK*>( aItem );
687
688 return std::min( GetLineLength( track->GetStart(), aPoint ),
689 GetLineLength( track->GetEnd(), aPoint ) );
690 }
691
692 default:
693 return GetLineLength( aItem->GetPosition(), aPoint );
694 }
695}
696
697
699{
700 std::list<CN_ITEM*> items = GetConnectivityAlgo()->ItemEntry( aTrack ).GetItems();
701
702 // Not in the connectivity system. This is a bug!
703 if( items.empty() )
704 {
705 wxFAIL_MSG( wxT( "track not in connectivity system" ) );
706 return false;
707 }
708
709 CN_ITEM* citem = items.front();
710
711 if( !citem->Valid() )
712 return false;
713
714 if( aTrack->Type() == PCB_TRACE_T || aTrack->Type() == PCB_ARC_T )
715 {
716 // Test if a segment is connected on each end.
717 //
718 // NB: be wary of short segments which can be connected to the *same* other item on
719 // each end. If that's their only connection then they're still dangling.
720
721 PCB_LAYER_ID layer = aTrack->GetLayer();
722 int accuracy = KiROUND( aTrack->GetWidth() / 2 );
723 int start_count = 0;
724 int end_count = 0;
725
726 for( CN_ITEM* connected : citem->ConnectedItems() )
727 {
728 BOARD_CONNECTED_ITEM* item = connected->Parent();
729 ZONE* zone = dynamic_cast<ZONE*>( item );
730 DRC_RTREE* rtree = nullptr;
731 bool hitStart = false;
732 bool hitEnd = false;
733
734 if( item->GetFlags() & IS_DELETED )
735 continue;
736
737 if( zone )
738 rtree = zone->GetBoard()->m_CopperZoneRTreeCache[ zone ].get();
739
740 if( rtree )
741 {
742 SHAPE_CIRCLE start( aTrack->GetStart(), accuracy );
743 SHAPE_CIRCLE end( aTrack->GetEnd(), accuracy );
744
745 hitStart = rtree->QueryColliding( start.BBox(), &start, layer );
746 hitEnd = rtree->QueryColliding( end.BBox(), &end, layer );
747 }
748 else
749 {
750 std::shared_ptr<SHAPE> shape = item->GetEffectiveShape( layer );
751
752 hitStart = shape->Collide( aTrack->GetStart(), accuracy );
753 hitEnd = shape->Collide( aTrack->GetEnd(), accuracy );
754 }
755
756 if( hitStart && hitEnd )
757 {
758 if( getMinDist( item, aTrack->GetStart() ) < getMinDist( item, aTrack->GetEnd() ) )
759 start_count++;
760 else
761 end_count++;
762 }
763 else if( hitStart )
764 {
765 start_count++;
766 }
767 else if( hitEnd )
768 {
769 end_count++;
770 }
771
772 if( start_count > 0 && end_count > 0 )
773 return false;
774 }
775
776 if( aPos )
777 *aPos = (start_count == 0 ) ? aTrack->GetStart() : aTrack->GetEnd();
778
779 return true;
780 }
781 else if( aTrack->Type() == PCB_VIA_T )
782 {
783 // Test if a via is only connected on one layer
784
785 const std::vector<CN_ITEM*>& connected = citem->ConnectedItems();
786
787 if( connected.empty() )
788 {
789 if( aPos )
790 *aPos = aTrack->GetPosition();
791
792 return true;
793 }
794
795 // Here, we check if the via is connected only to items on a single layer
796 int first_layer = UNDEFINED_LAYER;
797
798 for( CN_ITEM* item : connected )
799 {
800 if( item->Parent()->GetFlags() & IS_DELETED )
801 continue;
802
803 if( first_layer == UNDEFINED_LAYER )
804 first_layer = item->Layer();
805 else if( item->Layer() != first_layer )
806 return false;
807 }
808
809 if( aPos )
810 *aPos = aTrack->GetPosition();
811
812 return true;
813 }
814 else
815 {
816 wxFAIL_MSG( wxT( "CONNECTIVITY_DATA::TestTrackEndpointDangling: unknown track type" ) );
817 }
818
819 return false;
820}
821
822
823const std::vector<BOARD_CONNECTED_ITEM*>
825 const VECTOR2I& aAnchor,
826 const std::initializer_list<KICAD_T>& aTypes,
827 const int& aMaxError ) const
828{
829 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( aItem );
830 std::vector<BOARD_CONNECTED_ITEM*> rv;
831 SEG::ecoord maxError_sq = (SEG::ecoord) aMaxError * aMaxError;
832
833 for( CN_ITEM* cnItem : entry.GetItems() )
834 {
835 for( CN_ITEM* connected : cnItem->ConnectedItems() )
836 {
837 for( const std::shared_ptr<CN_ANCHOR>& anchor : connected->Anchors() )
838 {
839 if( ( anchor->Pos() - aAnchor ).SquaredEuclideanNorm() <= maxError_sq )
840 {
841 for( KICAD_T type : aTypes )
842 {
843 if( connected->Valid() && connected->Parent()->Type() == type )
844 {
845 rv.push_back( connected->Parent() );
846 break;
847 }
848 }
849
850 break;
851 }
852 }
853 }
854 }
855
856 return rv;
857}
858
859
861{
862 if ( aNet < 0 || aNet >= (int) m_nets.size() )
863 {
864 return nullptr;
865 }
866
867 return m_nets[ aNet ];
868}
869
870
872{
873 if ( aItem->Type() == PCB_FOOTPRINT_T)
874 {
875 for( PAD* pad : static_cast<FOOTPRINT*>( aItem )->Pads() )
876 m_connAlgo->MarkNetAsDirty( pad->GetNetCode() );
877 }
878 if (aItem->IsConnected() )
879 {
880 m_connAlgo->MarkNetAsDirty( static_cast<BOARD_CONNECTED_ITEM*>( aItem )->GetNetCode() );
881 }
882}
883
884
886{
887 m_progressReporter = aReporter;
888 m_connAlgo->SetProgressReporter( m_progressReporter );
889}
890
891
892const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForItems( std::vector<BOARD_ITEM*> aItems )
893{
894 std::set<int> nets;
895 std::vector<CN_EDGE> edges;
896 std::set<BOARD_CONNECTED_ITEM*> item_set;
897
898 for( BOARD_ITEM* item : aItems )
899 {
900 if( item->Type() == PCB_FOOTPRINT_T )
901 {
902 FOOTPRINT* footprint = static_cast<FOOTPRINT*>( item );
903
904 for( PAD* pad : footprint->Pads() )
905 {
906 nets.insert( pad->GetNetCode() );
907 item_set.insert( pad );
908 }
909 }
910 else if( auto conn_item = dyn_cast<BOARD_CONNECTED_ITEM*>( item ) )
911 {
912 item_set.insert( conn_item );
913 nets.insert( conn_item->GetNetCode() );
914 }
915 }
916
917 for( int netcode : nets )
918 {
919 RN_NET* net = GetRatsnestForNet( netcode );
920
921 for( const CN_EDGE& edge : net->GetEdges() )
922 {
923 std::shared_ptr<const CN_ANCHOR> srcNode = edge.GetSourceNode();
924 std::shared_ptr<const CN_ANCHOR> dstNode = edge.GetTargetNode();
925
926 BOARD_CONNECTED_ITEM* srcParent = srcNode->Parent();
927 BOARD_CONNECTED_ITEM* dstParent = dstNode->Parent();
928
929 bool srcFound = ( item_set.find( srcParent ) != item_set.end() );
930 bool dstFound = ( item_set.find( dstParent ) != item_set.end() );
931
932 if ( srcFound && dstFound )
933 edges.push_back( edge );
934 }
935 }
936
937 return edges;
938}
939
940
941const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForPad( const PAD* aPad )
942{
943 std::vector<CN_EDGE> edges;
944 RN_NET* net = GetRatsnestForNet( aPad->GetNetCode() );
945
946 for( const CN_EDGE& edge : net->GetEdges() )
947 {
948 if( edge.GetSourceNode()->Parent() == aPad || edge.GetTargetNode()->Parent() == aPad )
949 edges.push_back( edge );
950 }
951
952 return edges;
953}
954
955
956const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForComponent( FOOTPRINT* aComponent, bool aSkipInternalConnections )
957{
958 std::set<int> nets;
959 std::set<const PAD*> pads;
960 std::vector<CN_EDGE> edges;
961
962 for( PAD* pad : aComponent->Pads() )
963 {
964 nets.insert( pad->GetNetCode() );
965 pads.insert( pad );
966 }
967
968 for( const auto& netcode : nets )
969 {
970 RN_NET* net = GetRatsnestForNet( netcode );
971
972 for( const CN_EDGE& edge : net->GetEdges() )
973 {
974 auto srcNode = edge.GetSourceNode();
975 auto dstNode = edge.GetTargetNode();
976
977 const PAD* srcParent = static_cast<const PAD*>( srcNode->Parent() );
978 const PAD* dstParent = static_cast<const PAD*>( dstNode->Parent() );
979
980 bool srcFound = ( pads.find(srcParent) != pads.end() );
981 bool dstFound = ( pads.find(dstParent) != pads.end() );
982
983 if ( srcFound && dstFound && !aSkipInternalConnections )
984 {
985 edges.push_back( edge );
986 }
987 else if ( srcFound || dstFound )
988 {
989 edges.push_back( edge );
990 }
991 }
992 }
993
994 return edges;
995}
996
997
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
std::shared_ptr< NET_SETTINGS > m_NetSettings
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:58
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:180
virtual bool IsConnected() const
Returns information if the object is derived from BOARD_CONNECTED_ITEM.
Definition: board_item.h:115
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: board_item.cpp:219
virtual const BOARD * GetBoard() const
Return the BOARD in which this BOARD_ITEM resides, or NULL if none.
Definition: board_item.cpp:43
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:265
const NETINFO_LIST & GetNetInfo() const
Definition: board.h:765
std::unordered_map< ZONE *, std::unique_ptr< DRC_RTREE > > m_CopperZoneRTreeCache
Definition: board.h:1145
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:643
void CacheTriangulation(PROGRESS_REPORTER *aReporter=nullptr, const std::vector< ZONE * > &aZones={})
Definition: board.cpp:661
CN_ANCHOR represents a physical location that can be connected: a pad or a track/arc/via endpoint.
const std::list< CN_ITEM * > GetItems() const
CN_EDGE represents a point-to-point connection, whether realized or unrealized (ie: tracks etc.
CN_ITEM represents a BOARD_CONNETED_ITEM in the connectivity system (ie: a pad, track/arc/via,...
const std::vector< CN_ITEM * > & ConnectedItems() const
int Net() const
allow parallel connection threads
bool Valid() const
BOARD_CONNECTED_ITEM * Parent() const
int SubpolyIndex() const
void RecalculateRatsnest(BOARD_COMMIT *aCommit=nullptr)
Function RecalculateRatsnest() Updates the ratsnest for the board.
void ClearLocalRatsnest()
Function ClearLocalRatsnest() Erases the temporary, selection-based ratsnest (i.e.
PROGRESS_REPORTER * m_progressReporter
bool m_skipRatsnest
Used to suppress ratsnest calculations on dynamic ratsnests.
void FindIsolatedCopperIslands(ZONE *aZone, std::vector< int > &aIslands)
Function FindIsolatedCopperIslands() Searches for copper islands in zone aZone that are not connected...
unsigned int GetPadCount(int aNet=-1) const
const std::vector< BOARD_CONNECTED_ITEM * > GetConnectedItemsAtAnchor(const BOARD_CONNECTED_ITEM *aItem, const VECTOR2I &aAnchor, const std::initializer_list< KICAD_T > &aTypes, const int &aMaxError=0) const
Function GetConnectedItemsAtAnchor() Returns a list of items connected to a source item aItem at posi...
void MarkItemNetAsDirty(BOARD_ITEM *aItem)
void RunOnUnconnectedEdges(std::function< bool(CN_EDGE &)> aFunc)
std::vector< RN_DYNAMIC_LINE > m_dynamicRatsnest
const std::vector< CN_EDGE > GetRatsnestForPad(const PAD *aPad)
RN_NET * GetRatsnestForNet(int aNet)
Function GetRatsnestForNet() Returns the ratsnest, expressed as a set of graph edges for a given net.
void ClearRatsnest()
Function Clear() Erases the connectivity database.
bool Remove(BOARD_ITEM *aItem)
Function Remove() Removes an item from the connectivity data.
void ComputeLocalRatsnest(const std::vector< BOARD_ITEM * > &aItems, const CONNECTIVITY_DATA *aDynamicData, VECTOR2I aInternalOffset={ 0, 0 })
Function ComputeLocalRatsnest() Calculates the temporary (usually selection-based) ratsnest for the s...
unsigned int GetNodeCount(int aNet=-1) const
void SetProgressReporter(PROGRESS_REPORTER *aReporter)
void BlockRatsnestItems(const std::vector< BOARD_ITEM * > &aItems)
bool IsConnectedOnLayer(const BOARD_CONNECTED_ITEM *aItem, int aLayer, const std::initializer_list< KICAD_T > &aTypes={}) const
const std::vector< PCB_TRACK * > GetConnectedTracks(const BOARD_CONNECTED_ITEM *aItem) const
std::map< int, wxString > m_netclassMap
Map of netcode -> netclass the net is a member of; used for ratsnest painting.
const std::vector< CN_EDGE > GetRatsnestForComponent(FOOTPRINT *aComponent, bool aSkipInternalConnections=false)
bool TestTrackEndpointDangling(PCB_TRACK *aTrack, VECTOR2I *aPos=nullptr)
bool Add(BOARD_ITEM *aItem)
Function Add() Adds an item to the connectivity data.
const std::vector< BOARD_CONNECTED_ITEM * > GetConnectedItems(const BOARD_CONNECTED_ITEM *aItem, const std::initializer_list< KICAD_T > &aTypes, bool aIgnoreNetcodes=false) const
Function GetConnectedItems() Returns a list of items connected to a source item aItem.
std::shared_ptr< CN_CONNECTIVITY_ALGO > m_connAlgo
std::shared_ptr< FROM_TO_CACHE > m_fromToCache
const std::vector< PAD * > GetConnectedPads(const BOARD_CONNECTED_ITEM *aItem) const
const std::vector< CN_EDGE > GetRatsnestForItems(const std::vector< BOARD_ITEM * > aItems)
const std::vector< BOARD_CONNECTED_ITEM * > GetNetItems(int aNetCode, const std::initializer_list< KICAD_T > &aTypes) const
Function GetNetItems() Returns the list of items that belong to a certain net.
unsigned int GetUnconnectedCount(bool aVisibileOnly) const
void HideLocalRatsnest()
Hides the temporary, selection-based ratsnest lines.
void addRatsnestCluster(const std::shared_ptr< CN_CLUSTER > &aCluster)
std::vector< RN_NET * > m_nets
bool Update(BOARD_ITEM *aItem)
Function Update() Updates the connectivity data for an item.
void PropagateNets(BOARD_COMMIT *aCommit=nullptr, PROPAGATE_MODE aMode=PROPAGATE_MODE::SKIP_CONFLICTS)
Propagates the net codes from the source pads to the tracks/vias.
void Build(BOARD *aBoard, PROGRESS_REPORTER *aReporter=nullptr)
Function Build() Builds the connectivity database for the board aBoard.
void Move(const VECTOR2I &aDelta)
Moves the connectivity list anchors.
int GetNetCount() const
Function GetNetCount() Returns the total number of nets in the connectivity database.
std::shared_ptr< CN_CONNECTIVITY_ALGO > GetConnectivityAlgo() const
Implement an R-tree for fast spatial and layer indexing of connectable items.
Definition: drc_rtree.h:48
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
Definition: drc_rtree.h:211
virtual VECTOR2I GetPosition() const
Definition: eda_item.h:251
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:97
EDA_ITEM_FLAGS GetFlags() const
Definition: eda_item.h:144
PADS & Pads()
Definition: footprint.h:170
static const char Default[]
the name of the default NETCLASS
Definition: netclass.h:49
Handle the data for a net.
Definition: netinfo.h:66
Definition: pad.h:59
int GetWidth() const
Definition: pcb_track.h:106
const VECTOR2I & GetStart() const
Definition: pcb_track.h:112
VECTOR2I GetPosition() const override
Definition: pcb_track.h:102
const VECTOR2I & GetEnd() const
Definition: pcb_track.h:109
A small class to help profiling.
Definition: profile.h:47
void Show(std::ostream &aStream=std::cerr)
Print the elapsed time (in a suitable unit) to a stream.
Definition: profile.h:103
A progress reporter interface for use in multi-threaded environments.
virtual bool KeepRefreshing(bool aWait=false)=0
Update the UI (if any).
virtual void Report(const wxString &aMessage)=0
Display aMessage in the progress bar dialog.
virtual void SetCurrentProgress(double aProgress)=0
Set the progress value to aProgress (0..1).
Describe ratsnest for a single net.
Definition: ratsnest_data.h:63
unsigned int GetNodeCount() const
Definition: ratsnest_data.h:83
const std::vector< CN_EDGE > & GetEdges() const
Definition: ratsnest_data.h:85
bool NearestBicoloredPair(RN_NET *aOtherNet, VECTOR2I &aPos1, VECTOR2I &aPos2) const
void AddCluster(std::shared_ptr< CN_CLUSTER > aCluster)
VECTOR2I::extended_type ecoord
Definition: seg.h:44
const BOX2I BBox(int aClearance=0) const override
Compute a bounding box of the shape, with a margin of aClearance a collision.
Definition: shape_circle.h:70
bool PointInside(const VECTOR2I &aPt, int aAccuracy=0, bool aUseBBoxCache=false) const
Check if point aP lies inside a polygon (any type) defined by the line chain.
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
const std::vector< VECTOR2I > & CPoints() const
Represent a set of closed polygons.
const SHAPE_LINE_CHAIN & COutline(int aIndex) const
Handle a list of polygons defining a copper zone.
Definition: zone.h:57
bool IsFilled() const
Definition: zone.h:242
SHAPE_POLY_SET * GetFill(PCB_LAYER_ID aLayer)
Definition: zone.h:608
static int getMinDist(BOARD_CONNECTED_ITEM *aItem, const VECTOR2I &aPoint)
PROPAGATE_MODE
Controls how nets are propagated through clusters.
#define _(s)
#define IS_DELETED
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:59
@ UNDEFINED_LAYER
Definition: layer_ids.h:60
PCB_LAYER_ID ToLAYER_ID(int aLayer)
Definition: lset.cpp:932
bool contains(const _Container &__container, _Value __value)
Returns true if the container contains the given value.
Definition: kicad_algo.h:99
Class that computes missing connections on a PCB.
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
Definition: thread_pool.cpp:32
static thread_pool * tp
Definition: thread_pool.cpp:30
BS::thread_pool thread_pool
Definition: thread_pool.h:30
double GetLineLength(const VECTOR2I &aPointA, const VECTOR2I &aPointB)
Return the length of a line segment defined by aPointA and aPointB.
Definition: trigo.h:188
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:78
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:102
@ MAX_STRUCT_TYPE_ID
Definition: typeinfo.h:241
@ PCB_FOOTPRINT_T
class FOOTPRINT, a footprint
Definition: typeinfo.h:86
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:103
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:101
constexpr ret_type KiROUND(fp_type v)
Round a floating point number to an integer using "round halfway cases away from zero".
Definition: util.h:85