KiCad PCB EDA Suite
Loading...
Searching...
No Matches
connectivity_data.cpp
Go to the documentation of this file.
1/*
2 * This program source code file is part of KICAD, a free EDA CAD application.
3 *
4 * Copyright (C) 2017 CERN
5 * Copyright (C) 2018-2023 KiCad Developers, see AUTHORS.txt for contributors.
6 * @author Tomasz Wlostowski <[email protected]>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, you may find one here:
20 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
21 * or you may search the http://www.gnu.org website for the version 2 license,
22 * or you may write to the Free Software Foundation, Inc.,
23 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
24 */
25
26#ifdef PROFILE
27#include <core/profile.h>
28#endif
29
30#include <algorithm>
31#include <future>
32#include <initializer_list>
33
42#include <progress_reporter.h>
43#include <core/thread_pool.h>
44#include <trigo.h>
45#include <drc/drc_rtree.h>
46
48 m_skipRatsnestUpdate( false )
49{
50 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO( this ) );
51 m_progressReporter = nullptr;
52 m_fromToCache.reset( new FROM_TO_CACHE );
53}
54
55
56CONNECTIVITY_DATA::CONNECTIVITY_DATA( std::shared_ptr<CONNECTIVITY_DATA> aGlobalConnectivity,
57 const std::vector<BOARD_ITEM*>& aLocalItems,
58 bool aSkipRatsnestUpdate ) :
59 m_skipRatsnestUpdate( aSkipRatsnestUpdate )
60{
61 Build( aGlobalConnectivity, aLocalItems );
62 m_progressReporter = nullptr;
63 m_fromToCache.reset( new FROM_TO_CACHE );
64}
65
66
68{
69 for( RN_NET* net : m_nets )
70 delete net;
71
72 m_nets.clear();
73}
74
75
77{
78 m_connAlgo->Add( aItem );
79 return true;
80}
81
82
84{
85 m_connAlgo->Remove( aItem );
86 return true;
87}
88
89
91{
92 m_connAlgo->Remove( aItem );
93 m_connAlgo->Add( aItem );
94 return true;
95}
96
97
99{
100 aBoard->CacheTriangulation( aReporter );
101
102 std::unique_lock<KISPINLOCK> lock( m_lock, std::try_to_lock );
103
104 if( !lock )
105 return false;
106
107 if( aReporter )
108 {
109 aReporter->Report( _( "Updating nets..." ) );
110 aReporter->KeepRefreshing( false );
111 }
112
113 std::shared_ptr<NET_SETTINGS>& netSettings = aBoard->GetDesignSettings().m_NetSettings;
114
115 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO( this ) );
116 m_connAlgo->Build( aBoard, aReporter );
117
118 m_netclassMap.clear();
119
120 for( NETINFO_ITEM* net : aBoard->GetNetInfo() )
121 {
122 net->SetNetClass( netSettings->GetEffectiveNetClass( net->GetNetname() ) );
123
124 if( net->GetNetClass()->GetName() != NETCLASS::Default )
125 m_netclassMap[ net->GetNetCode() ] = net->GetNetClass()->GetName();
126 }
127
128 if( aReporter )
129 {
130 aReporter->SetCurrentProgress( 0.75 );
131 aReporter->KeepRefreshing( false );
132 }
133
135
136 if( aReporter )
137 {
138 aReporter->SetCurrentProgress( 1.0 );
139 aReporter->KeepRefreshing( false );
140 }
141
142 return true;
143}
144
145
146void CONNECTIVITY_DATA::Build( std::shared_ptr<CONNECTIVITY_DATA>& aGlobalConnectivity,
147 const std::vector<BOARD_ITEM*>& aLocalItems )
148{
149 std::unique_lock<KISPINLOCK> lock( m_lock, std::try_to_lock );
150
151 if( !lock )
152 return;
153
154 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO( this ) );
155 m_connAlgo->LocalBuild( aGlobalConnectivity, aLocalItems );
156
158}
159
160
162{
163 m_connAlgo->ForEachAnchor( [&aDelta]( CN_ANCHOR& anchor )
164 {
165 anchor.Move( aDelta );
166 } );
167}
168
169
171{
172#ifdef PROFILE
173 PROF_TIMER rnUpdate( "update-ratsnest" );
174#endif
175
176 std::vector<RN_NET*> dirty_nets;
177
178 // Start with net 1 as net 0 is reserved for not-connected
179 // Nets without nodes are also ignored
180 std::copy_if( m_nets.begin() + 1, m_nets.end(), std::back_inserter( dirty_nets ),
181 [] ( RN_NET* aNet )
182 {
183 return aNet->IsDirty() && aNet->GetNodeCount() > 0;
184 } );
185
187
188 tp.push_loop( dirty_nets.size(),
189 [&]( const int a, const int b )
190 {
191 for( int ii = a; ii < b; ++ii )
192 dirty_nets[ii]->UpdateNet();
193 } );
194 tp.wait_for_tasks();
195
196 tp.push_loop( dirty_nets.size(),
197 [&]( const int a, const int b )
198 {
199 for( int ii = a; ii < b; ++ii )
200 dirty_nets[ii]->OptimizeRNEdges();
201 } );
202 tp.wait_for_tasks();
203
204#ifdef PROFILE
205 rnUpdate.Show();
206#endif
207}
208
209
210void CONNECTIVITY_DATA::addRatsnestCluster( const std::shared_ptr<CN_CLUSTER>& aCluster )
211{
212 RN_NET* rnNet = m_nets[ aCluster->OriginNet() ];
213
214 rnNet->AddCluster( aCluster );
215}
216
217
219{
220
221 // We can take over the lock here if called in the same thread
222 // This is to prevent redraw during a RecalculateRatsnets process
223 std::unique_lock<KISPINLOCK> lock( m_lock );
224
226
227}
228
230{
231 m_connAlgo->PropagateNets( aCommit );
232
233 int lastNet = m_connAlgo->NetCount();
234
235 if( lastNet >= (int) m_nets.size() )
236 {
237 unsigned int prevSize = m_nets.size();
238 m_nets.resize( lastNet + 1 );
239
240 for( unsigned int i = prevSize; i < m_nets.size(); i++ )
241 m_nets[i] = new RN_NET;
242 }
243 else
244 {
245 for( size_t ii = lastNet; ii < m_nets.size(); ++ii )
246 m_nets[ii]->Clear();
247 }
248
249 const std::vector<std::shared_ptr<CN_CLUSTER>>& clusters = m_connAlgo->GetClusters();
250
251 int dirtyNets = 0;
252
253 for( int net = 0; net < lastNet; net++ )
254 {
255 if( m_connAlgo->IsNetDirty( net ) )
256 {
257 m_nets[net]->Clear();
258 dirtyNets++;
259 }
260 }
261
262 for( const std::shared_ptr<CN_CLUSTER>& c : clusters )
263 {
264 int net = c->OriginNet();
265
266 // Don't add intentionally-kept zone islands to the ratsnest
267 if( c->IsOrphaned() && c->Size() == 1 )
268 {
269 if( dynamic_cast<CN_ZONE_LAYER*>( *c->begin() ) )
270 continue;
271 }
272
273 if( m_connAlgo->IsNetDirty( net ) )
275 }
276
277 m_connAlgo->ClearDirtyFlags();
278
281}
282
283
284void CONNECTIVITY_DATA::BlockRatsnestItems( const std::vector<BOARD_ITEM*>& aItems )
285{
286 std::vector<BOARD_CONNECTED_ITEM*> citems;
287
288 for( BOARD_ITEM* item : aItems )
289 {
290 if( item->Type() == PCB_FOOTPRINT_T )
291 {
292 for( PAD* pad : static_cast<FOOTPRINT*>(item)->Pads() )
293 citems.push_back( pad );
294 }
295 else
296 {
297 if( BOARD_CONNECTED_ITEM* citem = dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
298 citems.push_back( citem );
299 }
300 }
301
302 for( const BOARD_CONNECTED_ITEM* item : citems )
303 {
304 if ( m_connAlgo->ItemExists( item ) )
305 {
306 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( item );
307
308 for( CN_ITEM* cnItem : entry.GetItems() )
309 {
310 for( const std::shared_ptr<CN_ANCHOR>& anchor : cnItem->Anchors() )
311 anchor->SetNoLine( true );
312 }
313 }
314 }
315}
316
317
319{
320 return m_connAlgo->NetCount();
321}
322
323
324void CONNECTIVITY_DATA::FillIsolatedIslandsMap( std::map<ZONE*, std::map<PCB_LAYER_ID, ISOLATED_ISLANDS>>& aMap,
325 bool aConnectivityAlreadyRebuilt )
326{
327 m_connAlgo->FillIsolatedIslandsMap( aMap, aConnectivityAlreadyRebuilt );
328}
329
330
331void CONNECTIVITY_DATA::ComputeLocalRatsnest( const std::vector<BOARD_ITEM*>& aItems,
332 const CONNECTIVITY_DATA* aDynamicData,
333 VECTOR2I aInternalOffset )
334{
335 if( !aDynamicData )
336 return;
337
338 m_dynamicRatsnest.clear();
339 std::mutex dynamic_ratsnest_mutex;
340
341 // This gets connections between the stationary board and the
342 // moving selection
343
344 auto update_lambda = [&]( int nc )
345 {
346 RN_NET* dynamicNet = aDynamicData->m_nets[nc];
347 RN_NET* staticNet = m_nets[nc];
348
352 if( dynamicNet->GetNodeCount() != 0
353 && dynamicNet->GetNodeCount() != staticNet->GetNodeCount() )
354 {
355 VECTOR2I pos1, pos2;
356
357 if( staticNet->NearestBicoloredPair( dynamicNet, pos1, pos2 ) )
358 {
360 l.a = pos1;
361 l.b = pos2;
362 l.netCode = nc;
363
364 std::lock_guard<std::mutex> lock( dynamic_ratsnest_mutex );
365 m_dynamicRatsnest.push_back( l );
366 }
367 }
368 };
369
371 size_t num_nets = std::min( m_nets.size(), aDynamicData->m_nets.size() );
372
373 tp.push_loop( 1, num_nets,
374 [&]( const int a, const int b)
375 {
376 for( int ii = a; ii < b; ++ii )
377 update_lambda( ii );
378 });
379 tp.wait_for_tasks();
380
381 // This gets the ratsnest for internal connections in the moving set
382 const std::vector<CN_EDGE>& edges = GetRatsnestForItems( aItems );
383
384 for( const CN_EDGE& edge : edges )
385 {
386 const std::shared_ptr<const CN_ANCHOR>& nodeA = edge.GetSourceNode();
387 const std::shared_ptr<const CN_ANCHOR>& nodeB = edge.GetTargetNode();
388
389 if( !nodeA || nodeA->Dirty() || !nodeB || nodeB->Dirty() )
390 continue;
391
393
394 // Use the parents' positions
395 l.a = nodeA->Parent()->GetPosition() + aInternalOffset;
396 l.b = nodeB->Parent()->GetPosition() + aInternalOffset;
397 l.netCode = 0;
398 m_dynamicRatsnest.push_back( l );
399 }
400}
401
402
404{
405 m_connAlgo->ForEachAnchor( []( CN_ANCHOR& anchor )
406 {
407 anchor.SetNoLine( false );
408 } );
410}
411
412
414{
415 m_dynamicRatsnest.clear();
416}
417
418
420{
421 m_connAlgo->PropagateNets( aCommit );
422}
423
424
426 const std::initializer_list<KICAD_T>& aTypes ) const
427{
428 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY &entry = m_connAlgo->ItemEntry( aItem );
429
430 auto matchType =
431 [&]( KICAD_T aItemType )
432 {
433 if( aTypes.size() == 0 )
434 return true;
435
436 return alg::contains( aTypes, aItemType);
437 };
438
439 for( CN_ITEM* citem : entry.GetItems() )
440 {
441 for( CN_ITEM* connected : citem->ConnectedItems() )
442 {
443 CN_ZONE_LAYER* zoneLayer = dynamic_cast<CN_ZONE_LAYER*>( connected );
444
445 if( connected->Valid()
446 && connected->Layers().Overlaps( aLayer )
447 && matchType( connected->Parent()->Type() )
448 && connected->Net() == aItem->GetNetCode() )
449 {
450 if( aItem->Type() == PCB_PAD_T && zoneLayer )
451 {
452 const PAD* pad = static_cast<const PAD*>( aItem );
453 ZONE* zone = static_cast<ZONE*>( zoneLayer->Parent() );
454 int islandIdx = zoneLayer->SubpolyIndex();
455
456 if( zone->IsFilled() )
457 {
458 const SHAPE_POLY_SET* zoneFill = zone->GetFill( ToLAYER_ID( aLayer ) );
459 const SHAPE_LINE_CHAIN& padHull = pad->GetEffectivePolygon( ERROR_INSIDE )->Outline( 0 );
460
461 for( const VECTOR2I& pt : zoneFill->COutline( islandIdx ).CPoints() )
462 {
463 // If the entire island is inside the pad's flashing then the pad
464 // won't actually connect to anything else, so only return true if
465 // part of the island is *outside* the pad's flashing.
466
467 if( !padHull.PointInside( pt ) )
468 return true;
469 }
470 }
471
472 continue;
473 }
474 else if( aItem->Type() == PCB_VIA_T && zoneLayer )
475 {
476 const PCB_VIA* via = static_cast<const PCB_VIA*>( aItem );
477 ZONE* zone = static_cast<ZONE*>( zoneLayer->Parent() );
478 int islandIdx = zoneLayer->SubpolyIndex();
479
480 if( zone->IsFilled() )
481 {
482 const SHAPE_POLY_SET* zoneFill = zone->GetFill( ToLAYER_ID( aLayer ) );
483 SHAPE_CIRCLE viaHull( via->GetCenter(), via->GetWidth() / 2 );
484
485 for( const VECTOR2I& pt : zoneFill->COutline( islandIdx ).CPoints() )
486 {
487 // If the entire island is inside the via's flashing then the via
488 // won't actually connect to anything else, so only return true if
489 // part of the island is *outside* the via's flashing.
490
491 if( !viaHull.SHAPE::Collide( pt ) )
492 return true;
493 }
494 }
495
496 continue;
497 }
498
499 return true;
500 }
501 }
502 }
503
504 return false;
505}
506
507
508unsigned int CONNECTIVITY_DATA::GetUnconnectedCount( bool aVisibleOnly ) const
509{
510 unsigned int unconnected = 0;
511
512 for( RN_NET* net : m_nets )
513 {
514 if( !net )
515 continue;
516
517 for( const CN_EDGE& edge : net->GetEdges() )
518 {
519 if( edge.IsVisible() || !aVisibleOnly )
520 ++unconnected;
521 }
522 }
523
524 return unconnected;
525}
526
527
529{
530 for( RN_NET* net : m_nets )
531 net->Clear();
532}
533
534
535const std::vector<BOARD_CONNECTED_ITEM*>
537 const std::initializer_list<KICAD_T>& aTypes,
538 bool aIgnoreNetcodes ) const
539{
540 std::vector<BOARD_CONNECTED_ITEM*> rv;
542
543 if( aIgnoreNetcodes )
545 else
547
548 const auto clusters = m_connAlgo->SearchClusters( searchMode, aTypes,
549 aIgnoreNetcodes ? -1 : aItem->GetNetCode() );
550
551 for( const std::shared_ptr<CN_CLUSTER>& cl : clusters )
552 {
553 if( cl->Contains( aItem ) )
554 {
555 for( const CN_ITEM* item : *cl )
556 {
557 if( item->Valid() )
558 rv.push_back( item->Parent() );
559 }
560 }
561 }
562
563 return rv;
564}
565
566
567const std::vector<BOARD_CONNECTED_ITEM*>
568CONNECTIVITY_DATA::GetNetItems( int aNetCode, const std::initializer_list<KICAD_T>& aTypes ) const
569{
570 std::vector<BOARD_CONNECTED_ITEM*> items;
571 items.reserve( 32 );
572
573 std::bitset<MAX_STRUCT_TYPE_ID> type_bits;
574
575 for( KICAD_T scanType : aTypes )
576 {
577 wxASSERT( scanType < MAX_STRUCT_TYPE_ID );
578 type_bits.set( scanType );
579 }
580
581 m_connAlgo->ForEachItem(
582 [&]( CN_ITEM& aItem )
583 {
584 if( aItem.Valid() && ( aItem.Net() == aNetCode ) && type_bits[aItem.Parent()->Type()] )
585 items.push_back( aItem.Parent() );
586 } );
587
588 std::sort( items.begin(), items.end() );
589 items.erase( std::unique( items.begin(), items.end() ), items.end() );
590 return items;
591}
592
593
594const std::vector<PCB_TRACK*>
596{
597 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( aItem );
598
599 std::set<PCB_TRACK*> tracks;
600 std::vector<PCB_TRACK*> rv;
601
602 for( CN_ITEM* citem : entry.GetItems() )
603 {
604 for( CN_ITEM* connected : citem->ConnectedItems() )
605 {
606 if( connected->Valid() &&
607 ( connected->Parent()->Type() == PCB_TRACE_T ||
608 connected->Parent()->Type() == PCB_VIA_T ||
609 connected->Parent()->Type() == PCB_ARC_T ) )
610 {
611 tracks.insert( static_cast<PCB_TRACK*> ( connected->Parent() ) );
612 }
613 }
614 }
615
616 std::copy( tracks.begin(), tracks.end(), std::back_inserter( rv ) );
617 return rv;
618}
619
620
622 std::set<PAD*>* pads ) const
623{
624 for( CN_ITEM* citem : m_connAlgo->ItemEntry( aItem ).GetItems() )
625 {
626 for( CN_ITEM* connected : citem->ConnectedItems() )
627 {
628 if( connected->Valid() && connected->Parent()->Type() == PCB_PAD_T )
629 pads->insert( static_cast<PAD*> ( connected->Parent() ) );
630 }
631 }
632}
633
634
635const std::vector<PAD*> CONNECTIVITY_DATA::GetConnectedPads( const BOARD_CONNECTED_ITEM* aItem )
636const
637{
638 std::set<PAD*> pads;
639 std::vector<PAD*> rv;
640
641 GetConnectedPads( aItem, &pads );
642
643 std::copy( pads.begin(), pads.end(), std::back_inserter( rv ) );
644 return rv;
645}
646
647
649 std::vector<PAD*>* pads,
650 std::vector<PCB_VIA*>* vias )
651{
652 for( CN_ITEM* citem : m_connAlgo->ItemEntry( aItem ).GetItems() )
653 {
654 for( CN_ITEM* connected : citem->ConnectedItems() )
655 {
656 if( connected->Valid() )
657 {
658 BOARD_CONNECTED_ITEM* parent = connected->Parent();
659
660 if( parent->Type() == PCB_PAD_T )
661 pads->push_back( static_cast<PAD*>( parent ) );
662 else if( parent->Type() == PCB_VIA_T )
663 vias->push_back( static_cast<PCB_VIA*>( parent ) );
664 }
665 }
666 }
667}
668
669
670unsigned int CONNECTIVITY_DATA::GetNodeCount( int aNet ) const
671{
672 int sum = 0;
673
674 if( aNet < 0 ) // Node count for all nets
675 {
676 for( const RN_NET* net : m_nets )
677 sum += net->GetNodeCount();
678 }
679 else if( aNet < (int) m_nets.size() )
680 {
681 sum = m_nets[aNet]->GetNodeCount();
682 }
683
684 return sum;
685}
686
687
688unsigned int CONNECTIVITY_DATA::GetPadCount( int aNet ) const
689{
690 int n = 0;
691
692 for( CN_ITEM* pad : m_connAlgo->ItemList() )
693 {
694 if( !pad->Valid() || pad->Parent()->Type() != PCB_PAD_T)
695 continue;
696
697 PAD* dpad = static_cast<PAD*>( pad->Parent() );
698
699 if( aNet < 0 || aNet == dpad->GetNetCode() )
700 n++;
701 }
702
703 return n;
704}
705
706
707void CONNECTIVITY_DATA::RunOnUnconnectedEdges( std::function<bool( CN_EDGE& )> aFunc )
708{
709 for( RN_NET* rnNet : m_nets )
710 {
711 if( rnNet )
712 {
713 for( CN_EDGE& edge : rnNet->GetEdges() )
714 {
715 if( !aFunc( edge ) )
716 return;
717 }
718 }
719 }
720}
721
722
723static int getMinDist( BOARD_CONNECTED_ITEM* aItem, const VECTOR2I& aPoint )
724{
725 switch( aItem->Type() )
726 {
727 case PCB_TRACE_T:
728 case PCB_ARC_T:
729 {
730 PCB_TRACK* track = static_cast<PCB_TRACK*>( aItem );
731
732 return std::min( GetLineLength( track->GetStart(), aPoint ),
733 GetLineLength( track->GetEnd(), aPoint ) );
734 }
735
736 default:
737 return GetLineLength( aItem->GetPosition(), aPoint );
738 }
739}
740
741
742bool CONNECTIVITY_DATA::TestTrackEndpointDangling( PCB_TRACK* aTrack, bool aIgnoreTracksInPads,
743 VECTOR2I* aPos ) const
744{
745 const std::list<CN_ITEM*>& items = GetConnectivityAlgo()->ItemEntry( aTrack ).GetItems();
746
747 // Not in the connectivity system. This is a bug!
748 if( items.empty() )
749 {
750 wxFAIL_MSG( wxT( "track not in connectivity system" ) );
751 return false;
752 }
753
754 CN_ITEM* citem = items.front();
755
756 if( !citem->Valid() )
757 return false;
758
759 if( aTrack->Type() == PCB_TRACE_T || aTrack->Type() == PCB_ARC_T )
760 {
761 // Test if a segment is connected on each end.
762 //
763 // NB: be wary of short segments which can be connected to the *same* other item on
764 // each end. If that's their only connection then they're still dangling.
765
766 PCB_LAYER_ID layer = aTrack->GetLayer();
767 int accuracy = KiROUND( aTrack->GetWidth() / 2 );
768 int start_count = 0;
769 int end_count = 0;
770
771 for( CN_ITEM* connected : citem->ConnectedItems() )
772 {
773 BOARD_CONNECTED_ITEM* item = connected->Parent();
774 ZONE* zone = dynamic_cast<ZONE*>( item );
775 DRC_RTREE* rtree = nullptr;
776 bool hitStart = false;
777 bool hitEnd = false;
778
779 if( item->GetFlags() & IS_DELETED )
780 continue;
781
782 if( zone )
783 rtree = zone->GetBoard()->m_CopperZoneRTreeCache[ zone ].get();
784
785 if( rtree )
786 {
787 SHAPE_CIRCLE start( aTrack->GetStart(), accuracy );
788 SHAPE_CIRCLE end( aTrack->GetEnd(), accuracy );
789
790 hitStart = rtree->QueryColliding( start.BBox(), &start, layer );
791 hitEnd = rtree->QueryColliding( end.BBox(), &end, layer );
792 }
793 else
794 {
795 std::shared_ptr<SHAPE> shape = item->GetEffectiveShape( layer );
796
797 hitStart = shape->Collide( aTrack->GetStart(), accuracy );
798 hitEnd = shape->Collide( aTrack->GetEnd(), accuracy );
799 }
800
801 if( hitStart && hitEnd )
802 {
803 if( zone )
804 {
805 // Both start and end in a zone: track may be redundant, but it's not dangling
806 return false;
807 }
808 else if( item->Type() == PCB_PAD_T || item->Type() == PCB_VIA_T )
809 {
810 // Both start and end are under a pad: see what the caller wants us to do
811 if( aIgnoreTracksInPads )
812 return false;
813 }
814
815 if( getMinDist( item, aTrack->GetStart() ) < getMinDist( item, aTrack->GetEnd() ) )
816 start_count++;
817 else
818 end_count++;
819 }
820 else if( hitStart )
821 {
822 start_count++;
823 }
824 else if( hitEnd )
825 {
826 end_count++;
827 }
828
829 if( start_count > 0 && end_count > 0 )
830 return false;
831 }
832
833 if( aPos )
834 *aPos = (start_count == 0 ) ? aTrack->GetStart() : aTrack->GetEnd();
835
836 return true;
837 }
838 else if( aTrack->Type() == PCB_VIA_T )
839 {
840 // Test if a via is only connected on one layer
841
842 const std::vector<CN_ITEM*>& connected = citem->ConnectedItems();
843
844 if( connected.empty() )
845 {
846 if( aPos )
847 *aPos = aTrack->GetPosition();
848
849 return true;
850 }
851
852 // Here, we check if the via is connected only to items on a single layer
853 int first_layer = UNDEFINED_LAYER;
854
855 for( CN_ITEM* item : connected )
856 {
857 if( item->Parent()->GetFlags() & IS_DELETED )
858 continue;
859
860 if( first_layer == UNDEFINED_LAYER )
861 first_layer = item->Layer();
862 else if( item->Layer() != first_layer )
863 return false;
864 }
865
866 if( aPos )
867 *aPos = aTrack->GetPosition();
868
869 return true;
870 }
871 else
872 {
873 wxFAIL_MSG( wxT( "CONNECTIVITY_DATA::TestTrackEndpointDangling: unknown track type" ) );
874 }
875
876 return false;
877}
878
879
880const std::vector<BOARD_CONNECTED_ITEM*>
882 const VECTOR2I& aAnchor,
883 const std::initializer_list<KICAD_T>& aTypes,
884 const int& aMaxError ) const
885{
886 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( aItem );
887 std::vector<BOARD_CONNECTED_ITEM*> rv;
888 SEG::ecoord maxError_sq = (SEG::ecoord) aMaxError * aMaxError;
889
890 for( CN_ITEM* cnItem : entry.GetItems() )
891 {
892 for( CN_ITEM* connected : cnItem->ConnectedItems() )
893 {
894 for( const std::shared_ptr<CN_ANCHOR>& anchor : connected->Anchors() )
895 {
896 if( ( anchor->Pos() - aAnchor ).SquaredEuclideanNorm() <= maxError_sq )
897 {
898 for( KICAD_T type : aTypes )
899 {
900 if( connected->Valid() && connected->Parent()->Type() == type )
901 {
902 rv.push_back( connected->Parent() );
903 break;
904 }
905 }
906
907 break;
908 }
909 }
910 }
911 }
912
913 return rv;
914}
915
916
918{
919 if ( aNet < 0 || aNet >= (int) m_nets.size() )
920 return nullptr;
921
922 return m_nets[ aNet ];
923}
924
925
927{
928 if ( aItem->Type() == PCB_FOOTPRINT_T)
929 {
930 for( PAD* pad : static_cast<FOOTPRINT*>( aItem )->Pads() )
931 m_connAlgo->MarkNetAsDirty( pad->GetNetCode() );
932 }
933
934 if (aItem->IsConnected() )
935 m_connAlgo->MarkNetAsDirty( static_cast<BOARD_CONNECTED_ITEM*>( aItem )->GetNetCode() );
936}
937
938
940{
941 m_connAlgo->RemoveInvalidRefs();
942
943 for( RN_NET* rnNet : m_nets )
944 rnNet->RemoveInvalidRefs();
945}
946
947
949{
950 m_progressReporter = aReporter;
951 m_connAlgo->SetProgressReporter( m_progressReporter );
952}
953
954
955const std::vector<CN_EDGE>
956CONNECTIVITY_DATA::GetRatsnestForItems( const std::vector<BOARD_ITEM*>& aItems )
957{
958 std::set<int> nets;
959 std::vector<CN_EDGE> edges;
960 std::set<BOARD_CONNECTED_ITEM*> item_set;
961
962 for( BOARD_ITEM* item : aItems )
963 {
964 if( item->Type() == PCB_FOOTPRINT_T )
965 {
966 FOOTPRINT* footprint = static_cast<FOOTPRINT*>( item );
967
968 for( PAD* pad : footprint->Pads() )
969 {
970 nets.insert( pad->GetNetCode() );
971 item_set.insert( pad );
972 }
973 }
974 else if( item->IsConnected() )
975 {
976 BOARD_CONNECTED_ITEM* conn_item = static_cast<BOARD_CONNECTED_ITEM*>( item );
977
978 item_set.insert( conn_item );
979 nets.insert( conn_item->GetNetCode() );
980 }
981 }
982
983 for( int netcode : nets )
984 {
985 RN_NET* net = GetRatsnestForNet( netcode );
986
987 if( !net )
988 continue;
989
990 for( const CN_EDGE& edge : net->GetEdges() )
991 {
992 std::shared_ptr<const CN_ANCHOR> srcNode = edge.GetSourceNode();
993 std::shared_ptr<const CN_ANCHOR> dstNode = edge.GetTargetNode();
994
995 if( !srcNode || srcNode->Dirty() || !dstNode || dstNode->Dirty() )
996 continue;
997
998 BOARD_CONNECTED_ITEM* srcParent = srcNode->Parent();
999 BOARD_CONNECTED_ITEM* dstParent = dstNode->Parent();
1000
1001 bool srcFound = ( item_set.find( srcParent ) != item_set.end() );
1002 bool dstFound = ( item_set.find( dstParent ) != item_set.end() );
1003
1004 if ( srcFound && dstFound )
1005 edges.push_back( edge );
1006 }
1007 }
1008
1009 return edges;
1010}
1011
1012
1013const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForPad( const PAD* aPad )
1014{
1015 std::vector<CN_EDGE> edges;
1016 RN_NET* net = GetRatsnestForNet( aPad->GetNetCode() );
1017
1018 if( !net )
1019 return edges;
1020
1021 for( const CN_EDGE& edge : net->GetEdges() )
1022 {
1023 if( !edge.GetSourceNode() || edge.GetSourceNode()->Dirty() )
1024 continue;
1025
1026 if( !edge.GetTargetNode() || edge.GetTargetNode()->Dirty() )
1027 continue;
1028
1029 if( edge.GetSourceNode()->Parent() == aPad || edge.GetTargetNode()->Parent() == aPad )
1030 edges.push_back( edge );
1031 }
1032
1033 return edges;
1034}
1035
1036
1037const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForComponent( FOOTPRINT* aComponent,
1038 bool aSkipInternalConnections )
1039{
1040 std::set<int> nets;
1041 std::set<const PAD*> pads;
1042 std::vector<CN_EDGE> edges;
1043
1044 for( PAD* pad : aComponent->Pads() )
1045 {
1046 nets.insert( pad->GetNetCode() );
1047 pads.insert( pad );
1048 }
1049
1050 for( int netcode : nets )
1051 {
1052 RN_NET* net = GetRatsnestForNet( netcode );
1053
1054 if( !net )
1055 continue;
1056
1057 for( const CN_EDGE& edge : net->GetEdges() )
1058 {
1059 const std::shared_ptr<const CN_ANCHOR>& srcNode = edge.GetSourceNode();
1060 const std::shared_ptr<const CN_ANCHOR>& dstNode = edge.GetTargetNode();
1061
1062 if( !srcNode || srcNode->Dirty() || !dstNode || dstNode->Dirty() )
1063 continue;
1064
1065 const PAD* srcParent = static_cast<const PAD*>( srcNode->Parent() );
1066 const PAD* dstParent = static_cast<const PAD*>( dstNode->Parent() );
1067
1068 bool srcFound = ( pads.find(srcParent) != pads.end() );
1069 bool dstFound = ( pads.find(dstParent) != pads.end() );
1070
1071 if ( srcFound && dstFound && !aSkipInternalConnections )
1072 edges.push_back( edge );
1073 else if ( srcFound || dstFound )
1074 edges.push_back( edge );
1075 }
1076 }
1077
1078 return edges;
1079}
1080
1081
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
std::shared_ptr< NET_SETTINGS > m_NetSettings
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:77
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:226
virtual bool IsConnected() const
Returns information if the object is derived from BOARD_CONNECTED_ITEM.
Definition: board_item.h:134
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: board_item.cpp:228
virtual const BOARD * GetBoard() const
Return the BOARD in which this BOARD_ITEM resides, or NULL if none.
Definition: board_item.cpp:46
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:276
const NETINFO_LIST & GetNetInfo() const
Definition: board.h:832
std::unordered_map< ZONE *, std::unique_ptr< DRC_RTREE > > m_CopperZoneRTreeCache
Definition: board.h:1237
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:768
void CacheTriangulation(PROGRESS_REPORTER *aReporter=nullptr, const std::vector< ZONE * > &aZones={})
Definition: board.cpp:796
CN_ANCHOR represents a physical location that can be connected: a pad or a track/arc/via endpoint.
const std::list< CN_ITEM * > & GetItems() const
CN_EDGE represents a point-to-point connection, whether realized or unrealized (ie: tracks etc.
CN_ITEM represents a BOARD_CONNETED_ITEM in the connectivity system (ie: a pad, track/arc/via,...
const std::vector< CN_ITEM * > & ConnectedItems() const
int Net() const
bool Valid() const
BOARD_CONNECTED_ITEM * Parent() const
int SubpolyIndex() const
void FillIsolatedIslandsMap(std::map< ZONE *, std::map< PCB_LAYER_ID, ISOLATED_ISLANDS > > &aMap, bool aConnectivityAlreadyRebuilt=false)
Fill the isolate islands list for each layer of each zone.
void RecalculateRatsnest(BOARD_COMMIT *aCommit=nullptr)
Function RecalculateRatsnest() Updates the ratsnest for the board.
void ClearLocalRatsnest()
Function ClearLocalRatsnest() Erases the temporary, selection-based ratsnest (i.e.
PROGRESS_REPORTER * m_progressReporter
unsigned int GetPadCount(int aNet=-1) const
const std::vector< BOARD_CONNECTED_ITEM * > GetConnectedItemsAtAnchor(const BOARD_CONNECTED_ITEM *aItem, const VECTOR2I &aAnchor, const std::initializer_list< KICAD_T > &aTypes, const int &aMaxError=0) const
Function GetConnectedItemsAtAnchor() Returns a list of items connected to a source item aItem at posi...
void MarkItemNetAsDirty(BOARD_ITEM *aItem)
void PropagateNets(BOARD_COMMIT *aCommit=nullptr)
Propagates the net codes from the source pads to the tracks/vias.
void RunOnUnconnectedEdges(std::function< bool(CN_EDGE &)> aFunc)
std::vector< RN_DYNAMIC_LINE > m_dynamicRatsnest
bool m_skipRatsnestUpdate
Used to suppress ratsnest calculations on dynamic ratsnests.
const std::vector< CN_EDGE > GetRatsnestForPad(const PAD *aPad)
RN_NET * GetRatsnestForNet(int aNet)
Function GetRatsnestForNet() Returns the ratsnest, expressed as a set of graph edges for a given net.
void ClearRatsnest()
Function Clear() Erases the connectivity database.
bool Remove(BOARD_ITEM *aItem)
Function Remove() Removes an item from the connectivity data.
void GetConnectedPadsAndVias(const BOARD_CONNECTED_ITEM *aItem, std::vector< PAD * > *pads, std::vector< PCB_VIA * > *vias)
void ComputeLocalRatsnest(const std::vector< BOARD_ITEM * > &aItems, const CONNECTIVITY_DATA *aDynamicData, VECTOR2I aInternalOffset={ 0, 0 })
Function ComputeLocalRatsnest() Calculates the temporary (usually selection-based) ratsnest for the s...
bool TestTrackEndpointDangling(PCB_TRACK *aTrack, bool aIgnoreTracksInPads, VECTOR2I *aPos=nullptr) const
unsigned int GetNodeCount(int aNet=-1) const
void SetProgressReporter(PROGRESS_REPORTER *aReporter)
void BlockRatsnestItems(const std::vector< BOARD_ITEM * > &aItems)
bool IsConnectedOnLayer(const BOARD_CONNECTED_ITEM *aItem, int aLayer, const std::initializer_list< KICAD_T > &aTypes={}) const
const std::vector< PCB_TRACK * > GetConnectedTracks(const BOARD_CONNECTED_ITEM *aItem) const
std::map< int, wxString > m_netclassMap
Map of netcode -> netclass the net is a member of; used for ratsnest painting.
const std::vector< CN_EDGE > GetRatsnestForComponent(FOOTPRINT *aComponent, bool aSkipInternalConnections=false)
bool Add(BOARD_ITEM *aItem)
Function Add() Adds an item to the connectivity data.
const std::vector< BOARD_CONNECTED_ITEM * > GetConnectedItems(const BOARD_CONNECTED_ITEM *aItem, const std::initializer_list< KICAD_T > &aTypes, bool aIgnoreNetcodes=false) const
Function GetConnectedItems() Returns a list of items connected to a source item aItem.
std::shared_ptr< CN_CONNECTIVITY_ALGO > m_connAlgo
bool Build(BOARD *aBoard, PROGRESS_REPORTER *aReporter=nullptr)
Function Build() Builds the connectivity database for the board aBoard.
std::shared_ptr< FROM_TO_CACHE > m_fromToCache
const std::vector< PAD * > GetConnectedPads(const BOARD_CONNECTED_ITEM *aItem) const
const std::vector< BOARD_CONNECTED_ITEM * > GetNetItems(int aNetCode, const std::initializer_list< KICAD_T > &aTypes) const
Function GetNetItems() Returns the list of items that belong to a certain net.
unsigned int GetUnconnectedCount(bool aVisibileOnly) const
void internalRecalculateRatsnest(BOARD_COMMIT *aCommit=nullptr)
Updates the ratsnest for the board without locking the connectivity mutex.
void HideLocalRatsnest()
Hides the temporary, selection-based ratsnest lines.
const std::vector< CN_EDGE > GetRatsnestForItems(const std::vector< BOARD_ITEM * > &aItems)
void addRatsnestCluster(const std::shared_ptr< CN_CLUSTER > &aCluster)
std::vector< RN_NET * > m_nets
bool Update(BOARD_ITEM *aItem)
Function Update() Updates the connectivity data for an item.
void Move(const VECTOR2I &aDelta)
Moves the connectivity list anchors.
int GetNetCount() const
Function GetNetCount() Returns the total number of nets in the connectivity database.
std::shared_ptr< CN_CONNECTIVITY_ALGO > GetConnectivityAlgo() const
Implement an R-tree for fast spatial and layer indexing of connectable items.
Definition: drc_rtree.h:48
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
Definition: drc_rtree.h:214
virtual VECTOR2I GetPosition() const
Definition: eda_item.h:239
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:97
EDA_ITEM_FLAGS GetFlags() const
Definition: eda_item.h:126
PADS & Pads()
Definition: footprint.h:188
static const char Default[]
the name of the default NETCLASS
Definition: netclass.h:46
Handle the data for a net.
Definition: netinfo.h:56
Definition: pad.h:59
int GetWidth() const
Definition: pcb_track.h:107
const VECTOR2I & GetStart() const
Definition: pcb_track.h:113
VECTOR2I GetPosition() const override
Definition: pcb_track.h:103
const VECTOR2I & GetEnd() const
Definition: pcb_track.h:110
A small class to help profiling.
Definition: profile.h:47
void Show(std::ostream &aStream=std::cerr)
Print the elapsed time (in a suitable unit) to a stream.
Definition: profile.h:103
A progress reporter interface for use in multi-threaded environments.
virtual bool KeepRefreshing(bool aWait=false)=0
Update the UI (if any).
virtual void Report(const wxString &aMessage)=0
Display aMessage in the progress bar dialog.
virtual void SetCurrentProgress(double aProgress)=0
Set the progress value to aProgress (0..1).
Describe ratsnest for a single net.
Definition: ratsnest_data.h:63
unsigned int GetNodeCount() const
Definition: ratsnest_data.h:94
const std::vector< CN_EDGE > & GetEdges() const
Definition: ratsnest_data.h:96
bool NearestBicoloredPair(RN_NET *aOtherNet, VECTOR2I &aPos1, VECTOR2I &aPos2) const
void AddCluster(std::shared_ptr< CN_CLUSTER > aCluster)
VECTOR2I::extended_type ecoord
Definition: seg.h:44
const BOX2I BBox(int aClearance=0) const override
Compute a bounding box of the shape, with a margin of aClearance a collision.
Definition: shape_circle.h:70
bool PointInside(const VECTOR2I &aPt, int aAccuracy=0, bool aUseBBoxCache=false) const override
Check if point aP lies inside a closed shape.
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
const std::vector< VECTOR2I > & CPoints() const
Represent a set of closed polygons.
const SHAPE_LINE_CHAIN & COutline(int aIndex) const
Handle a list of polygons defining a copper zone.
Definition: zone.h:72
bool IsFilled() const
Definition: zone.h:249
SHAPE_POLY_SET * GetFill(PCB_LAYER_ID aLayer)
Definition: zone.h:610
static int getMinDist(BOARD_CONNECTED_ITEM *aItem, const VECTOR2I &aPoint)
#define _(s)
#define IS_DELETED
@ ERROR_INSIDE
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
@ UNDEFINED_LAYER
Definition: layer_ids.h:61
PCB_LAYER_ID ToLAYER_ID(int aLayer)
Definition: lset.cpp:1022
bool contains(const _Container &__container, _Value __value)
Returns true if the container contains the given value.
Definition: kicad_algo.h:100
Class that computes missing connections on a PCB.
static thread_pool * tp
Definition: thread_pool.cpp:30
BS::thread_pool thread_pool
Definition: thread_pool.h:30
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
Definition: thread_pool.cpp:32
double GetLineLength(const VECTOR2I &aPointA, const VECTOR2I &aPointB)
Return the length of a line segment defined by aPointA and aPointB.
Definition: trigo.h:194
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:78
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:95
@ MAX_STRUCT_TYPE_ID
Definition: typeinfo.h:241
@ PCB_FOOTPRINT_T
class FOOTPRINT, a footprint
Definition: typeinfo.h:86
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:96
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:94
constexpr ret_type KiROUND(fp_type v)
Round a floating point number to an integer using "round halfway cases away from zero".
Definition: util.h:85