KiCad PCB EDA Suite
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connectivity_data.cpp
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1/*
2 * This program source code file is part of KICAD, a free EDA CAD application.
3 *
4 * Copyright (C) 2017 CERN
5 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
6 * @author Tomasz Wlostowski <[email protected]>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, you may find one here:
20 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
21 * or you may search the http://www.gnu.org website for the version 2 license,
22 * or you may write to the Free Software Foundation, Inc.,
23 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
24 */
25
26#ifdef PROFILE
27#include <core/profile.h>
28#endif
29
30#include <algorithm>
31#include <future>
32#include <initializer_list>
33
36#include <properties/property.h>
38#include <board_item.h>
44#include <progress_reporter.h>
45#include <thread_pool.h>
46#include <trigo.h>
47#include <drc/drc_rtree.h>
49
57
58
59CONNECTIVITY_DATA::CONNECTIVITY_DATA( std::shared_ptr<CONNECTIVITY_DATA> aGlobalConnectivity,
60 const std::vector<BOARD_ITEM*>& aLocalItems,
61 bool aSkipRatsnestUpdate ) :
62 m_skipRatsnestUpdate( aSkipRatsnestUpdate )
63{
64 Build( aGlobalConnectivity, aLocalItems );
65 m_progressReporter = nullptr;
66 m_fromToCache.reset( new FROM_TO_CACHE );
67}
68
69
71{
72 for( RN_NET* net : m_nets )
73 delete net;
74
75 m_nets.clear();
76}
77
78
80{
81 m_connAlgo->Add( aItem );
82 return true;
83}
84
85
87{
88 m_connAlgo->Remove( aItem );
89 return true;
90}
91
92
94{
95 m_connAlgo->Remove( aItem );
96 m_connAlgo->Add( aItem );
97 return true;
98}
99
100
102{
103 aBoard->CacheTriangulation( aReporter );
104
105 std::unique_lock<KISPINLOCK> lock( m_lock, std::try_to_lock );
106
107 if( !lock )
108 return false;
109
110 if( aReporter )
111 {
112 aReporter->Report( _( "Updating nets..." ) );
113 aReporter->KeepRefreshing( false );
114 }
115
116 for( RN_NET* net : m_nets )
117 delete net;
118
119 m_nets.clear();
120
121 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO( this ) );
122 m_connAlgo->Build( aBoard, aReporter );
123
125
126 RefreshNetcodeMap( aBoard );
127
128 if( aReporter )
129 {
130 aReporter->SetCurrentProgress( 0.75 );
131 aReporter->KeepRefreshing( false );
132 }
133
135
136 if( aReporter )
137 {
138 aReporter->SetCurrentProgress( 1.0 );
139 aReporter->KeepRefreshing( false );
140 }
141
142 return true;
143}
144
145
147{
148 m_netcodeMap.clear();
149
150 for( NETINFO_ITEM* net : aBoard->GetNetInfo() )
151 m_netcodeMap[net->GetNetCode()] = net->GetNetname();
152}
153
154
155void CONNECTIVITY_DATA::Build( std::shared_ptr<CONNECTIVITY_DATA>& aGlobalConnectivity,
156 const std::vector<BOARD_ITEM*>& aLocalItems )
157{
158 std::unique_lock<KISPINLOCK> lock( m_lock, std::try_to_lock );
159
160 if( !lock )
161 return;
162
163 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO( this ) );
164 m_connAlgo->LocalBuild( aGlobalConnectivity, aLocalItems );
165
167}
168
169
171{
172 m_connAlgo->ForEachAnchor( [&aDelta]( CN_ANCHOR& anchor )
173 {
174 anchor.Move( aDelta );
175 } );
176}
177
178
180{
181#ifdef PROFILE
182 PROF_TIMER rnUpdate( "update-ratsnest" );
183#endif
184
185 std::vector<RN_NET*> dirty_nets;
186
187 // Start with net 1 as net 0 is reserved for not-connected
188 // Nets without nodes are also ignored
189 std::copy_if( m_nets.begin() + 1, m_nets.end(), std::back_inserter( dirty_nets ),
190 [] ( RN_NET* aNet )
191 {
192 return aNet->IsDirty() && aNet->GetNodeCount() > 0;
193 } );
194
196
197 auto results = tp.submit_loop( 0, dirty_nets.size(),
198 [&]( const int ii )
199 {
200 dirty_nets[ii]->UpdateNet();
201 } );
202 results.wait();
203
204 auto results2 = tp.submit_loop( 0, dirty_nets.size(),
205 [&]( const int ii )
206 {
207 dirty_nets[ii]->OptimizeRNEdges();
208 } );
209 results2.wait();
210
211#ifdef PROFILE
212 rnUpdate.Show();
213#endif
214}
215
216
217void CONNECTIVITY_DATA::addRatsnestCluster( const std::shared_ptr<CN_CLUSTER>& aCluster )
218{
219 RN_NET* rnNet = m_nets[ aCluster->OriginNet() ];
220
221 rnNet->AddCluster( aCluster );
222}
223
224
226{
227
228 // We can take over the lock here if called in the same thread
229 // This is to prevent redraw during a RecalculateRatsnets process
230 std::unique_lock<KISPINLOCK> lock( m_lock );
231
233
234}
235
237{
238 m_connAlgo->PropagateNets( aCommit );
239
240 int lastNet = m_connAlgo->NetCount();
241
242 if( lastNet >= (int) m_nets.size() )
243 {
244 unsigned int prevSize = m_nets.size();
245 m_nets.resize( lastNet + 1 );
246
247 for( unsigned int i = prevSize; i < m_nets.size(); i++ )
248 m_nets[i] = new RN_NET;
249 }
250 else
251 {
252 for( size_t ii = lastNet; ii < m_nets.size(); ++ii )
253 m_nets[ii]->Clear();
254 }
255
256 const std::vector<std::shared_ptr<CN_CLUSTER>>& clusters = m_connAlgo->GetClusters();
257
258 for( int net = 0; net < lastNet; net++ )
259 {
260 if( m_connAlgo->IsNetDirty( net ) )
261 m_nets[net]->Clear();
262 }
263
264 for( const std::shared_ptr<CN_CLUSTER>& c : clusters )
265 {
266 int net = c->OriginNet();
267
268 // Don't add intentionally-kept zone islands to the ratsnest
269 if( c->IsOrphaned() && c->Size() == 1 )
270 {
271 if( dynamic_cast<CN_ZONE_LAYER*>( *c->begin() ) )
272 continue;
273 }
274
275 if( m_connAlgo->IsNetDirty( net ) )
277 }
278
279 m_connAlgo->ClearDirtyFlags();
280
283}
284
285
286void CONNECTIVITY_DATA::BlockRatsnestItems( const std::vector<BOARD_ITEM*>& aItems )
287{
288 std::vector<BOARD_CONNECTED_ITEM*> citems;
289
290 for( BOARD_ITEM* item : aItems )
291 {
292 if( item->Type() == PCB_FOOTPRINT_T )
293 {
294 for( PAD* pad : static_cast<FOOTPRINT*>(item)->Pads() )
295 citems.push_back( pad );
296 }
297 else
298 {
299 if( BOARD_CONNECTED_ITEM* citem = dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
300 citems.push_back( citem );
301 }
302 }
303
304 for( const BOARD_CONNECTED_ITEM* item : citems )
305 {
306 if ( m_connAlgo->ItemExists( item ) )
307 {
308 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( item );
309
310 for( CN_ITEM* cnItem : entry.GetItems() )
311 {
312 for( const std::shared_ptr<CN_ANCHOR>& anchor : cnItem->Anchors() )
313 anchor->SetNoLine( true );
314 }
315 }
316 }
317}
318
319
321{
322 return m_connAlgo->NetCount();
323}
324
325
326void CONNECTIVITY_DATA::FillIsolatedIslandsMap( std::map<ZONE*, std::map<PCB_LAYER_ID, ISOLATED_ISLANDS>>& aMap,
327 bool aConnectivityAlreadyRebuilt )
328{
329 m_connAlgo->FillIsolatedIslandsMap( aMap, aConnectivityAlreadyRebuilt );
330}
331
332
333void CONNECTIVITY_DATA::ComputeLocalRatsnest( const std::vector<BOARD_ITEM*>& aItems,
334 const CONNECTIVITY_DATA* aDynamicData,
335 VECTOR2I aInternalOffset )
336{
337 if( !aDynamicData )
338 return;
339
340 m_dynamicRatsnest.clear();
341 std::mutex dynamic_ratsnest_mutex;
342
343 // This gets connections between the stationary board and the
344 // moving selection
345
346 auto update_lambda = [&]( int nc )
347 {
348 RN_NET* dynamicNet = aDynamicData->m_nets[nc];
349 RN_NET* staticNet = m_nets[nc];
350
354 if( dynamicNet->GetNodeCount() != 0 && dynamicNet->GetNodeCount() != staticNet->GetNodeCount() )
355 {
356 VECTOR2I pos1, pos2;
357
358 if( staticNet->NearestBicoloredPair( dynamicNet, pos1, pos2 ) )
359 {
361 l.a = pos1;
362 l.b = pos2;
363 l.netCode = nc;
364
365 std::lock_guard<std::mutex> lock( dynamic_ratsnest_mutex );
366 m_dynamicRatsnest.push_back( l );
367 }
368 }
369 };
370
372 size_t num_nets = std::min( m_nets.size(), aDynamicData->m_nets.size() );
373
374 auto results = tp.submit_loop( 1, num_nets,
375 [&]( const int ii )
376 {
377 update_lambda( ii );
378 });
379 results.wait();
380
381 // This gets the ratsnest for internal connections in the moving set
382 const std::vector<CN_EDGE>& edges = GetRatsnestForItems( aItems );
383
384 for( const CN_EDGE& edge : edges )
385 {
386 const std::shared_ptr<const CN_ANCHOR>& nodeA = edge.GetSourceNode();
387 const std::shared_ptr<const CN_ANCHOR>& nodeB = edge.GetTargetNode();
388
389 if( !nodeA || nodeA->Dirty() || !nodeB || nodeB->Dirty() )
390 continue;
391
393
394 // Use the parents' positions
395 l.a = nodeA->Parent()->GetPosition() + aInternalOffset;
396 l.b = nodeB->Parent()->GetPosition() + aInternalOffset;
397 l.netCode = 0;
398 m_dynamicRatsnest.push_back( l );
399 }
400}
401
402
404{
405 m_connAlgo->ForEachAnchor( []( CN_ANCHOR& anchor )
406 {
407 anchor.SetNoLine( false );
408 } );
410}
411
412
417
418
420{
421 m_connAlgo->PropagateNets( aCommit );
422}
423
424
426 const std::initializer_list<KICAD_T>& aTypes ) const
427{
428 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY &entry = m_connAlgo->ItemEntry( aItem );
429
430 FOOTPRINT* parentFootprint = aItem->GetParentFootprint();
431
432 auto matchType =
433 [&]( KICAD_T aItemType )
434 {
435 if( aTypes.size() == 0 )
436 return true;
437
438 return alg::contains( aTypes, aItemType);
439 };
440
441 for( CN_ITEM* citem : entry.GetItems() )
442 {
443 for( CN_ITEM* connected : citem->ConnectedItems() )
444 {
445 CN_ZONE_LAYER* zoneLayer = dynamic_cast<CN_ZONE_LAYER*>( connected );
446
447 // lyIdx is compatible with StartLayer() and EndLayer() notation in CN_ITEM
448 // items, where B_Cu is set to INT_MAX (std::numeric_limits<int>::max())
449 int lyIdx = aLayer;
450
451 if( aLayer == B_Cu )
452 lyIdx = std::numeric_limits<int>::max();
453
454 if( connected->Valid()
455 && connected->StartLayer() <= lyIdx && connected->EndLayer() >= lyIdx
456 && matchType( connected->Parent()->Type() )
457 && connected->Net() == aItem->GetNetCode() )
458 {
459 BOARD_ITEM* connectedItem = connected->Parent();
460
461 if( connectedItem == aItem )
462 continue;
463
464 if( parentFootprint && connectedItem
465 && connectedItem->GetParentFootprint() == parentFootprint )
466 {
467 continue;
468 }
469
470 if( aItem->Type() == PCB_PAD_T && connectedItem
471 && connectedItem->Type() == PCB_PAD_T )
472 {
473 const PAD* thisPad = static_cast<const PAD*>( aItem );
474 const PAD* otherPad = static_cast<const PAD*>( connectedItem );
475
476 auto flashesConditionally = []( UNCONNECTED_LAYER_MODE aMode )
477 {
480 };
481
482 if( flashesConditionally( thisPad->Padstack().UnconnectedLayerMode() )
483 && flashesConditionally( otherPad->Padstack().UnconnectedLayerMode() ) )
484 {
485 continue;
486 }
487 }
488
489 if( aItem->Type() == PCB_PAD_T && zoneLayer )
490 {
491 const PAD* pad = static_cast<const PAD*>( aItem );
492 ZONE* zone = static_cast<ZONE*>( zoneLayer->Parent() );
493 int islandIdx = zoneLayer->SubpolyIndex();
494
495 if( zone->IsFilled() )
496 {
497 PCB_LAYER_ID pcbLayer = ToLAYER_ID( aLayer );
498 const SHAPE_POLY_SET* zoneFill = zone->GetFill( pcbLayer );
499 const SHAPE_LINE_CHAIN& padHull = pad->GetEffectivePolygon( pcbLayer,
500 ERROR_INSIDE )->Outline( 0 );
501
502 for( const VECTOR2I& pt : zoneFill->COutline( islandIdx ).CPoints() )
503 {
504 // If the entire island is inside the pad's flashing then the pad
505 // won't actually connect to anything else, so only return true if
506 // part of the island is *outside* the pad's flashing.
507
508 if( !padHull.PointInside( pt ) )
509 return true;
510 }
511 }
512
513 continue;
514 }
515 else if( aItem->Type() == PCB_VIA_T && zoneLayer )
516 {
517 const PCB_VIA* via = static_cast<const PCB_VIA*>( aItem );
518 ZONE* zone = static_cast<ZONE*>( zoneLayer->Parent() );
519 int islandIdx = zoneLayer->SubpolyIndex();
520
521 if( zone->IsFilled() )
522 {
523 PCB_LAYER_ID layer = ToLAYER_ID( aLayer );
524 const SHAPE_POLY_SET* zoneFill = zone->GetFill( layer );
525 SHAPE_CIRCLE viaHull( via->GetCenter(), via->GetWidth( layer ) / 2 );
526
527 for( const VECTOR2I& pt : zoneFill->COutline( islandIdx ).CPoints() )
528 {
529 // If the entire island is inside the via's flashing then the via
530 // won't actually connect to anything else, so only return true if
531 // part of the island is *outside* the via's flashing.
532
533 if( !viaHull.SHAPE::Collide( pt ) )
534 return true;
535 }
536 }
537
538 continue;
539 }
540
541 return true;
542 }
543 }
544 }
545
546 return false;
547}
548
549
550unsigned int CONNECTIVITY_DATA::GetUnconnectedCount( bool aVisibleOnly ) const
551{
552 unsigned int unconnected = 0;
553
554 for( RN_NET* net : m_nets )
555 {
556 if( !net )
557 continue;
558
559 for( const CN_EDGE& edge : net->GetEdges() )
560 {
561 if( edge.IsVisible() || !aVisibleOnly )
562 ++unconnected;
563 }
564 }
565
566 return unconnected;
567}
568
569
571{
572 for( RN_NET* net : m_nets )
573 net->Clear();
574}
575
576
577const std::vector<BOARD_CONNECTED_ITEM*>
579{
582
583 std::vector<BOARD_CONNECTED_ITEM*> rv;
584
585 auto clusters = m_connAlgo->SearchClusters( ( aFlags & IGNORE_NETS ) ? CSM_PROPAGATE : CSM_CONNECTIVITY_CHECK,
586 ( aFlags & EXCLUDE_ZONES ),
587 ( aFlags & IGNORE_NETS ) ? -1 : aItem->GetNetCode() );
588
589 for( const std::shared_ptr<CN_CLUSTER>& cl : clusters )
590 {
591 if( cl->Contains( aItem ) )
592 {
593 for( const CN_ITEM* item : *cl )
594 {
595 if( item->Valid() )
596 rv.push_back( item->Parent() );
597 }
598 }
599 }
600
601 return rv;
602}
603
604
605const std::vector<BOARD_CONNECTED_ITEM*>
606CONNECTIVITY_DATA::GetNetItems( int aNetCode, const std::vector<KICAD_T>& aTypes ) const
607{
608 std::vector<BOARD_CONNECTED_ITEM*> items;
609 items.reserve( 32 );
610
611 std::bitset<MAX_STRUCT_TYPE_ID> type_bits;
612
613 for( KICAD_T scanType : aTypes )
614 {
615 wxASSERT( scanType < MAX_STRUCT_TYPE_ID );
616 type_bits.set( scanType );
617 }
618
619 m_connAlgo->ForEachItem(
620 [&]( CN_ITEM& aItem )
621 {
622 if( aItem.Valid() && ( aItem.Net() == aNetCode ) && type_bits[aItem.Parent()->Type()] )
623 items.push_back( aItem.Parent() );
624 } );
625
626 std::sort( items.begin(), items.end() );
627 items.erase( std::unique( items.begin(), items.end() ), items.end() );
628 return items;
629}
630
631
632const std::vector<PCB_TRACK*>
634{
635 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( aItem );
636
637 std::set<PCB_TRACK*> tracks;
638 std::vector<PCB_TRACK*> rv;
639
640 for( CN_ITEM* citem : entry.GetItems() )
641 {
642 for( CN_ITEM* connected : citem->ConnectedItems() )
643 {
644 if( connected->Valid() &&
645 ( connected->Parent()->Type() == PCB_TRACE_T ||
646 connected->Parent()->Type() == PCB_VIA_T ||
647 connected->Parent()->Type() == PCB_ARC_T ) )
648 {
649 tracks.insert( static_cast<PCB_TRACK*> ( connected->Parent() ) );
650 }
651 }
652 }
653
654 std::copy( tracks.begin(), tracks.end(), std::back_inserter( rv ) );
655 return rv;
656}
657
658
659void CONNECTIVITY_DATA::GetConnectedPads( const BOARD_CONNECTED_ITEM* aItem, std::set<PAD*>* pads ) const
660{
661 for( CN_ITEM* citem : m_connAlgo->ItemEntry( aItem ).GetItems() )
662 {
663 for( CN_ITEM* connected : citem->ConnectedItems() )
664 {
665 if( connected->Valid() && connected->Parent()->Type() == PCB_PAD_T )
666 pads->insert( static_cast<PAD*> ( connected->Parent() ) );
667 }
668 }
669}
670
671
672const std::vector<PAD*> CONNECTIVITY_DATA::GetConnectedPads( const BOARD_CONNECTED_ITEM* aItem )
673const
674{
675 std::set<PAD*> pads;
676 std::vector<PAD*> rv;
677
678 GetConnectedPads( aItem, &pads );
679
680 std::copy( pads.begin(), pads.end(), std::back_inserter( rv ) );
681 return rv;
682}
683
684
685void CONNECTIVITY_DATA::GetConnectedPadsAndVias( const BOARD_CONNECTED_ITEM* aItem, std::vector<PAD*>* pads,
686 std::vector<PCB_VIA*>* vias )
687{
688 for( CN_ITEM* citem : m_connAlgo->ItemEntry( aItem ).GetItems() )
689 {
690 for( CN_ITEM* connected : citem->ConnectedItems() )
691 {
692 if( connected->Valid() )
693 {
694 BOARD_CONNECTED_ITEM* parent = connected->Parent();
695
696 if( parent->Type() == PCB_PAD_T )
697 pads->push_back( static_cast<PAD*>( parent ) );
698 else if( parent->Type() == PCB_VIA_T )
699 vias->push_back( static_cast<PCB_VIA*>( parent ) );
700 }
701 }
702 }
703}
704
705
706unsigned int CONNECTIVITY_DATA::GetNodeCount( int aNet ) const
707{
708 int sum = 0;
709
710 if( aNet < 0 ) // Node count for all nets
711 {
712 for( const RN_NET* net : m_nets )
713 sum += net->GetNodeCount();
714 }
715 else if( aNet < (int) m_nets.size() )
716 {
717 sum = m_nets[aNet]->GetNodeCount();
718 }
719
720 return sum;
721}
722
723
724unsigned int CONNECTIVITY_DATA::GetPadCount( int aNet ) const
725{
726 int n = 0;
727
728 for( CN_ITEM* pad : m_connAlgo->ItemList() )
729 {
730 if( !pad->Valid() || pad->Parent()->Type() != PCB_PAD_T)
731 continue;
732
733 PAD* dpad = static_cast<PAD*>( pad->Parent() );
734
735 if( aNet < 0 || aNet == dpad->GetNetCode() )
736 n++;
737 }
738
739 return n;
740}
741
742
743void CONNECTIVITY_DATA::RunOnUnconnectedEdges( std::function<bool( CN_EDGE& )> aFunc )
744{
745 for( RN_NET* rnNet : m_nets )
746 {
747 if( rnNet )
748 {
749 for( CN_EDGE& edge : rnNet->GetEdges() )
750 {
751 if( !aFunc( edge ) )
752 return;
753 }
754 }
755 }
756}
757
758
759static int getMinDist( BOARD_CONNECTED_ITEM* aItem, const VECTOR2I& aPoint )
760{
761 switch( aItem->Type() )
762 {
763 case PCB_TRACE_T:
764 case PCB_ARC_T:
765 {
766 PCB_TRACK* track = static_cast<PCB_TRACK*>( aItem );
767
768 return std::min( track->GetStart().Distance(aPoint ), track->GetEnd().Distance( aPoint ) );
769 }
770
771 default:
772 return aItem->GetPosition().Distance( aPoint );
773 }
774}
775
776
777bool CONNECTIVITY_DATA::TestTrackEndpointDangling( PCB_TRACK* aTrack, bool aIgnoreTracksInPads,
778 VECTOR2I* aPos ) const
779{
780 const std::list<CN_ITEM*>& items = GetConnectivityAlgo()->ItemEntry( aTrack ).GetItems();
781
782 // Not in the connectivity system. This is a bug!
783 if( items.empty() )
784 {
785 wxFAIL_MSG( wxT( "track not in connectivity system" ) );
786 return false;
787 }
788
789 CN_ITEM* citem = items.front();
790
791 if( !citem->Valid() )
792 return false;
793
794 if( aTrack->Type() == PCB_TRACE_T || aTrack->Type() == PCB_ARC_T )
795 {
796 // Test if a segment is connected on each end.
797 //
798 // NB: be wary of short segments which can be connected to the *same* other item on
799 // each end. If that's their only connection then they're still dangling.
800
801 PCB_LAYER_ID layer = aTrack->GetLayer();
802 int accuracy = KiROUND( aTrack->GetWidth() / 2.0 );
803 int start_count = 0;
804 int end_count = 0;
805
806 for( CN_ITEM* connected : citem->ConnectedItems() )
807 {
808 BOARD_CONNECTED_ITEM* item = connected->Parent();
809 ZONE* zone = dynamic_cast<ZONE*>( item );
810 DRC_RTREE* rtree = nullptr;
811 bool hitStart = false;
812 bool hitEnd = false;
813
814 if( item->GetFlags() & IS_DELETED )
815 continue;
816
817 if( zone )
818 rtree = zone->GetBoard()->m_CopperZoneRTreeCache[ zone ].get();
819
820 if( rtree )
821 {
822 SHAPE_CIRCLE start( aTrack->GetStart(), accuracy );
823 SHAPE_CIRCLE end( aTrack->GetEnd(), accuracy );
824
825 hitStart = rtree->QueryColliding( start.BBox(), &start, layer );
826 hitEnd = rtree->QueryColliding( end.BBox(), &end, layer );
827 }
828 else
829 {
830 std::shared_ptr<SHAPE> shape = item->GetEffectiveShape( layer );
831
832 hitStart = shape->Collide( aTrack->GetStart(), accuracy );
833 hitEnd = shape->Collide( aTrack->GetEnd(), accuracy );
834 }
835
836 if( hitStart && hitEnd )
837 {
838 if( zone )
839 {
840 // Both start and end in a zone: track may be redundant, but it's not dangling
841 return false;
842 }
843 else if( item->Type() == PCB_PAD_T || item->Type() == PCB_VIA_T )
844 {
845 // Both start and end are under a pad: see what the caller wants us to do
846 if( aIgnoreTracksInPads )
847 return false;
848 }
849
850 if( getMinDist( item, aTrack->GetStart() ) < getMinDist( item, aTrack->GetEnd() ) )
851 start_count++;
852 else
853 end_count++;
854 }
855 else if( hitStart )
856 {
857 start_count++;
858 }
859 else if( hitEnd )
860 {
861 end_count++;
862 }
863
864 if( start_count > 0 && end_count > 0 )
865 return false;
866 }
867
868 if( aPos )
869 *aPos = (start_count == 0 ) ? aTrack->GetStart() : aTrack->GetEnd();
870
871 return true;
872 }
873 else if( aTrack->Type() == PCB_VIA_T )
874 {
875 // Test if a via is only connected on one layer
876
877 const std::vector<CN_ITEM*>& connected = citem->ConnectedItems();
878
879 if( connected.empty() )
880 {
881 // No connections AND no-net is not an error
882 if( aTrack->GetNetCode() <= 0 )
883 return false;
884
885 if( aPos )
886 *aPos = aTrack->GetPosition();
887
888 return true;
889 }
890
891 // Here, we check if the via is connected only to items on a single layer
892 int first_layer = UNDEFINED_LAYER;
893
894 for( CN_ITEM* item : connected )
895 {
896 if( item->Parent()->GetFlags() & IS_DELETED )
897 continue;
898
899 if( first_layer == UNDEFINED_LAYER )
900 first_layer = item->Layer();
901 else if( item->Layer() != first_layer )
902 return false;
903 }
904
905 if( aPos )
906 *aPos = aTrack->GetPosition();
907
908 return true;
909 }
910 else
911 {
912 wxFAIL_MSG( wxT( "CONNECTIVITY_DATA::TestTrackEndpointDangling: unknown track type" ) );
913 }
914
915 return false;
916}
917
918
919const std::vector<BOARD_CONNECTED_ITEM*>
921 const std::vector<KICAD_T>& aTypes, const int& aMaxError ) const
922{
923 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( aItem );
924 std::vector<BOARD_CONNECTED_ITEM*> rv;
925 SEG::ecoord maxError_sq = (SEG::ecoord) aMaxError * aMaxError;
926
927 for( CN_ITEM* cnItem : entry.GetItems() )
928 {
929 for( CN_ITEM* connected : cnItem->ConnectedItems() )
930 {
931 for( const std::shared_ptr<CN_ANCHOR>& anchor : connected->Anchors() )
932 {
933 if( ( anchor->Pos() - aAnchor ).SquaredEuclideanNorm() <= maxError_sq )
934 {
935 for( KICAD_T type : aTypes )
936 {
937 if( connected->Valid() && connected->Parent()->Type() == type )
938 {
939 rv.push_back( connected->Parent() );
940 break;
941 }
942 }
943
944 break;
945 }
946 }
947 }
948 }
949
950 return rv;
951}
952
953
955{
956 if ( aNet < 0 || aNet >= (int) m_nets.size() )
957 return nullptr;
958
959 return m_nets[ aNet ];
960}
961
962
964{
965 if ( aItem->Type() == PCB_FOOTPRINT_T)
966 {
967 for( PAD* pad : static_cast<FOOTPRINT*>( aItem )->Pads() )
968 m_connAlgo->MarkNetAsDirty( pad->GetNetCode() );
969 }
970
971 if (aItem->IsConnected() )
972 m_connAlgo->MarkNetAsDirty( static_cast<BOARD_CONNECTED_ITEM*>( aItem )->GetNetCode() );
973}
974
975
977{
978 m_connAlgo->RemoveInvalidRefs();
979
980 for( RN_NET* rnNet : m_nets )
981 rnNet->RemoveInvalidRefs();
982}
983
984
986{
987 m_progressReporter = aReporter;
988 m_connAlgo->SetProgressReporter( m_progressReporter );
989}
990
991
992const std::vector<CN_EDGE>
993CONNECTIVITY_DATA::GetRatsnestForItems( const std::vector<BOARD_ITEM*>& aItems )
994{
995 std::set<int> nets;
996 std::vector<CN_EDGE> edges;
997 std::set<BOARD_CONNECTED_ITEM*> item_set;
998
999 for( BOARD_ITEM* item : aItems )
1000 {
1001 if( item->Type() == PCB_FOOTPRINT_T )
1002 {
1003 FOOTPRINT* footprint = static_cast<FOOTPRINT*>( item );
1004
1005 for( PAD* pad : footprint->Pads() )
1006 {
1007 nets.insert( pad->GetNetCode() );
1008 item_set.insert( pad );
1009 }
1010 }
1011 else if( item->IsConnected() )
1012 {
1013 BOARD_CONNECTED_ITEM* conn_item = static_cast<BOARD_CONNECTED_ITEM*>( item );
1014
1015 item_set.insert( conn_item );
1016 nets.insert( conn_item->GetNetCode() );
1017 }
1018 }
1019
1020 for( int netcode : nets )
1021 {
1022 RN_NET* net = GetRatsnestForNet( netcode );
1023
1024 if( !net )
1025 continue;
1026
1027 for( const CN_EDGE& edge : net->GetEdges() )
1028 {
1029 std::shared_ptr<const CN_ANCHOR> srcNode = edge.GetSourceNode();
1030 std::shared_ptr<const CN_ANCHOR> dstNode = edge.GetTargetNode();
1031
1032 if( !srcNode || srcNode->Dirty() || !dstNode || dstNode->Dirty() )
1033 continue;
1034
1035 BOARD_CONNECTED_ITEM* srcParent = srcNode->Parent();
1036 BOARD_CONNECTED_ITEM* dstParent = dstNode->Parent();
1037
1038 bool srcFound = ( item_set.find( srcParent ) != item_set.end() );
1039 bool dstFound = ( item_set.find( dstParent ) != item_set.end() );
1040
1041 if ( srcFound && dstFound )
1042 edges.push_back( edge );
1043 }
1044 }
1045
1046 return edges;
1047}
1048
1049
1050const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForPad( const PAD* aPad )
1051{
1052 std::vector<CN_EDGE> edges;
1053 RN_NET* net = GetRatsnestForNet( aPad->GetNetCode() );
1054
1055 if( !net )
1056 return edges;
1057
1058 for( const CN_EDGE& edge : net->GetEdges() )
1059 {
1060 if( !edge.GetSourceNode() || edge.GetSourceNode()->Dirty() )
1061 continue;
1062
1063 if( !edge.GetTargetNode() || edge.GetTargetNode()->Dirty() )
1064 continue;
1065
1066 if( edge.GetSourceNode()->Parent() == aPad || edge.GetTargetNode()->Parent() == aPad )
1067 edges.push_back( edge );
1068 }
1069
1070 return edges;
1071}
1072
1073
1074const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForComponent( FOOTPRINT* aComponent,
1075 bool aSkipInternalConnections )
1076{
1077 std::set<int> nets;
1078 std::set<const PAD*> pads;
1079 std::vector<CN_EDGE> edges;
1080
1081 for( PAD* pad : aComponent->Pads() )
1082 {
1083 nets.insert( pad->GetNetCode() );
1084 pads.insert( pad );
1085 }
1086
1087 for( int netcode : nets )
1088 {
1089 RN_NET* net = GetRatsnestForNet( netcode );
1090
1091 if( !net )
1092 continue;
1093
1094 for( const CN_EDGE& edge : net->GetEdges() )
1095 {
1096 const std::shared_ptr<const CN_ANCHOR>& srcNode = edge.GetSourceNode();
1097 const std::shared_ptr<const CN_ANCHOR>& dstNode = edge.GetTargetNode();
1098
1099 if( !srcNode || srcNode->Dirty() || !dstNode || dstNode->Dirty() )
1100 continue;
1101
1102 const PAD* srcParent = static_cast<const PAD*>( srcNode->Parent() );
1103 const PAD* dstParent = static_cast<const PAD*>( dstNode->Parent() );
1104
1105 bool srcFound = ( pads.find(srcParent) != pads.end() );
1106 bool dstFound = ( pads.find(dstParent) != pads.end() );
1107
1108 if ( srcFound && dstFound && !aSkipInternalConnections )
1109 edges.push_back( edge );
1110 else if ( srcFound || dstFound )
1111 edges.push_back( edge );
1112 }
1113 }
1114
1115 return edges;
1116}
1117
1118
1120{
1121 if( std::shared_ptr<NET_SETTINGS> netSettings = m_netSettings.lock() )
1122 return netSettings.get();
1123 else
1124 return nullptr;
1125}
@ ERROR_INSIDE
constexpr BOX2I KiROUND(const BOX2D &aBoxD)
Definition box2.h:990
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
PCB_LAYER_ID GetLayer() const override
Return the primary layer this item is on.
std::shared_ptr< NET_SETTINGS > m_NetSettings
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition board_item.h:84
virtual bool IsConnected() const
Returns information if the object is derived from BOARD_CONNECTED_ITEM.
Definition board_item.h:139
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
virtual const BOARD * GetBoard() const
Return the BOARD in which this BOARD_ITEM resides, or NULL if none.
FOOTPRINT * GetParentFootprint() const
Information pertinent to a Pcbnew printed circuit board.
Definition board.h:322
const NETINFO_LIST & GetNetInfo() const
Definition board.h:996
std::unordered_map< ZONE *, std::unique_ptr< DRC_RTREE > > m_CopperZoneRTreeCache
Definition board.h:1472
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition board.cpp:1082
void CacheTriangulation(PROGRESS_REPORTER *aReporter=nullptr, const std::vector< ZONE * > &aZones={})
Definition board.cpp:1140
CN_ANCHOR represents a physical location that can be connected: a pad or a track/arc/via endpoint.
const std::list< CN_ITEM * > & GetItems() const
ITEM_MAP_ENTRY & ItemEntry(const BOARD_CONNECTED_ITEM *aItem)
CN_EDGE represents a point-to-point connection, whether realized or unrealized (ie: tracks etc.
CN_ITEM represents a BOARD_CONNETED_ITEM in the connectivity system (ie: a pad, track/arc/via,...
const std::vector< CN_ITEM * > & ConnectedItems() const
int Net() const
bool Valid() const
BOARD_CONNECTED_ITEM * Parent() const
int SubpolyIndex() const
void FillIsolatedIslandsMap(std::map< ZONE *, std::map< PCB_LAYER_ID, ISOLATED_ISLANDS > > &aMap, bool aConnectivityAlreadyRebuilt=false)
Fill the isolate islands list for each layer of each zone.
void RecalculateRatsnest(BOARD_COMMIT *aCommit=nullptr)
Function RecalculateRatsnest() Updates the ratsnest for the board.
void ClearLocalRatsnest()
Function ClearLocalRatsnest() Erases the temporary, selection-based ratsnest (i.e.
PROGRESS_REPORTER * m_progressReporter
unsigned int GetPadCount(int aNet=-1) const
void MarkItemNetAsDirty(BOARD_ITEM *aItem)
std::weak_ptr< NET_SETTINGS > m_netSettings
Used to get netclass data when drawing ratsnests.
const std::vector< BOARD_CONNECTED_ITEM * > GetConnectedItems(const BOARD_CONNECTED_ITEM *aItem, int aFlags=0) const
void PropagateNets(BOARD_COMMIT *aCommit=nullptr)
Propagates the net codes from the source pads to the tracks/vias.
void RunOnUnconnectedEdges(std::function< bool(CN_EDGE &)> aFunc)
std::vector< RN_DYNAMIC_LINE > m_dynamicRatsnest
bool m_skipRatsnestUpdate
Used to suppress ratsnest calculations on dynamic ratsnests.
const std::vector< CN_EDGE > GetRatsnestForPad(const PAD *aPad)
RN_NET * GetRatsnestForNet(int aNet)
Function GetRatsnestForNet() Returns the ratsnest, expressed as a set of graph edges for a given net.
const std::vector< BOARD_CONNECTED_ITEM * > GetConnectedItemsAtAnchor(const BOARD_CONNECTED_ITEM *aItem, const VECTOR2I &aAnchor, const std::vector< KICAD_T > &aTypes, const int &aMaxError=0) const
Function GetConnectedItemsAtAnchor() Returns a list of items connected to a source item aItem at posi...
void ClearRatsnest()
Function Clear() Erases the connectivity database.
bool Remove(BOARD_ITEM *aItem)
Function Remove() Removes an item from the connectivity data.
void GetConnectedPadsAndVias(const BOARD_CONNECTED_ITEM *aItem, std::vector< PAD * > *pads, std::vector< PCB_VIA * > *vias)
const NET_SETTINGS * GetNetSettings() const
void ComputeLocalRatsnest(const std::vector< BOARD_ITEM * > &aItems, const CONNECTIVITY_DATA *aDynamicData, VECTOR2I aInternalOffset={ 0, 0 })
Function ComputeLocalRatsnest() Calculates the temporary (usually selection-based) ratsnest for the s...
bool TestTrackEndpointDangling(PCB_TRACK *aTrack, bool aIgnoreTracksInPads, VECTOR2I *aPos=nullptr) const
unsigned int GetNodeCount(int aNet=-1) const
void SetProgressReporter(PROGRESS_REPORTER *aReporter)
void BlockRatsnestItems(const std::vector< BOARD_ITEM * > &aItems)
bool IsConnectedOnLayer(const BOARD_CONNECTED_ITEM *aItem, int aLayer, const std::initializer_list< KICAD_T > &aTypes={}) const
const std::vector< PCB_TRACK * > GetConnectedTracks(const BOARD_CONNECTED_ITEM *aItem) const
const std::vector< CN_EDGE > GetRatsnestForComponent(FOOTPRINT *aComponent, bool aSkipInternalConnections=false)
const std::vector< BOARD_CONNECTED_ITEM * > GetNetItems(int aNetCode, const std::vector< KICAD_T > &aTypes) const
Function GetNetItems() Returns the list of items that belong to a certain net.
bool Add(BOARD_ITEM *aItem)
Function Add() Adds an item to the connectivity data.
std::shared_ptr< CN_CONNECTIVITY_ALGO > m_connAlgo
bool Build(BOARD *aBoard, PROGRESS_REPORTER *aReporter=nullptr)
Function Build() Builds the connectivity database for the board aBoard.
std::shared_ptr< FROM_TO_CACHE > m_fromToCache
const std::vector< PAD * > GetConnectedPads(const BOARD_CONNECTED_ITEM *aItem) const
unsigned int GetUnconnectedCount(bool aVisibileOnly) const
std::map< int, wxString > m_netcodeMap
Used to map netcode to net name.
void internalRecalculateRatsnest(BOARD_COMMIT *aCommit=nullptr)
Updates the ratsnest for the board without locking the connectivity mutex.
void RefreshNetcodeMap(BOARD *aBoard)
Refresh the map of netcodes to net names.
void HideLocalRatsnest()
Hides the temporary, selection-based ratsnest lines.
const std::vector< CN_EDGE > GetRatsnestForItems(const std::vector< BOARD_ITEM * > &aItems)
void addRatsnestCluster(const std::shared_ptr< CN_CLUSTER > &aCluster)
std::vector< RN_NET * > m_nets
bool Update(BOARD_ITEM *aItem)
Function Update() Updates the connectivity data for an item.
void Move(const VECTOR2I &aDelta)
Moves the connectivity list anchors.
int GetNetCount() const
Function GetNetCount() Returns the total number of nets in the connectivity database.
std::shared_ptr< CN_CONNECTIVITY_ALGO > GetConnectivityAlgo() const
Implement an R-tree for fast spatial and layer indexing of connectable items.
Definition drc_rtree.h:50
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
Definition drc_rtree.h:217
virtual VECTOR2I GetPosition() const
Definition eda_item.h:278
KICAD_T Type() const
Returns the type of object.
Definition eda_item.h:111
EDA_ITEM_FLAGS GetFlags() const
Definition eda_item.h:151
std::deque< PAD * > & Pads()
Definition footprint.h:306
Handle the data for a net.
Definition netinfo.h:54
NET_SETTINGS stores various net-related settings in a project context.
UNCONNECTED_LAYER_MODE UnconnectedLayerMode() const
Definition padstack.h:363
Definition pad.h:55
const PADSTACK & Padstack() const
Definition pad.h:333
const VECTOR2I & GetStart() const
Definition pcb_track.h:154
VECTOR2I GetPosition() const override
Definition pcb_track.h:144
const VECTOR2I & GetEnd() const
Definition pcb_track.h:151
virtual int GetWidth() const
Definition pcb_track.h:148
A small class to help profiling.
Definition profile.h:49
void Show(std::ostream &aStream=std::cerr)
Print the elapsed time (in a suitable unit) to a stream.
Definition profile.h:105
A progress reporter interface for use in multi-threaded environments.
virtual bool KeepRefreshing(bool aWait=false)=0
Update the UI (if any).
virtual void Report(const wxString &aMessage)=0
Display aMessage in the progress bar dialog.
virtual void SetCurrentProgress(double aProgress)=0
Set the progress value to aProgress (0..1).
Describe ratsnest for a single net.
unsigned int GetNodeCount() const
const std::vector< CN_EDGE > & GetEdges() const
bool NearestBicoloredPair(RN_NET *aOtherNet, VECTOR2I &aPos1, VECTOR2I &aPos2) const
void AddCluster(std::shared_ptr< CN_CLUSTER > aCluster)
VECTOR2I::extended_type ecoord
Definition seg.h:44
const BOX2I BBox(int aClearance=0) const override
Compute a bounding box of the shape, with a margin of aClearance a collision.
bool PointInside(const VECTOR2I &aPt, int aAccuracy=0, bool aUseBBoxCache=false) const override
Check if point aP lies inside a closed shape.
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
const std::vector< VECTOR2I > & CPoints() const
Represent a set of closed polygons.
const SHAPE_LINE_CHAIN & COutline(int aIndex) const
double Distance(const VECTOR2< extended_type > &aVector) const
Compute the distance between two vectors.
Definition vector2d.h:561
Handle a list of polygons defining a copper zone.
Definition zone.h:73
bool IsFilled() const
Definition zone.h:297
SHAPE_POLY_SET * GetFill(PCB_LAYER_ID aLayer)
Definition zone.h:613
static int getMinDist(BOARD_CONNECTED_ITEM *aItem, const VECTOR2I &aPoint)
#define EXCLUDE_ZONES
#define IGNORE_NETS
Function GetConnectedItems() Returns a list of items connected to a source item aItem.
#define _(s)
#define IS_DELETED
PCB_LAYER_ID
A quick note on layer IDs:
Definition layer_ids.h:60
@ B_Cu
Definition layer_ids.h:65
@ UNDEFINED_LAYER
Definition layer_ids.h:61
PCB_LAYER_ID ToLAYER_ID(int aLayer)
Definition lset.cpp:754
bool contains(const _Container &__container, _Value __value)
Returns true if the container contains the given value.
Definition kicad_algo.h:100
UNCONNECTED_LAYER_MODE
Definition padstack.h:128
Class that computes missing connections on a PCB.
VECTOR2I end
const int accuracy
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
static thread_pool * tp
BS::priority_thread_pool thread_pool
Definition thread_pool.h:31
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition typeinfo.h:78
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition typeinfo.h:97
@ MAX_STRUCT_TYPE_ID
Definition typeinfo.h:242
@ PCB_FOOTPRINT_T
class FOOTPRINT, a footprint
Definition typeinfo.h:86
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition typeinfo.h:87
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition typeinfo.h:98
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition typeinfo.h:96
VECTOR2< int32_t > VECTOR2I
Definition vector2d.h:695