KiCad PCB EDA Suite
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connectivity_data.cpp
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1/*
2 * This program source code file is part of KICAD, a free EDA CAD application.
3 *
4 * Copyright (C) 2017 CERN
5 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
6 * @author Tomasz Wlostowski <[email protected]>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, you may find one here:
20 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
21 * or you may search the http://www.gnu.org website for the version 2 license,
22 * or you may write to the Free Software Foundation, Inc.,
23 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
24 */
25
26#ifdef PROFILE
27#include <core/profile.h>
28#endif
29
30#include <algorithm>
31#include <future>
32#include <initializer_list>
33
42#include <progress_reporter.h>
43#include <thread_pool.h>
44#include <trigo.h>
45#include <drc/drc_rtree.h>
46
48 m_skipRatsnestUpdate( false )
49{
50 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO( this ) );
51 m_progressReporter = nullptr;
52 m_fromToCache.reset( new FROM_TO_CACHE );
53}
54
55
56CONNECTIVITY_DATA::CONNECTIVITY_DATA( std::shared_ptr<CONNECTIVITY_DATA> aGlobalConnectivity,
57 const std::vector<BOARD_ITEM*>& aLocalItems,
58 bool aSkipRatsnestUpdate ) :
59 m_skipRatsnestUpdate( aSkipRatsnestUpdate )
60{
61 Build( aGlobalConnectivity, aLocalItems );
62 m_progressReporter = nullptr;
63 m_fromToCache.reset( new FROM_TO_CACHE );
64}
65
66
68{
69 for( RN_NET* net : m_nets )
70 delete net;
71
72 m_nets.clear();
73}
74
75
77{
78 m_connAlgo->Add( aItem );
79 return true;
80}
81
82
84{
85 m_connAlgo->Remove( aItem );
86 return true;
87}
88
89
91{
92 m_connAlgo->Remove( aItem );
93 m_connAlgo->Add( aItem );
94 return true;
95}
96
97
99{
100 aBoard->CacheTriangulation( aReporter );
101
102 std::unique_lock<KISPINLOCK> lock( m_lock, std::try_to_lock );
103
104 if( !lock )
105 return false;
106
107 if( aReporter )
108 {
109 aReporter->Report( _( "Updating nets..." ) );
110 aReporter->KeepRefreshing( false );
111 }
112
113 for( RN_NET* net : m_nets )
114 delete net;
115
116 m_nets.clear();
117
118 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO( this ) );
119 m_connAlgo->Build( aBoard, aReporter );
120
122
123 RefreshNetcodeMap( aBoard );
124
125 if( aReporter )
126 {
127 aReporter->SetCurrentProgress( 0.75 );
128 aReporter->KeepRefreshing( false );
129 }
130
132
133 if( aReporter )
134 {
135 aReporter->SetCurrentProgress( 1.0 );
136 aReporter->KeepRefreshing( false );
137 }
138
139 return true;
140}
141
142
144{
145 m_netcodeMap.clear();
146
147 for( NETINFO_ITEM* net : aBoard->GetNetInfo() )
148 m_netcodeMap[net->GetNetCode()] = net->GetNetname();
149}
150
151
152void CONNECTIVITY_DATA::Build( std::shared_ptr<CONNECTIVITY_DATA>& aGlobalConnectivity,
153 const std::vector<BOARD_ITEM*>& aLocalItems )
154{
155 std::unique_lock<KISPINLOCK> lock( m_lock, std::try_to_lock );
156
157 if( !lock )
158 return;
159
160 m_connAlgo.reset( new CN_CONNECTIVITY_ALGO( this ) );
161 m_connAlgo->LocalBuild( aGlobalConnectivity, aLocalItems );
162
164}
165
166
168{
169 m_connAlgo->ForEachAnchor( [&aDelta]( CN_ANCHOR& anchor )
170 {
171 anchor.Move( aDelta );
172 } );
173}
174
175
177{
178#ifdef PROFILE
179 PROF_TIMER rnUpdate( "update-ratsnest" );
180#endif
181
182 std::vector<RN_NET*> dirty_nets;
183
184 // Start with net 1 as net 0 is reserved for not-connected
185 // Nets without nodes are also ignored
186 std::copy_if( m_nets.begin() + 1, m_nets.end(), std::back_inserter( dirty_nets ),
187 [] ( RN_NET* aNet )
188 {
189 return aNet->IsDirty() && aNet->GetNodeCount() > 0;
190 } );
191
193
194 auto results = tp.parallelize_loop( dirty_nets.size(),
195 [&]( const int a, const int b )
196 {
197 for( int ii = a; ii < b; ++ii )
198 dirty_nets[ii]->UpdateNet();
199 } );
200 results.wait();
201
202 auto results2 = tp.parallelize_loop( dirty_nets.size(),
203 [&]( const int a, const int b )
204 {
205 for( int ii = a; ii < b; ++ii )
206 dirty_nets[ii]->OptimizeRNEdges();
207 } );
208 results2.wait();
209
210#ifdef PROFILE
211 rnUpdate.Show();
212#endif
213}
214
215
216void CONNECTIVITY_DATA::addRatsnestCluster( const std::shared_ptr<CN_CLUSTER>& aCluster )
217{
218 RN_NET* rnNet = m_nets[ aCluster->OriginNet() ];
219
220 rnNet->AddCluster( aCluster );
221}
222
223
225{
226
227 // We can take over the lock here if called in the same thread
228 // This is to prevent redraw during a RecalculateRatsnets process
229 std::unique_lock<KISPINLOCK> lock( m_lock );
230
232
233}
234
236{
237 m_connAlgo->PropagateNets( aCommit );
238
239 int lastNet = m_connAlgo->NetCount();
240
241 if( lastNet >= (int) m_nets.size() )
242 {
243 unsigned int prevSize = m_nets.size();
244 m_nets.resize( lastNet + 1 );
245
246 for( unsigned int i = prevSize; i < m_nets.size(); i++ )
247 m_nets[i] = new RN_NET;
248 }
249 else
250 {
251 for( size_t ii = lastNet; ii < m_nets.size(); ++ii )
252 m_nets[ii]->Clear();
253 }
254
255 const std::vector<std::shared_ptr<CN_CLUSTER>>& clusters = m_connAlgo->GetClusters();
256
257 for( int net = 0; net < lastNet; net++ )
258 {
259 if( m_connAlgo->IsNetDirty( net ) )
260 m_nets[net]->Clear();
261 }
262
263 for( const std::shared_ptr<CN_CLUSTER>& c : clusters )
264 {
265 int net = c->OriginNet();
266
267 // Don't add intentionally-kept zone islands to the ratsnest
268 if( c->IsOrphaned() && c->Size() == 1 )
269 {
270 if( dynamic_cast<CN_ZONE_LAYER*>( *c->begin() ) )
271 continue;
272 }
273
274 if( m_connAlgo->IsNetDirty( net ) )
276 }
277
278 m_connAlgo->ClearDirtyFlags();
279
282}
283
284
285void CONNECTIVITY_DATA::BlockRatsnestItems( const std::vector<BOARD_ITEM*>& aItems )
286{
287 std::vector<BOARD_CONNECTED_ITEM*> citems;
288
289 for( BOARD_ITEM* item : aItems )
290 {
291 if( item->Type() == PCB_FOOTPRINT_T )
292 {
293 for( PAD* pad : static_cast<FOOTPRINT*>(item)->Pads() )
294 citems.push_back( pad );
295 }
296 else
297 {
298 if( BOARD_CONNECTED_ITEM* citem = dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
299 citems.push_back( citem );
300 }
301 }
302
303 for( const BOARD_CONNECTED_ITEM* item : citems )
304 {
305 if ( m_connAlgo->ItemExists( item ) )
306 {
307 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( item );
308
309 for( CN_ITEM* cnItem : entry.GetItems() )
310 {
311 for( const std::shared_ptr<CN_ANCHOR>& anchor : cnItem->Anchors() )
312 anchor->SetNoLine( true );
313 }
314 }
315 }
316}
317
318
320{
321 return m_connAlgo->NetCount();
322}
323
324
325void CONNECTIVITY_DATA::FillIsolatedIslandsMap( std::map<ZONE*, std::map<PCB_LAYER_ID, ISOLATED_ISLANDS>>& aMap,
326 bool aConnectivityAlreadyRebuilt )
327{
328 m_connAlgo->FillIsolatedIslandsMap( aMap, aConnectivityAlreadyRebuilt );
329}
330
331
332void CONNECTIVITY_DATA::ComputeLocalRatsnest( const std::vector<BOARD_ITEM*>& aItems,
333 const CONNECTIVITY_DATA* aDynamicData,
334 VECTOR2I aInternalOffset )
335{
336 if( !aDynamicData )
337 return;
338
339 m_dynamicRatsnest.clear();
340 std::mutex dynamic_ratsnest_mutex;
341
342 // This gets connections between the stationary board and the
343 // moving selection
344
345 auto update_lambda = [&]( int nc )
346 {
347 RN_NET* dynamicNet = aDynamicData->m_nets[nc];
348 RN_NET* staticNet = m_nets[nc];
349
353 if( dynamicNet->GetNodeCount() != 0 && dynamicNet->GetNodeCount() != staticNet->GetNodeCount() )
354 {
355 VECTOR2I pos1, pos2;
356
357 if( staticNet->NearestBicoloredPair( dynamicNet, pos1, pos2 ) )
358 {
360 l.a = pos1;
361 l.b = pos2;
362 l.netCode = nc;
363
364 std::lock_guard<std::mutex> lock( dynamic_ratsnest_mutex );
365 m_dynamicRatsnest.push_back( l );
366 }
367 }
368 };
369
371 size_t num_nets = std::min( m_nets.size(), aDynamicData->m_nets.size() );
372
373 auto results = tp.parallelize_loop( 1, num_nets,
374 [&]( const int a, const int b)
375 {
376 for( int ii = a; ii < b; ++ii )
377 update_lambda( ii );
378 });
379 results.wait();
380
381 // This gets the ratsnest for internal connections in the moving set
382 const std::vector<CN_EDGE>& edges = GetRatsnestForItems( aItems );
383
384 for( const CN_EDGE& edge : edges )
385 {
386 const std::shared_ptr<const CN_ANCHOR>& nodeA = edge.GetSourceNode();
387 const std::shared_ptr<const CN_ANCHOR>& nodeB = edge.GetTargetNode();
388
389 if( !nodeA || nodeA->Dirty() || !nodeB || nodeB->Dirty() )
390 continue;
391
393
394 // Use the parents' positions
395 l.a = nodeA->Parent()->GetPosition() + aInternalOffset;
396 l.b = nodeB->Parent()->GetPosition() + aInternalOffset;
397 l.netCode = 0;
398 m_dynamicRatsnest.push_back( l );
399 }
400}
401
402
404{
405 m_connAlgo->ForEachAnchor( []( CN_ANCHOR& anchor )
406 {
407 anchor.SetNoLine( false );
408 } );
410}
411
412
414{
415 m_dynamicRatsnest.clear();
416}
417
418
420{
421 m_connAlgo->PropagateNets( aCommit );
422}
423
424
426 const std::initializer_list<KICAD_T>& aTypes ) const
427{
428 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY &entry = m_connAlgo->ItemEntry( aItem );
429
430 auto matchType =
431 [&]( KICAD_T aItemType )
432 {
433 if( aTypes.size() == 0 )
434 return true;
435
436 return alg::contains( aTypes, aItemType);
437 };
438
439 for( CN_ITEM* citem : entry.GetItems() )
440 {
441 for( CN_ITEM* connected : citem->ConnectedItems() )
442 {
443 CN_ZONE_LAYER* zoneLayer = dynamic_cast<CN_ZONE_LAYER*>( connected );
444
445 // lyIdx is compatible with StartLayer() and EndLayer() notation in CN_ITEM
446 // items, where B_Cu is set to INT_MAX (std::numeric_limits<int>::max())
447 int lyIdx = aLayer;
448
449 if( aLayer == B_Cu )
450 lyIdx = std::numeric_limits<int>::max();
451
452 if( connected->Valid()
453 && connected->StartLayer() <= lyIdx && connected->EndLayer() >= lyIdx
454 && matchType( connected->Parent()->Type() )
455 && connected->Net() == aItem->GetNetCode() )
456 {
457 if( aItem->Type() == PCB_PAD_T && zoneLayer )
458 {
459 const PAD* pad = static_cast<const PAD*>( aItem );
460 ZONE* zone = static_cast<ZONE*>( zoneLayer->Parent() );
461 int islandIdx = zoneLayer->SubpolyIndex();
462
463 if( zone->IsFilled() )
464 {
465 PCB_LAYER_ID pcbLayer = ToLAYER_ID( aLayer );
466 const SHAPE_POLY_SET* zoneFill = zone->GetFill( pcbLayer );
467 const SHAPE_LINE_CHAIN& padHull = pad->GetEffectivePolygon( pcbLayer,
468 ERROR_INSIDE )->Outline( 0 );
469
470 for( const VECTOR2I& pt : zoneFill->COutline( islandIdx ).CPoints() )
471 {
472 // If the entire island is inside the pad's flashing then the pad
473 // won't actually connect to anything else, so only return true if
474 // part of the island is *outside* the pad's flashing.
475
476 if( !padHull.PointInside( pt ) )
477 return true;
478 }
479 }
480
481 continue;
482 }
483 else if( aItem->Type() == PCB_VIA_T && zoneLayer )
484 {
485 const PCB_VIA* via = static_cast<const PCB_VIA*>( aItem );
486 ZONE* zone = static_cast<ZONE*>( zoneLayer->Parent() );
487 int islandIdx = zoneLayer->SubpolyIndex();
488
489 if( zone->IsFilled() )
490 {
491 PCB_LAYER_ID layer = ToLAYER_ID( aLayer );
492 const SHAPE_POLY_SET* zoneFill = zone->GetFill( layer );
493 SHAPE_CIRCLE viaHull( via->GetCenter(), via->GetWidth( layer ) / 2 );
494
495 for( const VECTOR2I& pt : zoneFill->COutline( islandIdx ).CPoints() )
496 {
497 // If the entire island is inside the via's flashing then the via
498 // won't actually connect to anything else, so only return true if
499 // part of the island is *outside* the via's flashing.
500
501 if( !viaHull.SHAPE::Collide( pt ) )
502 return true;
503 }
504 }
505
506 continue;
507 }
508
509 return true;
510 }
511 }
512 }
513
514 return false;
515}
516
517
518unsigned int CONNECTIVITY_DATA::GetUnconnectedCount( bool aVisibleOnly ) const
519{
520 unsigned int unconnected = 0;
521
522 for( RN_NET* net : m_nets )
523 {
524 if( !net )
525 continue;
526
527 for( const CN_EDGE& edge : net->GetEdges() )
528 {
529 if( edge.IsVisible() || !aVisibleOnly )
530 ++unconnected;
531 }
532 }
533
534 return unconnected;
535}
536
537
539{
540 for( RN_NET* net : m_nets )
541 net->Clear();
542}
543
544
545const std::vector<BOARD_CONNECTED_ITEM*>
547{
550
551 std::vector<BOARD_CONNECTED_ITEM*> rv;
552
553 auto clusters = m_connAlgo->SearchClusters( ( aFlags & IGNORE_NETS ) ? CSM_PROPAGATE : CSM_CONNECTIVITY_CHECK,
554 ( aFlags & EXCLUDE_ZONES ),
555 ( aFlags & IGNORE_NETS ) ? -1 : aItem->GetNetCode() );
556
557 for( const std::shared_ptr<CN_CLUSTER>& cl : clusters )
558 {
559 if( cl->Contains( aItem ) )
560 {
561 for( const CN_ITEM* item : *cl )
562 {
563 if( item->Valid() )
564 rv.push_back( item->Parent() );
565 }
566 }
567 }
568
569 return rv;
570}
571
572
573const std::vector<BOARD_CONNECTED_ITEM*>
574CONNECTIVITY_DATA::GetNetItems( int aNetCode, const std::vector<KICAD_T>& aTypes ) const
575{
576 std::vector<BOARD_CONNECTED_ITEM*> items;
577 items.reserve( 32 );
578
579 std::bitset<MAX_STRUCT_TYPE_ID> type_bits;
580
581 for( KICAD_T scanType : aTypes )
582 {
583 wxASSERT( scanType < MAX_STRUCT_TYPE_ID );
584 type_bits.set( scanType );
585 }
586
587 m_connAlgo->ForEachItem(
588 [&]( CN_ITEM& aItem )
589 {
590 if( aItem.Valid() && ( aItem.Net() == aNetCode ) && type_bits[aItem.Parent()->Type()] )
591 items.push_back( aItem.Parent() );
592 } );
593
594 std::sort( items.begin(), items.end() );
595 items.erase( std::unique( items.begin(), items.end() ), items.end() );
596 return items;
597}
598
599
600const std::vector<PCB_TRACK*>
602{
603 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( aItem );
604
605 std::set<PCB_TRACK*> tracks;
606 std::vector<PCB_TRACK*> rv;
607
608 for( CN_ITEM* citem : entry.GetItems() )
609 {
610 for( CN_ITEM* connected : citem->ConnectedItems() )
611 {
612 if( connected->Valid() &&
613 ( connected->Parent()->Type() == PCB_TRACE_T ||
614 connected->Parent()->Type() == PCB_VIA_T ||
615 connected->Parent()->Type() == PCB_ARC_T ) )
616 {
617 tracks.insert( static_cast<PCB_TRACK*> ( connected->Parent() ) );
618 }
619 }
620 }
621
622 std::copy( tracks.begin(), tracks.end(), std::back_inserter( rv ) );
623 return rv;
624}
625
626
627void CONNECTIVITY_DATA::GetConnectedPads( const BOARD_CONNECTED_ITEM* aItem, std::set<PAD*>* pads ) const
628{
629 for( CN_ITEM* citem : m_connAlgo->ItemEntry( aItem ).GetItems() )
630 {
631 for( CN_ITEM* connected : citem->ConnectedItems() )
632 {
633 if( connected->Valid() && connected->Parent()->Type() == PCB_PAD_T )
634 pads->insert( static_cast<PAD*> ( connected->Parent() ) );
635 }
636 }
637}
638
639
640const std::vector<PAD*> CONNECTIVITY_DATA::GetConnectedPads( const BOARD_CONNECTED_ITEM* aItem )
641const
642{
643 std::set<PAD*> pads;
644 std::vector<PAD*> rv;
645
646 GetConnectedPads( aItem, &pads );
647
648 std::copy( pads.begin(), pads.end(), std::back_inserter( rv ) );
649 return rv;
650}
651
652
653void CONNECTIVITY_DATA::GetConnectedPadsAndVias( const BOARD_CONNECTED_ITEM* aItem, std::vector<PAD*>* pads,
654 std::vector<PCB_VIA*>* vias )
655{
656 for( CN_ITEM* citem : m_connAlgo->ItemEntry( aItem ).GetItems() )
657 {
658 for( CN_ITEM* connected : citem->ConnectedItems() )
659 {
660 if( connected->Valid() )
661 {
662 BOARD_CONNECTED_ITEM* parent = connected->Parent();
663
664 if( parent->Type() == PCB_PAD_T )
665 pads->push_back( static_cast<PAD*>( parent ) );
666 else if( parent->Type() == PCB_VIA_T )
667 vias->push_back( static_cast<PCB_VIA*>( parent ) );
668 }
669 }
670 }
671}
672
673
674unsigned int CONNECTIVITY_DATA::GetNodeCount( int aNet ) const
675{
676 int sum = 0;
677
678 if( aNet < 0 ) // Node count for all nets
679 {
680 for( const RN_NET* net : m_nets )
681 sum += net->GetNodeCount();
682 }
683 else if( aNet < (int) m_nets.size() )
684 {
685 sum = m_nets[aNet]->GetNodeCount();
686 }
687
688 return sum;
689}
690
691
692unsigned int CONNECTIVITY_DATA::GetPadCount( int aNet ) const
693{
694 int n = 0;
695
696 for( CN_ITEM* pad : m_connAlgo->ItemList() )
697 {
698 if( !pad->Valid() || pad->Parent()->Type() != PCB_PAD_T)
699 continue;
700
701 PAD* dpad = static_cast<PAD*>( pad->Parent() );
702
703 if( aNet < 0 || aNet == dpad->GetNetCode() )
704 n++;
705 }
706
707 return n;
708}
709
710
711void CONNECTIVITY_DATA::RunOnUnconnectedEdges( std::function<bool( CN_EDGE& )> aFunc )
712{
713 for( RN_NET* rnNet : m_nets )
714 {
715 if( rnNet )
716 {
717 for( CN_EDGE& edge : rnNet->GetEdges() )
718 {
719 if( !aFunc( edge ) )
720 return;
721 }
722 }
723 }
724}
725
726
727static int getMinDist( BOARD_CONNECTED_ITEM* aItem, const VECTOR2I& aPoint )
728{
729 switch( aItem->Type() )
730 {
731 case PCB_TRACE_T:
732 case PCB_ARC_T:
733 {
734 PCB_TRACK* track = static_cast<PCB_TRACK*>( aItem );
735
736 return std::min( track->GetStart().Distance(aPoint ), track->GetEnd().Distance( aPoint ) );
737 }
738
739 default:
740 return aItem->GetPosition().Distance( aPoint );
741 }
742}
743
744
745bool CONNECTIVITY_DATA::TestTrackEndpointDangling( PCB_TRACK* aTrack, bool aIgnoreTracksInPads,
746 VECTOR2I* aPos ) const
747{
748 const std::list<CN_ITEM*>& items = GetConnectivityAlgo()->ItemEntry( aTrack ).GetItems();
749
750 // Not in the connectivity system. This is a bug!
751 if( items.empty() )
752 {
753 wxFAIL_MSG( wxT( "track not in connectivity system" ) );
754 return false;
755 }
756
757 CN_ITEM* citem = items.front();
758
759 if( !citem->Valid() )
760 return false;
761
762 if( aTrack->Type() == PCB_TRACE_T || aTrack->Type() == PCB_ARC_T )
763 {
764 // Test if a segment is connected on each end.
765 //
766 // NB: be wary of short segments which can be connected to the *same* other item on
767 // each end. If that's their only connection then they're still dangling.
768
769 PCB_LAYER_ID layer = aTrack->GetLayer();
770 int accuracy = KiROUND( aTrack->GetWidth() / 2.0 );
771 int start_count = 0;
772 int end_count = 0;
773
774 for( CN_ITEM* connected : citem->ConnectedItems() )
775 {
776 BOARD_CONNECTED_ITEM* item = connected->Parent();
777 ZONE* zone = dynamic_cast<ZONE*>( item );
778 DRC_RTREE* rtree = nullptr;
779 bool hitStart = false;
780 bool hitEnd = false;
781
782 if( item->GetFlags() & IS_DELETED )
783 continue;
784
785 if( zone )
786 rtree = zone->GetBoard()->m_CopperZoneRTreeCache[ zone ].get();
787
788 if( rtree )
789 {
790 SHAPE_CIRCLE start( aTrack->GetStart(), accuracy );
791 SHAPE_CIRCLE end( aTrack->GetEnd(), accuracy );
792
793 hitStart = rtree->QueryColliding( start.BBox(), &start, layer );
794 hitEnd = rtree->QueryColliding( end.BBox(), &end, layer );
795 }
796 else
797 {
798 std::shared_ptr<SHAPE> shape = item->GetEffectiveShape( layer );
799
800 hitStart = shape->Collide( aTrack->GetStart(), accuracy );
801 hitEnd = shape->Collide( aTrack->GetEnd(), accuracy );
802 }
803
804 if( hitStart && hitEnd )
805 {
806 if( zone )
807 {
808 // Both start and end in a zone: track may be redundant, but it's not dangling
809 return false;
810 }
811 else if( item->Type() == PCB_PAD_T || item->Type() == PCB_VIA_T )
812 {
813 // Both start and end are under a pad: see what the caller wants us to do
814 if( aIgnoreTracksInPads )
815 return false;
816 }
817
818 if( getMinDist( item, aTrack->GetStart() ) < getMinDist( item, aTrack->GetEnd() ) )
819 start_count++;
820 else
821 end_count++;
822 }
823 else if( hitStart )
824 {
825 start_count++;
826 }
827 else if( hitEnd )
828 {
829 end_count++;
830 }
831
832 if( start_count > 0 && end_count > 0 )
833 return false;
834 }
835
836 if( aPos )
837 *aPos = (start_count == 0 ) ? aTrack->GetStart() : aTrack->GetEnd();
838
839 return true;
840 }
841 else if( aTrack->Type() == PCB_VIA_T )
842 {
843 // Test if a via is only connected on one layer
844
845 const std::vector<CN_ITEM*>& connected = citem->ConnectedItems();
846
847 if( connected.empty() )
848 {
849 // No connections AND no-net is not an error
850 if( aTrack->GetNetCode() <= 0 )
851 return false;
852
853 if( aPos )
854 *aPos = aTrack->GetPosition();
855
856 return true;
857 }
858
859 // Here, we check if the via is connected only to items on a single layer
860 int first_layer = UNDEFINED_LAYER;
861
862 for( CN_ITEM* item : connected )
863 {
864 if( item->Parent()->GetFlags() & IS_DELETED )
865 continue;
866
867 if( first_layer == UNDEFINED_LAYER )
868 first_layer = item->Layer();
869 else if( item->Layer() != first_layer )
870 return false;
871 }
872
873 if( aPos )
874 *aPos = aTrack->GetPosition();
875
876 return true;
877 }
878 else
879 {
880 wxFAIL_MSG( wxT( "CONNECTIVITY_DATA::TestTrackEndpointDangling: unknown track type" ) );
881 }
882
883 return false;
884}
885
886
887const std::vector<BOARD_CONNECTED_ITEM*>
889 const std::vector<KICAD_T>& aTypes, const int& aMaxError ) const
890{
891 CN_CONNECTIVITY_ALGO::ITEM_MAP_ENTRY& entry = m_connAlgo->ItemEntry( aItem );
892 std::vector<BOARD_CONNECTED_ITEM*> rv;
893 SEG::ecoord maxError_sq = (SEG::ecoord) aMaxError * aMaxError;
894
895 for( CN_ITEM* cnItem : entry.GetItems() )
896 {
897 for( CN_ITEM* connected : cnItem->ConnectedItems() )
898 {
899 for( const std::shared_ptr<CN_ANCHOR>& anchor : connected->Anchors() )
900 {
901 if( ( anchor->Pos() - aAnchor ).SquaredEuclideanNorm() <= maxError_sq )
902 {
903 for( KICAD_T type : aTypes )
904 {
905 if( connected->Valid() && connected->Parent()->Type() == type )
906 {
907 rv.push_back( connected->Parent() );
908 break;
909 }
910 }
911
912 break;
913 }
914 }
915 }
916 }
917
918 return rv;
919}
920
921
923{
924 if ( aNet < 0 || aNet >= (int) m_nets.size() )
925 return nullptr;
926
927 return m_nets[ aNet ];
928}
929
930
932{
933 if ( aItem->Type() == PCB_FOOTPRINT_T)
934 {
935 for( PAD* pad : static_cast<FOOTPRINT*>( aItem )->Pads() )
936 m_connAlgo->MarkNetAsDirty( pad->GetNetCode() );
937 }
938
939 if (aItem->IsConnected() )
940 m_connAlgo->MarkNetAsDirty( static_cast<BOARD_CONNECTED_ITEM*>( aItem )->GetNetCode() );
941}
942
943
945{
946 m_connAlgo->RemoveInvalidRefs();
947
948 for( RN_NET* rnNet : m_nets )
949 rnNet->RemoveInvalidRefs();
950}
951
952
954{
955 m_progressReporter = aReporter;
956 m_connAlgo->SetProgressReporter( m_progressReporter );
957}
958
959
960const std::vector<CN_EDGE>
961CONNECTIVITY_DATA::GetRatsnestForItems( const std::vector<BOARD_ITEM*>& aItems )
962{
963 std::set<int> nets;
964 std::vector<CN_EDGE> edges;
965 std::set<BOARD_CONNECTED_ITEM*> item_set;
966
967 for( BOARD_ITEM* item : aItems )
968 {
969 if( item->Type() == PCB_FOOTPRINT_T )
970 {
971 FOOTPRINT* footprint = static_cast<FOOTPRINT*>( item );
972
973 for( PAD* pad : footprint->Pads() )
974 {
975 nets.insert( pad->GetNetCode() );
976 item_set.insert( pad );
977 }
978 }
979 else if( item->IsConnected() )
980 {
981 BOARD_CONNECTED_ITEM* conn_item = static_cast<BOARD_CONNECTED_ITEM*>( item );
982
983 item_set.insert( conn_item );
984 nets.insert( conn_item->GetNetCode() );
985 }
986 }
987
988 for( int netcode : nets )
989 {
990 RN_NET* net = GetRatsnestForNet( netcode );
991
992 if( !net )
993 continue;
994
995 for( const CN_EDGE& edge : net->GetEdges() )
996 {
997 std::shared_ptr<const CN_ANCHOR> srcNode = edge.GetSourceNode();
998 std::shared_ptr<const CN_ANCHOR> dstNode = edge.GetTargetNode();
999
1000 if( !srcNode || srcNode->Dirty() || !dstNode || dstNode->Dirty() )
1001 continue;
1002
1003 BOARD_CONNECTED_ITEM* srcParent = srcNode->Parent();
1004 BOARD_CONNECTED_ITEM* dstParent = dstNode->Parent();
1005
1006 bool srcFound = ( item_set.find( srcParent ) != item_set.end() );
1007 bool dstFound = ( item_set.find( dstParent ) != item_set.end() );
1008
1009 if ( srcFound && dstFound )
1010 edges.push_back( edge );
1011 }
1012 }
1013
1014 return edges;
1015}
1016
1017
1018const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForPad( const PAD* aPad )
1019{
1020 std::vector<CN_EDGE> edges;
1021 RN_NET* net = GetRatsnestForNet( aPad->GetNetCode() );
1022
1023 if( !net )
1024 return edges;
1025
1026 for( const CN_EDGE& edge : net->GetEdges() )
1027 {
1028 if( !edge.GetSourceNode() || edge.GetSourceNode()->Dirty() )
1029 continue;
1030
1031 if( !edge.GetTargetNode() || edge.GetTargetNode()->Dirty() )
1032 continue;
1033
1034 if( edge.GetSourceNode()->Parent() == aPad || edge.GetTargetNode()->Parent() == aPad )
1035 edges.push_back( edge );
1036 }
1037
1038 return edges;
1039}
1040
1041
1042const std::vector<CN_EDGE> CONNECTIVITY_DATA::GetRatsnestForComponent( FOOTPRINT* aComponent,
1043 bool aSkipInternalConnections )
1044{
1045 std::set<int> nets;
1046 std::set<const PAD*> pads;
1047 std::vector<CN_EDGE> edges;
1048
1049 for( PAD* pad : aComponent->Pads() )
1050 {
1051 nets.insert( pad->GetNetCode() );
1052 pads.insert( pad );
1053 }
1054
1055 for( int netcode : nets )
1056 {
1057 RN_NET* net = GetRatsnestForNet( netcode );
1058
1059 if( !net )
1060 continue;
1061
1062 for( const CN_EDGE& edge : net->GetEdges() )
1063 {
1064 const std::shared_ptr<const CN_ANCHOR>& srcNode = edge.GetSourceNode();
1065 const std::shared_ptr<const CN_ANCHOR>& dstNode = edge.GetTargetNode();
1066
1067 if( !srcNode || srcNode->Dirty() || !dstNode || dstNode->Dirty() )
1068 continue;
1069
1070 const PAD* srcParent = static_cast<const PAD*>( srcNode->Parent() );
1071 const PAD* dstParent = static_cast<const PAD*>( dstNode->Parent() );
1072
1073 bool srcFound = ( pads.find(srcParent) != pads.end() );
1074 bool dstFound = ( pads.find(dstParent) != pads.end() );
1075
1076 if ( srcFound && dstFound && !aSkipInternalConnections )
1077 edges.push_back( edge );
1078 else if ( srcFound || dstFound )
1079 edges.push_back( edge );
1080 }
1081 }
1082
1083 return edges;
1084}
1085
1086
1088{
1089 if( std::shared_ptr<NET_SETTINGS> netSettings = m_netSettings.lock() )
1090 return netSettings.get();
1091 else
1092 return nullptr;
1093}
@ ERROR_INSIDE
Definition: approximation.h:34
constexpr BOX2I KiROUND(const BOX2D &aBoxD)
Definition: box2.h:990
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
std::shared_ptr< NET_SETTINGS > m_NetSettings
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:79
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:232
virtual bool IsConnected() const
Returns information if the object is derived from BOARD_CONNECTED_ITEM.
Definition: board_item.h:134
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: board_item.cpp:326
virtual const BOARD * GetBoard() const
Return the BOARD in which this BOARD_ITEM resides, or NULL if none.
Definition: board_item.cpp:79
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:317
const NETINFO_LIST & GetNetInfo() const
Definition: board.h:934
std::unordered_map< ZONE *, std::unique_ptr< DRC_RTREE > > m_CopperZoneRTreeCache
Definition: board.h:1375
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Definition: board.cpp:1024
void CacheTriangulation(PROGRESS_REPORTER *aReporter=nullptr, const std::vector< ZONE * > &aZones={})
Definition: board.cpp:1068
CN_ANCHOR represents a physical location that can be connected: a pad or a track/arc/via endpoint.
const std::list< CN_ITEM * > & GetItems() const
CN_EDGE represents a point-to-point connection, whether realized or unrealized (ie: tracks etc.
CN_ITEM represents a BOARD_CONNETED_ITEM in the connectivity system (ie: a pad, track/arc/via,...
const std::vector< CN_ITEM * > & ConnectedItems() const
int Net() const
bool Valid() const
BOARD_CONNECTED_ITEM * Parent() const
int SubpolyIndex() const
void FillIsolatedIslandsMap(std::map< ZONE *, std::map< PCB_LAYER_ID, ISOLATED_ISLANDS > > &aMap, bool aConnectivityAlreadyRebuilt=false)
Fill the isolate islands list for each layer of each zone.
void RecalculateRatsnest(BOARD_COMMIT *aCommit=nullptr)
Function RecalculateRatsnest() Updates the ratsnest for the board.
void ClearLocalRatsnest()
Function ClearLocalRatsnest() Erases the temporary, selection-based ratsnest (i.e.
PROGRESS_REPORTER * m_progressReporter
unsigned int GetPadCount(int aNet=-1) const
void MarkItemNetAsDirty(BOARD_ITEM *aItem)
std::weak_ptr< NET_SETTINGS > m_netSettings
Used to get netclass data when drawing ratsnests.
const std::vector< BOARD_CONNECTED_ITEM * > GetConnectedItems(const BOARD_CONNECTED_ITEM *aItem, int aFlags=0) const
void PropagateNets(BOARD_COMMIT *aCommit=nullptr)
Propagates the net codes from the source pads to the tracks/vias.
void RunOnUnconnectedEdges(std::function< bool(CN_EDGE &)> aFunc)
std::vector< RN_DYNAMIC_LINE > m_dynamicRatsnest
bool m_skipRatsnestUpdate
Used to suppress ratsnest calculations on dynamic ratsnests.
const std::vector< CN_EDGE > GetRatsnestForPad(const PAD *aPad)
RN_NET * GetRatsnestForNet(int aNet)
Function GetRatsnestForNet() Returns the ratsnest, expressed as a set of graph edges for a given net.
const std::vector< BOARD_CONNECTED_ITEM * > GetConnectedItemsAtAnchor(const BOARD_CONNECTED_ITEM *aItem, const VECTOR2I &aAnchor, const std::vector< KICAD_T > &aTypes, const int &aMaxError=0) const
Function GetConnectedItemsAtAnchor() Returns a list of items connected to a source item aItem at posi...
void ClearRatsnest()
Function Clear() Erases the connectivity database.
bool Remove(BOARD_ITEM *aItem)
Function Remove() Removes an item from the connectivity data.
void GetConnectedPadsAndVias(const BOARD_CONNECTED_ITEM *aItem, std::vector< PAD * > *pads, std::vector< PCB_VIA * > *vias)
const NET_SETTINGS * GetNetSettings() const
void ComputeLocalRatsnest(const std::vector< BOARD_ITEM * > &aItems, const CONNECTIVITY_DATA *aDynamicData, VECTOR2I aInternalOffset={ 0, 0 })
Function ComputeLocalRatsnest() Calculates the temporary (usually selection-based) ratsnest for the s...
bool TestTrackEndpointDangling(PCB_TRACK *aTrack, bool aIgnoreTracksInPads, VECTOR2I *aPos=nullptr) const
unsigned int GetNodeCount(int aNet=-1) const
void SetProgressReporter(PROGRESS_REPORTER *aReporter)
void BlockRatsnestItems(const std::vector< BOARD_ITEM * > &aItems)
bool IsConnectedOnLayer(const BOARD_CONNECTED_ITEM *aItem, int aLayer, const std::initializer_list< KICAD_T > &aTypes={}) const
const std::vector< PCB_TRACK * > GetConnectedTracks(const BOARD_CONNECTED_ITEM *aItem) const
const std::vector< CN_EDGE > GetRatsnestForComponent(FOOTPRINT *aComponent, bool aSkipInternalConnections=false)
const std::vector< BOARD_CONNECTED_ITEM * > GetNetItems(int aNetCode, const std::vector< KICAD_T > &aTypes) const
Function GetNetItems() Returns the list of items that belong to a certain net.
bool Add(BOARD_ITEM *aItem)
Function Add() Adds an item to the connectivity data.
std::shared_ptr< CN_CONNECTIVITY_ALGO > m_connAlgo
bool Build(BOARD *aBoard, PROGRESS_REPORTER *aReporter=nullptr)
Function Build() Builds the connectivity database for the board aBoard.
std::shared_ptr< FROM_TO_CACHE > m_fromToCache
const std::vector< PAD * > GetConnectedPads(const BOARD_CONNECTED_ITEM *aItem) const
unsigned int GetUnconnectedCount(bool aVisibileOnly) const
std::map< int, wxString > m_netcodeMap
Used to map netcode to net name.
void internalRecalculateRatsnest(BOARD_COMMIT *aCommit=nullptr)
Updates the ratsnest for the board without locking the connectivity mutex.
void RefreshNetcodeMap(BOARD *aBoard)
Refresh the map of netcodes to net names.
void HideLocalRatsnest()
Hides the temporary, selection-based ratsnest lines.
const std::vector< CN_EDGE > GetRatsnestForItems(const std::vector< BOARD_ITEM * > &aItems)
void addRatsnestCluster(const std::shared_ptr< CN_CLUSTER > &aCluster)
std::vector< RN_NET * > m_nets
bool Update(BOARD_ITEM *aItem)
Function Update() Updates the connectivity data for an item.
void Move(const VECTOR2I &aDelta)
Moves the connectivity list anchors.
int GetNetCount() const
Function GetNetCount() Returns the total number of nets in the connectivity database.
std::shared_ptr< CN_CONNECTIVITY_ALGO > GetConnectivityAlgo() const
Implement an R-tree for fast spatial and layer indexing of connectable items.
Definition: drc_rtree.h:48
int QueryColliding(BOARD_ITEM *aRefItem, PCB_LAYER_ID aRefLayer, PCB_LAYER_ID aTargetLayer, std::function< bool(BOARD_ITEM *)> aFilter=nullptr, std::function< bool(BOARD_ITEM *)> aVisitor=nullptr, int aClearance=0) const
This is a fast test which essentially does bounding-box overlap given a worst-case clearance.
Definition: drc_rtree.h:214
virtual VECTOR2I GetPosition() const
Definition: eda_item.h:272
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:110
EDA_ITEM_FLAGS GetFlags() const
Definition: eda_item.h:145
std::deque< PAD * > & Pads()
Definition: footprint.h:209
Handle the data for a net.
Definition: netinfo.h:56
NET_SETTINGS stores various net-related settings in a project context.
Definition: net_settings.h:39
Definition: pad.h:54
const VECTOR2I & GetStart() const
Definition: pcb_track.h:152
VECTOR2I GetPosition() const override
Definition: pcb_track.h:142
const VECTOR2I & GetEnd() const
Definition: pcb_track.h:149
virtual int GetWidth() const
Definition: pcb_track.h:146
A small class to help profiling.
Definition: profile.h:49
void Show(std::ostream &aStream=std::cerr)
Print the elapsed time (in a suitable unit) to a stream.
Definition: profile.h:105
A progress reporter interface for use in multi-threaded environments.
virtual bool KeepRefreshing(bool aWait=false)=0
Update the UI (if any).
virtual void Report(const wxString &aMessage)=0
Display aMessage in the progress bar dialog.
virtual void SetCurrentProgress(double aProgress)=0
Set the progress value to aProgress (0..1).
Describe ratsnest for a single net.
Definition: ratsnest_data.h:64
unsigned int GetNodeCount() const
Definition: ratsnest_data.h:95
const std::vector< CN_EDGE > & GetEdges() const
Definition: ratsnest_data.h:97
bool NearestBicoloredPair(RN_NET *aOtherNet, VECTOR2I &aPos1, VECTOR2I &aPos2) const
void AddCluster(std::shared_ptr< CN_CLUSTER > aCluster)
VECTOR2I::extended_type ecoord
Definition: seg.h:44
const BOX2I BBox(int aClearance=0) const override
Compute a bounding box of the shape, with a margin of aClearance a collision.
Definition: shape_circle.h:70
bool PointInside(const VECTOR2I &aPt, int aAccuracy=0, bool aUseBBoxCache=false) const override
Check if point aP lies inside a closed shape.
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
const std::vector< VECTOR2I > & CPoints() const
Represent a set of closed polygons.
const SHAPE_LINE_CHAIN & COutline(int aIndex) const
double Distance(const VECTOR2< extended_type > &aVector) const
Compute the distance between two vectors.
Definition: vector2d.h:561
Handle a list of polygons defining a copper zone.
Definition: zone.h:74
bool IsFilled() const
Definition: zone.h:292
SHAPE_POLY_SET * GetFill(PCB_LAYER_ID aLayer)
Definition: zone.h:606
static int getMinDist(BOARD_CONNECTED_ITEM *aItem, const VECTOR2I &aPoint)
#define EXCLUDE_ZONES
#define IGNORE_NETS
Function GetConnectedItems() Returns a list of items connected to a source item aItem.
#define _(s)
#define IS_DELETED
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
@ B_Cu
Definition: layer_ids.h:65
@ UNDEFINED_LAYER
Definition: layer_ids.h:61
PCB_LAYER_ID ToLAYER_ID(int aLayer)
Definition: lset.cpp:744
bool contains(const _Container &__container, _Value __value)
Returns true if the container contains the given value.
Definition: kicad_algo.h:100
Class that computes missing connections on a PCB.
VECTOR2I end
const int accuracy
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
Definition: thread_pool.cpp:30
static thread_pool * tp
Definition: thread_pool.cpp:28
BS::thread_pool thread_pool
Definition: thread_pool.h:31
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:78
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:97
@ MAX_STRUCT_TYPE_ID
Definition: typeinfo.h:239
@ PCB_FOOTPRINT_T
class FOOTPRINT, a footprint
Definition: typeinfo.h:86
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:98
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:96