KiCad PCB EDA Suite
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erc.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2015 Jean-Pierre Charras, jp.charras at wanadoo.fr
5 * Copyright (C) 2011 Wayne Stambaugh <[email protected]>
6 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <https://www.gnu.org/licenses/>.
20 */
21
22#include <algorithm>
23#include <map>
24#include <numeric>
25#include <set>
26
27#include "connection_graph.h"
28#include "kiface_ids.h"
29#include <advanced_config.h>
31#include <common.h> // for ExpandEnvVarSubstitutions
32#include <erc/erc.h>
35#include <string_utils.h>
36#include <sch_pin.h>
38#include <sch_netchain.h>
39#include <project_sch.h>
42#include <sch_bus_entry.h>
43#include <sch_edit_frame.h>
44#include <sch_marker.h>
45#include <sch_reference_list.h>
46#include <sch_rule_area.h>
47#include <sch_sheet.h>
48#include <sch_sheet_pin.h>
49#include <sch_pin.h>
50#include <sch_textbox.h>
51#include <sch_line.h>
52#include <schematic.h>
53#include <lib_symbol.h>
54#include <sch_symbol.h>
55#include <pin_map.h>
58#include <vector>
59#include <optional>
60#include <wx/ffile.h>
61#include <sim/sim_lib_mgr.h>
62#include <progress_reporter.h>
63#include <kiway.h>
64#include <pgm_base.h>
66#include <trace_helpers.h>
68
69namespace
70{
71// Item paths participate in saved exclusion keys; preserve each check's serialized shape
72enum class ITEM_PATHS
73{
74 NONE,
75 MAIN,
76 BOTH
77};
78
79// Capture membership before the first marker; checks may insert markers while traversing the result
80class ERC_MARKER_PLACER
81{
82public:
83 explicit ERC_MARKER_PLACER( const SCHEMATIC& aSchematic ) :
84 m_schematic( aSchematic )
85 {
86 }
87
88 const SCH_SHEET_PATH* Find( const KIID_PATH& aSheet )
89 {
90 if( !m_paths )
91 {
92 m_hierarchy = m_schematic.Hierarchy();
93 m_paths.emplace();
94
95 for( const SCH_SHEET_PATH& path : m_hierarchy )
96 m_paths->emplace( path.PathRef(), &path );
97 }
98
99 if( const auto found = m_paths->find( aSheet ); found != m_paths->end() )
100 return found->second;
101
102 wxLogTrace( "KICAD_CONNECTIVITY", "ERC connectivity references unknown sheet instance %s", aSheet.AsString() );
103 return nullptr;
104 }
105
106 void Place( std::shared_ptr<ERC_ITEM> aItem, const KIID_PATH& aSheet, const VECTOR2I& aPosition,
107 ITEM_PATHS aItemPaths = ITEM_PATHS::NONE, bool aSheetSpecific = true )
108 {
109 const SCH_SHEET_PATH* sheet = Find( aSheet );
110
111 if( !sheet )
112 return;
113
114 if( aItemPaths == ITEM_PATHS::BOTH && aItem->GetAuxItemID() != niluuid )
115 aItem->SetItemsSheetPaths( *sheet, *sheet );
116 else if( aItemPaths != ITEM_PATHS::NONE )
117 aItem->SetItemsSheetPaths( *sheet );
118
119 append( std::move( aItem ), *sheet, aPosition, aSheetSpecific );
120 }
121
122 void Place( std::shared_ptr<ERC_ITEM> aItem, const KIID_PATH& aSheet, const VECTOR2I& aPosition,
123 const KIID_PATH& aMainItemSheet, const KIID_PATH& aAuxItemSheet )
124 {
125 const SCH_SHEET_PATH* sheet = Find( aSheet );
126 const SCH_SHEET_PATH* main = Find( aMainItemSheet );
127 const SCH_SHEET_PATH* aux = Find( aAuxItemSheet );
128
129 if( !sheet || !main || !aux )
130 return;
131
132 aItem->SetItemsSheetPaths( *main, *aux );
133 append( std::move( aItem ), *sheet, aPosition );
134 }
135
136 void Report( int aCode, const std::vector<KIID>& aItems, const KIID_PATH& aSheet, const VECTOR2I& aPosition,
137 ITEM_PATHS aItemPaths = ITEM_PATHS::NONE, const wxString& aMessage = wxEmptyString )
138 {
139 auto item = ERC_ITEM::Create( aCode );
140 item->SetItems( aItems );
141
142 if( !aMessage.empty() )
143 item->SetErrorMessage( aMessage );
144
145 Place( std::move( item ), aSheet, aPosition, aItemPaths );
146 }
147
148 int Count() const { return m_count; }
149
150private:
151 void append( std::shared_ptr<ERC_ITEM> aItem, const SCH_SHEET_PATH& aSheet, const VECTOR2I& aPosition,
152 bool aSheetSpecific = true )
153 {
154 if( aSheetSpecific )
155 aItem->SetSheetSpecificPath( aSheet );
156
157 aSheet.LastScreen()->Append( new SCH_MARKER( std::move( aItem ), aPosition ) );
158 ++m_count;
159 }
160
161 const SCHEMATIC& m_schematic;
162 SCH_SHEET_LIST m_hierarchy;
163 std::optional<std::map<KIID_PATH, const SCH_SHEET_PATH*>> m_paths;
164 int m_count = 0;
165};
166
167std::vector<SCH_CONNECTIVITY::FOOTPRINT_SOURCE> collectFootprints( SCHEMATIC& aSchematic )
168{
169 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
170 return aSchematic.Connectivity().Engine().FootprintSources();
171
172 std::vector<SCH_CONNECTIVITY::FOOTPRINT_SOURCE> result;
173
174 for( const SCH_SHEET_PATH& path : aSchematic.Hierarchy() )
175 {
176 for( SCH_ITEM* item : path.LastScreen()->Items().OfType( SCH_SYMBOL_T ) )
177 {
178 const auto& symbol = *static_cast<SCH_SYMBOL*>( item );
179 const auto& library = symbol.GetLibSymbolRef();
180 result.push_back( { path.PathRef(), symbol.m_Uuid, symbol.GetPosition(),
181 symbol.GetFootprintFieldText( &path, RESOLVED ),
182 library ? library->GetFPFilters() : wxArrayString() } );
183 }
184 }
185
186 return result;
187}
188
189template <typename LOCATION>
190int reportSourceErrors( SCHEMATIC& aSchematic, int aCode, const std::vector<LOCATION>& aSources )
191{
192 ERC_MARKER_PLACER markers( aSchematic );
193
194 for( const auto& source : aSources )
195 markers.Report( aCode, { source.item }, source.sheet, source.position, ITEM_PATHS::MAIN );
196
197 return markers.Count();
198}
199
200std::vector<SCH_CONNECTIVITY::NAMED_ITEM> collectNamedItems( SCHEMATIC& aSchematic, bool aSimilar )
201{
202 // The engine compares resolved net names for every power pin, including hidden and alternate pins
203 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
204 return aSchematic.Connectivity().Engine().NamedItems();
205
206 std::vector<SCH_CONNECTIVITY::NAMED_ITEM> result;
207
208 for( const auto& [key, subgraphs] : aSchematic.ConnectionGraph()->GetNetMap() )
209 {
210 for( const CONNECTION_SUBGRAPH* subgraph : subgraphs )
211 {
212 const SCH_SHEET_PATH& sheet = subgraph->GetSheet();
213
214 for( SCH_ITEM* item : subgraph->GetItems() )
215 {
216 if( item->Type() == SCH_LABEL_T || item->Type() == SCH_GLOBAL_LABEL_T
217 || item->Type() == SCH_HIER_LABEL_T )
218 {
219 auto* label = static_cast<SCH_LABEL_BASE*>( item );
220 result.push_back( { sheet.PathRef(), item->m_Uuid, item->GetPosition(),
221 label->GetShownText( &sheet, FOR_NETNAME ), item->Type(),
222 item->Type() == SCH_GLOBAL_LABEL_T } );
223 }
224 else if( item->Type() == SCH_PIN_T )
225 {
226 auto* pin = static_cast<SCH_PIN*>( item );
227 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( pin->GetParentSymbol() );
228
229 if( !pin->IsPower() || !symbol )
230 continue;
231
232 const wxString name = !aSimilar && pin->IsGlobalPower() && !symbol->IsGlobalPower()
233 ? pin->GetShownName() : symbol->GetValue( &sheet, FOR_NETNAME );
234 result.push_back( { sheet.PathRef(), item->m_Uuid, item->GetPosition(), name,
235 SCH_PIN_T, pin->IsGlobalPower() } );
236 }
237 }
238 }
239 }
240
241 return result;
242}
243
244void reportNameConflict( ERC_MARKER_PLACER& aMarkers, ERC_SETTINGS& aSettings, ERCE_T aCode,
246{
247 if( !aSettings.IsTestEnabled( aCode ) )
248 return;
249
250 auto item = ERC_ITEM::Create( aCode );
251 item->SetItems( aMain.item, aAux.item );
252 aMarkers.Place( std::move( item ), aMain.sheet, aMain.position, aMain.sheet, aAux.sheet );
253}
254
255}
256
257
258/* ERC tests :
259 * 1 - conflicts between connected pins ( example: 2 connected outputs )
260 * 2 - minimal connections requirements ( 1 input *must* be connected to an
261 * output, or a passive pin )
262 */
263
264/*
265 * Minimal ERC requirements:
266 * All pins *must* be connected (except ELECTRICAL_PINTYPE::PT_NC).
267 * When a pin is not connected in schematic, the user must place a "non
268 * connected" symbol to this pin.
269 * This ensures a forgotten connection will be detected.
270 */
271
272// Messages for matrix rows:
273const wxString CommentERC_H[] =
274{
275 _( "Input Pin" ),
276 _( "Output Pin" ),
277 _( "Bidirectional Pin" ),
278 _( "Tri-State Pin" ),
279 _( "Passive Pin" ),
280 _( "Free Pin" ),
281 _( "Unspecified Pin" ),
282 _( "Power Input Pin" ),
283 _( "Power Output Pin" ),
284 _( "Open Collector" ),
285 _( "Open Emitter" ),
286 _( "No Connection" )
287};
288
289// Messages for matrix columns
290const wxString CommentERC_V[] =
291{
292 _( "Input Pin" ),
293 _( "Output Pin" ),
294 _( "Bidirectional Pin" ),
295 _( "Tri-State Pin" ),
296 _( "Passive Pin" ),
297 _( "Free Pin" ),
298 _( "Unspecified Pin" ),
299 _( "Power Input Pin" ),
300 _( "Power Output Pin" ),
301 _( "Open Collector" ),
302 _( "Open Emitter" ),
303 _( "No Connection" )
304};
305
306
307// List of pin types that are considered drivers for usual input pins
308// i.e. pin type = ELECTRICAL_PINTYPE::PT_INPUT, but not PT_POWER_IN
309// that need only a PT_POWER_OUT pin type to be driven
318
319// List of pin types that are considered drivers for power pins
320// In fact only a ELECTRICAL_PINTYPE::PT_POWER_OUT pin type can drive
321// power input pins
322const std::set<ELECTRICAL_PINTYPE> DrivingPowerPinTypes =
323{
325};
326
327// List of pin types that require a driver elsewhere on the net
328const std::set<ELECTRICAL_PINTYPE> DrivenPinTypes =
329{
332};
333
334extern void CheckDuplicatePins( LIB_SYMBOL* aSymbol, std::vector<wxString>& aMessages,
335 UNITS_PROVIDER* aUnitsProvider );
336
337ERC_TESTER::ERC_TESTER( SCHEMATIC* aSchematic, bool aShowAllErrors ) :
338 m_schematic( aSchematic ),
339 m_settings( aSchematic->ErcSettings() ),
340 m_sheetList( aSchematic->BuildSheetListSortedByPageNumbers() ),
341 m_screens( aSchematic->Root() ),
342 m_nets( aSchematic->ConnectionGraph()->GetNetMap() ),
343 m_showAllErrors( aShowAllErrors )
344{
345 if( !ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
346 m_sheetList.GetMultiUnitSymbols( m_refMap, SYMBOL_FILTER_ALL );
347}
348
349
350int ERC_TESTER::TestDuplicateSheetNames( bool aCreateMarker )
351{
352 int err_count = 0;
353
354 // Preflight callers validate fresh edits before connectivity has been rebuilt
355 if( aCreateMarker && ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
356 {
357 const auto errors = m_schematic->Connectivity().Engine().DuplicateSheetNames();
358 ERC_MARKER_PLACER markers( *m_schematic );
359
360 for( const auto& error : errors )
361 {
362 markers.Report( ERCE_DUPLICATE_SHEET_NAME, { error.main, error.auxiliary }, error.sheet, error.position,
363 ITEM_PATHS::BOTH );
364 }
365
366 return markers.Count();
367 }
368
369 for( const SCH_SHEET_PATH& path : m_schematic->Hierarchy() )
370 {
371 SCH_SCREEN* screen = path.LastScreen();
372 std::vector<SCH_SHEET*> list;
373
374 for( SCH_ITEM* item : screen->Items().OfType( SCH_SHEET_T ) )
375 list.push_back( static_cast<SCH_SHEET*>( item ) );
376
377 for( size_t i = 0; i < list.size(); i++ )
378 {
379 SCH_SHEET* sheet = list[i];
380
381 for( size_t j = i + 1; j < list.size(); j++ )
382 {
383 SCH_SHEET* test_item = list[j];
384
385 // We have found a second sheet: compare names
386 // we are using case insensitive comparison to avoid mistakes between
387 // similar names like Mysheet and mysheet
388 const wxString variant = m_schematic->GetCurrentVariant();
389 const wxString name =
390 sheet->GetField( FIELD_T::SHEET_NAME )->GetShownText( &path, RESOLVED, variant, 0 );
391 const wxString other =
392 test_item->GetField( FIELD_T::SHEET_NAME )->GetShownText( &path, RESOLVED, variant, 0 );
393
394 if( name.IsSameAs( other, false ) )
395 {
396 if( aCreateMarker )
397 {
399 ercItem->SetItems( sheet, test_item );
400 ercItem->SetSheetSpecificPath( path );
401 ercItem->SetItemsSheetPaths( path, path );
402
403 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), sheet->GetPosition() );
404 screen->Append( marker );
405 }
406
407 err_count++;
408 }
409 }
410 }
411 }
412
413 return err_count;
414}
415
416
417int ERC_TESTER::TestPinMap( KIFACE* aCvPcb, PROJECT* aProject )
418{
419 int errors = 0;
420 const bool checkStale = m_settings.IsTestEnabled( ERCE_PIN_MAP_STALE_PIN );
421 const bool checkDuplicate = m_settings.IsTestEnabled( ERCE_PIN_MAP_DUPLICATE_PAD );
422 const bool checkBadPad = m_settings.IsTestEnabled( ERCE_PIN_MAP_BAD_PAD );
423
424 typedef void ( *PAD_NUMBERS_FN_PTR )( const wxString&, PROJECT*, std::set<wxString>& );
425
426 PAD_NUMBERS_FN_PTR padFetcher =
427 aCvPcb ? (PAD_NUMBERS_FN_PTR) aCvPcb->IfaceOrAddress( KIFACE_FOOTPRINT_PAD_NUMBERS ) : nullptr;
428
429 std::map<wxString, std::set<wxString>> padCache;
430
431 auto getPads = [&]( const wxString& aFootprintId ) -> const std::set<wxString>&
432 {
433 auto it = padCache.find( aFootprintId );
434
435 if( it != padCache.end() )
436 return it->second;
437
438 std::set<wxString>& pads = padCache[aFootprintId];
439
440 if( padFetcher && !aFootprintId.IsEmpty() )
441 padFetcher( aFootprintId, aProject, pads );
442
443 return pads;
444 };
445
446 // Pin maps and the symbol's pin numbers are library-symbol properties, so iterate unique
447 // screens (not sheet paths) to avoid double-reporting on reused hierarchical sheets.
448 for( SCH_SCREEN* screen = m_screens.GetFirst(); screen; screen = m_screens.GetNext() )
449 {
450 std::vector<SCH_CONNECTIVITY::PIN_MAP_FACT> sources;
451
452 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
453 {
454 sources = m_schematic->Connectivity().Engine().PinMapSymbols( screen->ConnectivityId() );
455 }
456 else
457 {
458 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
459 {
460 if( auto source = SCH_CONNECTIVITY::ExtractPinMapFacts( *static_cast<SCH_SYMBOL*>( item ) ) )
461 sources.push_back( std::move( *source ) );
462 }
463 }
464
465 for( const auto& source : sources )
466 {
467 const PIN_MAP_SET& maps = source.maps;
468 const auto& pinNumbers = source.pinNumbers;
469 const auto& jumperGroups = source.jumperGroups;
470
471 auto sharesJumperGroup = [&]( const wxString& aPinA, const wxString& aPinB )
472 {
473 for( const JUMPER_GROUP& group : jumperGroups.GetAll() )
474 {
475 if( group.Contains( aPinA ) && group.Contains( aPinB ) )
476 return true;
477 }
478
479 return false;
480 };
481
482 for( const PIN_MAP& map : maps.GetAll() )
483 {
484 if( checkStale )
485 {
486 for( const PIN_MAP_ENTRY& entry : map.GetEntries() )
487 {
488 if( pinNumbers.count( entry.m_PinNumber ) )
489 continue;
490
491 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_PIN_MAP_STALE_PIN );
492 ercItem->SetItems( source.id );
493 ercItem->SetErrorMessage(
494 wxString::Format( _( "Pin map '%s' references unknown symbol pin '%s'" ), map.GetName(),
495 entry.m_PinNumber ) );
496 screen->Append( new SCH_MARKER( std::move( ercItem ), source.position ) );
497 errors++;
498 }
499 }
500
501 // A single pin stacked across several pads is allowed. Two pins on one pad is not.
502 if( checkDuplicate )
503 {
504 std::map<wxString, wxString> padToPin;
505
506 for( const PIN_MAP_ENTRY& entry : map.GetEntries() )
507 {
508 for( const wxString& pad : ExpandStackedPinNotation( entry.m_PadNumber ) )
509 {
510 auto it = padToPin.find( pad );
511
512 if( it == padToPin.end() )
513 {
514 padToPin[pad] = entry.m_PinNumber;
515 }
516 else if( it->second != entry.m_PinNumber
517 && !sharesJumperGroup( it->second, entry.m_PinNumber ) )
518 {
519 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_PIN_MAP_DUPLICATE_PAD );
520 ercItem->SetItems( source.id );
521 ercItem->SetErrorMessage(
522 wxString::Format( _( "Symbol pins '%s' and '%s' both map to pad '%s'" ),
523 it->second, entry.m_PinNumber, pad ) );
524 screen->Append( new SCH_MARKER( std::move( ercItem ), source.position ) );
525 errors++;
526 }
527 }
528 }
529 }
530 }
531
532 if( checkBadPad && padFetcher )
533 {
534 for( const ASSOCIATED_FOOTPRINT& assoc : source.footprints )
535 {
536 const PIN_MAP* boundMap = maps.FindByName( assoc.m_MapName );
537
538 if( !boundMap )
539 continue;
540
541 const std::set<wxString>& pads = getPads( assoc.m_FootprintLibId.GetUniStringLibId() );
542
543 if( pads.empty() )
544 continue;
545
546 for( const PIN_MAP_ENTRY& entry : boundMap->GetEntries() )
547 {
548 for( const wxString& pad : ExpandStackedPinNotation( entry.m_PadNumber ) )
549 {
550 if( pads.count( pad ) )
551 continue;
552
553 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_PIN_MAP_BAD_PAD );
554 ercItem->SetItems( source.id );
555 ercItem->SetErrorMessage( wxString::Format(
556 _( "Pin map '%s' references pad '%s' not present on footprint '%s'" ),
557 boundMap->GetName(), pad, assoc.m_FootprintLibId.GetUniStringLibId() ) );
558 screen->Append( new SCH_MARKER( std::move( ercItem ), source.position ) );
559 errors++;
560 }
561 }
562 }
563 }
564 }
565 }
566
567 if( m_settings.IsTestEnabled( ERCE_PIN_MAP_UNMAPPED_PIN ) && padFetcher )
568 {
569 auto report = [&]( const SCH_SHEET_PATH& sheet, const KIID& pin, const VECTOR2I& position,
570 const wxString& number, const wxString& footprint )
571 {
573 error->SetItems( pin );
574 error->SetSheetSpecificPath( sheet );
575 error->SetItemsSheetPaths( sheet );
576 error->SetErrorMessage( wxString::Format(
577 _( "Pin '%s' is connected but maps to no pad on footprint '%s'" ), number, footprint ) );
578 sheet.LastScreen()->Append( new SCH_MARKER( std::move( error ), position ) );
579 ++errors;
580 };
581
582 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
583 {
584 ERC_MARKER_PLACER sheets( *m_schematic );
585
586 for( const auto& pin : m_schematic->Connectivity().Engine().UnmappedPinCandidates() )
587 {
588 const SCH_SHEET_PATH* sheet = sheets.Find( pin.sheet );
589
590 if( !sheet )
591 continue;
592
593 LIB_ID footprint;
594 footprint.Parse( pin.footprint, true );
595 const auto& pads = getPads( footprint.GetUniStringLibId() );
596
597 if( !pads.empty() && !SCH_PIN::HasIdentityPad( pin.number, pads ) )
598 report( *sheet, pin.item, pin.position, pin.number, pin.footprint );
599 }
600
601 return errors;
602 }
603
604 const wxString variant = m_schematic ? m_schematic->GetCurrentVariant() : wxString();
605
606 for( SCH_SHEET_PATH& sheet : m_sheetList )
607 {
608 for( SCH_ITEM* item : sheet.LastScreen()->Items().OfType( SCH_SYMBOL_T ) )
609 {
610 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
611 LIB_SYMBOL* lib = symbol->GetLibSymbolRef().get();
612
613 if( !lib || lib->GetEffectiveAssociatedFootprints().empty() )
614 continue;
615
616 wxString fpText = symbol->GetFootprintFieldText( &sheet, RESOLVED );
617 LIB_ID fpId;
618
619 if( fpText.IsEmpty() || fpId.Parse( fpText, true ) >= 0 )
620 continue;
621
622 const std::set<wxString>& pads = getPads( fpId.GetUniStringLibId() );
623
624 if( pads.empty() )
625 continue;
626
627 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
628 {
629 if( pin->IsDangling() )
630 continue;
631
632 SCH_PIN::PAD_RESOLUTION state = SCH_PIN::PAD_RESOLUTION::MAPPED;
633 pin->GetEffectivePadNumber( sheet, variant, fpId, &pads, &state );
634
635 if( state != SCH_PIN::PAD_RESOLUTION::UNMAPPED )
636 continue;
637
638 report( sheet, pin->m_Uuid, pin->GetPosition(), pin->GetNumber(), fpText );
639 }
640 }
641 }
642 }
643
644 return errors;
645}
646
647
649{
651
652 // The leading "(^|[^\\\\])" group requires the marker to start the string or follow a non-backslash,
653 // so `\${ERC_ERROR ...}` stays inert. (The group is just to make it easier for a human to parse.)
654 static wxRegEx varRefRegEx( wxT( "(^|[^\\\\])\\$\\{.*\\}.*" ) );
655
656 auto reportAssertions =
657 []( const KIID& item, const SCH_SHEET_PATH& sheet, SCH_SCREEN* screen,
658 const std::vector<SCH_CONNECTIVITY::TEXT_ASSERTION>& assertions, const VECTOR2I& pos )
659 {
660 for( const auto& assertion : assertions )
661 {
662 auto ercItem = ERC_ITEM::Create( assertion.warning ? ERCE_GENERIC_WARNING : ERCE_GENERIC_ERROR );
663 wxString message = assertion.message;
664
665 if( item != niluuid )
666 {
667 ercItem->SetItems( std::vector<KIID>{ item } );
668 ercItem->SetItemsSheetPaths( sheet );
669 }
670 else
671 {
672 message += _( " (in drawing sheet)" );
673 }
674
675 ercItem->SetSheetSpecificPath( sheet );
676 ercItem->SetErrorMessage( message );
677 screen->Append( new SCH_MARKER( std::move( ercItem ), pos ) );
678 }
679
680 return !assertions.empty();
681 };
682
683 if( aDrawingSheet && !ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
684 {
685 wsItems.SetPageNumber( wxS( "1" ) );
686 wsItems.SetSheetCount( 1 );
687 wsItems.SetFileName( wxS( "dummyFilename" ) );
688 wsItems.SetSheetName( wxS( "dummySheet" ) );
689 wsItems.SetSheetLayer( wxS( "dummyLayer" ) );
690 wsItems.SetProject( &m_schematic->Project() );
691 wsItems.BuildDrawItemsList( aDrawingSheet->GetPageInfo(), aDrawingSheet->GetTitleBlock() );
692 }
693
694 for( const SCH_SHEET_PATH& sheet : m_sheetList )
695 {
696 SCH_SCREEN* screen = sheet.LastScreen();
697
698 const auto sources = ADVANCED_CFG::GetCfg().m_ConnectivityEngine
699 ? m_schematic->Connectivity().TextChecks( sheet.PathRef() )
700 : SCH_CONNECTIVITY::ExtractTextChecks( *screen, sheet );
701
702 for( const auto& source : sources )
703 {
704 if( reportAssertions( source.assertionItem, sheet, screen, source.assertions, source.assertionPosition ) )
705 continue;
706
707 if( !varRefRegEx.Matches( source.shownText ) )
708 continue;
709
710 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_UNRESOLVED_VARIABLE );
711 ercItem->SetItems( std::vector<KIID>{ source.item } );
712 ercItem->SetSheetSpecificPath( sheet );
713 ercItem->SetItemsSheetPaths( sheet );
714 screen->Append( new SCH_MARKER( std::move( ercItem ), source.position ) );
715 }
716
717 if( aDrawingSheet && ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
718 {
719 for( const auto& source : m_schematic->Connectivity().TextChecks( sheet.PathRef(), true ) )
720 {
721 if( reportAssertions( niluuid, sheet, screen, source.assertions, source.assertionPosition ) )
722 continue;
723
724 if( varRefRegEx.Matches( source.shownText ) )
725 {
726 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_UNRESOLVED_VARIABLE );
727 ercItem->SetErrorMessage( _( "Unresolved text variable in drawing sheet" ) );
728 ercItem->SetSheetSpecificPath( sheet );
729 screen->Append( new SCH_MARKER( std::move( ercItem ), source.position ) );
730 }
731 }
732 }
733
734 for( DS_DRAW_ITEM_BASE* item = wsItems.GetFirst(); item; item = wsItems.GetNext() )
735 {
736 if( DS_DRAW_ITEM_TEXT* text = dynamic_cast<DS_DRAW_ITEM_TEXT*>( item ) )
737 {
738 if( reportAssertions( niluuid, sheet, screen,
740 text->GetPosition() ) )
741 {
742 // Skip unresolved-variable test.
743 // Yes, the assertion message could have an unresolved variable in it, but it's
744 // going to end up in the ERC window anyway, so there's not much sense in double-
745 // reporting it.
746 }
747 else if( varRefRegEx.Matches( text->GetShownText( FOR_ERC_DRC ) ) )
748 {
749 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_UNRESOLVED_VARIABLE );
750 ercItem->SetErrorMessage( _( "Unresolved text variable in drawing sheet" ) );
751 ercItem->SetSheetSpecificPath( sheet );
752
753 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), text->GetPosition() );
754 screen->Append( marker );
755 }
756 }
757 }
758 }
759}
760
761
763{
764 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
765 {
766 return reportSourceErrors( *m_schematic, ERCE_EMPTY_POWER_VALUE,
767 m_schematic->Connectivity().Engine().EmptyPowerValues() );
768 }
769
770 int errors = 0;
771
772 for( const SCH_SHEET_PATH& sheet : m_sheetList )
773 {
774 SCH_SCREEN* screen = sheet.LastScreen();
775
776 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
777 {
778 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
779
780 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
781 {
782 if( !pin->IsGlobalPower() && !pin->IsLocalPower() )
783 continue;
784
785 const SYMBOL* parent = pin->GetLibPin() ? pin->GetLibPin()->GetParentSymbol() : nullptr;
786
787 // A hidden power input on an ordinary symbol is named from the pin, not the value
788 if( !parent || ( !parent->IsGlobalPower() && !parent->IsLocalPower() ) )
789 continue;
790
791 wxString name = symbol->GetValue( &sheet, FOR_NETNAME );
792
793 if( name.Trim( false ).Trim( true ).IsEmpty() )
794 {
796 ercItem->SetItems( pin );
797 ercItem->SetItemsSheetPaths( sheet );
798 ercItem->SetSheetSpecificPath( sheet );
799
800 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pin->GetPosition() );
801 screen->Append( marker );
802 errors++;
803 }
804
805 break;
806 }
807 }
808 }
809
810 return errors;
811}
812
813
815{
816 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
817 {
818 return reportSourceErrors( *m_schematic, ERCE_EMPTY_LABEL_NAME,
819 m_schematic->Connectivity().Engine().EmptyLabels() );
820 }
821
822 int errors = 0;
823
824 // No directive labels, they carry no text (the netclass lives in a field)
826
827 for( const SCH_SHEET_PATH& sheet : m_sheetList )
828 {
829 SCH_SCREEN* screen = sheet.LastScreen();
830
831 for( KICAD_T labelType : labelTypes )
832 {
833 for( SCH_ITEM* item : screen->Items().OfType( labelType ) )
834 {
835 SCH_LABEL_BASE* label = static_cast<SCH_LABEL_BASE*>( item );
836
837 wxString text = label->GetText();
838 text.Trim( false ).Trim( true );
839
840 if( text.IsEmpty() )
841 {
842 auto ercItem = ERC_ITEM::Create( ERCE_EMPTY_LABEL_NAME );
843 ercItem->SetItems( label );
844 ercItem->SetItemsSheetPaths( sheet );
845 ercItem->SetSheetSpecificPath( sheet );
846
847 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), label->GetPosition() );
848 screen->Append( marker );
849 errors++;
850 }
851 }
852 }
853 }
854
855 return errors;
856}
857
858
860{
861 int warnings = 0;
862
863 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
864 {
865 const auto errors = m_schematic->Connectivity().Engine().InvalidFieldNames();
866 ERC_MARKER_PLACER markers( *m_schematic );
867
868 for( const auto& error : errors )
869 {
870 markers.Report( ERCE_FIELD_NAME_WHITESPACE, { error.field.owner, error.field.field }, error.sheet,
871 error.field.position, ITEM_PATHS::BOTH,
872 wxString::Format( _( "Field name has leading or trailing whitespace: '%s'" ),
873 error.field.name ) );
874 }
875
876 return markers.Count();
877 }
878
879 for( const SCH_SHEET_PATH& sheet : m_sheetList )
880 {
881 SCH_SCREEN* screen = sheet.LastScreen();
882
883 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
884 {
885 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
886
887 for( SCH_FIELD& field : symbol->GetFields() )
888 {
889 wxString trimmedFieldName = field.GetName();
890 trimmedFieldName.Trim();
891 trimmedFieldName.Trim( false );
892
893 if( field.GetName() != trimmedFieldName )
894 {
896 ercItem->SetItems( symbol, &field );
897 ercItem->SetItemsSheetPaths( sheet, sheet );
898 ercItem->SetSheetSpecificPath( sheet );
899 ercItem->SetErrorMessage(
900 wxString::Format(
901 _( "Field name has leading or trailing whitespace: '%s'" ),
902 field.GetName() ) );
903
904 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), field.GetPosition() );
905 screen->Append( marker );
906 warnings++;
907 }
908 }
909 }
910
911 for( SCH_ITEM* item : screen->Items().OfType( SCH_SHEET_T ) )
912 {
913 SCH_SHEET* subSheet = static_cast<SCH_SHEET*>( item );
914
915 for( SCH_FIELD& field : subSheet->GetFields() )
916 {
917 wxString trimmedFieldName = field.GetName();
918 trimmedFieldName.Trim();
919 trimmedFieldName.Trim( false );
920
921 if( field.GetName() != trimmedFieldName )
922 {
924 ercItem->SetItems( subSheet, &field );
925 ercItem->SetItemsSheetPaths( sheet, sheet );
926 ercItem->SetSheetSpecificPath( sheet );
927 ercItem->SetErrorMessage(
928 wxString::Format(
929 _( "Field name has leading or trailing whitespace: '%s'" ),
930 field.GetName() ) );
931
932 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), field.GetPosition() );
933 screen->Append( marker );
934 warnings++;
935 }
936 }
937 }
938 }
939
940 return warnings;
941}
942
943
944std::vector<SCH_CONNECTIVITY::MULTI_UNIT_GROUP> ERC_TESTER::multiUnitSources() const
945{
946 using namespace SCH_CONNECTIVITY;
947
948 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
949 return m_schematic->Connectivity().Engine().MultiUnitSymbols();
950
951 std::vector<MULTI_UNIT_GROUP> result;
952
953 for( const auto& [reference, refs] : m_refMap )
954 {
955 if( refs.GetCount() == 0 )
956 continue;
957
959 group.reference = reference;
960 group.units = ExtractUnitFacts( *refs.GetItem( 0 ).GetLibPart() );
961
962 for( size_t i = 0; i < refs.GetCount(); ++i )
963 {
964 const SCH_REFERENCE& ref = refs.GetItem( i );
965 const SCH_SYMBOL* symbol = ref.GetSymbol();
966 group.instances.push_back( { ref.GetSheetPath().PathRef(), symbol->m_Uuid,
967 symbol->GetPosition(), symbol->GetRef( &ref.GetSheetPath(), true ),
968 ref.GetFootprint(), ref.GetUnit() } );
969 }
970
971 result.push_back( std::move( group ) );
972 }
973
974 return result;
975}
976
977
979{
980 ERC_MARKER_PLACER markers( *m_schematic );
981
982 for( const auto& group : multiUnitSources() )
983 {
984 const SCH_CONNECTIVITY::MULTI_UNIT_INSTANCE* reference = nullptr;
985
986 for( const auto& unit : group.instances )
987 {
988 if( !unit.footprint.IsEmpty() )
989 {
990 reference = &unit;
991 break;
992 }
993 }
994
995 if( !reference )
996 continue;
997
998 // Equivalent reference witnesses must retain exclusions when pages are reordered
999 for( const auto& unit : group.instances )
1000 {
1001 if( unit.item == reference->item && unit.footprint == reference->footprint
1002 && unit.name == reference->name && unit.sheet < reference->sheet )
1003 {
1004 reference = &unit;
1005 }
1006 }
1007
1008 for( const auto& unit : group.instances )
1009 {
1010 if( unit.footprint.IsEmpty() || unit.footprint == reference->footprint )
1011 continue;
1012
1014 error->SetErrorMessage( wxString::Format( _( "Different footprints assigned to %s and %s" ),
1015 reference->name, unit.name ) );
1016 error->SetItems( std::vector<KIID>{ reference->item, unit.item } );
1017 markers.Place( std::move( error ), unit.sheet, unit.position, reference->sheet, unit.sheet );
1018 }
1019 }
1020
1021 return markers.Count();
1022}
1023
1024
1026{
1027 ERC_MARKER_PLACER markers( *m_schematic );
1028
1029 for( const auto& group : multiUnitSources() )
1030 {
1031 if( group.instances.empty() )
1032 continue;
1033
1034 const auto& base = group.instances.front();
1035 std::set<int> placed;
1036
1037 for( const auto& instance : group.instances )
1038 placed.insert( instance.unit );
1039
1040 std::set<int> missing;
1041 std::set<int> power;
1042 std::set<int> input;
1043 std::set<int> bidirectional;
1044
1045 for( size_t i = 0; i < group.units.size(); ++i )
1046 {
1047 const int unit = static_cast<int>( i ) + 1;
1048
1049 if( placed.contains( unit ) )
1050 continue;
1051
1052 missing.insert( unit );
1053
1054 if( group.units[i].powerInput )
1055 power.insert( unit );
1056
1057 if( group.units[i].input )
1058 input.insert( unit );
1059
1060 if( group.units[i].bidirectional )
1061 bidirectional.insert( unit );
1062 }
1063
1064 const auto report =
1065 [&]( const std::set<int>& units, const wxString& message, int code )
1066 {
1067 if( units.empty() || !m_settings.IsTestEnabled( code ) )
1068 return;
1069
1070 wxString names = wxS( "[ " );
1071 int count = 0;
1072
1073 for( int unit : units )
1074 {
1075 if( count == 3 )
1076 break;
1077
1078 if( count++ )
1079 names += wxS( ", " );
1080
1081 names += group.units[unit - 1].name;
1082 }
1083
1084 if( units.size() > 3 )
1085 names += wxS( ", ..." );
1086
1087 names += wxS( " ]" );
1088 markers.Report( code, { base.item }, base.sheet, base.position, ITEM_PATHS::MAIN,
1089 wxString::Format( message, group.reference, names ) );
1090 };
1091
1092 report( missing, _( "Symbol %s has unplaced units %s" ),
1094 report( power, _( "Symbol %s has input power pins in units %s that are not placed" ),
1096 report( input, _( "Symbol %s has input pins in units %s that are not placed" ),
1098 report( bidirectional, _( "Symbol %s has bidirectional pins in units %s that are not placed" ),
1100 }
1101
1102 return markers.Count();
1103}
1104
1105
1107{
1108 int err_count = 0;
1109 std::shared_ptr<NET_SETTINGS>& settings = m_schematic->Project().GetProjectFile().NetSettings();
1110 wxString defaultNetclass = settings->GetDefaultNetclass()->GetName();
1111
1112 auto logError =
1113 [&]( const SCH_SHEET_PATH& sheet, const KIID& item, const VECTOR2I& position, const wxString& netclass )
1114 {
1115 err_count++;
1116
1117 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_UNDEFINED_NETCLASS );
1118
1119 ercItem->SetItems( std::vector<KIID>{ item } );
1120 ercItem->SetSheetSpecificPath( sheet );
1121 ercItem->SetItemsSheetPaths( sheet );
1122 ercItem->SetErrorMessage( wxString::Format( _( "Netclass %s is not defined" ), netclass ) );
1123
1124 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), position );
1125 sheet.LastScreen()->Append( marker );
1126 };
1127
1128 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
1129 {
1130 ERC_MARKER_PLACER sheets( *m_schematic );
1131
1132 for( const auto& reference : m_schematic->Connectivity().Engine().NetclassReferences() )
1133 {
1134 if( reference.name == defaultNetclass || settings->HasNetclass( reference.name ) )
1135 continue;
1136
1137 if( const SCH_SHEET_PATH* sheet = sheets.Find( reference.sheet ) )
1138 logError( *sheet, reference.item, reference.position, reference.name );
1139 }
1140
1141 return err_count;
1142 }
1143
1144 for( const SCH_SHEET_PATH& sheet : m_sheetList )
1145 {
1146 for( SCH_ITEM* item : sheet.LastScreen()->Items() )
1147 {
1148 item->RunOnChildren(
1149 [&]( SCH_ITEM* aChild )
1150 {
1151 if( aChild->Type() == SCH_FIELD_T )
1152 {
1153 SCH_FIELD* field = static_cast<SCH_FIELD*>( aChild );
1154
1155 if( field->GetUntranslatedName() == wxT( "Netclass" ) )
1156 {
1157 wxString netclass = field->GetShownText( &sheet, FOR_NETNAME,
1158 m_schematic->GetCurrentVariant() );
1159
1160 if( !netclass.empty()
1161 && !netclass.IsSameAs( defaultNetclass )
1162 && !settings->HasNetclass( netclass ) )
1163 {
1164 logError( sheet, item->m_Uuid, item->GetPosition(), netclass );
1165 }
1166 }
1167 }
1168
1169 return true;
1170 },
1172 }
1173 }
1174
1175 return err_count;
1176}
1177
1178
1180{
1181 int err_count = 0;
1182
1183 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
1184 {
1185 ERC_MARKER_PLACER markers( *m_schematic );
1186
1187 for( const auto& conflict : m_schematic->Connectivity().Engine().LabelWireConflicts() )
1188 {
1189 std::vector<KIID> witnesses{ conflict.label };
1190 witnesses.insert( witnesses.end(), conflict.wires.begin(),
1191 conflict.wires.begin() + std::min<std::ptrdiff_t>( 3, std::ssize( conflict.wires ) ) );
1192 markers.Report( ERCE_LABEL_MULTIPLE_WIRES, witnesses, conflict.sheet, conflict.position, ITEM_PATHS::NONE,
1193 wxString::Format( _( "Label connects more than one wire at %d, %d" ),
1194 conflict.position.x, conflict.position.y ) );
1195 }
1196
1197 return markers.Count();
1198 }
1199
1200 for( const SCH_SHEET_PATH& sheet : m_sheetList )
1201 {
1202 std::map<VECTOR2I, std::vector<SCH_ITEM*>> connMap;
1203
1204 for( SCH_ITEM* item : sheet.LastScreen()->Items().OfType( SCH_LABEL_T ) )
1205 {
1206 SCH_LABEL* label = static_cast<SCH_LABEL*>( item );
1207
1208 for( const VECTOR2I& pt : label->GetConnectionPoints() )
1209 connMap[pt].emplace_back( label );
1210 }
1211
1212 for( const std::pair<const VECTOR2I, std::vector<SCH_ITEM*>>& pair : connMap )
1213 {
1214 std::vector<SCH_ITEM*> lines;
1215
1216 for( SCH_ITEM* item : sheet.LastScreen()->Items().Overlapping( SCH_LINE_T, pair.first ) )
1217 {
1218 SCH_LINE* line = static_cast<SCH_LINE*>( item );
1219
1220 if( line->IsGraphicLine() )
1221 continue;
1222
1223 // If the line is connected at the endpoint, then there will be a junction
1224 if( !line->IsEndPoint( pair.first ) )
1225 lines.emplace_back( line );
1226 }
1227
1228 if( lines.size() > 1 )
1229 {
1230 err_count++;
1231 lines.resize( 3 ); // Only show the first 3 lines and if there are only two, adds a nullptr
1232
1233 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_LABEL_MULTIPLE_WIRES );
1234
1235 ercItem->SetItems( pair.second.front(), lines[0], lines[1], lines[2] );
1236 ercItem->SetErrorMessage( wxString::Format( _( "Label connects more than one wire at %d, %d" ),
1237 pair.first.x, pair.first.y ) );
1238 ercItem->SetSheetSpecificPath( sheet );
1239
1240 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pair.first );
1241 sheet.LastScreen()->Append( marker );
1242 }
1243 }
1244 }
1245
1246 return err_count;
1247}
1248
1249
1251{
1252 int err_count = 0;
1253
1254 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
1255 {
1256 ERC_MARKER_PLACER markers( *m_schematic );
1257
1258 for( const auto& junction : m_schematic->Connectivity().Engine().FourWayJunctions() )
1259 {
1260 markers.Report( ERCE_FOUR_WAY_JUNCTION, { junction.items.begin(), junction.items.begin() + 4 },
1261 junction.sheet, junction.position, ITEM_PATHS::NONE,
1262 wxString::Format( _( "Four items connected at %d, %d" ),
1263 junction.position.x, junction.position.y ) );
1264 }
1265
1266 return markers.Count();
1267 }
1268
1269 auto pinStackAlreadyRepresented =
1270 []( SCH_PIN* pin, std::vector<SCH_ITEM*>& collection ) -> bool
1271 {
1272 for( SCH_ITEM*& item : collection )
1273 {
1274 if( item->Type() == SCH_PIN_T && item->GetParentSymbol() == pin->GetParentSymbol() )
1275 {
1276 if( pin->IsVisible() && !static_cast<SCH_PIN*>( item )->IsVisible() )
1277 item = pin;
1278
1279 return true;
1280 }
1281 }
1282
1283 return false;
1284 };
1285
1286 for( const SCH_SHEET_PATH& sheet : m_sheetList )
1287 {
1288 std::map<VECTOR2I, std::vector<SCH_ITEM*>> connMap;
1289 SCH_SCREEN* screen = sheet.LastScreen();
1290
1291 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
1292 {
1293 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
1294
1295 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
1296 {
1297 std::vector<SCH_ITEM*>& entry = connMap[pin->GetPosition()];
1298
1299 // Only one pin per pin-stack.
1300 if( pinStackAlreadyRepresented( pin, entry ) )
1301 continue;
1302
1303 entry.emplace_back( pin );
1304 }
1305 }
1306
1307 for( SCH_ITEM* item : screen->Items().OfType( SCH_LINE_T ) )
1308 {
1309 SCH_LINE* line = static_cast<SCH_LINE*>( item );
1310
1311 if( line->IsGraphicLine() )
1312 continue;
1313
1314 for( const VECTOR2I& pt : line->GetConnectionPoints() )
1315 connMap[pt].emplace_back( line );
1316 }
1317
1318 for( const std::pair<const VECTOR2I, std::vector<SCH_ITEM*>>& pair : connMap )
1319 {
1320 if( pair.second.size() >= 4 )
1321 {
1322 err_count++;
1323
1324 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_FOUR_WAY_JUNCTION );
1325
1326 ercItem->SetItems( pair.second[0], pair.second[1], pair.second[2], pair.second[3] );
1327
1328 ercItem->SetErrorMessage( wxString::Format( _( "Four items connected at %d, %d" ),
1329 pair.first.x, pair.first.y ) );
1330
1331 ercItem->SetSheetSpecificPath( sheet );
1332
1333 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pair.first );
1334 sheet.LastScreen()->Append( marker );
1335 }
1336 }
1337 }
1338
1339 return err_count;
1340}
1341
1342
1344{
1345 int err_count = 0;
1346
1347 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
1348 {
1349 if( !m_settings.IsTestEnabled( ERCE_NOCONNECT_CONNECTED ) )
1350 return 0;
1351
1352 ERC_MARKER_PLACER markers( *m_schematic );
1353
1354 for( const auto& conflict : m_schematic->Connectivity().Engine().NoConnectPinConflicts() )
1355 {
1356 // Reserve a witness for the actual connection even when many NC pins coincide
1357 const auto witnessPins = std::min<std::ptrdiff_t>( 3, std::ssize( conflict.pins ) );
1358 std::vector<KIID> items( conflict.pins.begin(), conflict.pins.begin() + witnessPins );
1359 const auto witnessOthers = std::min<std::ptrdiff_t>( 4 - witnessPins, std::ssize( conflict.others ) );
1360 items.insert( items.end(), conflict.others.begin(), conflict.others.begin() + witnessOthers );
1361 markers.Report( ERCE_NOCONNECT_CONNECTED, items, conflict.sheet, conflict.position, ITEM_PATHS::NONE,
1362 _( "Pin with 'no connection' type is connected" ) );
1363 }
1364
1365 return markers.Count();
1366 }
1367
1368 for( const SCH_SHEET_PATH& sheet : m_sheetList )
1369 {
1370 std::map<VECTOR2I, std::vector<SCH_ITEM*>> pinMap;
1371
1372 auto addOther =
1373 [&]( const VECTOR2I& pt, SCH_ITEM* aOther )
1374 {
1375 if( pinMap.count( pt ) )
1376 pinMap[pt].emplace_back( aOther );
1377 };
1378
1379 for( SCH_ITEM* item : sheet.LastScreen()->Items().OfType( SCH_SYMBOL_T ) )
1380 {
1381 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
1382
1383 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
1384 {
1385 if( pin->GetType() == ELECTRICAL_PINTYPE::PT_NC )
1386 pinMap[pin->GetPosition()].emplace_back( pin );
1387 }
1388 }
1389
1390 for( SCH_ITEM* item : sheet.LastScreen()->Items() )
1391 {
1392 if( item->Type() == SCH_SYMBOL_T )
1393 {
1394 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
1395
1396 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
1397 {
1398 if( pin->GetType() != ELECTRICAL_PINTYPE::PT_NC )
1399 addOther( pin->GetPosition(), pin );
1400 }
1401 }
1402 else if( item->IsConnectable() && item->Type() != SCH_NO_CONNECT_T )
1403 {
1404 for( const VECTOR2I& pt : item->GetConnectionPoints() )
1405 addOther( pt, item );
1406 }
1407 }
1408
1409 for( const std::pair<const VECTOR2I, std::vector<SCH_ITEM*>>& pair : pinMap )
1410 {
1411 if( pair.second.size() > 1 )
1412 {
1413 bool all_nc = true;
1414
1415 for( SCH_ITEM* item : pair.second )
1416 {
1417 if( item->Type() != SCH_PIN_T )
1418 {
1419 all_nc = false;
1420 break;
1421 }
1422
1423 SCH_PIN* pin = static_cast<SCH_PIN*>( item );
1424
1425 if( pin->GetType() != ELECTRICAL_PINTYPE::PT_NC )
1426 {
1427 all_nc = false;
1428 break;
1429 }
1430 }
1431
1432 if( all_nc )
1433 continue;
1434
1435 err_count++;
1436
1437 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_NOCONNECT_CONNECTED );
1438
1439 ercItem->SetItems( pair.second[0], pair.second[1],
1440 pair.second.size() > 2 ? pair.second[2] : nullptr,
1441 pair.second.size() > 3 ? pair.second[3] : nullptr );
1442 ercItem->SetErrorMessage( _( "Pin with 'no connection' type is connected" ) );
1443 ercItem->SetSheetSpecificPath( sheet );
1444
1445 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pair.first );
1446 sheet.LastScreen()->Append( marker );
1447 }
1448 }
1449 }
1450
1451 return err_count;
1452}
1453
1454
1455namespace
1456{
1457ERCE_T ercErrorCode( PIN_ERROR aPinError )
1458{
1459 return ( aPinError == PIN_ERROR::WARNING ) ? ERCE_PIN_TO_PIN_WARNING
1461}
1462
1463int testCapturedPinToPin( SCHEMATIC& aSchematic, ERC_SETTINGS& aSettings, bool aShowAllErrors )
1464{
1466
1467 std::vector<SCH_CONNECTIVITY::ERC_PIN_NET> nets = aSchematic.Connectivity().Engine().PinNets();
1468 const std::vector<std::unique_ptr<SCH_NETCHAIN>>& chains = aSchematic.NetChains().GetCommittedNetChains();
1469 std::map<wxString, const SCH_CONNECTIVITY::ERC_PIN_NET*> byName;
1470 std::set<wxString> powerDriven;
1471
1472 ERC_MARKER_PLACER markers( aSchematic );
1473
1474 const auto less =
1475 []( const PIN& a, const PIN& b )
1476 {
1477 int order = StrNumCmp( a.reference, b.reference );
1478
1479 if( order == 0 )
1480 order = StrNumCmp( a.pin.number, b.pin.number );
1481
1482 if( order != 0 )
1483 return order < 0;
1484
1485 // Tuple comparison would bypass KIID_PATH's length-first ordering
1486 if( a.sheet != b.sheet )
1487 return a.sheet < b.sheet;
1488
1489 return a.pin.id < b.pin.id;
1490 };
1491
1492 const auto mismatch =
1493 [&]( const PIN& a, const PIN& b )
1494 {
1495 const PIN_ERROR pinError = aSettings.GetPinMapValue( a.pin.type, b.pin.type );
1496
1497 return aSettings.IsTestEnabled( ercErrorCode( pinError ) ) ? pinError : PIN_ERROR::OK;
1498 };
1499
1500 const auto reportPair =
1501 [&]( const PIN& a, const PIN& b, PIN_ERROR pinError, const wxString& chain )
1502 {
1503 std::shared_ptr<ERC_ITEM> item = ERC_ITEM::Create( ercErrorCode( pinError ) );
1504
1505 item->SetItems( std::vector<KIID>{ a.pin.id, b.pin.id } );
1506
1507 if( chain.empty() )
1508 {
1509 item->SetErrorMessage( wxString::Format( _( "Pins of type %s and %s are connected" ),
1510 ElectricalPinTypeGetText( a.pin.type ),
1511 ElectricalPinTypeGetText( b.pin.type ) ) );
1512 }
1513 else
1514 {
1515 item->SetErrorMessage( wxString::Format( _( "Pins of type %s and %s are connected via "
1516 "net chain %s" ),
1517 ElectricalPinTypeGetText( a.pin.type ),
1518 ElectricalPinTypeGetText( b.pin.type ),
1519 chain ) );
1520 }
1521 markers.Place( std::move( item ), a.sheet, a.pin.position, a.sheet, b.sheet );
1522 };
1523
1524 const auto passiveOrNic =
1525 []( ELECTRICAL_PINTYPE type )
1526 {
1528 };
1529
1530 const bool heuristics = aSettings.GetERCSortingMetric() == ERC_PIN_SORTING_METRIC::SM_HEURISTICS;
1531
1532 struct MISMATCH
1533 {
1534 size_t first;
1535 size_t second;
1536 PIN_ERROR error;
1537 };
1538
1539 for( auto& net : nets )
1540 {
1541 std::sort( net.pins.begin(), net.pins.end(), less );
1542 byName.emplace( net.name, &net );
1543
1544 if( net.powerDriven )
1545 powerDriven.insert( net.name );
1546 }
1547
1548 for( const auto& net : nets )
1549 {
1550 const std::vector<PIN>& pins = net.pins;
1551 const bool powerNet = std::ranges::any_of( pins,
1552 []( const PIN& pin )
1553 {
1554 return pin.pin.type == ELECTRICAL_PINTYPE::PT_POWER_IN;
1555 } );
1556 const PIN* preferred = nullptr;
1557 std::vector<const PIN*> needsDriver;
1558 std::vector<const PIN*> nonPowerInputs;
1559 std::vector<const PIN*> powerInputs;
1560 std::vector<MISMATCH> mismatches;
1561 std::map<size_t, int> weights;
1562 bool hasDriver = net.powerDriven;
1563
1564 for( size_t i = 0; i < pins.size(); ++i )
1565 {
1566 const PIN& pin = pins[i];
1567 hasDriver |= powerNet ? DrivingPowerPinTypes.contains( pin.pin.type )
1568 : DrivingPinTypes.contains( pin.pin.type );
1569
1570 if( DrivenPinTypes.contains( pin.pin.type ) )
1571 {
1572 needsDriver.push_back( &pin );
1573
1574 if( !pin.pin.globalPower && !pin.pin.localPower )
1575 nonPowerInputs.push_back( &pin );
1576
1577 if( pin.pin.type == ELECTRICAL_PINTYPE::PT_POWER_IN )
1578 powerInputs.push_back( &pin );
1579
1580 if( !preferred
1581 || ( preferred->pin.invisible && !pin.pin.invisible )
1582 || ( powerNet != ( preferred->pin.type == ELECTRICAL_PINTYPE::PT_POWER_IN )
1583 && powerNet == ( pin.pin.type == ELECTRICAL_PINTYPE::PT_POWER_IN ) ) )
1584 {
1585 preferred = &pin;
1586 }
1587 }
1588
1589 for( size_t j = i + 1; j < pins.size(); ++j )
1590 {
1591 const PIN& other = pins[j];
1592 const bool stacked = pin.sheet == other.sheet
1593 && pin.owner == other.owner
1594 && pin.pin.position == other.pin.position
1595 && pin.pin.name == other.pin.name
1596 && ( pin.pin.type == other.pin.type
1597 || passiveOrNic( pin.pin.type )
1598 || passiveOrNic( other.pin.type ) );
1599
1600 if( stacked )
1601 continue;
1602
1603 const PIN_ERROR error = mismatch( pin, other );
1604
1605 if( error == PIN_ERROR::OK )
1606 continue;
1607
1608 mismatches.push_back( { i, j, error } );
1609
1610 if( heuristics )
1611 {
1612 weights[i] = aSettings.GetPinTypeWeight( pin.pin.type );
1613 weights[j] = aSettings.GetPinTypeWeight( other.pin.type );
1614 }
1615 else
1616 {
1617 ++weights[i];
1618 ++weights[j];
1619 }
1620 }
1621 }
1622
1623 // Each pin reports once against its nearest mismatch so one bad pin does not flood the net
1624 std::vector<std::pair<int, size_t>> worst;
1625
1626 for( const auto& [index, weight] : weights )
1627 worst.emplace_back( weight, index );
1628
1629 std::stable_sort( worst.begin(), worst.end(),
1630 []( const auto& a, const auto& b )
1631 {
1632 return a.first > b.first;
1633 } );
1634
1635 for( const auto& [weight, index] : worst )
1636 {
1637 const PIN& pin = pins[index];
1638 const PIN* nearest = nullptr;
1639 PIN_ERROR error = PIN_ERROR::OK;
1640 std::optional<double> nearestDistance;
1641
1642 std::erase_if( mismatches,
1643 [&]( const MISMATCH& candidate )
1644 {
1645 if( candidate.first != index && candidate.second != index )
1646 return false;
1647
1648 const PIN& other = pins[candidate.first == index ? candidate.second : candidate.first];
1649
1650 // Cross-sheet partners have no distance and stand in only until a same-sheet partner appears
1651 if( other.sheet != pin.sheet )
1652 {
1653 if( !nearestDistance )
1654 {
1655 nearest = &other;
1656 error = candidate.error;
1657 }
1658 }
1659 else if( const double distance = pin.pin.position.Distance( other.pin.position );
1660 !nearestDistance || distance < *nearestDistance )
1661 {
1662 nearestDistance = distance;
1663 nearest = &other;
1664 error = candidate.error;
1665 }
1666
1667 return true;
1668 } );
1669
1670 if( nearest )
1671 reportPair( pin, *nearest, error, wxString() );
1672 }
1673
1674 if( !preferred || hasDriver || net.noConnect )
1675 continue;
1676
1677 bool chainDriver = false;
1678
1679 if( powerNet )
1680 {
1681 for( const auto& chain : chains )
1682 {
1683 if( !chain || !chain->GetNets().contains( net.name ) )
1684 continue;
1685
1686 chainDriver = std::ranges::any_of( chain->GetNets(),
1687 [&]( const wxString& name )
1688 {
1689 return name != net.name && powerDriven.contains( name );
1690 } );
1691 break;
1692 }
1693 }
1694
1695 const ERCE_T code = powerNet ? ERCE_POWERPIN_NOT_DRIVEN : ERCE_PIN_NOT_DRIVEN;
1696
1697 if( chainDriver || !aSettings.IsTestEnabled( code ) )
1698 continue;
1699
1700 if( aShowAllErrors )
1701 {
1702 const auto& selected = powerNet && !powerInputs.empty() ? powerInputs
1703 : !nonPowerInputs.empty() ? nonPowerInputs
1704 : needsDriver;
1705
1706 for( const PIN* pin : selected )
1707 markers.Report( code, { pin->pin.id }, pin->sheet, pin->pin.position, ITEM_PATHS::MAIN );
1708 }
1709 else
1710 {
1711 const PIN& pin = powerNet && !powerInputs.empty() ? *powerInputs.front()
1712 : *preferred;
1713 markers.Report( code, { pin.pin.id }, pin.sheet, pin.pin.position, ITEM_PATHS::MAIN );
1714 }
1715 }
1716
1717 for( const std::unique_ptr<SCH_NETCHAIN>& chain : chains )
1718 {
1719 if( !chain )
1720 continue;
1721
1722 struct CHAIN_PIN
1723 {
1724 const PIN* pin;
1725 const wxString* net;
1726 };
1727 std::vector<CHAIN_PIN> pins;
1728
1729 for( const wxString& name : chain->GetNets() )
1730 {
1731 const auto net = byName.find( name );
1732
1733 if( net == byName.end() )
1734 continue;
1735
1736 for( const PIN& pin : net->second->pins )
1737 pins.push_back( { &pin, &net->first } );
1738 }
1739
1740 std::sort( pins.begin(), pins.end(),
1741 [&]( const CHAIN_PIN& a, const CHAIN_PIN& b )
1742 {
1743 return less( *a.pin, *b.pin );
1744 } );
1745
1746 for( size_t i = 0; i < pins.size(); ++i )
1747 {
1748 for( size_t j = i + 1; j < pins.size(); ++j )
1749 {
1750 if( *pins[i].net == *pins[j].net )
1751 continue;
1752
1753 if( const PIN_ERROR error = mismatch( *pins[i].pin, *pins[j].pin ); error != PIN_ERROR::OK )
1754 reportPair( *pins[i].pin, *pins[j].pin, error, chain->GetName() );
1755 }
1756 }
1757 }
1758
1759 return markers.Count();
1760}
1761}
1762
1763
1765{
1766 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
1767 return testCapturedPinToPin( *m_schematic, m_settings, m_showAllErrors );
1768
1769 int errors = 0;
1770 std::set<wxString> powerDrivenNets;
1771
1772 if( !m_schematic->ConnectionGraph()->GetCommittedNetChains().empty() )
1773 {
1774 for( const auto& [key, subgraphs] : m_nets )
1775 {
1776 for( const CONNECTION_SUBGRAPH* subgraph : subgraphs )
1777 {
1778 for( SCH_ITEM* item : subgraph->GetItems() )
1779 {
1780 if( item->Type() != SCH_PIN_T )
1781 continue;
1782
1783 const SCH_PIN* pin = static_cast<SCH_PIN*>( item );
1784
1785 if( DrivingPowerPinTypes.contains( pin->GetType() ) )
1786 powerDrivenNets.insert( key.Name );
1787 }
1788 }
1789 }
1790 }
1791
1792
1793 // Map each net name to the pins (with sheet context) found on that net so we can later
1794 // perform cross-net compatibility checks for grouped net chains.
1795 std::unordered_map<wxString, std::vector<ERC_SCH_PIN_CONTEXT>> netToPins;
1796
1797 for( const std::pair<NET_NAME_CODE_CACHE_KEY, std::vector<CONNECTION_SUBGRAPH*>> net : m_nets )
1798 {
1799 using iterator_t = std::vector<ERC_SCH_PIN_CONTEXT>::iterator;
1800 std::vector<ERC_SCH_PIN_CONTEXT> pins;
1801 std::unordered_map<EDA_ITEM*, SCH_SCREEN*> pinToScreenMap;
1802 bool has_noconnect = false;
1803
1804 for( CONNECTION_SUBGRAPH* subgraph: net.second )
1805 {
1806 if( subgraph->GetNoConnect() )
1807 has_noconnect = true;
1808
1809 for( SCH_ITEM* item : subgraph->GetItems() )
1810 {
1811 if( item->Type() == SCH_PIN_T )
1812 {
1813 pins.emplace_back( static_cast<SCH_PIN*>( item ), subgraph->GetSheet() );
1814 netToPins[ net.first.Name ].emplace_back( static_cast<SCH_PIN*>( item ), subgraph->GetSheet() );
1815 pinToScreenMap[item] = subgraph->GetSheet().LastScreen();
1816 }
1817 }
1818 }
1819
1820 std::sort( pins.begin(), pins.end(),
1821 []( const ERC_SCH_PIN_CONTEXT& lhs, const ERC_SCH_PIN_CONTEXT& rhs )
1822 {
1823 int ret = StrNumCmp( lhs.Pin()->GetParentSymbol()->GetRef( &lhs.Sheet() ),
1824 rhs.Pin()->GetParentSymbol()->GetRef( &rhs.Sheet() ) );
1825
1826 if( ret == 0 )
1827 ret = StrNumCmp( lhs.Pin()->GetNumber(), rhs.Pin()->GetNumber() );
1828
1829 return ret != 0 ? ret < 0 : lhs < rhs;
1830 } );
1831
1832 ERC_SCH_PIN_CONTEXT needsDriver;
1834 bool hasDriver = false;
1835 std::vector<ERC_SCH_PIN_CONTEXT*> pinsNeedingDrivers;
1836 std::vector<ERC_SCH_PIN_CONTEXT*> nonPowerPinsNeedingDrivers;
1837 std::vector<ERC_SCH_PIN_CONTEXT*> powerInPinsNeedingDrivers;
1838
1839 // We need different drivers for power nets and normal nets.
1840 // A power net has at least one pin having the ELECTRICAL_PINTYPE::PT_POWER_IN
1841 // and power nets can be driven only by ELECTRICAL_PINTYPE::PT_POWER_OUT pins
1842 bool ispowerNet = false;
1843
1844 for( ERC_SCH_PIN_CONTEXT& refPin : pins )
1845 {
1846 if( refPin.Pin()->GetType() == ELECTRICAL_PINTYPE::PT_POWER_IN )
1847 {
1848 ispowerNet = true;
1849 break;
1850 }
1851 }
1852
1853 std::vector<std::tuple<iterator_t, iterator_t, PIN_ERROR>> pin_mismatches;
1854 std::map<iterator_t, int> pin_mismatch_counts;
1855
1856 for( auto refIt = pins.begin(); refIt != pins.end(); ++refIt )
1857 {
1858 ERC_SCH_PIN_CONTEXT& refPin = *refIt;
1859 ELECTRICAL_PINTYPE refType = refPin.Pin()->GetType();
1860
1861 if( DrivenPinTypes.contains( refType ) )
1862 {
1863 // needsDriver will be the pin shown in the error report eventually, so try to
1864 // upgrade to a "better" pin if possible: something visible and only a power symbol
1865 // if this net needs a power driver
1866 pinsNeedingDrivers.push_back( &refPin );
1867
1868 if( !refPin.Pin()->IsPower() )
1869 nonPowerPinsNeedingDrivers.push_back( &refPin );
1870
1871 if( refType == ELECTRICAL_PINTYPE::PT_POWER_IN )
1872 powerInPinsNeedingDrivers.push_back( &refPin );
1873
1874 if( !needsDriver.Pin()
1875 || ( !needsDriver.Pin()->IsVisible() && refPin.Pin()->IsVisible() )
1876 || ( ispowerNet != ( needsDriverType == ELECTRICAL_PINTYPE::PT_POWER_IN )
1877 && ispowerNet == ( refType == ELECTRICAL_PINTYPE::PT_POWER_IN ) ) )
1878 {
1879 needsDriver = refPin;
1880 needsDriverType = needsDriver.Pin()->GetType();
1881 }
1882 }
1883
1884 if( ispowerNet )
1885 hasDriver |= ( DrivingPowerPinTypes.count( refType ) != 0 );
1886 else
1887 hasDriver |= ( DrivingPinTypes.count( refType ) != 0 );
1888
1889 for( auto testIt = refIt + 1; testIt != pins.end(); ++testIt )
1890 {
1891 ERC_SCH_PIN_CONTEXT& testPin = *testIt;
1892
1893 // Multiple pins in the same symbol that share a type,
1894 // name and position are considered
1895 // "stacked" and shouldn't trigger ERC errors
1896 if( refPin.Pin()->IsStacked( testPin.Pin() ) && refPin.Sheet() == testPin.Sheet() )
1897 continue;
1898
1899 ELECTRICAL_PINTYPE testType = testPin.Pin()->GetType();
1900
1901 if( ispowerNet )
1902 hasDriver |= DrivingPowerPinTypes.contains( testType );
1903 else
1904 hasDriver |= DrivingPinTypes.contains( testType );
1905
1906 PIN_ERROR pinError = m_settings.GetPinMapValue( refType, testType );
1907
1908 if( pinError != PIN_ERROR::OK && m_settings.IsTestEnabled( ercErrorCode( pinError ) ) )
1909 {
1910 pin_mismatches.emplace_back( std::tuple<iterator_t, iterator_t,
1911 PIN_ERROR>{ refIt, testIt, pinError } );
1912
1913 if( m_settings.GetERCSortingMetric() == ERC_PIN_SORTING_METRIC::SM_HEURISTICS )
1914 {
1915 pin_mismatch_counts[refIt] = m_settings.GetPinTypeWeight( refIt->Pin()->GetType() );
1916 pin_mismatch_counts[testIt] = m_settings.GetPinTypeWeight( testIt->Pin()->GetType() );
1917 }
1918 else
1919 {
1920 if( !pin_mismatch_counts.contains( testIt ) )
1921 pin_mismatch_counts.emplace( testIt, 1 );
1922 else
1923 pin_mismatch_counts[testIt]++;
1924
1925 if( !pin_mismatch_counts.contains( refIt ) )
1926 pin_mismatch_counts.emplace( refIt, 1 );
1927 else
1928 pin_mismatch_counts[refIt]++;
1929 }
1930 }
1931 }
1932 }
1933
1934 std::multimap<size_t, iterator_t, std::greater<size_t>> pins_dsc;
1935
1936 std::transform( pin_mismatch_counts.begin(), pin_mismatch_counts.end(),
1937 std::inserter( pins_dsc, pins_dsc.begin() ),
1938 []( const auto& p )
1939 {
1940 return std::pair<size_t, iterator_t>( p.second, p.first );
1941 } );
1942
1943 for( const auto& [amount, pinItBind] : pins_dsc )
1944 {
1945 auto& pinIt = pinItBind;
1946
1947 if( pin_mismatches.empty() )
1948 break;
1949
1950 SCH_PIN* pin = pinIt->Pin();
1951 VECTOR2I position = pin->GetPosition();
1952
1953 iterator_t nearest_pin = pins.end();
1954 double smallest_distance = std::numeric_limits<double>::infinity();
1955 PIN_ERROR pinError;
1956
1957 std::erase_if(
1958 pin_mismatches,
1959 [&]( const auto& tuple )
1960 {
1961 iterator_t other;
1962
1963 if( pinIt == std::get<0>( tuple ) )
1964 other = std::get<1>( tuple );
1965 else if( pinIt == std::get<1>( tuple ) )
1966 other = std::get<0>( tuple );
1967 else
1968 return false;
1969
1970 if( ( *pinIt ).Sheet().Cmp( ( *other ).Sheet() ) != 0 )
1971 {
1972 if( std::isinf( smallest_distance ) )
1973 {
1974 nearest_pin = other;
1975 pinError = std::get<2>( tuple );
1976 }
1977 }
1978 else
1979 {
1980 double distance = position.Distance( ( *other ).Pin()->GetPosition() );
1981
1982 if( std::isinf( smallest_distance ) || distance < smallest_distance )
1983 {
1984 smallest_distance = distance;
1985 nearest_pin = other;
1986 pinError = std::get<2>( tuple );
1987 }
1988 }
1989
1990 return true;
1991 } );
1992
1993 if( nearest_pin != pins.end() )
1994 {
1995 SCH_PIN* other_pin = nearest_pin->Pin();
1996 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ercErrorCode( pinError ) );
1997
1998 ercItem->SetItems( pin, other_pin );
1999 ercItem->SetSheetSpecificPath( pinIt->Sheet() );
2000 ercItem->SetItemsSheetPaths( pinIt->Sheet(), nearest_pin->Sheet() );
2001
2002 ercItem->SetErrorMessage( wxString::Format( _( "Pins of type %s and %s are connected" ),
2003 ElectricalPinTypeGetText( pin->GetType() ),
2004 ElectricalPinTypeGetText( other_pin->GetType() ) ) );
2005
2006 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pin->GetPosition() );
2007 pinToScreenMap[pin]->Append( marker );
2008 errors++;
2009 }
2010 }
2011
2012 if( needsDriver.Pin() && !hasDriver && !has_noconnect )
2013 {
2014 int err_code = ispowerNet ? ERCE_POWERPIN_NOT_DRIVEN : ERCE_PIN_NOT_DRIVEN;
2015
2016 // NEW: For power nets, before reporting a not-driven error, look across the
2017 // net chain (multi-net chain formed via passives) to see if there is a
2018 // power driver pin on any other net in the same chain. If so, suppress the
2019 // error because the net chain as a whole is driven.
2020 bool suppressForNetChainDriver = false;
2021
2022 if( ispowerNet && m_schematic && m_schematic->ConnectionGraph() )
2023 {
2024 const wxString& thisNetName = net.first.Name;
2025 const auto& netChains = m_schematic->ConnectionGraph()->GetCommittedNetChains();
2026
2027 for( const auto& sig : netChains )
2028 {
2029 if( !sig )
2030 continue;
2031
2032 const auto& sigNets = sig->GetNets();
2033 bool containsThisNet = std::find( sigNets.begin(), sigNets.end(), thisNetName ) != sigNets.end();
2034
2035 if( !containsThisNet )
2036 continue;
2037
2038 // Look for a different net in this chain that has a power driver.
2039 for( const wxString& otherNet : sigNets )
2040 {
2041 if( otherNet == thisNetName )
2042 continue; // skip same net (we already know it lacks a driver)
2043
2044 if( powerDrivenNets.contains( otherNet ) )
2045 {
2046 suppressForNetChainDriver = true;
2047 break;
2048 }
2049 }
2050
2051 break; // examined the containing chain
2052 }
2053 }
2054
2055 if( !suppressForNetChainDriver && m_settings.IsTestEnabled( err_code ) )
2056 {
2057 std::vector<ERC_SCH_PIN_CONTEXT*> pinsToMark;
2058
2059 // The marker should land on a pin matching the error message: for an
2060 // ERCE_POWERPIN_NOT_DRIVEN error mark a PT_POWER_IN pin (which is what the
2061 // error refers to), for ERCE_PIN_NOT_DRIVEN prefer a pin that is not on a
2062 // power symbol so the marker is anchored to the consuming pin rather than
2063 // a power flag.
2064 if( m_showAllErrors )
2065 {
2066 if( ispowerNet && !powerInPinsNeedingDrivers.empty() )
2067 pinsToMark = powerInPinsNeedingDrivers;
2068 else if( !nonPowerPinsNeedingDrivers.empty() )
2069 pinsToMark = nonPowerPinsNeedingDrivers;
2070 else
2071 pinsToMark = pinsNeedingDrivers;
2072 }
2073 else
2074 {
2075 if( ispowerNet && !powerInPinsNeedingDrivers.empty() )
2076 pinsToMark.push_back( powerInPinsNeedingDrivers.front() );
2077 else
2078 pinsToMark.push_back( &needsDriver );
2079 }
2080
2081 for( ERC_SCH_PIN_CONTEXT* pinCtx : pinsToMark )
2082 {
2083 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( err_code );
2084
2085 ercItem->SetItems( pinCtx->Pin() );
2086 ercItem->SetSheetSpecificPath( pinCtx->Sheet() );
2087 ercItem->SetItemsSheetPaths( pinCtx->Sheet() );
2088
2089 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pinCtx->Pin()->GetPosition() );
2090 pinToScreenMap[pinCtx->Pin()]->Append( marker );
2091 errors++;
2092 }
2093 }
2094 }
2095 }
2096
2097 // --- Additional net-chain-level checking ---
2098 // If a pin participates in a grouped net chain (spanning multiple nets via passives), ensure
2099 // that all other pins reachable through that chain are electrically compatible even if
2100 // they reside on different nets.
2101 // We only consider pairs on DIFFERENT nets here to avoid duplicating existing net-level
2102 // mismatches already reported above.
2103 if( m_schematic && m_schematic->ConnectionGraph() )
2104 {
2105 auto& netChains = m_schematic->ConnectionGraph()->GetCommittedNetChains();
2106 wxLogTrace( traceSchNetChain, "ERC TestPinToPin: cross-chain phase start chains=%zu",
2107 netChains.size() );
2108
2109 for( const auto& sig : netChains )
2110 {
2111 if( !sig )
2112 continue;
2113
2114 const wxString chainName = sig->GetName();
2115 const auto& sigNets = sig->GetNets();
2116
2117 // Collect all pin contexts across the nets in this chain.
2118 struct CHAIN_PIN
2119 {
2120 ERC_SCH_PIN_CONTEXT context;
2121 const wxString* net;
2122 };
2123 std::vector<CHAIN_PIN> netChainPins;
2124 netChainPins.reserve( sigNets.size() * 4 );
2125
2126 for( const wxString& n : sigNets )
2127 {
2128 auto it = netToPins.find( n );
2129 if( it != netToPins.end() )
2130 {
2131 for( const ERC_SCH_PIN_CONTEXT& context : it->second )
2132 netChainPins.push_back( { context, &it->first } );
2133 }
2134 }
2135
2136 if( netChainPins.size() < 2 )
2137 continue; // nothing to compare
2138
2139 wxLogTrace( traceSchNetChain,
2140 "ERC TestPinToPin: chain '%s' nets=%zu collectedPins=%zu",
2141 TO_UTF8( chainName ), sigNets.size(), netChainPins.size() );
2142
2143 // For deterministic behavior, sort by reference/pin number similar to earlier pass.
2144 std::sort( netChainPins.begin(), netChainPins.end(),
2145 []( const CHAIN_PIN& left, const CHAIN_PIN& right )
2146 {
2147 const auto& lhs = left.context;
2148 const auto& rhs = right.context;
2149 int ret = StrNumCmp( lhs.Pin()->GetParentSymbol()->GetRef( &lhs.Sheet() ),
2150 rhs.Pin()->GetParentSymbol()->GetRef( &rhs.Sheet() ) );
2151 if( ret == 0 )
2152 ret = StrNumCmp( lhs.Pin()->GetNumber(), rhs.Pin()->GetNumber() );
2153 return ret != 0 ? ret < 0 : lhs < rhs;
2154 } );
2155
2156 for( size_t i = 0; i < netChainPins.size(); ++i )
2157 {
2158 const auto& aContext = netChainPins[i].context;
2159 SCH_PIN* aPin = aContext.Pin();
2160 ELECTRICAL_PINTYPE aType = aPin->GetType();
2161 const wxString& aNet = *netChainPins[i].net;
2162
2163 for( size_t j = i + 1; j < netChainPins.size(); ++j )
2164 {
2165 const auto& bContext = netChainPins[j].context;
2166 SCH_PIN* bPin = bContext.Pin();
2167 const wxString& bNet = *netChainPins[j].net;
2168
2169 if( aNet == bNet )
2170 continue; // already handled at net-level
2171
2172 ELECTRICAL_PINTYPE bType = bPin->GetType();
2173 PIN_ERROR pinError = m_settings.GetPinMapValue( aType, bType );
2174
2175 if( pinError != PIN_ERROR::OK && m_settings.IsTestEnabled( ercErrorCode( pinError ) ) )
2176 {
2177 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ercErrorCode( pinError ) );
2178
2179 ercItem->SetItems( aPin, bPin );
2180 ercItem->SetSheetSpecificPath( aContext.Sheet() );
2181 ercItem->SetItemsSheetPaths( aContext.Sheet(), bContext.Sheet() );
2182 ercItem->SetErrorMessage( wxString::Format( _( "Pins of type %s and %s are connected via "
2183 "net chain %s" ),
2184 ElectricalPinTypeGetText( aType ),
2185 ElectricalPinTypeGetText( bType ), chainName ) );
2186
2187 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), aPin->GetPosition() );
2188 aContext.Sheet().LastScreen()->Append( marker );
2189 errors++;
2190 }
2191 }
2192 }
2193 }
2194 }
2195
2196 return errors;
2197}
2198
2199
2201{
2202 int errors = 0;
2203
2204 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
2205 {
2206 ERC_MARKER_PLACER markers( *m_schematic );
2207
2208 for( const auto& conflict : m_schematic->Connectivity().Engine().MultiUnitPinConflicts() )
2209 {
2210 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_DIFFERENT_UNIT_NET );
2211 ercItem->SetErrorMessage( wxString::Format( _( "Pin %s is connected to both %s and %s" ),
2212 conflict.number,
2213 conflict.otherNet,
2214 conflict.firstNet ) );
2215 ercItem->SetItems( std::vector<KIID>{ conflict.other.item, conflict.first.item } );
2216 markers.Place( std::move( ercItem ), conflict.other.sheet, conflict.other.position, conflict.other.sheet,
2217 conflict.first.sheet );
2218 }
2219
2220 return markers.Count();
2221 }
2222
2223 struct PIN_ON_NET
2224 {
2225 wxString m_netName;
2226 SCH_PIN* m_pin;
2227 SCH_SHEET_PATH m_sheet;
2228 };
2229
2230 std::unordered_map<wxString, std::vector<PIN_ON_NET>> pinToNetMap;
2231
2232 for( const std::pair<NET_NAME_CODE_CACHE_KEY, std::vector<CONNECTION_SUBGRAPH*>> net : m_nets )
2233 {
2234 const wxString& netName = net.first.Name;
2235
2236 for( CONNECTION_SUBGRAPH* subgraph : net.second )
2237 {
2238 for( SCH_ITEM* item : subgraph->GetItems() )
2239 {
2240 if( item->Type() == SCH_PIN_T )
2241 {
2242 SCH_PIN* pin = static_cast<SCH_PIN*>( item );
2243 const SCH_SHEET_PATH& sheet = subgraph->GetSheet();
2244
2245 if( !pin->GetParentSymbol()->IsMultiUnit() )
2246 continue;
2247
2248 wxString name = pin->GetParentSymbol()->GetRef( &sheet ) + ":" + pin->GetShownNumber();
2249
2250 pinToNetMap[name].push_back( { netName, pin, sheet } );
2251 }
2252 }
2253 }
2254 }
2255
2256 // Pick the reference net/pin deterministically, so the same conflict yields the same marker on every ERC
2257 // run. While this won't necessarily match existing ERC exclusions, it will at least increase match fidelity
2258 // on future saves/reads.
2259 std::vector<wxString> conflicted;
2260
2261 for( const auto& [name, pins] : pinToNetMap )
2262 {
2263 for( const PIN_ON_NET& candidate : pins )
2264 {
2265 if( candidate.m_netName != pins.front().m_netName )
2266 {
2267 conflicted.push_back( name );
2268 break;
2269 }
2270 }
2271 }
2272
2273 std::sort( conflicted.begin(), conflicted.end() );
2274
2275 for( const wxString& name : conflicted )
2276 {
2277 std::vector<PIN_ON_NET> pins = pinToNetMap[name];
2278
2279 std::sort( pins.begin(), pins.end(),
2280 []( const PIN_ON_NET& a, const PIN_ON_NET& b )
2281 {
2282 if( a.m_netName != b.m_netName )
2283 return a.m_netName < b.m_netName;
2284
2285 return a.m_pin->m_Uuid < b.m_pin->m_Uuid;
2286 } );
2287
2288 const PIN_ON_NET& first = pins.front();
2289
2290 for( const PIN_ON_NET& other : pins )
2291 {
2292 if( other.m_netName == first.m_netName )
2293 continue;
2294
2295 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_DIFFERENT_UNIT_NET );
2296
2297 ercItem->SetErrorMessage( wxString::Format( _( "Pin %s is connected to both %s and %s" ),
2298 other.m_pin->GetShownNumber(),
2299 other.m_netName,
2300 first.m_netName ) );
2301
2302 ercItem->SetItems( other.m_pin, first.m_pin );
2303 ercItem->SetSheetSpecificPath( other.m_sheet );
2304 ercItem->SetItemsSheetPaths( other.m_sheet, first.m_sheet );
2305
2306 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), other.m_pin->GetPosition() );
2307 other.m_sheet.LastScreen()->Append( marker );
2308 errors += 1;
2309 break;
2310 }
2311 }
2312
2313 return errors;
2314}
2315
2316
2318{
2319 const ERC_SETTINGS& settings = aSchematic.ErcSettings();
2320 const auto& connectivity = aSchematic.Connectivity().Engine();
2321 ERC_MARKER_PLACER markers( aSchematic );
2322
2324 {
2325 for( const SCH_CONNECTIVITY::SOURCE_LOCATION& pin : connectivity.WiredImplicitPowerPins() )
2326 {
2327 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_WIRED_IMPLICIT_POWER );
2328 ercItem->SetItems( pin.item );
2329 markers.Place( std::move( ercItem ), pin.sheet, pin.position, ITEM_PATHS::MAIN );
2330 }
2331 }
2332
2333 if( settings.IsTestEnabled( ERCE_DRIVER_CONFLICT ) )
2334 {
2335 for( const SCH_CONNECTIVITY::DRIVER_CONFLICT& conflict : connectivity.DriverConflicts() )
2336 {
2337 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_DRIVER_CONFLICT );
2338 ercItem->SetItems( conflict.first, conflict.second );
2339 ercItem->SetErrorMessage( wxString::Format( _( "Both %s and %s are attached to the same items; "
2340 "%s will be used in the netlist" ),
2341 conflict.firstName,
2342 conflict.secondName,
2343 conflict.firstName ) );
2344 markers.Place( std::move( ercItem ), conflict.sheet, conflict.position, ITEM_PATHS::BOTH );
2345 }
2346 }
2347
2349 {
2350 for( const SCH_CONNECTIVITY::WIRE_ENDPOINT& endpoint : connectivity.DanglingWireEndpoints() )
2351 {
2352 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_UNCONNECTED_WIRE_ENDPOINT );
2353 ercItem->SetItems( endpoint.item );
2354 ercItem->SetErrorMessage( endpoint.busEntry ? _( "Unconnected wire to bus entry" )
2355 : _( "Unconnected wire endpoint" ) );
2356 markers.Place( std::move( ercItem ), endpoint.sheet, endpoint.position );
2357 }
2358 }
2359
2360 if( settings.IsTestEnabled( ERCE_BUS_TO_NET_CONFLICT ) )
2361 {
2362 for( const SCH_CONNECTIVITY::BUS_NET_CONFLICT& conflict : connectivity.BusNetConflicts() )
2363 {
2364 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_BUS_TO_NET_CONFLICT );
2365 ercItem->SetItems( conflict.net, conflict.bus );
2366 markers.Place( std::move( ercItem ), conflict.sheet, conflict.position );
2367 }
2368 }
2369
2370 if( settings.IsTestEnabled( ERCE_BUS_TO_BUS_CONFLICT ) )
2371 {
2372 for( const SCH_CONNECTIVITY::BUS_BUS_CONFLICT& conflict : connectivity.BusBusConflicts() )
2373 {
2374 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_BUS_TO_BUS_CONFLICT );
2375 ercItem->SetItems( conflict.canonical, conflict.other );
2376
2377 if( conflict.mixedShapes )
2378 ercItem->SetErrorMessage( _( "Bus vector and bus group are graphically connected" ) );
2379
2380 markers.Place( std::move( ercItem ), conflict.sheet, conflict.position );
2381 }
2382 }
2383
2384 if( settings.IsTestEnabled( ERCE_BUS_ENTRY_CONFLICT ) )
2385 {
2386 for( const SCH_CONNECTIVITY::BUS_ENTRY_CONFLICT& conflict : connectivity.BusEntryConflicts() )
2387 {
2388 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_BUS_ENTRY_CONFLICT );
2389 ercItem->SetItems( conflict.entry, conflict.bus );
2390 ercItem->SetErrorMessage( wxString::Format( _( "Net %s is graphically connected to bus %s but is not a"
2391 " member of that bus" ),
2392 UnescapeString( conflict.netName ),
2393 UnescapeString( conflict.busName ) ) );
2394 markers.Place( std::move( ercItem ), conflict.sheet, conflict.position );
2395 }
2396 }
2397
2399 {
2400 for( const SCH_CONNECTIVITY::NO_CONNECT_FLAG_ERROR& diagnostic : connectivity.NoConnectFlagErrors() )
2401 {
2402 const int code = diagnostic.connected ? ERCE_NOCONNECT_CONNECTED : ERCE_NOCONNECT_NOT_CONNECTED;
2403
2404 if( !settings.IsTestEnabled( code ) )
2405 continue;
2406
2407 markers.Report( code,
2408 diagnostic.pin == niluuid ? std::vector<KIID>{ diagnostic.flag }
2409 : std::vector<KIID>{ diagnostic.pin, diagnostic.flag },
2410 diagnostic.sheet, diagnostic.position, ITEM_PATHS::MAIN );
2411 }
2412 }
2413
2414 if( settings.IsTestEnabled( ERCE_PIN_NOT_CONNECTED ) )
2415 {
2416 for( const SCH_CONNECTIVITY::UNCONNECTED_PIN& pin : connectivity.UnconnectedPins() )
2417 markers.Report( ERCE_PIN_NOT_CONNECTED, { pin.item }, pin.sheet, pin.position, ITEM_PATHS::MAIN );
2418 }
2419
2421 {
2422 using ERROR_KIND = SCH_CONNECTIVITY::HIERARCHY_ERROR::KIND;
2423
2424 for( const SCH_CONNECTIVITY::HIERARCHY_ERROR& error : connectivity.HierarchyErrors() )
2425 {
2426 const bool mismatch = error.kind == ERROR_KIND::MISSING_LABEL || error.kind == ERROR_KIND::MISSING_PIN;
2427 const int code = mismatch ? ERCE_HIERACHICAL_LABEL : ERCE_PIN_NOT_CONNECTED;
2428
2429 if( !settings.IsTestEnabled( code ) )
2430 continue;
2431
2432 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( code );
2433 ercItem->SetItems( std::vector<KIID>{ error.item } );
2434 const wxString name = UnescapeString( error.name );
2435
2436 switch( error.kind )
2437 {
2438 case ERROR_KIND::ROOT_LABEL:
2439 ercItem->SetErrorMessage( wxString::Format( _( "Hierarchical label '%s' in root sheet cannot be "
2440 "connected to non-existent parent sheet" ),
2441 name ) );
2442 break;
2443
2444 case ERROR_KIND::MISSING_LABEL:
2445 ercItem->SetErrorMessage( wxString::Format( _( "Sheet pin %s has no matching hierarchical label "
2446 "inside the sheet" ),
2447 name ) );
2448 break;
2449
2450 case ERROR_KIND::MISSING_PIN:
2451 ercItem->SetErrorMessage( wxString::Format( _( "Hierarchical label %s has no matching sheet pin "
2452 "in the parent sheet" ),
2453 name ) );
2454 break;
2455
2456 case ERROR_KIND::DANGLING_PIN:
2457 break;
2458 }
2459
2460 // Root label markers are not sheet specific, and saved exclusions keep that shape
2461 const bool rootLabel = error.kind == ERROR_KIND::ROOT_LABEL;
2462 markers.Place( std::move( ercItem ), error.sheet, error.position,
2463 rootLabel ? ITEM_PATHS::NONE : ITEM_PATHS::MAIN, !rootLabel );
2464 }
2465 }
2466
2468 {
2469 for( const SCH_CONNECTIVITY::LABEL_CONNECTION_ERROR& label : connectivity.LabelConnectionErrors() )
2470 {
2471 const int code = label.singlePin ? ERCE_LABEL_SINGLE_PIN : ERCE_LABEL_NOT_CONNECTED;
2472
2473 if( settings.IsTestEnabled( code ) )
2474 markers.Report( code, { label.item }, label.sheet, label.position );
2475 }
2476 }
2477
2478 if( settings.IsTestEnabled( ERCE_LABEL_NOT_CONNECTED ) )
2479 {
2480 for( const SCH_CONNECTIVITY::LABEL_LOCATION& label : connectivity.DanglingDirectives() )
2481 markers.Report( ERCE_LABEL_NOT_CONNECTED, { label.item }, label.sheet, label.position );
2482 }
2483
2484 if( settings.IsTestEnabled( ERCE_SINGLE_GLOBAL_LABEL ) )
2485 {
2486 for( const SCH_CONNECTIVITY::LABEL_LOCATION& label : connectivity.SingleGlobalLabels() )
2487 {
2488 markers.Report( ERCE_SINGLE_GLOBAL_LABEL, { label.item }, label.sheet, label.position,
2489 ITEM_PATHS::MAIN );
2490 }
2491 }
2492
2493 if( settings.IsTestEnabled( ERCE_WIRE_DANGLING ) )
2494 {
2495 for( const SCH_CONNECTIVITY::FLOATING_WIRE& group : connectivity.FloatingWires() )
2496 markers.Report( ERCE_WIRE_DANGLING, group.items, group.sheet, group.position );
2497 }
2498
2499 return markers.Count();
2500}
2501
2502
2504{
2505 const bool engine = ADVANCED_CFG::GetCfg().m_ConnectivityEngine;
2506 int errors = 0;
2507
2508 for( const SCH_SHEET_PATH& sheet : m_sheetList )
2509 {
2510 SCH_SCREEN* screen = sheet.LastScreen();
2511
2512 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
2513 {
2514 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
2515 LIB_SYMBOL* libSymbol = symbol->GetLibSymbolRef().get();
2516
2517 if( !libSymbol )
2518 continue;
2519
2520 if( libSymbol->GetDuplicatePinNumbersAreJumpers() )
2521 continue;
2522
2523 std::vector<SCH_PIN*> pins = symbol->GetPins( &sheet );
2524
2525 std::map<wxString, std::vector<std::pair<SCH_PIN*, wxString>>> pinsByNumber;
2526
2527 for( SCH_PIN* pin : pins )
2528 {
2529 wxString netName;
2530
2531 if( engine )
2532 netName = pin->GetConnectionName( &sheet ).value_or( wxString() );
2533 else if( SCH_CONNECTION* conn = pin->Connection( &sheet ) )
2534 netName = conn->GetNetName();
2535
2536 pinsByNumber[pin->GetNumber()].emplace_back( pin, netName );
2537 }
2538
2539 for( const auto& [pinNumber, pinNetPairs] : pinsByNumber )
2540 {
2541 if( pinNetPairs.size() < 2 )
2542 continue;
2543
2544 wxString firstNet = pinNetPairs[0].second;
2545 bool hasDifferentNets = false;
2546 SCH_PIN* conflictPin = nullptr;
2547
2548 for( size_t i = 1; i < pinNetPairs.size(); i++ )
2549 {
2550 if( pinNetPairs[i].second != firstNet )
2551 {
2552 hasDifferentNets = true;
2553 conflictPin = pinNetPairs[i].first;
2554 break;
2555 }
2556 }
2557
2558 if( hasDifferentNets )
2559 {
2560 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_DUPLICATE_PIN_ERROR );
2561 wxString msg;
2562
2563 msg.Printf( _( "Pin %s on symbol '%s' is connected to different nets: %s and %s" ),
2564 pinNumber,
2565 symbol->GetRef( &sheet ),
2566 firstNet.IsEmpty() ? _( "<no net>" ) : firstNet,
2567 pinNetPairs[1].second.IsEmpty() ? _( "<no net>" ) : pinNetPairs[1].second );
2568
2569 ercItem->SetErrorMessage( msg );
2570 ercItem->SetItems( pinNetPairs[0].first, conflictPin );
2571 ercItem->SetSheetSpecificPath( sheet );
2572 ercItem->SetItemsSheetPaths( sheet, sheet );
2573
2574 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pinNetPairs[0].first->GetPosition() );
2575 screen->Append( marker );
2576 errors++;
2577 }
2578 }
2579 }
2580 }
2581
2582 return errors;
2583}
2584
2585
2587{
2588 int errors = 0;
2589
2590 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
2591 {
2592 ERC_MARKER_PLACER markers( *m_schematic );
2593
2594 for( const auto& mismatch : m_schematic->Connectivity().Engine().GroundPinErrors() )
2595 {
2596 markers.Report( ERCE_GROUND_PIN_NOT_GROUND, { mismatch.pin }, mismatch.sheet, mismatch.position,
2597 ITEM_PATHS::MAIN,
2598 wxString::Format( _( "Pin %s not connected to ground net" ), mismatch.name ) );
2599 }
2600
2601 return markers.Count();
2602 }
2603
2604 auto isGround =
2605 []( const wxString& txt )
2606 {
2607 wxString upper = txt.Upper();
2608
2609 return upper.Contains( wxT( "GND" ) )
2610 || upper == wxT( "EARTH" )
2611 || upper.StartsWith( wxT( "EARTH_" ) )
2612 || upper == wxT( "VSS" )
2613 || upper == wxT( "VSSA" );
2614 };
2615
2616 for( const SCH_SHEET_PATH& sheet : m_sheetList )
2617 {
2618 SCH_SCREEN* screen = sheet.LastScreen();
2619
2620 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
2621 {
2622 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
2623 bool hasGroundNet = false;
2624 std::vector<SCH_PIN*> mismatched;
2625
2626 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
2627 {
2628 // We are only interested in power pins
2629 if( pin->GetType() != ELECTRICAL_PINTYPE::PT_POWER_OUT
2630 && pin->GetType() != ELECTRICAL_PINTYPE::PT_POWER_IN )
2631 {
2632 continue;
2633 }
2634
2635 const SCH_CONNECTION* conn = pin->Connection( &sheet );
2636 const wxString net = conn ? conn->Name( true ) : wxString();
2637 const bool netIsGround = isGround( net );
2638
2639 if( netIsGround )
2640 hasGroundNet = true;
2641
2642 if( isGround( pin->GetShownName() ) && !netIsGround )
2643 mismatched.push_back( pin );
2644 }
2645
2646 if( hasGroundNet )
2647 {
2648 for( SCH_PIN* pin : mismatched )
2649 {
2650 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_GROUND_PIN_NOT_GROUND );
2651
2652 ercItem->SetErrorMessage( wxString::Format( _( "Pin %s not connected to ground net" ),
2653 pin->GetShownName() ) );
2654 ercItem->SetItems( pin );
2655 ercItem->SetSheetSpecificPath( sheet );
2656 ercItem->SetItemsSheetPaths( sheet );
2657
2658 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pin->GetPosition() );
2659 screen->Append( marker );
2660 errors++;
2661 }
2662 }
2663 }
2664 }
2665
2666 return errors;
2667}
2668
2669
2671{
2672 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
2673 {
2674 return reportSourceErrors( *m_schematic, ERCE_STACKED_PIN_SYNTAX,
2675 m_schematic->Connectivity().Engine().InvalidPinNotation() );
2676 }
2677
2678 int warnings = 0;
2679
2680 for( const SCH_SHEET_PATH& sheet : m_sheetList )
2681 {
2682 SCH_SCREEN* screen = sheet.LastScreen();
2683
2684 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
2685 {
2686 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
2687
2688 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
2689 {
2690 bool valid;
2691 pin->GetStackedPinNumbers( &valid );
2692
2693 if( !valid )
2694 {
2695 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_STACKED_PIN_SYNTAX );
2696 ercItem->SetItems( pin );
2697 ercItem->SetSheetSpecificPath( sheet );
2698 ercItem->SetItemsSheetPaths( sheet );
2699
2700 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pin->GetPosition() );
2701 screen->Append( marker );
2702 warnings++;
2703 }
2704 }
2705 }
2706 }
2707
2708 return warnings;
2709}
2710
2711
2713{
2715 std::map<wxString, NAMED_ITEM> globalLabels;
2716 std::map<wxString, NAMED_ITEM> localLabels;
2717
2718 for( const NAMED_ITEM& item : collectNamedItems( *m_schematic, false ) )
2719 {
2720 if( item.type == SCH_HIER_LABEL_T )
2721 continue;
2722
2723 auto& labels = item.global ? globalLabels : localLabels;
2724 auto found = labels.find( item.name );
2725
2726 // For one item, direct KIID_PATH comparison selects its shallowest instance
2727 if( found == labels.end()
2728 || item.item < found->second.item
2729 || ( item.item == found->second.item && item.sheet < found->second.sheet ) )
2730 {
2731 labels[item.name] = item;
2732 }
2733 }
2734
2735 ERC_MARKER_PLACER markers( *m_schematic );
2736
2737 for( const auto& [name, global] : globalLabels )
2738 {
2739 const auto local = localLabels.find( name );
2740
2741 if( local == localLabels.end() )
2742 continue;
2743
2744 const ERCE_T code = global.type == SCH_PIN_T && local->second.type == SCH_PIN_T ? ERCE_SAME_LOCAL_GLOBAL_POWER
2746 reportNameConflict( markers, m_settings, code, global, local->second );
2747 }
2748
2749 return markers.Count();
2750}
2751
2752
2754{
2756 std::map<wxString, std::vector<NAMED_ITEM>> generalMap;
2757
2758 auto normalizeLabel =
2759 []( const wxString& aLabel )
2760 {
2761 wxString stripped = aLabel.Strip( wxString::leading ).Strip( wxString::trailing );
2762 wxString prefix;
2763 wxString value;
2764 wxString units;
2765
2766 SplitString( stripped, &prefix, &value, &units );
2767
2768 if( prefix == wxT( "+" ) )
2769 prefix = wxEmptyString;
2770
2772 units.Replace( wxS( "µ" ), 'u' );
2773 units.Replace( wxS( "μ" ), 'u' );
2774
2775 return prefix.Lower() + value.Lower() + units.Lower();
2776 };
2777
2778 for( const NAMED_ITEM& item : collectNamedItems( *m_schematic, true ) )
2779 generalMap[normalizeLabel( item.name )].push_back( item );
2780
2781 ERC_MARKER_PLACER markers( *m_schematic );
2782
2783 for( auto& [name, entries] : generalMap )
2784 {
2785 std::sort( entries.begin(), entries.end(), []( const NAMED_ITEM& a, const NAMED_ITEM& b )
2786 {
2787 // Saved exclusions record which item is main, so order by path text rather than depth
2788 if( a.sheet != b.sheet )
2789 return a.sheet.AsString() < b.sheet.AsString();
2790
2791 return a.item < b.item;
2792 } );
2793
2794 // Report each unordered pair whose shown text differs only in case only once.
2795 for( size_t ii = 0; ii < entries.size(); ++ii )
2796 {
2797 for( size_t jj = ii + 1; jj < entries.size(); ++jj )
2798 {
2799 const NAMED_ITEM& a = entries[ii];
2800 const NAMED_ITEM& b = entries[jj];
2801
2802 if( a.name == b.name )
2803 continue;
2804
2805 // Similar local labels on different sheets are fine.
2806 if( a.type == SCH_LABEL_T && b.type == SCH_LABEL_T && a.sheet != b.sheet )
2807 continue;
2808
2810
2811 if( a.type == SCH_PIN_T && b.type == SCH_PIN_T )
2812 code = ERCE_SIMILAR_POWER;
2813 else if( a.type == SCH_PIN_T || b.type == SCH_PIN_T )
2815
2816 reportNameConflict( markers, m_settings, code, a, b );
2817 }
2818 }
2819 }
2820
2821 return markers.Count();
2822}
2823
2824
2826{
2827 wxCHECK( m_schematic, 0 );
2828
2829 LIBRARY_MANAGER& manager = Pgm().GetLibraryManager();
2831 int err_count = 0;
2832
2833 const bool captured = ADVANCED_CFG::GetCfg().m_ConnectivityEngine;
2834
2835 struct LIBRARY_ISSUE
2836 {
2837 int code;
2838 wxString message;
2839 };
2840
2841 const auto check =
2842 [&]( const SCH_CONNECTIVITY::LIBRARY_SYMBOL_FACT& aSource, const SCH_SYMBOL* aSymbol )
2843 {
2844 std::vector<LIBRARY_ISSUE> issues;
2845 const wxString libName = aSource.library.GetLibNickname();
2846 std::optional<const LIBRARY_TABLE_ROW*> optRow = manager.GetRow( LIBRARY_TABLE_TYPE::SYMBOL, libName );
2847
2848 if( !optRow || ( *optRow )->Disabled() )
2849 {
2850 if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
2851 {
2852 issues.push_back( { ERCE_LIB_SYMBOL_ISSUES,
2853 wxString::Format( _( "The current configuration does not include the "
2854 "symbol library '%s'" ),
2855 UnescapeString( libName ) )
2856 } );
2857 }
2858
2859 return issues;
2860 }
2861
2862 if( !adapter->IsLibraryLoaded( libName ) )
2863 {
2864 if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
2865 {
2866 std::optional<wxString> uri = manager.GetFullURI( LIBRARY_TABLE_TYPE::SYMBOL, libName, true );
2867 wxCHECK2( uri.has_value(), uri = wxEmptyString );
2868 issues.push_back( { ERCE_LIB_SYMBOL_ISSUES,
2869 wxString::Format( _( "The symbol library '%s' was not found at '%s'" ),
2870 UnescapeString( libName ), *uri )
2871 } );
2872 }
2873
2874 return issues;
2875 }
2876
2877 const wxString symbolName = aSource.library.GetLibItemName();
2878 LIB_SYMBOL* libSymbol = adapter->LoadSymbol( aSource.library );
2879
2880 if( !libSymbol )
2881 {
2882 if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
2883 {
2884 issues.push_back( { ERCE_LIB_SYMBOL_ISSUES,
2885 wxString::Format( _( "Symbol '%s' not found in symbol library '%s'" ),
2886 UnescapeString( symbolName ),
2887 UnescapeString( libName ) )
2888 } );
2889 }
2890
2891 return issues;
2892 }
2893
2894 if( !m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_MISMATCH ) )
2895 return issues;
2896
2897 std::unique_ptr<LIB_SYMBOL> flattenedSymbol = libSymbol->Flatten();
2898 const int flags = m_schematic->Settings().SymbolCompareFlags();
2899 bool mismatch = false;
2900
2901 if( captured )
2902 {
2904 {
2905 mismatch = !SCH_CONNECTIVITY::ExtractLibrarySymbolFact( *flattenedSymbol )
2906 .Matches( aSource, flags );
2907 }
2908 }
2909 else
2910 {
2911 wxCHECK( aSymbol && aSymbol->GetLibSymbolRef(), issues );
2912
2913 LIB_SYMBOL* embedded = aSymbol->GetLibSymbolRef().get();
2914 std::vector<wxString> messages;
2915
2916 // Duplicate pins can be valid on the same net; TestDuplicatePinNets checks their nets
2917 if( !embedded->GetDuplicatePinNumbersAreJumpers() )
2918 {
2919 UNITS_PROVIDER unitsProvider( schIUScale, EDA_UNITS::MILS );
2920 CheckDuplicatePins( embedded, messages, &unitsProvider );
2921 }
2922
2923 mismatch = messages.empty() && flattenedSymbol->Compare( *embedded, flags ) != 0;
2924 }
2925
2926 if( mismatch )
2927 {
2928 issues.push_back( { ERCE_LIB_SYMBOL_MISMATCH,
2929 wxString::Format( _( "Symbol '%s' doesn't match copy in library '%s'" ),
2930 UnescapeString( symbolName ),
2931 UnescapeString( libName ) )
2932 } );
2933 }
2934
2935 return issues;
2936 };
2937
2938 // Library results depend only on the shared screen, so every instance reuses one lookup
2939 std::map<std::pair<const SCH_SCREEN*, KIID>, std::vector<LIBRARY_ISSUE>> results;
2940
2941 for( const SCH_SHEET_PATH& path : m_schematic->Hierarchy() )
2942 {
2943 SCH_SCREEN* screen = path.LastScreen();
2944 std::vector<SCH_CONNECTIVITY::LIBRARY_SYMBOL_FACT> sources;
2945
2946 // Legacy sources keep their symbol because duplicate UUIDs make screen lookup ambiguous
2947 std::vector<const SCH_SYMBOL*> symbols;
2948
2949 if( captured )
2950 {
2951 sources = m_schematic->Connectivity().Engine().LibrarySymbols( path.PathRef() );
2952 }
2953 else
2954 {
2955 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
2956 {
2957 const SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
2958 SCH_CONNECTIVITY::LIBRARY_SYMBOL_FACT& source = sources.emplace_back();
2959
2960 source.id = symbol->m_Uuid;
2961 source.position = symbol->GetPosition();
2962 source.library = symbol->GetLibId();
2963 source.hasEmbeddedSymbol = bool( symbol->GetLibSymbolRef() );
2964 symbols.push_back( symbol );
2965 }
2966 }
2967
2968 std::vector<SCH_MARKER*> markers;
2969
2970 for( size_t ii = 0; ii < sources.size(); ++ii )
2971 {
2972 const auto& source = sources[ii];
2973
2974 if( !source.hasEmbeddedSymbol )
2975 continue;
2976
2977 auto result = results.find( { screen, source.id } );
2978
2979 if( result == results.end() )
2980 {
2981 const SCH_SYMBOL* symbol = captured ? nullptr : symbols[ii];
2982 result = results.emplace( std::make_pair( screen, source.id ), check( source, symbol ) ).first;
2983 }
2984
2985 for( const LIBRARY_ISSUE& issue : result->second )
2986 {
2987 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( issue.code );
2988 ercItem->SetItems( std::vector<KIID>{ source.id } );
2989 ercItem->SetSheetSpecificPath( path );
2990 ercItem->SetItemsSheetPaths( path );
2991 ercItem->SetErrorMessage( issue.message );
2992 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), source.position ) );
2993 }
2994 }
2995
2996 for( SCH_MARKER* marker : markers )
2997 {
2998 screen->Append( marker );
2999 err_count += 1;
3000 }
3001 }
3002
3003 return err_count;
3004}
3005
3006
3008{
3009 wxCHECK( m_schematic, 0 );
3010
3011 if( std::optional<LIBRARY_MANAGER_ADAPTER*> adapter =
3012 Pgm().GetLibraryManager().Adapter( LIBRARY_TABLE_TYPE::FOOTPRINT ) )
3013 {
3014 ( *adapter )->BlockUntilLoaded();
3015 }
3016
3017 typedef int (*TESTER_FN_PTR)( const wxString&, PROJECT* );
3018
3019 TESTER_FN_PTR linkTester = (TESTER_FN_PTR) aCvPcb->IfaceOrAddress( KIFACE_TEST_FOOTPRINT_LINK );
3020 ERC_MARKER_PLACER markers( *m_schematic );
3021
3022 for( const auto& source : collectFootprints( *m_schematic ) )
3023 {
3024 if( source.footprint.IsEmpty() )
3025 continue;
3026
3027 wxString msg;
3028 LIB_ID fpID;
3029
3030 if( fpID.Parse( source.footprint, true ) >= 0 )
3031 {
3032 msg.Printf( _( "'%s' is not a valid footprint identifier" ), source.footprint );
3033 }
3034 else
3035 {
3036 const wxString libName = fpID.GetLibNickname();
3037 const wxString fpName = fpID.GetLibItemName();
3038 const int ret = linkTester( source.footprint, aProject );
3039
3041 {
3042 msg.Printf( _( "The current configuration does not include the footprint library '%s'" ),
3043 libName );
3044 }
3046 {
3047 msg.Printf( _( "The footprint library '%s' is not enabled in the current configuration" ),
3048 libName );
3049 }
3051 {
3052 msg.Printf( _( "Footprint '%s' not found in library '%s'" ), fpName, libName );
3053 }
3054 else
3055 {
3056 continue;
3057 }
3058 }
3059
3060 markers.Report( ERCE_FOOTPRINT_LINK_ISSUES, { source.item }, source.sheet, source.position, ITEM_PATHS::MAIN,
3061 msg );
3062 }
3063
3064 return markers.Count();
3065}
3066
3067
3069{
3070 wxCHECK( m_schematic, 0 );
3071 ERC_MARKER_PLACER markers( *m_schematic );
3072
3073 for( const auto& source : collectFootprints( *m_schematic ) )
3074 {
3075 if( source.filters.empty() )
3076 continue;
3077
3078 const wxString lowerId = source.footprint.Lower();
3079 LIB_ID footprint;
3080
3081 // An id rejected at its first character is still checked and reported
3082 if( footprint.Parse( lowerId ) > 0 )
3083 continue;
3084
3085 const wxString lowerItemName = footprint.GetUniStringLibItemName().Lower();
3086 const bool found = std::ranges::any_of( source.filters,
3087 [&]( const wxString& filter )
3088 {
3089 // If the filter contains a ':' character, include the library name in the pattern
3090 return filter.Contains( wxS( ":" ) ) ? lowerId.Matches( filter.Lower() )
3091 : lowerItemName.Matches( filter.Lower() );
3092 } );
3093
3094 if( found )
3095 continue;
3096
3097 markers.Report( ERCE_FOOTPRINT_FILTERS, { source.item }, source.sheet, source.position, ITEM_PATHS::MAIN,
3098 wxString::Format( _( "Assigned footprint (%s) doesn't match footprint filters (%s)" ),
3099 footprint.GetUniStringLibItemName(), wxJoin( source.filters, ' ' ) ) );
3100 }
3101
3102 return markers.Count();
3103}
3104
3105
3107{
3108 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
3109 {
3110 const int grid = m_schematic->Settings().m_ConnectionGridSize;
3111 return reportSourceErrors( *m_schematic, ERCE_ENDPOINT_OFF_GRID,
3112 m_schematic->Connectivity().Engine().OffGridEndpoints( grid ) );
3113 }
3114
3115 const int gridSize = m_schematic->Settings().m_ConnectionGridSize;
3116 int err_count = 0;
3117
3118 for( SCH_SCREEN* screen = m_screens.GetFirst(); screen; screen = m_screens.GetNext() )
3119 {
3120 std::vector<SCH_MARKER*> markers;
3121
3122 for( SCH_ITEM* item : screen->Items() )
3123 {
3124 if( item->Type() == SCH_LINE_T && item->IsConnectable() )
3125 {
3126 SCH_LINE* line = static_cast<SCH_LINE*>( item );
3127
3128 if( ( line->GetStartPoint().x % gridSize ) != 0
3129 || ( line->GetStartPoint().y % gridSize ) != 0 )
3130 {
3131 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_ENDPOINT_OFF_GRID );
3132 ercItem->SetItems( line );
3133
3134 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), line->GetStartPoint() ) );
3135 }
3136 else if( ( line->GetEndPoint().x % gridSize ) != 0
3137 || ( line->GetEndPoint().y % gridSize ) != 0 )
3138 {
3139 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_ENDPOINT_OFF_GRID );
3140 ercItem->SetItems( line );
3141
3142 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), line->GetEndPoint() ) );
3143 }
3144 }
3145 if( item->Type() == SCH_BUS_WIRE_ENTRY_T )
3146 {
3147 SCH_BUS_WIRE_ENTRY* entry = static_cast<SCH_BUS_WIRE_ENTRY*>( item );
3148
3149 for( const VECTOR2I& point : entry->GetConnectionPoints() )
3150 {
3151 if( ( point.x % gridSize ) != 0
3152 || ( point.y % gridSize ) != 0 )
3153 {
3154 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_ENDPOINT_OFF_GRID );
3155 ercItem->SetItems( entry );
3156
3157 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), point ) );
3158 }
3159 }
3160 }
3161 else if( item->Type() == SCH_SYMBOL_T )
3162 {
3163 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
3164
3165 for( SCH_PIN* pin : symbol->GetPins( nullptr ) )
3166 {
3167 if( pin->GetType() == ELECTRICAL_PINTYPE::PT_NC )
3168 continue;
3169
3170 VECTOR2I pinPos = pin->GetPosition();
3171
3172 if( ( pinPos.x % gridSize ) != 0 || ( pinPos.y % gridSize ) != 0 )
3173 {
3174 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_ENDPOINT_OFF_GRID );
3175 ercItem->SetItems( pin );
3176
3177 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), pinPos ) );
3178 break;
3179 }
3180 }
3181 }
3182 }
3183
3184 for( SCH_MARKER* marker : markers )
3185 {
3186 screen->Append( marker );
3187 err_count += 1;
3188 }
3189 }
3190
3191 return err_count;
3192}
3193
3194
3196{
3198 int err_count = 0;
3199 SIM_LIB_MGR libMgr( &m_schematic->Project() );
3200 wxString variant = m_schematic->GetCurrentVariant();
3201
3202 for( SCH_SHEET_PATH& sheet : m_sheetList )
3203 {
3204 const auto sources = ADVANCED_CFG::GetCfg().m_ConnectivityEngine
3205 ? m_schematic->Connectivity().SimulationModels( sheet.PathRef() )
3207 std::vector<SCH_MARKER*> markers;
3208
3209 for( const auto& source : sources )
3210 {
3211 reporter.Clear();
3212 libMgr.CreateModel( source.input, true, reporter );
3213
3214 if( reporter.HasMessage() )
3215 {
3216 wxString msg = reporter.GetMessages();
3217 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_SIMULATION_MODEL );
3218
3219 //Remove \n and \r at e.o.l if any:
3220 msg.Trim();
3221
3222 ercItem->SetErrorMessage( msg );
3223 ercItem->SetItems( source.id );
3224 ercItem->SetSheetSpecificPath( sheet );
3225 ercItem->SetItemsSheetPaths( sheet );
3226
3227 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), source.position ) );
3228 }
3229 }
3230
3231 for( SCH_MARKER* marker : markers )
3232 {
3233 sheet.LastScreen()->Append( marker );
3234 err_count += 1;
3235 }
3236 }
3237
3238 return err_count;
3239}
3240
3241
3243{
3244 wxCHECK( m_schematic, 0 );
3245
3247
3248 if( !adapter )
3249 return 0;
3250
3251 int err_count = 0;
3252
3253 // Flatten each alternate once per ERC run rather than once per referencing symbol.
3254 std::map<wxString, std::unique_ptr<LIB_SYMBOL>> flatAltCache;
3255
3256 for( SCH_SHEET_PATH& sheet : m_sheetList )
3257 {
3258 SCH_SCREEN* screen = sheet.LastScreen();
3259
3260 if( !screen )
3261 continue;
3262
3263 std::vector<SCH_MARKER*> markers;
3264 std::vector<SCH_CONNECTIVITY::VARIANT_SYMBOL_FACT> sources;
3265 std::vector<SCH_CONNECTIVITY::LIBRARY_SYMBOL_FACT> libraries;
3266
3267 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
3268 {
3269 sources = m_schematic->Connectivity().Engine().VariantSymbols( sheet.PathRef() );
3270
3271 if( sources.empty() )
3272 continue;
3273
3274 libraries = m_schematic->Connectivity().Engine().LibrarySymbols( sheet.PathRef() );
3275 }
3276 else
3277 {
3278 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
3279 {
3280 const SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
3281 auto source = SCH_CONNECTIVITY::ExtractVariantSymbolFact( *symbol, sheet );
3282
3283 if( !source )
3284 continue;
3285
3286 auto& base = libraries.emplace_back();
3287
3288 if( symbol->GetLibSymbolRef() )
3290
3291 base.id = symbol->m_Uuid;
3292 base.position = symbol->GetPosition();
3293 base.library = symbol->GetLibId();
3294 sources.push_back( std::move( *source ) );
3295 }
3296
3297 std::sort( libraries.begin(), libraries.end(),
3298 []( const auto& a, const auto& b )
3299 {
3300 return a.id < b.id;
3301 } );
3302 }
3303
3304 for( const auto& source : sources )
3305 {
3306 const auto base = std::lower_bound( libraries.begin(), libraries.end(), source.id,
3307 []( const auto& a, const KIID& id )
3308 {
3309 return a.id < id;
3310 } );
3311
3312 if( base == libraries.end() || base->id != source.id )
3313 continue;
3314
3315 auto addMarker =
3316 [&]( int aErrorCode, const wxString& aMessage )
3317 {
3318 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( aErrorCode );
3319
3320 ercItem->SetItems( std::vector<KIID>{ source.id } );
3321 ercItem->SetSheetSpecificPath( sheet );
3322 ercItem->SetItemsSheetPaths( sheet );
3323 ercItem->SetErrorMessage( aMessage );
3324
3325 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), base->position ) );
3326 err_count++;
3327 };
3328
3329 for( const auto& [variantName, libId] : source.overrides )
3330 {
3331 wxString libIdStr = libId.Format();
3332
3333 // A self-referencing override is ignored by resolution, so skip it here too.
3334 if( libId == base->library )
3335 continue;
3336
3337 auto cacheIt = flatAltCache.find( libIdStr );
3338
3339 if( cacheIt == flatAltCache.end() )
3340 {
3341 std::unique_ptr<LIB_SYMBOL> flatAlt;
3342
3343 try
3344 {
3345 if( LIB_SYMBOL* altSymbol = adapter->LoadSymbol( libId ) )
3346 flatAlt = altSymbol->Flatten();
3347 }
3348 catch( const IO_ERROR& )
3349 {
3350 }
3351
3352 cacheIt = flatAltCache.emplace( libIdStr, std::move( flatAlt ) ).first;
3353 }
3354
3355 const LIB_SYMBOL* flatAlt = cacheIt->second.get();
3356
3357 if( !flatAlt )
3358 {
3359 if( m_settings.IsTestEnabled( ERCE_VARIANT_SYMBOL_INVALID ) )
3360 {
3361 addMarker( ERCE_VARIANT_SYMBOL_INVALID,
3362 wxString::Format( _( "Variant '%s': symbol '%s' not found in libraries" ),
3363 variantName, libIdStr ) );
3364 }
3365
3366 continue;
3367 }
3368
3369 if( !m_settings.IsTestEnabled( ERCE_VARIANT_SYMBOL_INCOMPATIBLE ) )
3370 continue;
3371
3372 if( !base->hasEmbeddedSymbol )
3373 continue;
3374
3375 std::vector<VARIANT_COMPAT_RESULT> issues =
3376 ValidateVariantSymbolCompatibility( *base, *flatAlt );
3377
3378 for( const VARIANT_COMPAT_RESULT& issue : issues )
3379 {
3381 wxString::Format( _( "Variant '%s', alternate '%s': %s" ),
3382 variantName, libIdStr, issue.detail ) );
3383 }
3384 }
3385 }
3386
3387 for( SCH_MARKER* marker : markers )
3388 screen->Append( marker );
3389 }
3390
3391 return err_count;
3392}
3393
3394
3396 KIFACE* aCvPcb, PROJECT* aProject, PROGRESS_REPORTER* aProgressReporter )
3397{
3398 if( !aEditFrame )
3399 {
3400 m_schematic->RecordERCExclusions();
3401 m_screens.DeleteAllMarkers( MARKER_BASE::MARKER_ERC, true );
3402 }
3403
3404 if( aEditFrame )
3405 {
3406 if( ADVANCED_CFG::GetCfg().m_IncrementalConnectivity )
3407 aEditFrame->RecalculateConnections( nullptr, GLOBAL_CLEANUP );
3408 else
3409 aEditFrame->RecalculateConnections( nullptr, NO_CLEANUP );
3410 }
3411 else if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
3412 {
3413 // Captured sources track revisions and text context, so an update refreshes job overrides
3414 m_schematic->Connectivity().Recalculate( *m_schematic );
3415 }
3416 else
3417 {
3418 m_schematic->RebuildConnectivity( nullptr, aProgressReporter );
3419 }
3420
3421 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine
3422 && m_settings.IsTestEnabled( ERCE_SIMULATION_MODEL ) )
3423 {
3424 m_schematic->Connectivity().PrepareSimulationModels( *m_schematic );
3425 }
3426
3427 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine
3428 && m_settings.IsTestEnabled( ERCE_UNRESOLVED_VARIABLE ) )
3429 {
3430 m_schematic->Connectivity().PrepareTextChecks( *m_schematic, aDrawingSheet != nullptr );
3431 }
3432
3433 // Test duplicate sheet names inside a given sheet. While one can have multiple references
3434 // to the same file, each must have a unique name.
3435 if( m_settings.IsTestEnabled( ERCE_DUPLICATE_SHEET_NAME ) )
3436 {
3437 if( aProgressReporter )
3438 aProgressReporter->AdvancePhase( _( "Checking sheet names..." ) );
3439
3441 }
3442
3443 // Test pin-to-pad maps for stale pins, duplicate pad targets and bad pad references (issue #2282).
3444 if( m_settings.IsTestEnabled( ERCE_PIN_MAP_STALE_PIN ) || m_settings.IsTestEnabled( ERCE_PIN_MAP_DUPLICATE_PAD )
3445 || m_settings.IsTestEnabled( ERCE_PIN_MAP_BAD_PAD ) || m_settings.IsTestEnabled( ERCE_PIN_MAP_UNMAPPED_PIN ) )
3446 {
3447 if( aProgressReporter )
3448 aProgressReporter->AdvancePhase( _( "Checking pin maps..." ) );
3449
3450 TestPinMap( aCvPcb, aProject );
3451 }
3452
3453 if( aProgressReporter )
3454 aProgressReporter->AdvancePhase( _( "Checking conflicts..." ) );
3455
3456 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
3458 else
3459 m_schematic->ConnectionGraph()->RunERC();
3460
3461 if( aProgressReporter )
3462 aProgressReporter->AdvancePhase( _( "Checking units..." ) );
3463
3464 // Test is all units of each multiunit symbol have the same footprint assigned.
3465 if( m_settings.IsTestEnabled( ERCE_DIFFERENT_UNIT_FP ) )
3466 {
3467 if( aProgressReporter )
3468 aProgressReporter->AdvancePhase( _( "Checking footprints..." ) );
3469
3471 }
3472
3473 if( m_settings.IsTestEnabled( ERCE_MISSING_UNIT )
3474 || m_settings.IsTestEnabled( ERCE_MISSING_INPUT_PIN )
3475 || m_settings.IsTestEnabled( ERCE_MISSING_POWER_INPUT_PIN )
3476 || m_settings.IsTestEnabled( ERCE_MISSING_BIDI_PIN ) )
3477 {
3479 }
3480
3481 if( aProgressReporter )
3482 aProgressReporter->AdvancePhase( _( "Checking pins..." ) );
3483
3484 if( m_settings.IsTestEnabled( ERCE_DIFFERENT_UNIT_NET ) )
3486
3487 if( m_settings.IsTestEnabled( ERCE_DUPLICATE_PIN_ERROR ) )
3489
3490 // Test pins on each net against the pin connection table
3491 if( m_settings.IsTestEnabled( ERCE_PIN_TO_PIN_ERROR )
3492 || m_settings.IsTestEnabled( ERCE_PIN_TO_PIN_WARNING )
3493 || m_settings.IsTestEnabled( ERCE_POWERPIN_NOT_DRIVEN )
3494 || m_settings.IsTestEnabled( ERCE_PIN_NOT_DRIVEN ) )
3495 {
3496 TestPinToPin();
3497 }
3498
3499 if( m_settings.IsTestEnabled( ERCE_GROUND_PIN_NOT_GROUND ) )
3501
3502 if( m_settings.IsTestEnabled( ERCE_STACKED_PIN_SYNTAX ) )
3504
3505 // Test similar labels (i;e. labels which are identical when
3506 // using case insensitive comparisons)
3507 if( m_settings.IsTestEnabled( ERCE_SIMILAR_LABELS )
3508 || m_settings.IsTestEnabled( ERCE_SIMILAR_POWER )
3509 || m_settings.IsTestEnabled( ERCE_SIMILAR_LABEL_AND_POWER ) )
3510 {
3511 if( aProgressReporter )
3512 aProgressReporter->AdvancePhase( _( "Checking similar labels..." ) );
3513
3515 }
3516
3517 if( m_settings.IsTestEnabled( ERCE_SAME_LOCAL_GLOBAL_LABEL )
3518 || m_settings.IsTestEnabled( ERCE_SAME_LOCAL_GLOBAL_POWER ) )
3519 {
3520 if( aProgressReporter )
3521 aProgressReporter->AdvancePhase( _( "Checking local and global labels..." ) );
3522
3524 }
3525
3526 if( m_settings.IsTestEnabled( ERCE_UNRESOLVED_VARIABLE ) )
3527 {
3528 if( aProgressReporter )
3529 aProgressReporter->AdvancePhase( _( "Checking for unresolved variables..." ) );
3530
3531 TestTextVars( aDrawingSheet );
3532 }
3533
3534 if( m_settings.IsTestEnabled( ERCE_FIELD_NAME_WHITESPACE ) )
3535 {
3536 if( aProgressReporter )
3537 aProgressReporter->AdvancePhase( _( "Checking field names..." ) );
3538
3540 }
3541
3542 if( m_settings.IsTestEnabled( ERCE_EMPTY_POWER_VALUE ) )
3543 {
3544 if( aProgressReporter )
3545 aProgressReporter->AdvancePhase( _( "Checking for empty power symbol values..." ) );
3546
3548 }
3549
3550 if( m_settings.IsTestEnabled( ERCE_EMPTY_LABEL_NAME ) )
3551 {
3552 if( aProgressReporter )
3553 aProgressReporter->AdvancePhase( _( "Checking for empty label names..." ) );
3554
3556 }
3557
3558 if( m_settings.IsTestEnabled( ERCE_SIMULATION_MODEL ) )
3559 {
3560 if( aProgressReporter )
3561 aProgressReporter->AdvancePhase( _( "Checking SPICE models..." ) );
3562
3564 }
3565
3566 if( m_settings.IsTestEnabled( ERCE_NOCONNECT_CONNECTED ) )
3567 {
3568 if( aProgressReporter )
3569 aProgressReporter->AdvancePhase( _( "Checking no connect pins for connections..." ) );
3570
3572 }
3573
3574 if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES )
3575 || m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_MISMATCH ) )
3576 {
3577 if( aProgressReporter )
3578 aProgressReporter->AdvancePhase( _( "Checking for library symbol issues..." ) );
3579
3581 }
3582
3583 if( m_settings.IsTestEnabled( ERCE_FOOTPRINT_LINK_ISSUES ) && aCvPcb )
3584 {
3585 if( aProgressReporter )
3586 aProgressReporter->AdvancePhase( _( "Checking for footprint link issues..." ) );
3587
3588 TestFootprintLinkIssues( aCvPcb, aProject );
3589 }
3590
3591 if( m_settings.IsTestEnabled( ERCE_FOOTPRINT_FILTERS ) )
3592 {
3593 if( aProgressReporter )
3594 aProgressReporter->AdvancePhase( _( "Checking footprint assignments against footprint filters..." ) );
3595
3597 }
3598
3599 if( m_settings.IsTestEnabled( ERCE_ENDPOINT_OFF_GRID ) )
3600 {
3601 if( aProgressReporter )
3602 aProgressReporter->AdvancePhase( _( "Checking for off grid pins and wires..." ) );
3603
3605 }
3606
3607 if( m_settings.IsTestEnabled( ERCE_FOUR_WAY_JUNCTION ) )
3608 {
3609 if( aProgressReporter )
3610 aProgressReporter->AdvancePhase( _( "Checking for four way junctions..." ) );
3611
3613 }
3614
3615 if( m_settings.IsTestEnabled( ERCE_LABEL_MULTIPLE_WIRES ) )
3616 {
3617 if( aProgressReporter )
3618 aProgressReporter->AdvancePhase( _( "Checking for labels on more than one wire..." ) );
3619
3621 }
3622
3623 if( m_settings.IsTestEnabled( ERCE_UNDEFINED_NETCLASS ) )
3624 {
3625 if( aProgressReporter )
3626 aProgressReporter->AdvancePhase( _( "Checking for undefined netclasses..." ) );
3627
3629 }
3630
3631 if( m_settings.IsTestEnabled( ERCE_VARIANT_SYMBOL_INVALID )
3632 || m_settings.IsTestEnabled( ERCE_VARIANT_SYMBOL_INCOMPATIBLE ) )
3633 {
3634 if( aProgressReporter )
3635 aProgressReporter->AdvancePhase( _( "Checking variant symbols..." ) );
3636
3638 }
3639
3640 m_schematic->ResolveERCExclusionsPostUpdate();
3641}
int index
const char * name
constexpr EDA_IU_SCALE schIUScale
Definition base_units.h:130
static const ADVANCED_CFG & GetCfg()
Get the singleton instance's config, which is shared by all consumers.
const NET_MAP & GetNetMap() const
A subgraph is a set of items that are electrically connected on a single sheet.
const std::set< SCH_ITEM * > & GetItems() const
Provide a read-only reference to the items in the subgraph.
const SCH_ITEM * GetNoConnect() const
const SCH_SHEET_PATH & GetSheet() const
Base class to handle basic graphic items.
Store the list of graphic items: rect, lines, polygons and texts to draw/plot the title block and fra...
DS_DRAW_ITEM_BASE * GetFirst()
void BuildDrawItemsList(const PAGE_INFO &aPageInfo, const TITLE_BLOCK &aTitleBlock)
Drawing or plot the drawing sheet.
void SetFileName(const wxString &aFileName)
Set the filename to draw/plot.
void SetSheetName(const wxString &aSheetName)
Set the sheet name to draw/plot.
void SetSheetLayer(const wxString &aSheetLayer)
Set the sheet layer to draw/plot.
void SetSheetCount(int aSheetCount)
Set the value of the count of sheets, for basic inscriptions.
void SetPageNumber(const wxString &aPageNumber)
Set the value of the sheet number.
DS_DRAW_ITEM_BASE * GetNext()
void SetProject(const PROJECT *aProject)
A graphic text.
const PAGE_INFO & GetPageInfo()
const TITLE_BLOCK & GetTitleBlock()
const KIID m_Uuid
Definition eda_item.h:599
KICAD_T Type() const
Returns the type of object.
Definition eda_item.h:110
virtual const wxString & GetText() const
Return the string associated with the text object.
Definition eda_text.h:118
EE_TYPE Overlapping(const BOX2I &aRect) const
Definition sch_rtree.h:253
EE_TYPE OfType(KICAD_T aType) const
Definition sch_rtree.h:248
static std::shared_ptr< ERC_ITEM > Create(int aErrorCode)
Constructs an ERC_ITEM for the given error code.
Definition erc_item.cpp:312
A class used to associate a SCH_PIN with its owning SCH_SHEET_PATH, in order to handle ERC checks acr...
const SCH_SHEET_PATH & Sheet() const
Get the SCH_SHEET_PATH context for the paired SCH_PIN.
SCH_PIN * Pin() const
Get the SCH_PIN for this context.
Container for ERC settings.
bool IsTestEnabled(int aErrorCode) const
ERC_PIN_SORTING_METRIC GetERCSortingMetric() const
Get the type of sorting metric the ERC checker should use to resolve multi-pin errors.
PIN_ERROR GetPinMapValue(int aFirstType, int aSecondType) const
int GetPinTypeWeight(ELECTRICAL_PINTYPE aPinType) const
Get the weight for an electrical pin type.
int TestLibSymbolIssues()
Test symbols for changed library symbols and broken symbol library links.
Definition erc.cpp:2825
const NET_MAP & m_nets
Definition erc.h:239
int TestStackedPinNotation()
Checks for pin numbers that resemble stacked pin notation but are invalid.
Definition erc.cpp:2670
ERC_TESTER(SCHEMATIC *aSchematic, bool aShowAllErrors=false)
Definition erc.cpp:337
void TestTextVars(DS_PROXY_VIEW_ITEM *aDrawingSheet)
Check for any unresolved text variable references.
Definition erc.cpp:648
int TestPinToPin()
Checks the full netlist against the pin-to-pin connectivity requirements.
Definition erc.cpp:1764
int TestSimilarLabels()
Checks for labels that differ only in capitalization.
Definition erc.cpp:2753
SCH_MULTI_UNIT_REFERENCE_MAP m_refMap
Definition erc.h:238
SCH_SCREENS m_screens
Definition erc.h:237
int TestEmptyLabelNames()
Check for labels with empty or whitespace-only names.
Definition erc.cpp:814
int TestFootprintLinkIssues(KIFACE *aCvPcb, PROJECT *aProject)
Test footprint links against the current footprint libraries.
Definition erc.cpp:3007
static int TestConnectivity(SCHEMATIC &aSchematic)
Definition erc.cpp:2317
int TestOffGridEndpoints()
Test pins and wire ends for being off grid.
Definition erc.cpp:3106
int TestDuplicateSheetNames(bool aCreateMarker)
Inside a given sheet, one cannot have sheets with duplicate names (file names can be duplicated).
Definition erc.cpp:350
int TestSameLocalGlobalLabel()
Checks for global and local labels with the same name.
Definition erc.cpp:2712
int TestMultUnitPinConflicts()
Checks if shared pins on multi-unit symbols have been connected to different nets.
Definition erc.cpp:2200
int TestEmptyPowerValues()
Check for power symbols whose value resolves to nothing, leaving their net unnamed.
Definition erc.cpp:762
int TestNoConnectPins()
In KiCad 5 and earlier, you could connect stuff up to pins with NC electrical type.
Definition erc.cpp:1343
int TestFootprintFilters()
Test symbols to ensure that assigned footprint passes any given footprint filters.
Definition erc.cpp:3068
int TestPinMap(KIFACE *aCvPcb, PROJECT *aProject)
Check pin-to-pad maps (issue #2282): stale pin references, duplicate pad targets, bad pads and unmapp...
Definition erc.cpp:417
int TestFieldNameWhitespace()
Check for field names with leading or trailing whitespace.
Definition erc.cpp:859
int TestDuplicatePinNets()
Checks if duplicate pin numbers within a symbol are connected to different nets.
Definition erc.cpp:2503
ERC_SETTINGS & m_settings
Definition erc.h:235
int TestFourWayJunction()
Test to see if there are potentially confusing 4-way junctions in the schematic.
Definition erc.cpp:1250
int TestMissingNetclasses()
Tests for netclasses that are referenced but not defined.
Definition erc.cpp:1106
int TestSimModelIssues()
Test SPICE models for various issues.
Definition erc.cpp:3195
SCH_SHEET_LIST m_sheetList
Definition erc.h:236
bool m_showAllErrors
Definition erc.h:240
int TestGroundPins()
Checks for ground-labeled pins not on a ground net while another pin is.
Definition erc.cpp:2586
SCHEMATIC * m_schematic
Definition erc.h:234
std::vector< SCH_CONNECTIVITY::MULTI_UNIT_GROUP > multiUnitSources() const
Definition erc.cpp:944
void RunTests(DS_PROXY_VIEW_ITEM *aDrawingSheet, SCH_EDIT_FRAME *aEditFrame, KIFACE *aCvPcb, PROJECT *aProject, PROGRESS_REPORTER *aProgressReporter)
Definition erc.cpp:3395
int TestMissingUnits()
Test for uninstantiated units of multi unit symbols.
Definition erc.cpp:1025
int TestLabelMultipleWires()
Test to see if there are labels that are connected to more than one wire.
Definition erc.cpp:1179
int TestVariantSymbols()
Test all variant symbol overrides for resolution and pin compatibility.
Definition erc.cpp:3242
int TestMultiunitFootprints()
Test if all units of each multiunit symbol have the same footprint assigned.
Definition erc.cpp:978
Hold an error message and may be used when throwing exceptions containing meaningful error messages.
Represents a group of jumper pins or pads, keyed by name.
wxString AsString() const
Definition kiid.cpp:423
Definition kiid.h:46
bool IsLibraryLoaded(const wxString &aNickname)
std::optional< wxString > GetFullURI(LIBRARY_TABLE_TYPE aType, const wxString &aNickname, bool aSubstituted=false)
Return the full location specifying URI for the LIB, either in original UI form or in environment var...
std::optional< LIBRARY_TABLE_ROW * > GetRow(LIBRARY_TABLE_TYPE aType, const wxString &aNickname, LIBRARY_TABLE_SCOPE aScope=LIBRARY_TABLE_SCOPE::BOTH)
A logical library item identifier and consists of various portions much like a URI.
Definition lib_id.h:45
int Parse(const UTF8 &aId, bool aFix=false)
Parse LIB_ID with the information from aId.
Definition lib_id.cpp:65
wxString GetUniStringLibId() const
Definition lib_id.h:144
const wxString GetUniStringLibItemName() const
Get strings for display messages in dialogs.
Definition lib_id.h:108
const UTF8 & GetLibItemName() const
Definition lib_id.h:98
const UTF8 & GetLibNickname() const
Return the logical library name portion of a LIB_ID.
Definition lib_id.h:83
Define a library symbol object.
Definition lib_symbol.h:114
const std::vector< ASSOCIATED_FOOTPRINT > & GetEffectiveAssociatedFootprints() const
Definition lib_symbol.h:300
std::unique_ptr< LIB_SYMBOL > Flatten() const
Return a flattened symbol inheritance to the caller.
bool GetDuplicatePinNumbersAreJumpers() const
Definition lib_symbol.h:884
virtual LIBRARY_MANAGER & GetLibraryManager() const
Definition pgm_base.h:125
A symbol-owned ordered set of named pin maps.
Definition pin_map.h:124
const std::vector< PIN_MAP > & GetAll() const
Definition pin_map.h:139
const PIN_MAP * FindByName(const wxString &aName) const
Definition pin_map.cpp:133
A named pin map.
Definition pin_map.h:65
const std::vector< PIN_MAP_ENTRY > & GetEntries() const
Definition pin_map.h:92
const wxString & GetName() const
Definition pin_map.h:70
A progress reporter interface for use in multi-threaded environments.
virtual void AdvancePhase()=0
Use the next available virtual zone of the dialog progress bar.
static SYMBOL_LIBRARY_ADAPTER * SymbolLibAdapter(PROJECT *aProject)
Accessor for project symbol library manager adapter.
Container for project specific data.
Definition project.h:63
Holds all the data relating to one schematic.
Definition schematic.h:149
SCH_CONNECTIVITY::NETCHAIN_MANAGER & NetChains() const
Definition schematic.h:325
SCH_SHEET_LIST Hierarchy() const
Return the full schematic flattened hierarchical sheet list.
SCH_CONNECTIVITY::FACADE & Connectivity() const
Definition schematic.h:324
CONNECTION_GRAPH * ConnectionGraph() const
Definition schematic.h:327
ERC_SETTINGS & ErcSettings() const
std::vector< VECTOR2I > GetConnectionPoints() const override
Add all the connection points for this item to aPoints.
Class for a wire to bus entry.
Each graphical item can have a SCH_CONNECTION describing its logical connection (to a bus or net).
wxString Name(bool aIgnoreSheet=false) const
std::vector< ERC_PIN_NET > PinNets() const
Active pins for each named net, in net name order.
std::vector< NAMED_ITEM > NamedItems() const
Every label and power pin with its resolved name, on every instance.
std::vector< FOOTPRINT_SOURCE > FootprintSources() const
Resolved footprint and filters of every symbol on every instance.
const ENGINE & Engine() const
const std::vector< std::unique_ptr< SCH_NETCHAIN > > & GetCommittedNetChains() const
Return user-created (committed) net chains (legacy accessor retained under net-chain API).
Schematic editor (Eeschema) main window.
bool RecalculateConnections(SCH_COMMIT *aCommit, SCH_CLEANUP_FLAGS aCleanupFlags, PROGRESS_REPORTER *aProgressReporter=nullptr, bool aCleanupDone=false)
Generate the connection data for the entire schematic hierarchy.
wxString GetUntranslatedName() const
Get the untranslated field name for storage, variable look-up, etc.
wxString GetShownText(const SCH_SHEET_PATH *aPath, RESOLUTION_CONTEXT aContext, const wxString &aVariantName=wxEmptyString, int aDepth=0) const
Base class for any item which can be embedded within the SCHEMATIC container class,...
Definition sch_item.h:170
std::vector< VECTOR2I > GetConnectionPoints() const override
Add all the connection points for this item to aPoints.
Segment description base class to describe items which have 2 end points (track, wire,...
Definition sch_line.h:39
std::vector< VECTOR2I > GetConnectionPoints() const override
Add all the connection points for this item to aPoints.
Definition sch_line.cpp:809
VECTOR2I GetEndPoint() const
Definition sch_line.h:145
VECTOR2I GetStartPoint() const
Definition sch_line.h:136
bool IsEndPoint(const VECTOR2I &aPoint) const override
Test if aPt is an end point of this schematic object.
Definition sch_line.h:88
bool IsGraphicLine() const
Return if the line is a graphic (non electrical line)
bool IsVisible() const
Definition sch_pin.cpp:513
PAD_RESOLUTION
Outcome of pin-to-pad resolution (issue #2282).
Definition sch_pin.h:175
VECTOR2I GetPosition() const override
Definition sch_pin.cpp:378
bool IsStacked(const SCH_PIN *aPin) const
Definition sch_pin.cpp:605
static bool HasIdentityPad(const wxString &aPinNumber, const std::set< wxString > &aPads)
Definition sch_pin.cpp:819
bool IsPower() const
Check if the pin is either a global or local power pin.
Definition sch_pin.cpp:507
ELECTRICAL_PINTYPE GetType() const
Definition sch_pin.cpp:435
A helper to define a symbol's reference designator in a schematic.
const SCH_SHEET_PATH & GetSheetPath() const
const wxString GetFootprint() const
SCH_SYMBOL * GetSymbol() const
int GetUnit() const
void Append(SCH_ITEM *aItem, bool aUpdateLibSymbol=true)
EE_RTREE & Items()
Get the full RTree, usually for iterating.
Definition sch_screen.h:122
Handle access to a stack of flattened SCH_SHEET objects by way of a path for creating a flattened sch...
const SCH_SHEET * GetSheet(unsigned aIndex) const
SCH_SCREEN * LastScreen()
const KIID_PATH & PathRef() const
Borrow the cached path until this sheet path is modified or destroyed.
Sheet symbol placed in a schematic, and is the entry point for a sub schematic.
Definition sch_sheet.h:48
std::vector< SCH_FIELD > & GetFields()
Return a reference to the vector holding the sheet's fields.
Definition sch_sheet.h:91
SCH_FIELD * GetField(FIELD_T aFieldType)
Return a mandatory field in this sheet.
VECTOR2I GetPosition() const override
Definition sch_sheet.h:512
Schematic symbol object.
Definition sch_symbol.h:75
const wxString GetFootprintFieldText(const SCH_SHEET_PATH *aPath, RESOLUTION_CONTEXT aContext, const wxString &aVariantName=wxEmptyString) const
std::vector< const SCH_PIN * > GetPins(const SCH_SHEET_PATH *aSheet) const
Retrieve a list of the SCH_PINs for the given sheet path.
bool IsGlobalPower() const override
void GetFields(std::vector< SCH_FIELD * > &aVector, bool aVisibleOnly) const override
Populate a std::vector with SCH_FIELDs, sorted in ordinal order.
VECTOR2I GetPosition() const override
Definition sch_symbol.h:908
const LIB_ID & GetLibId() const override
Definition sch_symbol.h:165
const wxString GetValue(const SCH_SHEET_PATH *aPath, RESOLUTION_CONTEXT aContext, const wxString &aVariantName=wxEmptyString) const override
std::unique_ptr< LIB_SYMBOL > & GetLibSymbolRef()
Definition sch_symbol.h:184
const wxString GetRef(const SCH_SHEET_PATH *aSheet, bool aIncludeUnit=false) const override
VECTOR2I GetPosition() const override
Definition sch_text.h:143
SIM_MODEL & CreateModel(SIM_MODEL::TYPE aType, std::span< const wxString > aPins, REPORTER &aReporter)
An interface to the global shared library manager that is schematic-specific and linked to one projec...
LIB_SYMBOL * LoadSymbol(const wxString &aNickname, const wxString &aName)
Load a LIB_SYMBOL having aName from the library given by aNickname.
A base class for LIB_SYMBOL and SCH_SYMBOL.
Definition symbol.h:60
virtual bool IsGlobalPower() const =0
virtual bool IsLocalPower() const =0
double Distance(const VECTOR2< extended_type > &aVector) const
Compute the distance between two vectors.
Definition vector2d.h:574
A wrapper for reporting to a wxString object.
Definition reporter.h:242
@ FOR_ERC_DRC
Definition common.h:95
@ FOR_NETNAME
Definition common.h:94
@ RESOLVED
Definition common.h:97
#define _(s)
@ NONE
Definition eda_fill.h:42
@ NO_RECURSE
Definition eda_item.h:52
void CheckDuplicatePins(LIB_SYMBOL *aSymbol, std::vector< wxString > &aMessages, UNITS_PROVIDER *aUnitsProvider)
const wxString CommentERC_V[]
Definition erc.cpp:290
const wxString CommentERC_H[]
Definition erc.cpp:273
const std::set< ELECTRICAL_PINTYPE > DrivenPinTypes
Definition erc.cpp:328
const std::set< ELECTRICAL_PINTYPE > DrivingPinTypes
Definition erc.cpp:310
const std::set< ELECTRICAL_PINTYPE > DrivingPowerPinTypes
Definition erc.cpp:322
ERCE_T
ERC error codes.
@ ERCE_POWERPIN_NOT_DRIVEN
Power input pin connected to some others pins but no power out pin to drive it.
@ ERCE_DRIVER_CONFLICT
Conflicting drivers (labels, etc) on a subgraph.
@ ERCE_SIMILAR_POWER
2 power pins are equal for case insensitive comparisons.
@ ERCE_MISSING_POWER_INPUT_PIN
Symbol has power input pins that are not placed on the schematic.
@ ERCE_EMPTY_POWER_VALUE
Power symbol has no value, so it names no net.
@ ERCE_UNCONNECTED_WIRE_ENDPOINT
A label is connected to more than one wire.
@ ERCE_GROUND_PIN_NOT_GROUND
A ground-labeled pin is not on a ground net while another pin is.
@ ERCE_SIMILAR_LABELS
2 labels are equal for case insensitive comparisons.
@ ERCE_VARIANT_SYMBOL_INCOMPATIBLE
Variant symbol override fails pin compatibility.
@ ERCE_STACKED_PIN_SYNTAX
Pin name resembles stacked pin notation.
@ ERCE_LABEL_NOT_CONNECTED
Label not connected to any pins.
@ ERCE_ENDPOINT_OFF_GRID
Pin or wire-end off grid.
@ ERCE_EMPTY_LABEL_NAME
Label has an empty or whitespace-only name.
@ ERCE_SAME_LOCAL_GLOBAL_LABEL
2 labels are equal for case insensitive comparisons.
@ ERCE_BUS_TO_BUS_CONFLICT
A connection between bus objects doesn't share at least one net.
@ ERCE_SIMILAR_LABEL_AND_POWER
label and pin are equal for case insensitive comparisons.
@ ERCE_SAME_LOCAL_GLOBAL_POWER
Local power port and global power port have the same name.
@ ERCE_PIN_MAP_BAD_PAD
Pin map references a pad absent from the footprint.
@ ERCE_LABEL_SINGLE_PIN
A label is connected only to a single pin.
@ ERCE_BUS_ENTRY_CONFLICT
A wire connected to a bus doesn't match the bus.
@ ERCE_FOOTPRINT_LINK_ISSUES
The footprint link is invalid, or points to a missing (or inactive) footprint or library.
@ ERCE_PIN_MAP_DUPLICATE_PAD
Two symbol pins map to one pad (not stacked/jumper).
@ ERCE_BUS_TO_NET_CONFLICT
A bus wire is graphically connected to a net port/pin (or vice versa).
@ ERCE_DUPLICATE_PIN_ERROR
@ ERCE_NOCONNECT_NOT_CONNECTED
A no connect symbol is not connected to anything.
@ ERCE_DIFFERENT_UNIT_NET
Shared pin in a multi-unit symbol is connected to more than one net.
@ ERCE_FOUR_WAY_JUNCTION
A four-way junction was found.
@ ERCE_PIN_NOT_CONNECTED
Pin not connected and not no connect symbol.
@ ERCE_UNDEFINED_NETCLASS
A netclass was referenced but not defined.
@ ERCE_UNRESOLVED_VARIABLE
A text variable could not be resolved.
@ ERCE_SIMULATION_MODEL
An error was found in the simulation model.
@ ERCE_LIB_SYMBOL_MISMATCH
Symbol doesn't match copy in library.
@ ERCE_GENERIC_ERROR
@ ERCE_DIFFERENT_UNIT_FP
Different units of the same symbol have different footprints assigned.
@ ERCE_NOCONNECT_CONNECTED
A no connect symbol is connected to more than 1 pin.
@ ERCE_PIN_TO_PIN_WARNING
@ ERCE_PIN_NOT_DRIVEN
Pin connected to some others pins but no pin to drive it.
@ ERCE_MISSING_INPUT_PIN
Symbol has input pins that are not placed.
@ ERCE_MISSING_UNIT
Symbol has units that are not placed on the schematic.
@ ERCE_FIELD_NAME_WHITESPACE
Field name has leading or trailing whitespace.
@ ERCE_DUPLICATE_SHEET_NAME
Duplicate sheet names within a given sheet.
@ ERCE_PIN_MAP_STALE_PIN
Pin map references a pin number not on the symbol.
@ ERCE_MISSING_BIDI_PIN
Symbol has bi-directional pins that are not placed.
@ ERCE_LIB_SYMBOL_ISSUES
Symbol not found in active libraries.
@ ERCE_FOOTPRINT_FILTERS
The assigned footprint doesn't match the footprint filters.
@ ERCE_HIERACHICAL_LABEL
Mismatch between hierarchical labels and pins sheets.
@ ERCE_WIRE_DANGLING
Some wires are not connected to anything else.
@ ERCE_GENERIC_WARNING
@ ERCE_VARIANT_SYMBOL_INVALID
Variant symbol override LIB_ID cannot be resolved.
@ ERCE_SINGLE_GLOBAL_LABEL
A label only exists once in the schematic.
@ ERCE_PIN_MAP_UNMAPPED_PIN
A connected pin resolves to no footprint pad.
@ ERCE_LABEL_MULTIPLE_WIRES
A label is connected to more than one wire.
@ ERCE_WIRED_IMPLICIT_POWER
Wired hidden power input also joins its global net by name.
@ ERCE_PIN_TO_PIN_ERROR
PIN_ERROR
The values a pin-to-pin entry in the pin matrix can take on.
bool m_ConnectivityEngine
Use the schematic connectivity engine instead of CONNECTION_GRAPH.
const wxChar *const traceSchNetChain
Flag to enable tracing of schematic net chain rebuild and ERC cross-chain checks.
std::string source
std::string message
#define TO_UTF8(wxstring)
Convert a wxString to a UTF8 encoded C string for all wxWidgets build modes.
Definition idf_helpers.h:37
@ KIFACE_TEST_FOOTPRINT_LINK_LIBRARY_NOT_ENABLED
Definition kiface_ids.h:89
@ KIFACE_TEST_FOOTPRINT_LINK
Definition kiface_ids.h:87
@ KIFACE_TEST_FOOTPRINT_LINK_NO_LIBRARY
Definition kiface_ids.h:88
@ KIFACE_TEST_FOOTPRINT_LINK_NO_FOOTPRINT
Definition kiface_ids.h:90
@ KIFACE_FOOTPRINT_PAD_NUMBERS
Function pointer type: void (*)( const wxString& aFootprint, PROJECT* aProject, std::set<wxString>& a...
Definition kiface_ids.h:95
KIID niluuid(0)
@ MISMATCH
Entries name the host with another key of this type, and none with this one.
Value keys and the key session of the schematic connectivity engine.
SOURCE_LOCATION UNCONNECTED_PIN
std::optional< PIN_MAP_FACT > ExtractPinMapFacts(const SCH_SYMBOL &aSymbol)
std::vector< SIMULATION_MODEL_FACT > ExtractSimulationModelFacts(const SCH_SHEET_PATH &aPath, const wxString &aVariantName)
std::vector< TEXT_CHECK_FACT > ExtractTextChecks(const SCH_SCREEN &aScreen, const SCH_SHEET_PATH &aPath)
SOURCE_LOCATION LABEL_LOCATION
LIBRARY_SYMBOL_FACT ExtractLibrarySymbolFact(const LIB_SYMBOL &aSymbol)
std::vector< TEXT_ASSERTION > ExtractTextAssertions(const wxString &aText)
std::optional< VARIANT_SYMBOL_FACT > ExtractVariantSymbolFact(const SCH_SYMBOL &aSymbol, const SCH_SHEET_PATH &aPath)
std::vector< UNIT_FACT > ExtractUnitFacts(const LIB_SYMBOL &aSymbol)
PGM_BASE & Pgm()
The global program "get" accessor.
see class PGM_BASE
ELECTRICAL_PINTYPE
The symbol library pin object electrical types used in ERC tests.
Definition pin_type.h:32
@ PT_INPUT
usual pin input: must be connected
Definition pin_type.h:33
@ PT_NC
not connected (must be left open)
Definition pin_type.h:46
@ PT_OUTPUT
usual output
Definition pin_type.h:34
@ PT_TRISTATE
tri state bus pin
Definition pin_type.h:36
@ PT_NIC
not internally connected (may be connected to anything)
Definition pin_type.h:40
@ PT_BIDI
input or output (like port for a microprocessor)
Definition pin_type.h:35
@ PT_POWER_OUT
output of a regulator: intended to be connected to power input pins
Definition pin_type.h:43
@ PT_POWER_IN
power input (GND, VCC for ICs). Must be connected to a power output.
Definition pin_type.h:42
@ PT_UNSPECIFIED
unknown electrical properties: creates always a warning when connected
Definition pin_type.h:41
@ PT_PASSIVE
pin for passive symbols: must be connected, and can be connected to any pin.
Definition pin_type.h:39
wxString ElectricalPinTypeGetText(ELECTRICAL_PINTYPE)
Definition pin_type.cpp:204
static float distance(const SFVEC2UI &a, const SFVEC2UI &b)
static const std::vector< KICAD_T > labelTypes
Definition sch_field.cpp:49
@ SYMBOL_FILTER_ALL
@ NO_CLEANUP
Definition schematic.h:93
@ GLOBAL_CLEANUP
Definition schematic.h:95
int StrNumCmp(const wxString &aString1, const wxString &aString2, bool aIgnoreCase)
Compare two strings with alphanumerical content.
std::vector< wxString > ExpandStackedPinNotation(const wxString &aPinName, bool *aValid)
Expand stacked pin notation like [1,2,3], [1-4], [A1-A4], or [AA1-AA3,AB4,CD12-CD14] into individual ...
wxString UnescapeString(const wxString &aSource)
int SplitString(const wxString &strToSplit, wxString *strBeginning, wxString *strDigits, wxString *strEnd)
Break a string into three parts: he alphabetic preamble, the numeric part, and any alphabetic ending.
A first-class footprint choice on a LIB_SYMBOL, tied to a named pin map.
Definition pin_map.h:159
LIB_ID m_FootprintLibId
Definition pin_map.h:160
Implement a participant in the KIWAY alchemy.
Definition kiway.h:153
virtual void * IfaceOrAddress(int aDataId)=0
Return pointer to the requested object.
One symbol-pin to footprint-pad mapping inside a PIN_MAP.
Definition pin_map.h:42
Two bus claims on one island that share no member, or a bus vector joined to a bus group.
Definition conn_engine.h:82
A bus wire entry whose net is not a member of the bus it touches.
Definition conn_engine.h:95
An island that mixes net and bus items.
Definition conn_engine.h:70
Two different strong names on one island.
Definition conn_engine.h:45
One active symbol pin on one sheet instance, with the reference of its symbol.
Up to four wires and bus entries of one island that has no driver.
A hierarchical label or sheet pin with no partner, or a dangling sheet pin.
A label that connects to nothing, or to only one pin.
bool Matches(const LIBRARY_SYMBOL_FACT &aOther, int aCompareFlags) const
All placed units that share one reference, with the unit table of the library symbol.
One placed unit of an annotated multi-unit symbol.
A label or a power pin with its resolved net name.
A no-connect flag on a net with more than one pin, or on a net with no pin and no label.
One item on one sheet instance, for a diagnostic that needs only a location.
One dangling end of a wire or a bus wire entry.
Definition conn_engine.h:58
std::string path
IbisParser parser & reporter
KIBIS_PIN * pin
static std::set< FOOTPRINT * > collectFootprints(const PCB_GROUP *aGroup)
const SHAPE_LINE_CHAIN chain
wxString result
Test unit parsing edge cases and error handling.
wxLogTrace helper definitions.
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition typeinfo.h:70
@ SCH_LINE_T
Definition typeinfo.h:159
@ SCH_NO_CONNECT_T
Definition typeinfo.h:156
@ SCH_SYMBOL_T
Definition typeinfo.h:168
@ SCH_FIELD_T
Definition typeinfo.h:146
@ SCH_LABEL_T
Definition typeinfo.h:163
@ SCH_SHEET_T
Definition typeinfo.h:171
@ SCH_HIER_LABEL_T
Definition typeinfo.h:165
@ SCH_BUS_WIRE_ENTRY_T
Definition typeinfo.h:157
@ SCH_GLOBAL_LABEL_T
Definition typeinfo.h:164
@ SCH_PIN_T
Definition typeinfo.h:149
std::vector< VARIANT_COMPAT_RESULT > ValidateVariantSymbolCompatibility(const LIB_SYMBOL &aBase, const LIB_SYMBOL &aCandidate)
Check whether aCandidate can be used as a variant symbol override for aBase.
VECTOR2< int32_t > VECTOR2I
Definition vector2d.h:708