KiCad PCB EDA Suite
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erc.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2015 Jean-Pierre Charras, jp.charras at wanadoo.fr
5 * Copyright (C) 2011 Wayne Stambaugh <[email protected]>
6 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <https://www.gnu.org/licenses/>.
20 */
21
22#include <algorithm>
23#include <map>
24#include <numeric>
25#include <set>
26
27#include "connection_graph.h"
28#include "kiface_ids.h"
29#include <advanced_config.h>
31#include <common.h> // for ExpandEnvVarSubstitutions
32#include <erc/erc.h>
35#include <string_utils.h>
36#include <sch_pin.h>
38#include <sch_netchain.h>
39#include <project_sch.h>
42#include <sch_bus_entry.h>
43#include <sch_edit_frame.h>
44#include <sch_marker.h>
45#include <sch_reference_list.h>
46#include <sch_rule_area.h>
47#include <sch_sheet.h>
48#include <sch_sheet_pin.h>
49#include <sch_pin.h>
50#include <sch_textbox.h>
51#include <sch_line.h>
52#include <schematic.h>
53#include <lib_symbol.h>
54#include <sch_symbol.h>
55#include <pin_map.h>
58#include <vector>
59#include <optional>
60#include <wx/ffile.h>
61#include <sim/sim_lib_mgr.h>
62#include <progress_reporter.h>
63#include <kiway.h>
64#include <pgm_base.h>
66#include <trace_helpers.h>
68
69namespace
70{
71// Item paths participate in saved exclusion keys; preserve each check's serialized shape
72enum class ITEM_PATHS
73{
74 NONE,
75 MAIN,
76 BOTH
77};
78
79// Capture membership before the first marker; checks may insert markers while traversing the result
80class ERC_MARKER_PLACER
81{
82public:
83 explicit ERC_MARKER_PLACER( const SCHEMATIC& aSchematic ) :
84 m_schematic( aSchematic )
85 {
86 }
87
88 const SCH_SHEET_PATH* Find( const KIID_PATH& aSheet )
89 {
90 if( !m_paths )
91 {
92 m_hierarchy = m_schematic.Hierarchy();
93 m_paths.emplace();
94
95 for( const SCH_SHEET_PATH& path : m_hierarchy )
96 m_paths->emplace( path.PathRef(), &path );
97 }
98
99 if( const auto found = m_paths->find( aSheet ); found != m_paths->end() )
100 return found->second;
101
102 wxLogTrace( "KICAD_CONNECTIVITY", "ERC connectivity references unknown sheet instance %s", aSheet.AsString() );
103 return nullptr;
104 }
105
106 void Place( std::shared_ptr<ERC_ITEM> aItem, const KIID_PATH& aSheet, const VECTOR2I& aPosition,
107 ITEM_PATHS aItemPaths = ITEM_PATHS::NONE, bool aSheetSpecific = true )
108 {
109 const SCH_SHEET_PATH* sheet = Find( aSheet );
110
111 if( !sheet )
112 return;
113
114 if( aItemPaths == ITEM_PATHS::BOTH && aItem->GetAuxItemID() != niluuid )
115 aItem->SetItemsSheetPaths( *sheet, *sheet );
116 else if( aItemPaths != ITEM_PATHS::NONE )
117 aItem->SetItemsSheetPaths( *sheet );
118
119 append( std::move( aItem ), *sheet, aPosition, aSheetSpecific );
120 }
121
122 void Place( std::shared_ptr<ERC_ITEM> aItem, const KIID_PATH& aSheet, const VECTOR2I& aPosition,
123 const KIID_PATH& aMainItemSheet, const KIID_PATH& aAuxItemSheet )
124 {
125 const SCH_SHEET_PATH* sheet = Find( aSheet );
126 const SCH_SHEET_PATH* main = Find( aMainItemSheet );
127 const SCH_SHEET_PATH* aux = Find( aAuxItemSheet );
128
129 if( !sheet || !main || !aux )
130 return;
131
132 aItem->SetItemsSheetPaths( *main, *aux );
133 append( std::move( aItem ), *sheet, aPosition );
134 }
135
136 void Report( int aCode, const RC_ITEM::KIIDS& aItems, const KIID_PATH& aSheet, const VECTOR2I& aPosition,
137 ITEM_PATHS aItemPaths = ITEM_PATHS::NONE, const wxString& aMessage = wxEmptyString )
138 {
139 auto item = ERC_ITEM::Create( aCode );
140 item->SetItems( aItems );
141
142 if( !aMessage.empty() )
143 item->SetErrorMessage( aMessage );
144
145 Place( std::move( item ), aSheet, aPosition, aItemPaths );
146 }
147
148 int Count() const { return m_count; }
149
150private:
151 void append( std::shared_ptr<ERC_ITEM> aItem, const SCH_SHEET_PATH& aSheet, const VECTOR2I& aPosition,
152 bool aSheetSpecific = true )
153 {
154 if( aSheetSpecific )
155 aItem->SetSheetSpecificPath( aSheet );
156
157 aSheet.LastScreen()->Append( new SCH_MARKER( std::move( aItem ), aPosition ) );
158 ++m_count;
159 }
160
161 const SCHEMATIC& m_schematic;
162 SCH_SHEET_LIST m_hierarchy;
163 std::optional<std::map<KIID_PATH, const SCH_SHEET_PATH*>> m_paths;
164 int m_count = 0;
165};
166
167std::vector<SCH_CONNECTIVITY::FOOTPRINT_SOURCE> collectFootprints( SCHEMATIC& aSchematic )
168{
169 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
170 return aSchematic.Connectivity().Engine().FootprintSources();
171
172 std::vector<SCH_CONNECTIVITY::FOOTPRINT_SOURCE> result;
173
174 for( const SCH_SHEET_PATH& path : aSchematic.Hierarchy() )
175 {
176 for( SCH_ITEM* item : path.LastScreen()->Items().OfType( SCH_SYMBOL_T ) )
177 {
178 const auto& symbol = *static_cast<SCH_SYMBOL*>( item );
179 const auto& library = symbol.GetLibSymbolRef();
180 result.push_back( { path.PathRef(), symbol.m_Uuid, symbol.GetPosition(),
181 symbol.GetFootprintFieldText( &path, RESOLVED ),
182 library ? library->GetFPFilters() : wxArrayString() } );
183 }
184 }
185
186 return result;
187}
188
189template <typename LOCATION>
190int reportSourceErrors( SCHEMATIC& aSchematic, int aCode, const std::vector<LOCATION>& aSources )
191{
192 ERC_MARKER_PLACER markers( aSchematic );
193
194 for( const auto& source : aSources )
195 markers.Report( aCode, { source.item }, source.sheet, source.position, ITEM_PATHS::MAIN );
196
197 return markers.Count();
198}
199
200std::vector<SCH_CONNECTIVITY::NAMED_ITEM> collectNamedItems( SCHEMATIC& aSchematic, bool aSimilar )
201{
202 // The engine compares resolved net names for every power pin, including hidden and alternate pins
203 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
204 return aSchematic.Connectivity().Engine().NamedItems();
205
206 std::vector<SCH_CONNECTIVITY::NAMED_ITEM> result;
207
208 for( const auto& [key, subgraphs] : aSchematic.ConnectionGraph()->GetNetMap() )
209 {
210 for( const CONNECTION_SUBGRAPH* subgraph : subgraphs )
211 {
212 const SCH_SHEET_PATH& sheet = subgraph->GetSheet();
213
214 for( SCH_ITEM* item : subgraph->GetItems() )
215 {
216 if( item->Type() == SCH_LABEL_T || item->Type() == SCH_GLOBAL_LABEL_T
217 || item->Type() == SCH_HIER_LABEL_T )
218 {
219 auto* label = static_cast<SCH_LABEL_BASE*>( item );
220 result.push_back( { sheet.PathRef(), item->m_Uuid, item->GetPosition(),
221 label->GetShownText( &sheet, FOR_NETNAME ), item->Type(),
222 item->Type() == SCH_GLOBAL_LABEL_T } );
223 }
224 else if( item->Type() == SCH_PIN_T )
225 {
226 auto* pin = static_cast<SCH_PIN*>( item );
227 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( pin->GetParentSymbol() );
228
229 if( !pin->IsPower() || !symbol )
230 continue;
231
232 const wxString name = !aSimilar && pin->IsGlobalPower() && !symbol->IsGlobalPower()
233 ? pin->GetShownName() : symbol->GetValue( &sheet, FOR_NETNAME );
234 result.push_back( { sheet.PathRef(), item->m_Uuid, item->GetPosition(), name,
235 SCH_PIN_T, pin->IsGlobalPower() } );
236 }
237 }
238 }
239 }
240
241 return result;
242}
243
244void reportNameConflict( ERC_MARKER_PLACER& aMarkers, ERC_SETTINGS& aSettings, ERCE_T aCode,
246{
247 if( !aSettings.IsTestEnabled( aCode ) )
248 return;
249
250 auto item = ERC_ITEM::Create( aCode );
251 item->SetItems( aMain.item, aAux.item );
252 aMarkers.Place( std::move( item ), aMain.sheet, aMain.position, aMain.sheet, aAux.sheet );
253}
254
255}
256
257
258/* ERC tests :
259 * 1 - conflicts between connected pins ( example: 2 connected outputs )
260 * 2 - minimal connections requirements ( 1 input *must* be connected to an
261 * output, or a passive pin )
262 */
263
264/*
265 * Minimal ERC requirements:
266 * All pins *must* be connected (except ELECTRICAL_PINTYPE::PT_NC).
267 * When a pin is not connected in schematic, the user must place a "non
268 * connected" symbol to this pin.
269 * This ensures a forgotten connection will be detected.
270 */
271
272// Messages for matrix rows:
273const wxString CommentERC_H[] =
274{
275 _( "Input Pin" ),
276 _( "Output Pin" ),
277 _( "Bidirectional Pin" ),
278 _( "Tri-State Pin" ),
279 _( "Passive Pin" ),
280 _( "Free Pin" ),
281 _( "Unspecified Pin" ),
282 _( "Power Input Pin" ),
283 _( "Power Output Pin" ),
284 _( "Open Collector" ),
285 _( "Open Emitter" ),
286 _( "No Connection" )
287};
288
289// Messages for matrix columns
290const wxString CommentERC_V[] =
291{
292 _( "Input Pin" ),
293 _( "Output Pin" ),
294 _( "Bidirectional Pin" ),
295 _( "Tri-State Pin" ),
296 _( "Passive Pin" ),
297 _( "Free Pin" ),
298 _( "Unspecified Pin" ),
299 _( "Power Input Pin" ),
300 _( "Power Output Pin" ),
301 _( "Open Collector" ),
302 _( "Open Emitter" ),
303 _( "No Connection" )
304};
305
306
307// List of pin types that are considered drivers for usual input pins
308// i.e. pin type = ELECTRICAL_PINTYPE::PT_INPUT, but not PT_POWER_IN
309// that need only a PT_POWER_OUT pin type to be driven
318
319// List of pin types that are considered drivers for power pins
320// In fact only a ELECTRICAL_PINTYPE::PT_POWER_OUT pin type can drive
321// power input pins
322const std::set<ELECTRICAL_PINTYPE> DrivingPowerPinTypes =
323{
325};
326
327// List of pin types that require a driver elsewhere on the net
328const std::set<ELECTRICAL_PINTYPE> DrivenPinTypes =
329{
332};
333
334extern void CheckDuplicatePins( LIB_SYMBOL* aSymbol, std::vector<wxString>& aMessages,
335 UNITS_PROVIDER* aUnitsProvider );
336
337ERC_TESTER::ERC_TESTER( SCHEMATIC* aSchematic, bool aShowAllErrors ) :
338 m_schematic( aSchematic ),
339 m_settings( aSchematic->ErcSettings() ),
340 m_sheetList( aSchematic->BuildSheetListSortedByPageNumbers() ),
341 m_screens( aSchematic->Root() ),
342 m_nets( aSchematic->ConnectionGraph()->GetNetMap() ),
343 m_showAllErrors( aShowAllErrors )
344{
345 if( !ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
346 m_sheetList.GetMultiUnitSymbols( m_refMap, SYMBOL_FILTER_ALL );
347}
348
349
350int ERC_TESTER::TestDuplicateSheetNames( bool aCreateMarker )
351{
352 int err_count = 0;
353
354 // Preflight callers validate fresh edits before connectivity has been rebuilt
355 if( aCreateMarker && ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
356 {
357 const auto errors = m_schematic->Connectivity().Engine().DuplicateSheetNames();
358 ERC_MARKER_PLACER markers( *m_schematic );
359
360 for( const auto& error : errors )
361 {
362 markers.Report( ERCE_DUPLICATE_SHEET_NAME, { error.main, error.auxiliary }, error.sheet, error.position,
363 ITEM_PATHS::BOTH );
364 }
365
366 return markers.Count();
367 }
368
369 for( const SCH_SHEET_PATH& path : m_schematic->Hierarchy() )
370 {
371 SCH_SCREEN* screen = path.LastScreen();
372 std::vector<SCH_SHEET*> list;
373
374 for( SCH_ITEM* item : screen->Items().OfType( SCH_SHEET_T ) )
375 list.push_back( static_cast<SCH_SHEET*>( item ) );
376
377 for( size_t i = 0; i < list.size(); i++ )
378 {
379 SCH_SHEET* sheet = list[i];
380
381 for( size_t j = i + 1; j < list.size(); j++ )
382 {
383 SCH_SHEET* test_item = list[j];
384
385 // We have found a second sheet: compare names
386 // we are using case insensitive comparison to avoid mistakes between
387 // similar names like Mysheet and mysheet
388 const wxString variant = m_schematic->GetCurrentVariant();
389 const wxString name =
390 sheet->GetField( FIELD_T::SHEET_NAME )->GetShownText( &path, RESOLVED, variant, 0 );
391 const wxString other =
392 test_item->GetField( FIELD_T::SHEET_NAME )->GetShownText( &path, RESOLVED, variant, 0 );
393
394 if( name.IsSameAs( other, false ) )
395 {
396 if( aCreateMarker )
397 {
399 ercItem->SetItems( sheet, test_item );
400 ercItem->SetSheetSpecificPath( path );
401 ercItem->SetItemsSheetPaths( path, path );
402
403 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), sheet->GetPosition() );
404 screen->Append( marker );
405 }
406
407 err_count++;
408 }
409 }
410 }
411 }
412
413 return err_count;
414}
415
416
417int ERC_TESTER::TestPinMap( KIFACE* aCvPcb, PROJECT* aProject )
418{
419 int errors = 0;
420 const bool checkStale = m_settings.IsTestEnabled( ERCE_PIN_MAP_STALE_PIN );
421 const bool checkDuplicate = m_settings.IsTestEnabled( ERCE_PIN_MAP_DUPLICATE_PAD );
422 const bool checkBadPad = m_settings.IsTestEnabled( ERCE_PIN_MAP_BAD_PAD );
423
424 typedef void ( *PAD_NUMBERS_FN_PTR )( const wxString&, PROJECT*, std::set<wxString>& );
425
426 PAD_NUMBERS_FN_PTR padFetcher =
427 aCvPcb ? (PAD_NUMBERS_FN_PTR) aCvPcb->IfaceOrAddress( KIFACE_FOOTPRINT_PAD_NUMBERS ) : nullptr;
428
429 std::map<wxString, std::set<wxString>> padCache;
430
431 auto getPads = [&]( const wxString& aFootprintId ) -> const std::set<wxString>&
432 {
433 auto it = padCache.find( aFootprintId );
434
435 if( it != padCache.end() )
436 return it->second;
437
438 std::set<wxString>& pads = padCache[aFootprintId];
439
440 if( padFetcher && !aFootprintId.IsEmpty() )
441 padFetcher( aFootprintId, aProject, pads );
442
443 return pads;
444 };
445
446 // Pin maps and the symbol's pin numbers are library-symbol properties, so iterate unique
447 // screens (not sheet paths) to avoid double-reporting on reused hierarchical sheets.
448 for( SCH_SCREEN* screen = m_screens.GetFirst(); screen; screen = m_screens.GetNext() )
449 {
450 std::vector<SCH_CONNECTIVITY::PIN_MAP_FACT> sources;
451
452 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
453 {
454 sources = m_schematic->Connectivity().Engine().PinMapSymbols( screen->ConnectivityId() );
455 }
456 else
457 {
458 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
459 {
460 if( auto source = SCH_CONNECTIVITY::ExtractPinMapFacts( *static_cast<SCH_SYMBOL*>( item ) ) )
461 sources.push_back( std::move( *source ) );
462 }
463 }
464
465 for( const auto& source : sources )
466 {
467 const PIN_MAP_SET& maps = source.maps;
468 const auto& pinNumbers = source.pinNumbers;
469 const auto& jumperGroups = source.jumperGroups;
470
471 auto sharesJumperGroup = [&]( const wxString& aPinA, const wxString& aPinB )
472 {
473 for( const JUMPER_GROUP& group : jumperGroups.GetAll() )
474 {
475 if( group.Contains( aPinA ) && group.Contains( aPinB ) )
476 return true;
477 }
478
479 return false;
480 };
481
482 for( const PIN_MAP& map : maps.GetAll() )
483 {
484 if( checkStale )
485 {
486 for( const PIN_MAP_ENTRY& entry : map.GetEntries() )
487 {
488 if( pinNumbers.count( entry.m_PinNumber ) )
489 continue;
490
491 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_PIN_MAP_STALE_PIN );
492 ercItem->SetItems( source.id );
493 ercItem->SetErrorMessage(
494 wxString::Format( _( "Pin map '%s' references unknown symbol pin '%s'" ), map.GetName(),
495 entry.m_PinNumber ) );
496 screen->Append( new SCH_MARKER( std::move( ercItem ), source.position ) );
497 errors++;
498 }
499 }
500
501 // A single pin stacked across several pads is allowed. Two pins on one pad is not.
502 if( checkDuplicate )
503 {
504 std::map<wxString, wxString> padToPin;
505
506 for( const PIN_MAP_ENTRY& entry : map.GetEntries() )
507 {
508 for( const wxString& pad : ExpandStackedPinNotation( entry.m_PadNumber ) )
509 {
510 auto it = padToPin.find( pad );
511
512 if( it == padToPin.end() )
513 {
514 padToPin[pad] = entry.m_PinNumber;
515 }
516 else if( it->second != entry.m_PinNumber
517 && !sharesJumperGroup( it->second, entry.m_PinNumber ) )
518 {
519 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_PIN_MAP_DUPLICATE_PAD );
520 ercItem->SetItems( source.id );
521 ercItem->SetErrorMessage(
522 wxString::Format( _( "Symbol pins '%s' and '%s' both map to pad '%s'" ),
523 it->second, entry.m_PinNumber, pad ) );
524 screen->Append( new SCH_MARKER( std::move( ercItem ), source.position ) );
525 errors++;
526 }
527 }
528 }
529 }
530 }
531
532 if( checkBadPad && padFetcher )
533 {
534 for( const ASSOCIATED_FOOTPRINT& assoc : source.footprints )
535 {
536 const PIN_MAP* boundMap = maps.FindByName( assoc.m_MapName );
537
538 if( !boundMap )
539 continue;
540
541 const std::set<wxString>& pads = getPads( assoc.m_FootprintLibId.GetUniStringLibId() );
542
543 if( pads.empty() )
544 continue;
545
546 for( const PIN_MAP_ENTRY& entry : boundMap->GetEntries() )
547 {
548 for( const wxString& pad : ExpandStackedPinNotation( entry.m_PadNumber ) )
549 {
550 if( pads.count( pad ) )
551 continue;
552
553 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_PIN_MAP_BAD_PAD );
554 ercItem->SetItems( source.id );
555 ercItem->SetErrorMessage( wxString::Format(
556 _( "Pin map '%s' references pad '%s' not present on footprint '%s'" ),
557 boundMap->GetName(), pad, assoc.m_FootprintLibId.GetUniStringLibId() ) );
558 screen->Append( new SCH_MARKER( std::move( ercItem ), source.position ) );
559 errors++;
560 }
561 }
562 }
563 }
564 }
565 }
566
567 if( m_settings.IsTestEnabled( ERCE_PIN_MAP_UNMAPPED_PIN ) && padFetcher )
568 {
569 auto report = [&]( const SCH_SHEET_PATH& sheet, const KIID& pin, const VECTOR2I& position,
570 const wxString& number, const wxString& footprint )
571 {
573 error->SetItems( pin );
574 error->SetSheetSpecificPath( sheet );
575 error->SetItemsSheetPaths( sheet );
576 error->SetErrorMessage( wxString::Format(
577 _( "Pin '%s' is connected but maps to no pad on footprint '%s'" ), number, footprint ) );
578 sheet.LastScreen()->Append( new SCH_MARKER( std::move( error ), position ) );
579 ++errors;
580 };
581
582 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
583 {
584 ERC_MARKER_PLACER sheets( *m_schematic );
585
586 for( const auto& pin : m_schematic->Connectivity().Engine().UnmappedPinCandidates() )
587 {
588 const SCH_SHEET_PATH* sheet = sheets.Find( pin.sheet );
589
590 if( !sheet )
591 continue;
592
593 LIB_ID footprint;
594 footprint.Parse( pin.footprint, true );
595 const auto& pads = getPads( footprint.GetUniStringLibId() );
596
597 if( !pads.empty() && !SCH_PIN::HasIdentityPad( pin.number, pads ) )
598 report( *sheet, pin.item, pin.position, pin.number, pin.footprint );
599 }
600
601 return errors;
602 }
603
604 const wxString variant = m_schematic ? m_schematic->GetCurrentVariant() : wxString();
605
606 for( SCH_SHEET_PATH& sheet : m_sheetList )
607 {
608 for( SCH_ITEM* item : sheet.LastScreen()->Items().OfType( SCH_SYMBOL_T ) )
609 {
610 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
611 LIB_SYMBOL* lib = symbol->GetLibSymbolRef().get();
612
613 if( !lib || lib->GetEffectiveAssociatedFootprints().empty() )
614 continue;
615
616 wxString fpText = symbol->GetFootprintFieldText( &sheet, RESOLVED );
617 LIB_ID fpId;
618
619 if( fpText.IsEmpty() || fpId.Parse( fpText, true ) >= 0 )
620 continue;
621
622 const std::set<wxString>& pads = getPads( fpId.GetUniStringLibId() );
623
624 if( pads.empty() )
625 continue;
626
627 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
628 {
629 if( pin->IsDangling() )
630 continue;
631
632 SCH_PIN::PAD_RESOLUTION state = SCH_PIN::PAD_RESOLUTION::MAPPED;
633 pin->GetEffectivePadNumber( sheet, variant, fpId, &pads, &state );
634
635 if( state != SCH_PIN::PAD_RESOLUTION::UNMAPPED )
636 continue;
637
638 report( sheet, pin->m_Uuid, pin->GetPosition(), pin->GetNumber(), fpText );
639 }
640 }
641 }
642 }
643
644 return errors;
645}
646
647
649{
651
652 // The leading "(^|[^\\\\])" group requires the marker to start the string or follow a non-backslash,
653 // so `\${ERC_ERROR ...}` stays inert. (The group is just to make it easier for a human to parse.)
654 static wxRegEx varRefRegEx( wxT( "(^|[^\\\\])\\$\\{.*\\}.*" ) );
655
656 auto reportAssertions =
657 []( const KIID& item, const SCH_SHEET_PATH& sheet, SCH_SCREEN* screen,
658 const std::vector<SCH_CONNECTIVITY::TEXT_ASSERTION>& assertions, const VECTOR2I& pos )
659 {
660 for( const auto& assertion : assertions )
661 {
662 auto ercItem = ERC_ITEM::Create( assertion.warning ? ERCE_GENERIC_WARNING : ERCE_GENERIC_ERROR );
663 wxString message = assertion.message;
664
665 if( item != niluuid )
666 {
667 ercItem->SetItems( std::vector<KIID>{ item } );
668 ercItem->SetItemsSheetPaths( sheet );
669 }
670 else
671 {
672 message += _( " (in drawing sheet)" );
673 }
674
675 ercItem->SetSheetSpecificPath( sheet );
676 ercItem->SetErrorMessage( message );
677 screen->Append( new SCH_MARKER( std::move( ercItem ), pos ) );
678 }
679
680 return !assertions.empty();
681 };
682
683 if( aDrawingSheet && !ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
684 {
685 wsItems.SetPageNumber( wxS( "1" ) );
686 wsItems.SetSheetCount( 1 );
687 wsItems.SetFileName( wxS( "dummyFilename" ) );
688 wsItems.SetSheetName( wxS( "dummySheet" ) );
689 wsItems.SetSheetLayer( wxS( "dummyLayer" ) );
690 wsItems.SetProject( &m_schematic->Project() );
691 wsItems.BuildDrawItemsList( aDrawingSheet->GetPageInfo(), aDrawingSheet->GetTitleBlock() );
692 }
693
694 for( const SCH_SHEET_PATH& sheet : m_sheetList )
695 {
696 SCH_SCREEN* screen = sheet.LastScreen();
697
698 const auto sources = ADVANCED_CFG::GetCfg().m_ConnectivityEngine
699 ? m_schematic->Connectivity().TextChecks( sheet.PathRef() )
700 : SCH_CONNECTIVITY::ExtractTextChecks( *screen, sheet );
701
702 for( const auto& source : sources )
703 {
704 if( reportAssertions( source.assertionItem, sheet, screen, source.assertions, source.assertionPosition ) )
705 continue;
706
707 if( !varRefRegEx.Matches( source.shownText ) )
708 continue;
709
710 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_UNRESOLVED_VARIABLE );
711 ercItem->SetItems( std::vector<KIID>{ source.item } );
712 ercItem->SetSheetSpecificPath( sheet );
713 ercItem->SetItemsSheetPaths( sheet );
714 screen->Append( new SCH_MARKER( std::move( ercItem ), source.position ) );
715 }
716
717 if( aDrawingSheet && ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
718 {
719 for( const auto& source : m_schematic->Connectivity().TextChecks( sheet.PathRef(), true ) )
720 {
721 if( reportAssertions( niluuid, sheet, screen, source.assertions, source.assertionPosition ) )
722 continue;
723
724 if( varRefRegEx.Matches( source.shownText ) )
725 {
726 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_UNRESOLVED_VARIABLE );
727 ercItem->SetErrorMessage( _( "Unresolved text variable in drawing sheet" ) );
728 ercItem->SetSheetSpecificPath( sheet );
729 screen->Append( new SCH_MARKER( std::move( ercItem ), source.position ) );
730 }
731 }
732 }
733
734 for( DS_DRAW_ITEM_BASE* item = wsItems.GetFirst(); item; item = wsItems.GetNext() )
735 {
736 if( DS_DRAW_ITEM_TEXT* text = dynamic_cast<DS_DRAW_ITEM_TEXT*>( item ) )
737 {
738 if( reportAssertions( niluuid, sheet, screen,
740 text->GetPosition() ) )
741 {
742 // Don't run unresolved test
743 }
744 else if( varRefRegEx.Matches( text->GetShownText( FOR_ERC_DRC ) ) )
745 {
746 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_UNRESOLVED_VARIABLE );
747 ercItem->SetErrorMessage( _( "Unresolved text variable in drawing sheet" ) );
748 ercItem->SetSheetSpecificPath( sheet );
749
750 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), text->GetPosition() );
751 screen->Append( marker );
752 }
753 }
754 }
755 }
756}
757
758
760{
761 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
762 {
763 return reportSourceErrors( *m_schematic, ERCE_EMPTY_LABEL_NAME,
764 m_schematic->Connectivity().Engine().EmptyLabels() );
765 }
766
767 int errors = 0;
768
769 // No directive labels, they carry no text (the netclass lives in a field)
771
772 for( const SCH_SHEET_PATH& sheet : m_sheetList )
773 {
774 SCH_SCREEN* screen = sheet.LastScreen();
775
776 for( KICAD_T labelType : labelTypes )
777 {
778 for( SCH_ITEM* item : screen->Items().OfType( labelType ) )
779 {
780 SCH_LABEL_BASE* label = static_cast<SCH_LABEL_BASE*>( item );
781
782 wxString text = label->GetText();
783 text.Trim( false ).Trim( true );
784
785 if( text.IsEmpty() )
786 {
787 auto ercItem = ERC_ITEM::Create( ERCE_EMPTY_LABEL_NAME );
788 ercItem->SetItems( label );
789 ercItem->SetItemsSheetPaths( sheet );
790 ercItem->SetSheetSpecificPath( sheet );
791
792 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), label->GetPosition() );
793 screen->Append( marker );
794 errors++;
795 }
796 }
797 }
798 }
799
800 return errors;
801}
802
803
805{
806 int warnings = 0;
807
808 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
809 {
810 const auto errors = m_schematic->Connectivity().Engine().InvalidFieldNames();
811 ERC_MARKER_PLACER markers( *m_schematic );
812
813 for( const auto& error : errors )
814 {
815 markers.Report( ERCE_FIELD_NAME_WHITESPACE, { error.field.owner, error.field.field }, error.sheet,
816 error.field.position, ITEM_PATHS::BOTH,
817 wxString::Format( _( "Field name has leading or trailing whitespace: '%s'" ),
818 error.field.name ) );
819 }
820
821 return markers.Count();
822 }
823
824 for( const SCH_SHEET_PATH& sheet : m_sheetList )
825 {
826 SCH_SCREEN* screen = sheet.LastScreen();
827
828 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
829 {
830 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
831
832 for( SCH_FIELD& field : symbol->GetFields() )
833 {
834 wxString trimmedFieldName = field.GetName();
835 trimmedFieldName.Trim();
836 trimmedFieldName.Trim( false );
837
838 if( field.GetName() != trimmedFieldName )
839 {
841 ercItem->SetItems( symbol, &field );
842 ercItem->SetItemsSheetPaths( sheet, sheet );
843 ercItem->SetSheetSpecificPath( sheet );
844 ercItem->SetErrorMessage(
845 wxString::Format(
846 _( "Field name has leading or trailing whitespace: '%s'" ),
847 field.GetName() ) );
848
849 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), field.GetPosition() );
850 screen->Append( marker );
851 warnings++;
852 }
853 }
854 }
855
856 for( SCH_ITEM* item : screen->Items().OfType( SCH_SHEET_T ) )
857 {
858 SCH_SHEET* subSheet = static_cast<SCH_SHEET*>( item );
859
860 for( SCH_FIELD& field : subSheet->GetFields() )
861 {
862 wxString trimmedFieldName = field.GetName();
863 trimmedFieldName.Trim();
864 trimmedFieldName.Trim( false );
865
866 if( field.GetName() != trimmedFieldName )
867 {
869 ercItem->SetItems( subSheet, &field );
870 ercItem->SetItemsSheetPaths( sheet, sheet );
871 ercItem->SetSheetSpecificPath( sheet );
872 ercItem->SetErrorMessage(
873 wxString::Format(
874 _( "Field name has leading or trailing whitespace: '%s'" ),
875 field.GetName() ) );
876
877 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), field.GetPosition() );
878 screen->Append( marker );
879 warnings++;
880 }
881 }
882 }
883 }
884
885 return warnings;
886}
887
888
889std::vector<SCH_CONNECTIVITY::MULTI_UNIT_GROUP> ERC_TESTER::multiUnitSources() const
890{
891 using namespace SCH_CONNECTIVITY;
892
893 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
894 return m_schematic->Connectivity().Engine().MultiUnitSymbols();
895
896 std::vector<MULTI_UNIT_GROUP> result;
897
898 for( const auto& [reference, refs] : m_refMap )
899 {
900 if( refs.GetCount() == 0 )
901 continue;
902
904 group.reference = reference;
905 group.units = ExtractUnitFacts( *refs.GetItem( 0 ).GetLibPart() );
906
907 for( size_t i = 0; i < refs.GetCount(); ++i )
908 {
909 const SCH_REFERENCE& ref = refs.GetItem( i );
910 const SCH_SYMBOL* symbol = ref.GetSymbol();
911 group.instances.push_back( { ref.GetSheetPath().PathRef(), symbol->m_Uuid,
912 symbol->GetPosition(), symbol->GetRef( &ref.GetSheetPath(), true ),
913 ref.GetFootprint(), ref.GetUnit() } );
914 }
915
916 result.push_back( std::move( group ) );
917 }
918
919 return result;
920}
921
922
924{
925 ERC_MARKER_PLACER markers( *m_schematic );
926
927 for( const auto& group : multiUnitSources() )
928 {
929 const SCH_CONNECTIVITY::MULTI_UNIT_INSTANCE* reference = nullptr;
930
931 for( const auto& unit : group.instances )
932 {
933 if( !unit.footprint.IsEmpty() )
934 {
935 reference = &unit;
936 break;
937 }
938 }
939
940 if( !reference )
941 continue;
942
943 // Equivalent reference witnesses must retain exclusions when pages are reordered
944 for( const auto& unit : group.instances )
945 {
946 if( unit.item == reference->item && unit.footprint == reference->footprint
947 && unit.name == reference->name && unit.sheet < reference->sheet )
948 {
949 reference = &unit;
950 }
951 }
952
953 for( const auto& unit : group.instances )
954 {
955 if( unit.footprint.IsEmpty() || unit.footprint == reference->footprint )
956 continue;
957
959 error->SetErrorMessage( wxString::Format( _( "Different footprints assigned to %s and %s" ),
960 reference->name, unit.name ) );
961 error->SetItems( std::vector<KIID>{ reference->item, unit.item } );
962 markers.Place( std::move( error ), unit.sheet, unit.position, reference->sheet, unit.sheet );
963 }
964 }
965
966 return markers.Count();
967}
968
969
971{
972 ERC_MARKER_PLACER markers( *m_schematic );
973
974 for( const auto& group : multiUnitSources() )
975 {
976 if( group.instances.empty() )
977 continue;
978
979 const auto& base = group.instances.front();
980 std::set<int> placed;
981
982 for( const auto& instance : group.instances )
983 placed.insert( instance.unit );
984
985 std::set<int> missing;
986 std::set<int> power;
987 std::set<int> input;
988 std::set<int> bidirectional;
989
990 for( size_t i = 0; i < group.units.size(); ++i )
991 {
992 const int unit = static_cast<int>( i ) + 1;
993
994 if( placed.contains( unit ) )
995 continue;
996
997 missing.insert( unit );
998
999 if( group.units[i].powerInput )
1000 power.insert( unit );
1001
1002 if( group.units[i].input )
1003 input.insert( unit );
1004
1005 if( group.units[i].bidirectional )
1006 bidirectional.insert( unit );
1007 }
1008
1009 const auto report =
1010 [&]( const std::set<int>& units, const wxString& message, int code )
1011 {
1012 if( units.empty() || !m_settings.IsTestEnabled( code ) )
1013 return;
1014
1015 wxString names = wxS( "[ " );
1016 int count = 0;
1017
1018 for( int unit : units )
1019 {
1020 if( count == 3 )
1021 break;
1022
1023 if( count++ )
1024 names += wxS( ", " );
1025
1026 names += group.units[unit - 1].name;
1027 }
1028
1029 if( units.size() > 3 )
1030 names += wxS( ", ..." );
1031
1032 names += wxS( " ]" );
1033 markers.Report( code, { base.item }, base.sheet, base.position, ITEM_PATHS::MAIN,
1034 wxString::Format( message, group.reference, names ) );
1035 };
1036
1037 report( missing, _( "Symbol %s has unplaced units %s" ),
1039 report( power, _( "Symbol %s has input power pins in units %s that are not placed" ),
1041 report( input, _( "Symbol %s has input pins in units %s that are not placed" ),
1043 report( bidirectional, _( "Symbol %s has bidirectional pins in units %s that are not placed" ),
1045 }
1046
1047 return markers.Count();
1048}
1049
1050
1052{
1053 int err_count = 0;
1054 std::shared_ptr<NET_SETTINGS>& settings = m_schematic->Project().GetProjectFile().NetSettings();
1055 wxString defaultNetclass = settings->GetDefaultNetclass()->GetName();
1056
1057 auto logError =
1058 [&]( const SCH_SHEET_PATH& sheet, const KIID& item, const VECTOR2I& position, const wxString& netclass )
1059 {
1060 err_count++;
1061
1062 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_UNDEFINED_NETCLASS );
1063
1064 ercItem->SetItems( std::vector<KIID>{ item } );
1065 ercItem->SetSheetSpecificPath( sheet );
1066 ercItem->SetItemsSheetPaths( sheet );
1067 ercItem->SetErrorMessage( wxString::Format( _( "Netclass %s is not defined" ), netclass ) );
1068
1069 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), position );
1070 sheet.LastScreen()->Append( marker );
1071 };
1072
1073 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
1074 {
1075 ERC_MARKER_PLACER sheets( *m_schematic );
1076
1077 for( const auto& reference : m_schematic->Connectivity().Engine().NetclassReferences() )
1078 {
1079 if( reference.name == defaultNetclass || settings->HasNetclass( reference.name ) )
1080 continue;
1081
1082 if( const SCH_SHEET_PATH* sheet = sheets.Find( reference.sheet ) )
1083 logError( *sheet, reference.item, reference.position, reference.name );
1084 }
1085
1086 return err_count;
1087 }
1088
1089 for( const SCH_SHEET_PATH& sheet : m_sheetList )
1090 {
1091 for( SCH_ITEM* item : sheet.LastScreen()->Items() )
1092 {
1093 item->RunOnChildren(
1094 [&]( SCH_ITEM* aChild )
1095 {
1096 if( aChild->Type() == SCH_FIELD_T )
1097 {
1098 SCH_FIELD* field = static_cast<SCH_FIELD*>( aChild );
1099
1100 if( field->GetUntranslatedName() == wxT( "Netclass" ) )
1101 {
1102 wxString netclass = field->GetShownText( &sheet, FOR_NETNAME,
1103 m_schematic->GetCurrentVariant() );
1104
1105 if( !netclass.empty()
1106 && !netclass.IsSameAs( defaultNetclass )
1107 && !settings->HasNetclass( netclass ) )
1108 {
1109 logError( sheet, item->m_Uuid, item->GetPosition(), netclass );
1110 }
1111 }
1112 }
1113
1114 return true;
1115 },
1117 }
1118 }
1119
1120 return err_count;
1121}
1122
1123
1125{
1126 int err_count = 0;
1127
1128 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
1129 {
1130 ERC_MARKER_PLACER markers( *m_schematic );
1131
1132 for( const auto& conflict : m_schematic->Connectivity().Engine().LabelWireConflicts() )
1133 {
1134 std::vector<KIID> witnesses{ conflict.label };
1135 witnesses.insert( witnesses.end(), conflict.wires.begin(),
1136 conflict.wires.begin() + std::min<std::ptrdiff_t>( 3, std::ssize( conflict.wires ) ) );
1137 markers.Report( ERCE_LABEL_MULTIPLE_WIRES, witnesses, conflict.sheet, conflict.position, ITEM_PATHS::NONE,
1138 wxString::Format( _( "Label connects more than one wire at %d, %d" ),
1139 conflict.position.x, conflict.position.y ) );
1140 }
1141
1142 return markers.Count();
1143 }
1144
1145 for( const SCH_SHEET_PATH& sheet : m_sheetList )
1146 {
1147 std::map<VECTOR2I, std::vector<SCH_ITEM*>> connMap;
1148
1149 for( SCH_ITEM* item : sheet.LastScreen()->Items().OfType( SCH_LABEL_T ) )
1150 {
1151 SCH_LABEL* label = static_cast<SCH_LABEL*>( item );
1152
1153 for( const VECTOR2I& pt : label->GetConnectionPoints() )
1154 connMap[pt].emplace_back( label );
1155 }
1156
1157 for( const std::pair<const VECTOR2I, std::vector<SCH_ITEM*>>& pair : connMap )
1158 {
1159 std::vector<SCH_ITEM*> lines;
1160
1161 for( SCH_ITEM* item : sheet.LastScreen()->Items().Overlapping( SCH_LINE_T, pair.first ) )
1162 {
1163 SCH_LINE* line = static_cast<SCH_LINE*>( item );
1164
1165 if( line->IsGraphicLine() )
1166 continue;
1167
1168 // If the line is connected at the endpoint, then there will be a junction
1169 if( !line->IsEndPoint( pair.first ) )
1170 lines.emplace_back( line );
1171 }
1172
1173 if( lines.size() > 1 )
1174 {
1175 err_count++;
1176 lines.resize( 3 ); // Only show the first 3 lines and if there are only two, adds a nullptr
1177
1178 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_LABEL_MULTIPLE_WIRES );
1179
1180 ercItem->SetItems( pair.second.front(), lines[0], lines[1], lines[2] );
1181 ercItem->SetErrorMessage( wxString::Format( _( "Label connects more than one wire at %d, %d" ),
1182 pair.first.x, pair.first.y ) );
1183 ercItem->SetSheetSpecificPath( sheet );
1184
1185 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pair.first );
1186 sheet.LastScreen()->Append( marker );
1187 }
1188 }
1189 }
1190
1191 return err_count;
1192}
1193
1194
1196{
1197 int err_count = 0;
1198
1199 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
1200 {
1201 ERC_MARKER_PLACER markers( *m_schematic );
1202
1203 for( const auto& junction : m_schematic->Connectivity().Engine().FourWayJunctions() )
1204 {
1205 markers.Report( ERCE_FOUR_WAY_JUNCTION, { junction.items.begin(), junction.items.begin() + 4 },
1206 junction.sheet, junction.position, ITEM_PATHS::NONE,
1207 wxString::Format( _( "Four items connected at %d, %d" ),
1208 junction.position.x, junction.position.y ) );
1209 }
1210
1211 return markers.Count();
1212 }
1213
1214 auto pinStackAlreadyRepresented =
1215 []( SCH_PIN* pin, std::vector<SCH_ITEM*>& collection ) -> bool
1216 {
1217 for( SCH_ITEM*& item : collection )
1218 {
1219 if( item->Type() == SCH_PIN_T && item->GetParentSymbol() == pin->GetParentSymbol() )
1220 {
1221 if( pin->IsVisible() && !static_cast<SCH_PIN*>( item )->IsVisible() )
1222 item = pin;
1223
1224 return true;
1225 }
1226 }
1227
1228 return false;
1229 };
1230
1231 for( const SCH_SHEET_PATH& sheet : m_sheetList )
1232 {
1233 std::map<VECTOR2I, std::vector<SCH_ITEM*>> connMap;
1234 SCH_SCREEN* screen = sheet.LastScreen();
1235
1236 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
1237 {
1238 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
1239
1240 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
1241 {
1242 std::vector<SCH_ITEM*>& entry = connMap[pin->GetPosition()];
1243
1244 // Only one pin per pin-stack.
1245 if( pinStackAlreadyRepresented( pin, entry ) )
1246 continue;
1247
1248 entry.emplace_back( pin );
1249 }
1250 }
1251
1252 for( SCH_ITEM* item : screen->Items().OfType( SCH_LINE_T ) )
1253 {
1254 SCH_LINE* line = static_cast<SCH_LINE*>( item );
1255
1256 if( line->IsGraphicLine() )
1257 continue;
1258
1259 for( const VECTOR2I& pt : line->GetConnectionPoints() )
1260 connMap[pt].emplace_back( line );
1261 }
1262
1263 for( const std::pair<const VECTOR2I, std::vector<SCH_ITEM*>>& pair : connMap )
1264 {
1265 if( pair.second.size() >= 4 )
1266 {
1267 err_count++;
1268
1269 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_FOUR_WAY_JUNCTION );
1270
1271 ercItem->SetItems( pair.second[0], pair.second[1], pair.second[2], pair.second[3] );
1272
1273 ercItem->SetErrorMessage( wxString::Format( _( "Four items connected at %d, %d" ),
1274 pair.first.x, pair.first.y ) );
1275
1276 ercItem->SetSheetSpecificPath( sheet );
1277
1278 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pair.first );
1279 sheet.LastScreen()->Append( marker );
1280 }
1281 }
1282 }
1283
1284 return err_count;
1285}
1286
1287
1289{
1290 int err_count = 0;
1291
1292 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
1293 {
1294 if( !m_settings.IsTestEnabled( ERCE_NOCONNECT_CONNECTED ) )
1295 return 0;
1296
1297 ERC_MARKER_PLACER markers( *m_schematic );
1298
1299 for( const auto& conflict : m_schematic->Connectivity().Engine().NoConnectPinConflicts() )
1300 {
1301 // Reserve a witness for the actual connection even when many NC pins coincide
1302 const auto witnessPins = std::min<std::ptrdiff_t>( 3, std::ssize( conflict.pins ) );
1303 std::vector<KIID> items( conflict.pins.begin(), conflict.pins.begin() + witnessPins );
1304 const auto witnessOthers = std::min<std::ptrdiff_t>( 4 - witnessPins, std::ssize( conflict.others ) );
1305 items.insert( items.end(), conflict.others.begin(), conflict.others.begin() + witnessOthers );
1306 markers.Report( ERCE_NOCONNECT_CONNECTED, items, conflict.sheet, conflict.position, ITEM_PATHS::NONE,
1307 _( "Pin with 'no connection' type is connected" ) );
1308 }
1309
1310 return markers.Count();
1311 }
1312
1313 for( const SCH_SHEET_PATH& sheet : m_sheetList )
1314 {
1315 std::map<VECTOR2I, std::vector<SCH_ITEM*>> pinMap;
1316
1317 auto addOther =
1318 [&]( const VECTOR2I& pt, SCH_ITEM* aOther )
1319 {
1320 if( pinMap.count( pt ) )
1321 pinMap[pt].emplace_back( aOther );
1322 };
1323
1324 for( SCH_ITEM* item : sheet.LastScreen()->Items().OfType( SCH_SYMBOL_T ) )
1325 {
1326 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
1327
1328 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
1329 {
1330 if( pin->GetType() == ELECTRICAL_PINTYPE::PT_NC )
1331 pinMap[pin->GetPosition()].emplace_back( pin );
1332 }
1333 }
1334
1335 for( SCH_ITEM* item : sheet.LastScreen()->Items() )
1336 {
1337 if( item->Type() == SCH_SYMBOL_T )
1338 {
1339 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
1340
1341 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
1342 {
1343 if( pin->GetType() != ELECTRICAL_PINTYPE::PT_NC )
1344 addOther( pin->GetPosition(), pin );
1345 }
1346 }
1347 else if( item->IsConnectable() && item->Type() != SCH_NO_CONNECT_T )
1348 {
1349 for( const VECTOR2I& pt : item->GetConnectionPoints() )
1350 addOther( pt, item );
1351 }
1352 }
1353
1354 for( const std::pair<const VECTOR2I, std::vector<SCH_ITEM*>>& pair : pinMap )
1355 {
1356 if( pair.second.size() > 1 )
1357 {
1358 bool all_nc = true;
1359
1360 for( SCH_ITEM* item : pair.second )
1361 {
1362 if( item->Type() != SCH_PIN_T )
1363 {
1364 all_nc = false;
1365 break;
1366 }
1367
1368 SCH_PIN* pin = static_cast<SCH_PIN*>( item );
1369
1370 if( pin->GetType() != ELECTRICAL_PINTYPE::PT_NC )
1371 {
1372 all_nc = false;
1373 break;
1374 }
1375 }
1376
1377 if( all_nc )
1378 continue;
1379
1380 err_count++;
1381
1382 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_NOCONNECT_CONNECTED );
1383
1384 ercItem->SetItems( pair.second[0], pair.second[1],
1385 pair.second.size() > 2 ? pair.second[2] : nullptr,
1386 pair.second.size() > 3 ? pair.second[3] : nullptr );
1387 ercItem->SetErrorMessage( _( "Pin with 'no connection' type is connected" ) );
1388 ercItem->SetSheetSpecificPath( sheet );
1389
1390 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pair.first );
1391 sheet.LastScreen()->Append( marker );
1392 }
1393 }
1394 }
1395
1396 return err_count;
1397}
1398
1399
1400namespace
1401{
1402ERCE_T ercErrorCode( PIN_ERROR aPinError )
1403{
1404 return ( aPinError == PIN_ERROR::WARNING ) ? ERCE_PIN_TO_PIN_WARNING
1406}
1407
1408int testCapturedPinToPin( SCHEMATIC& aSchematic, ERC_SETTINGS& aSettings, bool aShowAllErrors )
1409{
1411
1412 std::vector<SCH_CONNECTIVITY::ERC_PIN_NET> nets = aSchematic.Connectivity().Engine().PinNets();
1413 const std::vector<std::unique_ptr<SCH_NETCHAIN>>& chains = aSchematic.NetChains().GetCommittedNetChains();
1414 std::map<wxString, const SCH_CONNECTIVITY::ERC_PIN_NET*> byName;
1415 std::set<wxString> powerDriven;
1416
1417 ERC_MARKER_PLACER markers( aSchematic );
1418
1419 const auto less =
1420 []( const PIN& a, const PIN& b )
1421 {
1422 int order = StrNumCmp( a.reference, b.reference );
1423
1424 if( order == 0 )
1425 order = StrNumCmp( a.pin.number, b.pin.number );
1426
1427 if( order != 0 )
1428 return order < 0;
1429
1430 // Tuple comparison would bypass KIID_PATH's length-first ordering
1431 if( a.sheet != b.sheet )
1432 return a.sheet < b.sheet;
1433
1434 return a.pin.id < b.pin.id;
1435 };
1436
1437 const auto mismatch =
1438 [&]( const PIN& a, const PIN& b )
1439 {
1440 const PIN_ERROR pinError = aSettings.GetPinMapValue( a.pin.type, b.pin.type );
1441
1442 return aSettings.IsTestEnabled( ercErrorCode( pinError ) ) ? pinError : PIN_ERROR::OK;
1443 };
1444
1445 const auto reportPair =
1446 [&]( const PIN& a, const PIN& b, PIN_ERROR pinError, const wxString& chain )
1447 {
1448 std::shared_ptr<ERC_ITEM> item = ERC_ITEM::Create( ercErrorCode( pinError ) );
1449
1450 item->SetItems( std::vector<KIID>{ a.pin.id, b.pin.id } );
1451
1452 if( chain.empty() )
1453 {
1454 item->SetErrorMessage( wxString::Format( _( "Pins of type %s and %s are connected" ),
1455 ElectricalPinTypeGetText( a.pin.type ),
1456 ElectricalPinTypeGetText( b.pin.type ) ) );
1457 }
1458 else
1459 {
1460 item->SetErrorMessage( wxString::Format( _( "Pins of type %s and %s are connected via "
1461 "net chain %s" ),
1462 ElectricalPinTypeGetText( a.pin.type ),
1463 ElectricalPinTypeGetText( b.pin.type ),
1464 chain ) );
1465 }
1466 markers.Place( std::move( item ), a.sheet, a.pin.position, a.sheet, b.sheet );
1467 };
1468
1469 const auto passiveOrNic =
1470 []( ELECTRICAL_PINTYPE type )
1471 {
1473 };
1474
1475 const bool heuristics = aSettings.GetERCSortingMetric() == ERC_PIN_SORTING_METRIC::SM_HEURISTICS;
1476
1477 struct MISMATCH
1478 {
1479 size_t first;
1480 size_t second;
1481 PIN_ERROR error;
1482 };
1483
1484 for( auto& net : nets )
1485 {
1486 std::sort( net.pins.begin(), net.pins.end(), less );
1487 byName.emplace( net.name, &net );
1488
1489 if( net.powerDriven )
1490 powerDriven.insert( net.name );
1491 }
1492
1493 for( const auto& net : nets )
1494 {
1495 const std::vector<PIN>& pins = net.pins;
1496 const bool powerNet = std::ranges::any_of( pins,
1497 []( const PIN& pin )
1498 {
1499 return pin.pin.type == ELECTRICAL_PINTYPE::PT_POWER_IN;
1500 } );
1501 const PIN* preferred = nullptr;
1502 std::vector<const PIN*> needsDriver;
1503 std::vector<const PIN*> nonPowerInputs;
1504 std::vector<const PIN*> powerInputs;
1505 std::vector<MISMATCH> mismatches;
1506 std::map<size_t, int> weights;
1507 bool hasDriver = net.powerDriven;
1508
1509 for( size_t i = 0; i < pins.size(); ++i )
1510 {
1511 const PIN& pin = pins[i];
1512 hasDriver |= powerNet ? DrivingPowerPinTypes.contains( pin.pin.type )
1513 : DrivingPinTypes.contains( pin.pin.type );
1514
1515 if( DrivenPinTypes.contains( pin.pin.type ) )
1516 {
1517 needsDriver.push_back( &pin );
1518
1519 if( !pin.pin.globalPower && !pin.pin.localPower )
1520 nonPowerInputs.push_back( &pin );
1521
1522 if( pin.pin.type == ELECTRICAL_PINTYPE::PT_POWER_IN )
1523 powerInputs.push_back( &pin );
1524
1525 if( !preferred
1526 || ( preferred->pin.invisible && !pin.pin.invisible )
1527 || ( powerNet != ( preferred->pin.type == ELECTRICAL_PINTYPE::PT_POWER_IN )
1528 && powerNet == ( pin.pin.type == ELECTRICAL_PINTYPE::PT_POWER_IN ) ) )
1529 {
1530 preferred = &pin;
1531 }
1532 }
1533
1534 for( size_t j = i + 1; j < pins.size(); ++j )
1535 {
1536 const PIN& other = pins[j];
1537 const bool stacked = pin.sheet == other.sheet
1538 && pin.owner == other.owner
1539 && pin.pin.position == other.pin.position
1540 && pin.pin.name == other.pin.name
1541 && ( pin.pin.type == other.pin.type
1542 || passiveOrNic( pin.pin.type )
1543 || passiveOrNic( other.pin.type ) );
1544
1545 if( stacked )
1546 continue;
1547
1548 const PIN_ERROR error = mismatch( pin, other );
1549
1550 if( error == PIN_ERROR::OK )
1551 continue;
1552
1553 mismatches.push_back( { i, j, error } );
1554
1555 if( heuristics )
1556 {
1557 weights[i] = aSettings.GetPinTypeWeight( pin.pin.type );
1558 weights[j] = aSettings.GetPinTypeWeight( other.pin.type );
1559 }
1560 else
1561 {
1562 ++weights[i];
1563 ++weights[j];
1564 }
1565 }
1566 }
1567
1568 // Each pin reports once against its nearest mismatch so one bad pin does not flood the net
1569 std::vector<std::pair<int, size_t>> worst;
1570
1571 for( const auto& [index, weight] : weights )
1572 worst.emplace_back( weight, index );
1573
1574 std::stable_sort( worst.begin(), worst.end(),
1575 []( const auto& a, const auto& b )
1576 {
1577 return a.first > b.first;
1578 } );
1579
1580 for( const auto& [weight, index] : worst )
1581 {
1582 const PIN& pin = pins[index];
1583 const PIN* nearest = nullptr;
1584 PIN_ERROR error = PIN_ERROR::OK;
1585 std::optional<double> nearestDistance;
1586
1587 std::erase_if( mismatches,
1588 [&]( const MISMATCH& candidate )
1589 {
1590 if( candidate.first != index && candidate.second != index )
1591 return false;
1592
1593 const PIN& other = pins[candidate.first == index ? candidate.second : candidate.first];
1594
1595 // Cross-sheet partners have no distance and stand in only until a same-sheet partner appears
1596 if( other.sheet != pin.sheet )
1597 {
1598 if( !nearestDistance )
1599 {
1600 nearest = &other;
1601 error = candidate.error;
1602 }
1603 }
1604 else if( const double distance = pin.pin.position.Distance( other.pin.position );
1605 !nearestDistance || distance < *nearestDistance )
1606 {
1607 nearestDistance = distance;
1608 nearest = &other;
1609 error = candidate.error;
1610 }
1611
1612 return true;
1613 } );
1614
1615 if( nearest )
1616 reportPair( pin, *nearest, error, wxString() );
1617 }
1618
1619 if( !preferred || hasDriver || net.noConnect )
1620 continue;
1621
1622 bool chainDriver = false;
1623
1624 if( powerNet )
1625 {
1626 for( const auto& chain : chains )
1627 {
1628 if( !chain || !chain->GetNets().contains( net.name ) )
1629 continue;
1630
1631 chainDriver = std::ranges::any_of( chain->GetNets(),
1632 [&]( const wxString& name )
1633 {
1634 return name != net.name && powerDriven.contains( name );
1635 } );
1636 break;
1637 }
1638 }
1639
1640 const ERCE_T code = powerNet ? ERCE_POWERPIN_NOT_DRIVEN : ERCE_PIN_NOT_DRIVEN;
1641
1642 if( chainDriver || !aSettings.IsTestEnabled( code ) )
1643 continue;
1644
1645 if( aShowAllErrors )
1646 {
1647 const auto& selected = powerNet && !powerInputs.empty() ? powerInputs
1648 : !nonPowerInputs.empty() ? nonPowerInputs
1649 : needsDriver;
1650
1651 for( const PIN* pin : selected )
1652 markers.Report( code, { pin->pin.id }, pin->sheet, pin->pin.position, ITEM_PATHS::MAIN );
1653 }
1654 else
1655 {
1656 const PIN& pin = powerNet && !powerInputs.empty() ? *powerInputs.front()
1657 : *preferred;
1658 markers.Report( code, { pin.pin.id }, pin.sheet, pin.pin.position, ITEM_PATHS::MAIN );
1659 }
1660 }
1661
1662 for( const std::unique_ptr<SCH_NETCHAIN>& chain : chains )
1663 {
1664 if( !chain )
1665 continue;
1666
1667 struct CHAIN_PIN
1668 {
1669 const PIN* pin;
1670 const wxString* net;
1671 };
1672 std::vector<CHAIN_PIN> pins;
1673
1674 for( const wxString& name : chain->GetNets() )
1675 {
1676 const auto net = byName.find( name );
1677
1678 if( net == byName.end() )
1679 continue;
1680
1681 for( const PIN& pin : net->second->pins )
1682 pins.push_back( { &pin, &net->first } );
1683 }
1684
1685 std::sort( pins.begin(), pins.end(),
1686 [&]( const CHAIN_PIN& a, const CHAIN_PIN& b )
1687 {
1688 return less( *a.pin, *b.pin );
1689 } );
1690
1691 for( size_t i = 0; i < pins.size(); ++i )
1692 {
1693 for( size_t j = i + 1; j < pins.size(); ++j )
1694 {
1695 if( *pins[i].net == *pins[j].net )
1696 continue;
1697
1698 if( const PIN_ERROR error = mismatch( *pins[i].pin, *pins[j].pin ); error != PIN_ERROR::OK )
1699 reportPair( *pins[i].pin, *pins[j].pin, error, chain->GetName() );
1700 }
1701 }
1702 }
1703
1704 return markers.Count();
1705}
1706}
1707
1708
1710{
1711 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
1712 return testCapturedPinToPin( *m_schematic, m_settings, m_showAllErrors );
1713
1714 int errors = 0;
1715 std::set<wxString> powerDrivenNets;
1716
1717 if( !m_schematic->ConnectionGraph()->GetCommittedNetChains().empty() )
1718 {
1719 for( const auto& [key, subgraphs] : m_nets )
1720 {
1721 for( const CONNECTION_SUBGRAPH* subgraph : subgraphs )
1722 {
1723 for( SCH_ITEM* item : subgraph->GetItems() )
1724 {
1725 if( item->Type() != SCH_PIN_T )
1726 continue;
1727
1728 const SCH_PIN* pin = static_cast<SCH_PIN*>( item );
1729
1730 if( DrivingPowerPinTypes.contains( pin->GetType() ) )
1731 powerDrivenNets.insert( key.Name );
1732 }
1733 }
1734 }
1735 }
1736
1737
1738 // Map each net name to the pins (with sheet context) found on that net so we can later
1739 // perform cross-net compatibility checks for grouped net chains.
1740 std::unordered_map<wxString, std::vector<ERC_SCH_PIN_CONTEXT>> netToPins;
1741
1742 for( const std::pair<NET_NAME_CODE_CACHE_KEY, std::vector<CONNECTION_SUBGRAPH*>> net : m_nets )
1743 {
1744 using iterator_t = std::vector<ERC_SCH_PIN_CONTEXT>::iterator;
1745 std::vector<ERC_SCH_PIN_CONTEXT> pins;
1746 std::unordered_map<EDA_ITEM*, SCH_SCREEN*> pinToScreenMap;
1747 bool has_noconnect = false;
1748
1749 for( CONNECTION_SUBGRAPH* subgraph: net.second )
1750 {
1751 if( subgraph->GetNoConnect() )
1752 has_noconnect = true;
1753
1754 for( SCH_ITEM* item : subgraph->GetItems() )
1755 {
1756 if( item->Type() == SCH_PIN_T )
1757 {
1758 pins.emplace_back( static_cast<SCH_PIN*>( item ), subgraph->GetSheet() );
1759 netToPins[ net.first.Name ].emplace_back( static_cast<SCH_PIN*>( item ), subgraph->GetSheet() );
1760 pinToScreenMap[item] = subgraph->GetSheet().LastScreen();
1761 }
1762 }
1763 }
1764
1765 std::sort( pins.begin(), pins.end(),
1766 []( const ERC_SCH_PIN_CONTEXT& lhs, const ERC_SCH_PIN_CONTEXT& rhs )
1767 {
1768 int ret = StrNumCmp( lhs.Pin()->GetParentSymbol()->GetRef( &lhs.Sheet() ),
1769 rhs.Pin()->GetParentSymbol()->GetRef( &rhs.Sheet() ) );
1770
1771 if( ret == 0 )
1772 ret = StrNumCmp( lhs.Pin()->GetNumber(), rhs.Pin()->GetNumber() );
1773
1774 return ret != 0 ? ret < 0 : lhs < rhs;
1775 } );
1776
1777 ERC_SCH_PIN_CONTEXT needsDriver;
1779 bool hasDriver = false;
1780 std::vector<ERC_SCH_PIN_CONTEXT*> pinsNeedingDrivers;
1781 std::vector<ERC_SCH_PIN_CONTEXT*> nonPowerPinsNeedingDrivers;
1782 std::vector<ERC_SCH_PIN_CONTEXT*> powerInPinsNeedingDrivers;
1783
1784 // We need different drivers for power nets and normal nets.
1785 // A power net has at least one pin having the ELECTRICAL_PINTYPE::PT_POWER_IN
1786 // and power nets can be driven only by ELECTRICAL_PINTYPE::PT_POWER_OUT pins
1787 bool ispowerNet = false;
1788
1789 for( ERC_SCH_PIN_CONTEXT& refPin : pins )
1790 {
1791 if( refPin.Pin()->GetType() == ELECTRICAL_PINTYPE::PT_POWER_IN )
1792 {
1793 ispowerNet = true;
1794 break;
1795 }
1796 }
1797
1798 std::vector<std::tuple<iterator_t, iterator_t, PIN_ERROR>> pin_mismatches;
1799 std::map<iterator_t, int> pin_mismatch_counts;
1800
1801 for( auto refIt = pins.begin(); refIt != pins.end(); ++refIt )
1802 {
1803 ERC_SCH_PIN_CONTEXT& refPin = *refIt;
1804 ELECTRICAL_PINTYPE refType = refPin.Pin()->GetType();
1805
1806 if( DrivenPinTypes.contains( refType ) )
1807 {
1808 // needsDriver will be the pin shown in the error report eventually, so try to
1809 // upgrade to a "better" pin if possible: something visible and only a power symbol
1810 // if this net needs a power driver
1811 pinsNeedingDrivers.push_back( &refPin );
1812
1813 if( !refPin.Pin()->IsPower() )
1814 nonPowerPinsNeedingDrivers.push_back( &refPin );
1815
1816 if( refType == ELECTRICAL_PINTYPE::PT_POWER_IN )
1817 powerInPinsNeedingDrivers.push_back( &refPin );
1818
1819 if( !needsDriver.Pin()
1820 || ( !needsDriver.Pin()->IsVisible() && refPin.Pin()->IsVisible() )
1821 || ( ispowerNet != ( needsDriverType == ELECTRICAL_PINTYPE::PT_POWER_IN )
1822 && ispowerNet == ( refType == ELECTRICAL_PINTYPE::PT_POWER_IN ) ) )
1823 {
1824 needsDriver = refPin;
1825 needsDriverType = needsDriver.Pin()->GetType();
1826 }
1827 }
1828
1829 if( ispowerNet )
1830 hasDriver |= ( DrivingPowerPinTypes.count( refType ) != 0 );
1831 else
1832 hasDriver |= ( DrivingPinTypes.count( refType ) != 0 );
1833
1834 for( auto testIt = refIt + 1; testIt != pins.end(); ++testIt )
1835 {
1836 ERC_SCH_PIN_CONTEXT& testPin = *testIt;
1837
1838 // Multiple pins in the same symbol that share a type,
1839 // name and position are considered
1840 // "stacked" and shouldn't trigger ERC errors
1841 if( refPin.Pin()->IsStacked( testPin.Pin() ) && refPin.Sheet() == testPin.Sheet() )
1842 continue;
1843
1844 ELECTRICAL_PINTYPE testType = testPin.Pin()->GetType();
1845
1846 if( ispowerNet )
1847 hasDriver |= DrivingPowerPinTypes.contains( testType );
1848 else
1849 hasDriver |= DrivingPinTypes.contains( testType );
1850
1851 PIN_ERROR pinError = m_settings.GetPinMapValue( refType, testType );
1852
1853 if( pinError != PIN_ERROR::OK && m_settings.IsTestEnabled( ercErrorCode( pinError ) ) )
1854 {
1855 pin_mismatches.emplace_back( std::tuple<iterator_t, iterator_t,
1856 PIN_ERROR>{ refIt, testIt, pinError } );
1857
1858 if( m_settings.GetERCSortingMetric() == ERC_PIN_SORTING_METRIC::SM_HEURISTICS )
1859 {
1860 pin_mismatch_counts[refIt] = m_settings.GetPinTypeWeight( refIt->Pin()->GetType() );
1861 pin_mismatch_counts[testIt] = m_settings.GetPinTypeWeight( testIt->Pin()->GetType() );
1862 }
1863 else
1864 {
1865 if( !pin_mismatch_counts.contains( testIt ) )
1866 pin_mismatch_counts.emplace( testIt, 1 );
1867 else
1868 pin_mismatch_counts[testIt]++;
1869
1870 if( !pin_mismatch_counts.contains( refIt ) )
1871 pin_mismatch_counts.emplace( refIt, 1 );
1872 else
1873 pin_mismatch_counts[refIt]++;
1874 }
1875 }
1876 }
1877 }
1878
1879 std::multimap<size_t, iterator_t, std::greater<size_t>> pins_dsc;
1880
1881 std::transform( pin_mismatch_counts.begin(), pin_mismatch_counts.end(),
1882 std::inserter( pins_dsc, pins_dsc.begin() ),
1883 []( const auto& p )
1884 {
1885 return std::pair<size_t, iterator_t>( p.second, p.first );
1886 } );
1887
1888 for( const auto& [amount, pinItBind] : pins_dsc )
1889 {
1890 auto& pinIt = pinItBind;
1891
1892 if( pin_mismatches.empty() )
1893 break;
1894
1895 SCH_PIN* pin = pinIt->Pin();
1896 VECTOR2I position = pin->GetPosition();
1897
1898 iterator_t nearest_pin = pins.end();
1899 double smallest_distance = std::numeric_limits<double>::infinity();
1900 PIN_ERROR pinError;
1901
1902 std::erase_if(
1903 pin_mismatches,
1904 [&]( const auto& tuple )
1905 {
1906 iterator_t other;
1907
1908 if( pinIt == std::get<0>( tuple ) )
1909 other = std::get<1>( tuple );
1910 else if( pinIt == std::get<1>( tuple ) )
1911 other = std::get<0>( tuple );
1912 else
1913 return false;
1914
1915 if( ( *pinIt ).Sheet().Cmp( ( *other ).Sheet() ) != 0 )
1916 {
1917 if( std::isinf( smallest_distance ) )
1918 {
1919 nearest_pin = other;
1920 pinError = std::get<2>( tuple );
1921 }
1922 }
1923 else
1924 {
1925 double distance = position.Distance( ( *other ).Pin()->GetPosition() );
1926
1927 if( std::isinf( smallest_distance ) || distance < smallest_distance )
1928 {
1929 smallest_distance = distance;
1930 nearest_pin = other;
1931 pinError = std::get<2>( tuple );
1932 }
1933 }
1934
1935 return true;
1936 } );
1937
1938 if( nearest_pin != pins.end() )
1939 {
1940 SCH_PIN* other_pin = nearest_pin->Pin();
1941 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ercErrorCode( pinError ) );
1942
1943 ercItem->SetItems( pin, other_pin );
1944 ercItem->SetSheetSpecificPath( pinIt->Sheet() );
1945 ercItem->SetItemsSheetPaths( pinIt->Sheet(), nearest_pin->Sheet() );
1946
1947 ercItem->SetErrorMessage( wxString::Format( _( "Pins of type %s and %s are connected" ),
1948 ElectricalPinTypeGetText( pin->GetType() ),
1949 ElectricalPinTypeGetText( other_pin->GetType() ) ) );
1950
1951 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pin->GetPosition() );
1952 pinToScreenMap[pin]->Append( marker );
1953 errors++;
1954 }
1955 }
1956
1957 if( needsDriver.Pin() && !hasDriver && !has_noconnect )
1958 {
1959 int err_code = ispowerNet ? ERCE_POWERPIN_NOT_DRIVEN : ERCE_PIN_NOT_DRIVEN;
1960
1961 // NEW: For power nets, before reporting a not-driven error, look across the
1962 // net chain (multi-net chain formed via passives) to see if there is a
1963 // power driver pin on any other net in the same chain. If so, suppress the
1964 // error because the net chain as a whole is driven.
1965 bool suppressForNetChainDriver = false;
1966
1967 if( ispowerNet && m_schematic && m_schematic->ConnectionGraph() )
1968 {
1969 const wxString& thisNetName = net.first.Name;
1970 const auto& netChains = m_schematic->ConnectionGraph()->GetCommittedNetChains();
1971
1972 for( const auto& sig : netChains )
1973 {
1974 if( !sig )
1975 continue;
1976
1977 const auto& sigNets = sig->GetNets();
1978 bool containsThisNet = std::find( sigNets.begin(), sigNets.end(), thisNetName ) != sigNets.end();
1979
1980 if( !containsThisNet )
1981 continue;
1982
1983 // Look for a different net in this chain that has a power driver.
1984 for( const wxString& otherNet : sigNets )
1985 {
1986 if( otherNet == thisNetName )
1987 continue; // skip same net (we already know it lacks a driver)
1988
1989 if( powerDrivenNets.contains( otherNet ) )
1990 {
1991 suppressForNetChainDriver = true;
1992 break;
1993 }
1994 }
1995
1996 break; // examined the containing chain
1997 }
1998 }
1999
2000 if( !suppressForNetChainDriver && m_settings.IsTestEnabled( err_code ) )
2001 {
2002 std::vector<ERC_SCH_PIN_CONTEXT*> pinsToMark;
2003
2004 // The marker should land on a pin matching the error message: for an
2005 // ERCE_POWERPIN_NOT_DRIVEN error mark a PT_POWER_IN pin (which is what the
2006 // error refers to), for ERCE_PIN_NOT_DRIVEN prefer a pin that is not on a
2007 // power symbol so the marker is anchored to the consuming pin rather than
2008 // a power flag.
2009 if( m_showAllErrors )
2010 {
2011 if( ispowerNet && !powerInPinsNeedingDrivers.empty() )
2012 pinsToMark = powerInPinsNeedingDrivers;
2013 else if( !nonPowerPinsNeedingDrivers.empty() )
2014 pinsToMark = nonPowerPinsNeedingDrivers;
2015 else
2016 pinsToMark = pinsNeedingDrivers;
2017 }
2018 else
2019 {
2020 if( ispowerNet && !powerInPinsNeedingDrivers.empty() )
2021 pinsToMark.push_back( powerInPinsNeedingDrivers.front() );
2022 else
2023 pinsToMark.push_back( &needsDriver );
2024 }
2025
2026 for( ERC_SCH_PIN_CONTEXT* pinCtx : pinsToMark )
2027 {
2028 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( err_code );
2029
2030 ercItem->SetItems( pinCtx->Pin() );
2031 ercItem->SetSheetSpecificPath( pinCtx->Sheet() );
2032 ercItem->SetItemsSheetPaths( pinCtx->Sheet() );
2033
2034 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pinCtx->Pin()->GetPosition() );
2035 pinToScreenMap[pinCtx->Pin()]->Append( marker );
2036 errors++;
2037 }
2038 }
2039 }
2040 }
2041
2042 // --- Additional net-chain-level checking ---
2043 // If a pin participates in a grouped net chain (spanning multiple nets via passives), ensure
2044 // that all other pins reachable through that chain are electrically compatible even if
2045 // they reside on different nets.
2046 // We only consider pairs on DIFFERENT nets here to avoid duplicating existing net-level
2047 // mismatches already reported above.
2048 if( m_schematic && m_schematic->ConnectionGraph() )
2049 {
2050 auto& netChains = m_schematic->ConnectionGraph()->GetCommittedNetChains();
2051 wxLogTrace( traceSchNetChain, "ERC TestPinToPin: cross-chain phase start chains=%zu",
2052 netChains.size() );
2053
2054 for( const auto& sig : netChains )
2055 {
2056 if( !sig )
2057 continue;
2058
2059 const wxString chainName = sig->GetName();
2060 const auto& sigNets = sig->GetNets();
2061
2062 // Collect all pin contexts across the nets in this chain.
2063 struct CHAIN_PIN
2064 {
2065 ERC_SCH_PIN_CONTEXT context;
2066 const wxString* net;
2067 };
2068 std::vector<CHAIN_PIN> netChainPins;
2069 netChainPins.reserve( sigNets.size() * 4 );
2070
2071 for( const wxString& n : sigNets )
2072 {
2073 auto it = netToPins.find( n );
2074 if( it != netToPins.end() )
2075 {
2076 for( const ERC_SCH_PIN_CONTEXT& context : it->second )
2077 netChainPins.push_back( { context, &it->first } );
2078 }
2079 }
2080
2081 if( netChainPins.size() < 2 )
2082 continue; // nothing to compare
2083
2084 wxLogTrace( traceSchNetChain,
2085 "ERC TestPinToPin: chain '%s' nets=%zu collectedPins=%zu",
2086 TO_UTF8( chainName ), sigNets.size(), netChainPins.size() );
2087
2088 // For deterministic behavior, sort by reference/pin number similar to earlier pass.
2089 std::sort( netChainPins.begin(), netChainPins.end(),
2090 []( const CHAIN_PIN& left, const CHAIN_PIN& right )
2091 {
2092 const auto& lhs = left.context;
2093 const auto& rhs = right.context;
2094 int ret = StrNumCmp( lhs.Pin()->GetParentSymbol()->GetRef( &lhs.Sheet() ),
2095 rhs.Pin()->GetParentSymbol()->GetRef( &rhs.Sheet() ) );
2096 if( ret == 0 )
2097 ret = StrNumCmp( lhs.Pin()->GetNumber(), rhs.Pin()->GetNumber() );
2098 return ret != 0 ? ret < 0 : lhs < rhs;
2099 } );
2100
2101 for( size_t i = 0; i < netChainPins.size(); ++i )
2102 {
2103 const auto& aContext = netChainPins[i].context;
2104 SCH_PIN* aPin = aContext.Pin();
2105 ELECTRICAL_PINTYPE aType = aPin->GetType();
2106 const wxString& aNet = *netChainPins[i].net;
2107
2108 for( size_t j = i + 1; j < netChainPins.size(); ++j )
2109 {
2110 const auto& bContext = netChainPins[j].context;
2111 SCH_PIN* bPin = bContext.Pin();
2112 const wxString& bNet = *netChainPins[j].net;
2113
2114 if( aNet == bNet )
2115 continue; // already handled at net-level
2116
2117 ELECTRICAL_PINTYPE bType = bPin->GetType();
2118 PIN_ERROR pinError = m_settings.GetPinMapValue( aType, bType );
2119
2120 if( pinError != PIN_ERROR::OK && m_settings.IsTestEnabled( ercErrorCode( pinError ) ) )
2121 {
2122 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ercErrorCode( pinError ) );
2123
2124 ercItem->SetItems( aPin, bPin );
2125 ercItem->SetSheetSpecificPath( aContext.Sheet() );
2126 ercItem->SetItemsSheetPaths( aContext.Sheet(), bContext.Sheet() );
2127 ercItem->SetErrorMessage( wxString::Format( _( "Pins of type %s and %s are connected via "
2128 "net chain %s" ),
2129 ElectricalPinTypeGetText( aType ),
2130 ElectricalPinTypeGetText( bType ), chainName ) );
2131
2132 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), aPin->GetPosition() );
2133 aContext.Sheet().LastScreen()->Append( marker );
2134 errors++;
2135 }
2136 }
2137 }
2138 }
2139 }
2140
2141 return errors;
2142}
2143
2144
2146{
2147 int errors = 0;
2148
2149 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
2150 {
2151 ERC_MARKER_PLACER markers( *m_schematic );
2152
2153 for( const auto& conflict : m_schematic->Connectivity().Engine().MultiUnitPinConflicts() )
2154 {
2155 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_DIFFERENT_UNIT_NET );
2156 ercItem->SetErrorMessage( wxString::Format( _( "Pin %s is connected to both %s and %s" ),
2157 conflict.number,
2158 conflict.otherNet,
2159 conflict.firstNet ) );
2160 ercItem->SetItems( std::vector<KIID>{ conflict.other.item, conflict.first.item } );
2161 markers.Place( std::move( ercItem ), conflict.other.sheet, conflict.other.position, conflict.other.sheet,
2162 conflict.first.sheet );
2163 }
2164
2165 return markers.Count();
2166 }
2167
2168 struct PIN_ON_NET
2169 {
2170 wxString m_netName;
2171 SCH_PIN* m_pin;
2172 SCH_SHEET_PATH m_sheet;
2173 };
2174
2175 std::unordered_map<wxString, std::vector<PIN_ON_NET>> pinToNetMap;
2176
2177 for( const std::pair<NET_NAME_CODE_CACHE_KEY, std::vector<CONNECTION_SUBGRAPH*>> net : m_nets )
2178 {
2179 const wxString& netName = net.first.Name;
2180
2181 for( CONNECTION_SUBGRAPH* subgraph : net.second )
2182 {
2183 for( SCH_ITEM* item : subgraph->GetItems() )
2184 {
2185 if( item->Type() == SCH_PIN_T )
2186 {
2187 SCH_PIN* pin = static_cast<SCH_PIN*>( item );
2188 const SCH_SHEET_PATH& sheet = subgraph->GetSheet();
2189
2190 if( !pin->GetParentSymbol()->IsMultiUnit() )
2191 continue;
2192
2193 wxString name = pin->GetParentSymbol()->GetRef( &sheet ) + ":" + pin->GetShownNumber();
2194
2195 pinToNetMap[name].push_back( { netName, pin, sheet } );
2196 }
2197 }
2198 }
2199 }
2200
2201 // Pick the reference net/pin deterministically, so the same conflict yields the same marker on every ERC run.
2202 std::vector<wxString> conflicted;
2203
2204 for( const auto& [name, pins] : pinToNetMap )
2205 {
2206 for( const PIN_ON_NET& candidate : pins )
2207 {
2208 if( candidate.m_netName != pins.front().m_netName )
2209 {
2210 conflicted.push_back( name );
2211 break;
2212 }
2213 }
2214 }
2215
2216 std::sort( conflicted.begin(), conflicted.end() );
2217
2218 for( const wxString& name : conflicted )
2219 {
2220 std::vector<PIN_ON_NET> pins = pinToNetMap[name];
2221
2222 std::sort( pins.begin(), pins.end(),
2223 []( const PIN_ON_NET& a, const PIN_ON_NET& b )
2224 {
2225 if( a.m_netName != b.m_netName )
2226 return a.m_netName < b.m_netName;
2227
2228 return a.m_pin->m_Uuid < b.m_pin->m_Uuid;
2229 } );
2230
2231 const PIN_ON_NET& first = pins.front();
2232
2233 for( const PIN_ON_NET& other : pins )
2234 {
2235 if( other.m_netName == first.m_netName )
2236 continue;
2237
2238 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_DIFFERENT_UNIT_NET );
2239
2240 ercItem->SetErrorMessage( wxString::Format( _( "Pin %s is connected to both %s and %s" ),
2241 other.m_pin->GetShownNumber(),
2242 other.m_netName,
2243 first.m_netName ) );
2244
2245 ercItem->SetItems( other.m_pin, first.m_pin );
2246 ercItem->SetSheetSpecificPath( other.m_sheet );
2247 ercItem->SetItemsSheetPaths( other.m_sheet, first.m_sheet );
2248
2249 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), other.m_pin->GetPosition() );
2250 other.m_sheet.LastScreen()->Append( marker );
2251 errors += 1;
2252 break;
2253 }
2254 }
2255
2256 return errors;
2257}
2258
2259
2261{
2262 const ERC_SETTINGS& settings = aSchematic.ErcSettings();
2263 const auto& connectivity = aSchematic.Connectivity().Engine();
2264 ERC_MARKER_PLACER markers( aSchematic );
2265
2267 {
2268 for( const SCH_CONNECTIVITY::SOURCE_LOCATION& pin : connectivity.WiredImplicitPowerPins() )
2269 {
2270 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_WIRED_IMPLICIT_POWER );
2271 ercItem->SetItems( pin.item );
2272 markers.Place( std::move( ercItem ), pin.sheet, pin.position, ITEM_PATHS::MAIN );
2273 }
2274 }
2275
2276 if( settings.IsTestEnabled( ERCE_DRIVER_CONFLICT ) )
2277 {
2278 for( const SCH_CONNECTIVITY::DRIVER_CONFLICT& conflict : connectivity.DriverConflicts() )
2279 {
2280 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_DRIVER_CONFLICT );
2281 ercItem->SetItems( conflict.first, conflict.second );
2282 ercItem->SetErrorMessage( wxString::Format( _( "Both %s and %s are attached to the same items; "
2283 "%s will be used in the netlist" ),
2284 conflict.firstName,
2285 conflict.secondName,
2286 conflict.firstName ) );
2287 markers.Place( std::move( ercItem ), conflict.sheet, conflict.position, ITEM_PATHS::BOTH );
2288 }
2289 }
2290
2292 {
2293 for( const SCH_CONNECTIVITY::WIRE_ENDPOINT& endpoint : connectivity.DanglingWireEndpoints() )
2294 {
2295 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_UNCONNECTED_WIRE_ENDPOINT );
2296 ercItem->SetItems( endpoint.item );
2297 ercItem->SetErrorMessage( endpoint.busEntry ? _( "Unconnected wire to bus entry" )
2298 : _( "Unconnected wire endpoint" ) );
2299 markers.Place( std::move( ercItem ), endpoint.sheet, endpoint.position );
2300 }
2301 }
2302
2303 if( settings.IsTestEnabled( ERCE_BUS_TO_NET_CONFLICT ) )
2304 {
2305 for( const SCH_CONNECTIVITY::BUS_NET_CONFLICT& conflict : connectivity.BusNetConflicts() )
2306 {
2307 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_BUS_TO_NET_CONFLICT );
2308 ercItem->SetItems( conflict.net, conflict.bus );
2309 markers.Place( std::move( ercItem ), conflict.sheet, conflict.position );
2310 }
2311 }
2312
2313 if( settings.IsTestEnabled( ERCE_BUS_TO_BUS_CONFLICT ) )
2314 {
2315 for( const SCH_CONNECTIVITY::BUS_BUS_CONFLICT& conflict : connectivity.BusBusConflicts() )
2316 {
2317 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_BUS_TO_BUS_CONFLICT );
2318 ercItem->SetItems( conflict.canonical, conflict.other );
2319
2320 if( conflict.mixedShapes )
2321 ercItem->SetErrorMessage( _( "Bus vector and bus group are graphically connected" ) );
2322
2323 markers.Place( std::move( ercItem ), conflict.sheet, conflict.position );
2324 }
2325 }
2326
2327 if( settings.IsTestEnabled( ERCE_BUS_ENTRY_CONFLICT ) )
2328 {
2329 for( const SCH_CONNECTIVITY::BUS_ENTRY_CONFLICT& conflict : connectivity.BusEntryConflicts() )
2330 {
2331 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_BUS_ENTRY_CONFLICT );
2332 ercItem->SetItems( conflict.entry, conflict.bus );
2333 ercItem->SetErrorMessage( wxString::Format( _( "Net %s is graphically connected to bus %s but is not a"
2334 " member of that bus" ),
2335 UnescapeString( conflict.netName ),
2336 UnescapeString( conflict.busName ) ) );
2337 markers.Place( std::move( ercItem ), conflict.sheet, conflict.position );
2338 }
2339 }
2340
2342 {
2343 for( const SCH_CONNECTIVITY::NO_CONNECT_FLAG_ERROR& diagnostic : connectivity.NoConnectFlagErrors() )
2344 {
2345 const int code = diagnostic.connected ? ERCE_NOCONNECT_CONNECTED : ERCE_NOCONNECT_NOT_CONNECTED;
2346
2347 if( !settings.IsTestEnabled( code ) )
2348 continue;
2349
2350 markers.Report( code,
2351 diagnostic.pin == niluuid ? RC_ITEM::KIIDS{ diagnostic.flag }
2352 : RC_ITEM::KIIDS{ diagnostic.pin, diagnostic.flag },
2353 diagnostic.sheet, diagnostic.position, ITEM_PATHS::MAIN );
2354 }
2355 }
2356
2357 if( settings.IsTestEnabled( ERCE_PIN_NOT_CONNECTED ) )
2358 {
2359 for( const SCH_CONNECTIVITY::UNCONNECTED_PIN& pin : connectivity.UnconnectedPins() )
2360 markers.Report( ERCE_PIN_NOT_CONNECTED, { pin.item }, pin.sheet, pin.position, ITEM_PATHS::MAIN );
2361 }
2362
2364 {
2365 using ERROR_KIND = SCH_CONNECTIVITY::HIERARCHY_ERROR::KIND;
2366
2367 for( const SCH_CONNECTIVITY::HIERARCHY_ERROR& error : connectivity.HierarchyErrors() )
2368 {
2369 const bool mismatch = error.kind == ERROR_KIND::MISSING_LABEL || error.kind == ERROR_KIND::MISSING_PIN;
2370 const int code = mismatch ? ERCE_HIERACHICAL_LABEL : ERCE_PIN_NOT_CONNECTED;
2371
2372 if( !settings.IsTestEnabled( code ) )
2373 continue;
2374
2375 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( code );
2376 ercItem->SetItems( std::vector<KIID>{ error.item } );
2377 const wxString name = UnescapeString( error.name );
2378
2379 switch( error.kind )
2380 {
2381 case ERROR_KIND::ROOT_LABEL:
2382 ercItem->SetErrorMessage( wxString::Format( _( "Hierarchical label '%s' in root sheet cannot be "
2383 "connected to non-existent parent sheet" ),
2384 name ) );
2385 break;
2386
2387 case ERROR_KIND::MISSING_LABEL:
2388 ercItem->SetErrorMessage( wxString::Format( _( "Sheet pin %s has no matching hierarchical label "
2389 "inside the sheet" ),
2390 name ) );
2391 break;
2392
2393 case ERROR_KIND::MISSING_PIN:
2394 ercItem->SetErrorMessage( wxString::Format( _( "Hierarchical label %s has no matching sheet pin "
2395 "in the parent sheet" ),
2396 name ) );
2397 break;
2398
2399 case ERROR_KIND::DANGLING_PIN:
2400 break;
2401 }
2402
2403 // Root label markers are not sheet specific, and saved exclusions keep that shape
2404 const bool rootLabel = error.kind == ERROR_KIND::ROOT_LABEL;
2405 markers.Place( std::move( ercItem ), error.sheet, error.position,
2406 rootLabel ? ITEM_PATHS::NONE : ITEM_PATHS::MAIN, !rootLabel );
2407 }
2408 }
2409
2411 {
2412 for( const SCH_CONNECTIVITY::LABEL_CONNECTION_ERROR& label : connectivity.LabelConnectionErrors() )
2413 {
2414 const int code = label.singlePin ? ERCE_LABEL_SINGLE_PIN : ERCE_LABEL_NOT_CONNECTED;
2415
2416 if( settings.IsTestEnabled( code ) )
2417 markers.Report( code, { label.item }, label.sheet, label.position );
2418 }
2419 }
2420
2421 if( settings.IsTestEnabled( ERCE_LABEL_NOT_CONNECTED ) )
2422 {
2423 for( const SCH_CONNECTIVITY::LABEL_LOCATION& label : connectivity.DanglingDirectives() )
2424 markers.Report( ERCE_LABEL_NOT_CONNECTED, { label.item }, label.sheet, label.position );
2425 }
2426
2427 if( settings.IsTestEnabled( ERCE_SINGLE_GLOBAL_LABEL ) )
2428 {
2429 for( const SCH_CONNECTIVITY::LABEL_LOCATION& label : connectivity.SingleGlobalLabels() )
2430 {
2431 markers.Report( ERCE_SINGLE_GLOBAL_LABEL, { label.item }, label.sheet, label.position,
2432 ITEM_PATHS::MAIN );
2433 }
2434 }
2435
2436 if( settings.IsTestEnabled( ERCE_WIRE_DANGLING ) )
2437 {
2438 for( const SCH_CONNECTIVITY::FLOATING_WIRE& group : connectivity.FloatingWires() )
2439 markers.Report( ERCE_WIRE_DANGLING, group.items, group.sheet, group.position );
2440 }
2441
2442 return markers.Count();
2443}
2444
2445
2447{
2448 const bool engine = ADVANCED_CFG::GetCfg().m_ConnectivityEngine;
2449 int errors = 0;
2450
2451 for( const SCH_SHEET_PATH& sheet : m_sheetList )
2452 {
2453 SCH_SCREEN* screen = sheet.LastScreen();
2454
2455 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
2456 {
2457 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
2458 LIB_SYMBOL* libSymbol = symbol->GetLibSymbolRef().get();
2459
2460 if( !libSymbol )
2461 continue;
2462
2463 if( libSymbol->GetDuplicatePinNumbersAreJumpers() )
2464 continue;
2465
2466 std::vector<SCH_PIN*> pins = symbol->GetPins( &sheet );
2467
2468 std::map<wxString, std::vector<std::pair<SCH_PIN*, wxString>>> pinsByNumber;
2469
2470 for( SCH_PIN* pin : pins )
2471 {
2472 wxString netName;
2473
2474 if( engine )
2475 netName = pin->GetConnectionName( &sheet ).value_or( wxString() );
2476 else if( SCH_CONNECTION* conn = pin->Connection( &sheet ) )
2477 netName = conn->GetNetName();
2478
2479 pinsByNumber[pin->GetNumber()].emplace_back( pin, netName );
2480 }
2481
2482 for( const auto& [pinNumber, pinNetPairs] : pinsByNumber )
2483 {
2484 if( pinNetPairs.size() < 2 )
2485 continue;
2486
2487 wxString firstNet = pinNetPairs[0].second;
2488 bool hasDifferentNets = false;
2489 SCH_PIN* conflictPin = nullptr;
2490
2491 for( size_t i = 1; i < pinNetPairs.size(); i++ )
2492 {
2493 if( pinNetPairs[i].second != firstNet )
2494 {
2495 hasDifferentNets = true;
2496 conflictPin = pinNetPairs[i].first;
2497 break;
2498 }
2499 }
2500
2501 if( hasDifferentNets )
2502 {
2503 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_DUPLICATE_PIN_ERROR );
2504 wxString msg;
2505
2506 msg.Printf( _( "Pin %s on symbol '%s' is connected to different nets: %s and %s" ),
2507 pinNumber,
2508 symbol->GetRef( &sheet ),
2509 firstNet.IsEmpty() ? _( "<no net>" ) : firstNet,
2510 pinNetPairs[1].second.IsEmpty() ? _( "<no net>" ) : pinNetPairs[1].second );
2511
2512 ercItem->SetErrorMessage( msg );
2513 ercItem->SetItems( pinNetPairs[0].first, conflictPin );
2514 ercItem->SetSheetSpecificPath( sheet );
2515 ercItem->SetItemsSheetPaths( sheet, sheet );
2516
2517 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pinNetPairs[0].first->GetPosition() );
2518 screen->Append( marker );
2519 errors++;
2520 }
2521 }
2522 }
2523 }
2524
2525 return errors;
2526}
2527
2528
2530{
2531 int errors = 0;
2532
2533 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
2534 {
2535 ERC_MARKER_PLACER markers( *m_schematic );
2536
2537 for( const auto& mismatch : m_schematic->Connectivity().Engine().GroundPinErrors() )
2538 {
2539 markers.Report( ERCE_GROUND_PIN_NOT_GROUND, { mismatch.pin }, mismatch.sheet, mismatch.position,
2540 ITEM_PATHS::MAIN,
2541 wxString::Format( _( "Pin %s not connected to ground net" ), mismatch.name ) );
2542 }
2543
2544 return markers.Count();
2545 }
2546
2547 auto isGround =
2548 []( const wxString& txt )
2549 {
2550 wxString upper = txt.Upper();
2551
2552 return upper.Contains( wxT( "GND" ) )
2553 || upper == wxT( "EARTH" )
2554 || upper.StartsWith( wxT( "EARTH_" ) )
2555 || upper == wxT( "VSS" )
2556 || upper == wxT( "VSSA" );
2557 };
2558
2559 for( const SCH_SHEET_PATH& sheet : m_sheetList )
2560 {
2561 SCH_SCREEN* screen = sheet.LastScreen();
2562
2563 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
2564 {
2565 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
2566 bool hasGroundNet = false;
2567 std::vector<SCH_PIN*> mismatched;
2568
2569 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
2570 {
2571 // We are only interested in power pins
2572 if( pin->GetType() != ELECTRICAL_PINTYPE::PT_POWER_OUT
2573 && pin->GetType() != ELECTRICAL_PINTYPE::PT_POWER_IN )
2574 {
2575 continue;
2576 }
2577
2578 const SCH_CONNECTION* conn = pin->Connection( &sheet );
2579 const wxString net = conn ? conn->Name( true ) : wxString();
2580 const bool netIsGround = isGround( net );
2581
2582 if( netIsGround )
2583 hasGroundNet = true;
2584
2585 if( isGround( pin->GetShownName() ) && !netIsGround )
2586 mismatched.push_back( pin );
2587 }
2588
2589 if( hasGroundNet )
2590 {
2591 for( SCH_PIN* pin : mismatched )
2592 {
2593 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_GROUND_PIN_NOT_GROUND );
2594
2595 ercItem->SetErrorMessage( wxString::Format( _( "Pin %s not connected to ground net" ),
2596 pin->GetShownName() ) );
2597 ercItem->SetItems( pin );
2598 ercItem->SetSheetSpecificPath( sheet );
2599 ercItem->SetItemsSheetPaths( sheet );
2600
2601 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pin->GetPosition() );
2602 screen->Append( marker );
2603 errors++;
2604 }
2605 }
2606 }
2607 }
2608
2609 return errors;
2610}
2611
2612
2614{
2615 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
2616 {
2617 return reportSourceErrors( *m_schematic, ERCE_STACKED_PIN_SYNTAX,
2618 m_schematic->Connectivity().Engine().InvalidPinNotation() );
2619 }
2620
2621 int warnings = 0;
2622
2623 for( const SCH_SHEET_PATH& sheet : m_sheetList )
2624 {
2625 SCH_SCREEN* screen = sheet.LastScreen();
2626
2627 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
2628 {
2629 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
2630
2631 for( SCH_PIN* pin : symbol->GetPins( &sheet ) )
2632 {
2633 bool valid;
2634 pin->GetStackedPinNumbers( &valid );
2635
2636 if( !valid )
2637 {
2638 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_STACKED_PIN_SYNTAX );
2639 ercItem->SetItems( pin );
2640 ercItem->SetSheetSpecificPath( sheet );
2641 ercItem->SetItemsSheetPaths( sheet );
2642
2643 SCH_MARKER* marker = new SCH_MARKER( std::move( ercItem ), pin->GetPosition() );
2644 screen->Append( marker );
2645 warnings++;
2646 }
2647 }
2648 }
2649 }
2650
2651 return warnings;
2652}
2653
2654
2656{
2658 std::map<wxString, NAMED_ITEM> globalLabels;
2659 std::map<wxString, NAMED_ITEM> localLabels;
2660
2661 for( const NAMED_ITEM& item : collectNamedItems( *m_schematic, false ) )
2662 {
2663 if( item.type == SCH_HIER_LABEL_T )
2664 continue;
2665
2666 auto& labels = item.global ? globalLabels : localLabels;
2667 auto found = labels.find( item.name );
2668
2669 // For one item, direct KIID_PATH comparison selects its shallowest instance
2670 if( found == labels.end()
2671 || item.item < found->second.item
2672 || ( item.item == found->second.item && item.sheet < found->second.sheet ) )
2673 {
2674 labels[item.name] = item;
2675 }
2676 }
2677
2678 ERC_MARKER_PLACER markers( *m_schematic );
2679
2680 for( const auto& [name, global] : globalLabels )
2681 {
2682 const auto local = localLabels.find( name );
2683
2684 if( local == localLabels.end() )
2685 continue;
2686
2687 const ERCE_T code = global.type == SCH_PIN_T && local->second.type == SCH_PIN_T ? ERCE_SAME_LOCAL_GLOBAL_POWER
2689 reportNameConflict( markers, m_settings, code, global, local->second );
2690 }
2691
2692 return markers.Count();
2693}
2694
2695
2697{
2699 std::map<wxString, std::vector<NAMED_ITEM>> generalMap;
2700
2701 auto normalizeLabel =
2702 []( const wxString& aLabel )
2703 {
2704 wxString stripped = aLabel.Strip( wxString::leading ).Strip( wxString::trailing );
2705 wxString prefix;
2706 wxString value;
2707 wxString units;
2708
2709 SplitString( stripped, &prefix, &value, &units );
2710
2711 if( prefix == wxT( "+" ) )
2712 prefix = wxEmptyString;
2713
2715 units.Replace( wxS( "µ" ), 'u' );
2716 units.Replace( wxS( "μ" ), 'u' );
2717
2718 return prefix.Lower() + value.Lower() + units.Lower();
2719 };
2720
2721 for( const NAMED_ITEM& item : collectNamedItems( *m_schematic, true ) )
2722 generalMap[normalizeLabel( item.name )].push_back( item );
2723
2724 ERC_MARKER_PLACER markers( *m_schematic );
2725
2726 for( auto& [name, entries] : generalMap )
2727 {
2728 std::sort( entries.begin(), entries.end(), []( const NAMED_ITEM& a, const NAMED_ITEM& b )
2729 {
2730 // Saved exclusions record which item is main, so order by path text rather than depth
2731 if( a.sheet != b.sheet )
2732 return a.sheet.AsString() < b.sheet.AsString();
2733
2734 return a.item < b.item;
2735 } );
2736
2737 // Report each unordered pair whose shown text differs only in case only once.
2738 for( size_t ii = 0; ii < entries.size(); ++ii )
2739 {
2740 for( size_t jj = ii + 1; jj < entries.size(); ++jj )
2741 {
2742 const NAMED_ITEM& a = entries[ii];
2743 const NAMED_ITEM& b = entries[jj];
2744
2745 if( a.name == b.name )
2746 continue;
2747
2748 // Similar local labels on different sheets are fine.
2749 if( a.type == SCH_LABEL_T && b.type == SCH_LABEL_T && a.sheet != b.sheet )
2750 continue;
2751
2753
2754 if( a.type == SCH_PIN_T && b.type == SCH_PIN_T )
2755 code = ERCE_SIMILAR_POWER;
2756 else if( a.type == SCH_PIN_T || b.type == SCH_PIN_T )
2758
2759 reportNameConflict( markers, m_settings, code, a, b );
2760 }
2761 }
2762 }
2763
2764 return markers.Count();
2765}
2766
2767
2769{
2770 wxCHECK( m_schematic, 0 );
2771
2772 LIBRARY_MANAGER& manager = Pgm().GetLibraryManager();
2774 int err_count = 0;
2775
2776 const bool captured = ADVANCED_CFG::GetCfg().m_ConnectivityEngine;
2777
2778 struct LIBRARY_ISSUE
2779 {
2780 int code;
2781 wxString message;
2782 };
2783
2784 const auto check =
2785 [&]( const SCH_CONNECTIVITY::LIBRARY_SYMBOL_FACT& aSource, const SCH_SYMBOL* aSymbol )
2786 {
2787 std::vector<LIBRARY_ISSUE> issues;
2788 const wxString libName = aSource.library.GetLibNickname();
2789 std::optional<const LIBRARY_TABLE_ROW*> optRow = manager.GetRow( LIBRARY_TABLE_TYPE::SYMBOL, libName );
2790
2791 if( !optRow || ( *optRow )->Disabled() )
2792 {
2793 if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
2794 {
2795 issues.push_back( { ERCE_LIB_SYMBOL_ISSUES,
2796 wxString::Format( _( "The current configuration does not include the "
2797 "symbol library '%s'" ),
2798 UnescapeString( libName ) )
2799 } );
2800 }
2801
2802 return issues;
2803 }
2804
2805 if( !adapter->IsLibraryLoaded( libName ) )
2806 {
2807 if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
2808 {
2809 std::optional<wxString> uri = manager.GetFullURI( LIBRARY_TABLE_TYPE::SYMBOL, libName, true );
2810 wxCHECK2( uri.has_value(), uri = wxEmptyString );
2811 issues.push_back( { ERCE_LIB_SYMBOL_ISSUES,
2812 wxString::Format( _( "The symbol library '%s' was not found at '%s'" ),
2813 UnescapeString( libName ), *uri )
2814 } );
2815 }
2816
2817 return issues;
2818 }
2819
2820 const wxString symbolName = aSource.library.GetLibItemName();
2821 LIB_SYMBOL* libSymbol = adapter->LoadSymbol( aSource.library );
2822
2823 if( !libSymbol )
2824 {
2825 if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES ) )
2826 {
2827 issues.push_back( { ERCE_LIB_SYMBOL_ISSUES,
2828 wxString::Format( _( "Symbol '%s' not found in symbol library '%s'" ),
2829 UnescapeString( symbolName ),
2830 UnescapeString( libName ) )
2831 } );
2832 }
2833
2834 return issues;
2835 }
2836
2837 if( !m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_MISMATCH ) )
2838 return issues;
2839
2840 std::unique_ptr<LIB_SYMBOL> flattenedSymbol = libSymbol->Flatten();
2841 const int flags = m_schematic->Settings().SymbolCompareFlags();
2842 bool mismatch = false;
2843
2844 if( captured )
2845 {
2847 {
2848 mismatch = !SCH_CONNECTIVITY::ExtractLibrarySymbolFact( *flattenedSymbol )
2849 .Matches( aSource, flags );
2850 }
2851 }
2852 else
2853 {
2854 wxCHECK( aSymbol && aSymbol->GetLibSymbolRef(), issues );
2855
2856 LIB_SYMBOL* embedded = aSymbol->GetLibSymbolRef().get();
2857 std::vector<wxString> messages;
2858
2859 // Duplicate pins can be valid on the same net; TestDuplicatePinNets checks their nets
2860 if( !embedded->GetDuplicatePinNumbersAreJumpers() )
2861 {
2862 UNITS_PROVIDER unitsProvider( schIUScale, EDA_UNITS::MILS );
2863 CheckDuplicatePins( embedded, messages, &unitsProvider );
2864 }
2865
2866 mismatch = messages.empty() && flattenedSymbol->Compare( *embedded, flags ) != 0;
2867 }
2868
2869 if( mismatch )
2870 {
2871 issues.push_back( { ERCE_LIB_SYMBOL_MISMATCH,
2872 wxString::Format( _( "Symbol '%s' doesn't match copy in library '%s'" ),
2873 UnescapeString( symbolName ),
2874 UnescapeString( libName ) )
2875 } );
2876 }
2877
2878 return issues;
2879 };
2880
2881 // Library results depend only on the shared screen, so every instance reuses one lookup
2882 std::map<std::pair<const SCH_SCREEN*, KIID>, std::vector<LIBRARY_ISSUE>> results;
2883
2884 for( const SCH_SHEET_PATH& path : m_schematic->Hierarchy() )
2885 {
2886 SCH_SCREEN* screen = path.LastScreen();
2887 std::vector<SCH_CONNECTIVITY::LIBRARY_SYMBOL_FACT> sources;
2888
2889 // Legacy sources keep their symbol because duplicate UUIDs make screen lookup ambiguous
2890 std::vector<const SCH_SYMBOL*> symbols;
2891
2892 if( captured )
2893 {
2894 sources = m_schematic->Connectivity().Engine().LibrarySymbols( path.PathRef() );
2895 }
2896 else
2897 {
2898 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
2899 {
2900 const SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
2901 SCH_CONNECTIVITY::LIBRARY_SYMBOL_FACT& source = sources.emplace_back();
2902
2903 source.id = symbol->m_Uuid;
2904 source.position = symbol->GetPosition();
2905 source.library = symbol->GetLibId();
2906 source.hasEmbeddedSymbol = bool( symbol->GetLibSymbolRef() );
2907 symbols.push_back( symbol );
2908 }
2909 }
2910
2911 std::vector<SCH_MARKER*> markers;
2912
2913 for( size_t ii = 0; ii < sources.size(); ++ii )
2914 {
2915 const auto& source = sources[ii];
2916
2917 if( !source.hasEmbeddedSymbol )
2918 continue;
2919
2920 auto result = results.find( { screen, source.id } );
2921
2922 if( result == results.end() )
2923 {
2924 const SCH_SYMBOL* symbol = captured ? nullptr : symbols[ii];
2925 result = results.emplace( std::make_pair( screen, source.id ), check( source, symbol ) ).first;
2926 }
2927
2928 for( const LIBRARY_ISSUE& issue : result->second )
2929 {
2930 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( issue.code );
2931 ercItem->SetItems( std::vector<KIID>{ source.id } );
2932 ercItem->SetSheetSpecificPath( path );
2933 ercItem->SetItemsSheetPaths( path );
2934 ercItem->SetErrorMessage( issue.message );
2935 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), source.position ) );
2936 }
2937 }
2938
2939 for( SCH_MARKER* marker : markers )
2940 {
2941 screen->Append( marker );
2942 err_count += 1;
2943 }
2944 }
2945
2946 return err_count;
2947}
2948
2949
2951{
2952 wxCHECK( m_schematic, 0 );
2953
2954 if( std::optional<LIBRARY_MANAGER_ADAPTER*> adapter =
2955 Pgm().GetLibraryManager().Adapter( LIBRARY_TABLE_TYPE::FOOTPRINT ) )
2956 {
2957 ( *adapter )->BlockUntilLoaded();
2958 }
2959
2960 typedef int (*TESTER_FN_PTR)( const wxString&, PROJECT* );
2961
2962 TESTER_FN_PTR linkTester = (TESTER_FN_PTR) aCvPcb->IfaceOrAddress( KIFACE_TEST_FOOTPRINT_LINK );
2963 ERC_MARKER_PLACER markers( *m_schematic );
2964
2965 for( const auto& source : collectFootprints( *m_schematic ) )
2966 {
2967 if( source.footprint.IsEmpty() )
2968 continue;
2969
2970 wxString msg;
2971 LIB_ID fpID;
2972
2973 if( fpID.Parse( source.footprint, true ) >= 0 )
2974 {
2975 msg.Printf( _( "'%s' is not a valid footprint identifier" ), source.footprint );
2976 }
2977 else
2978 {
2979 const wxString libName = fpID.GetLibNickname();
2980 const wxString fpName = fpID.GetLibItemName();
2981 const int ret = linkTester( source.footprint, aProject );
2982
2984 {
2985 msg.Printf( _( "The current configuration does not include the footprint library '%s'" ),
2986 libName );
2987 }
2989 {
2990 msg.Printf( _( "The footprint library '%s' is not enabled in the current configuration" ),
2991 libName );
2992 }
2994 {
2995 msg.Printf( _( "Footprint '%s' not found in library '%s'" ), fpName, libName );
2996 }
2997 else
2998 {
2999 continue;
3000 }
3001 }
3002
3003 markers.Report( ERCE_FOOTPRINT_LINK_ISSUES, { source.item }, source.sheet, source.position, ITEM_PATHS::MAIN,
3004 msg );
3005 }
3006
3007 return markers.Count();
3008}
3009
3010
3012{
3013 wxCHECK( m_schematic, 0 );
3014 ERC_MARKER_PLACER markers( *m_schematic );
3015
3016 for( const auto& source : collectFootprints( *m_schematic ) )
3017 {
3018 if( source.filters.empty() )
3019 continue;
3020
3021 const wxString lowerId = source.footprint.Lower();
3022 LIB_ID footprint;
3023
3024 // An id rejected at its first character is still checked and reported
3025 if( footprint.Parse( lowerId ) > 0 )
3026 continue;
3027
3028 const wxString lowerItemName = footprint.GetUniStringLibItemName().Lower();
3029 const bool found = std::ranges::any_of( source.filters,
3030 [&]( const wxString& filter )
3031 {
3032 // If the filter contains a ':' character, include the library name in the pattern
3033 return filter.Contains( wxS( ":" ) ) ? lowerId.Matches( filter.Lower() )
3034 : lowerItemName.Matches( filter.Lower() );
3035 } );
3036
3037 if( found )
3038 continue;
3039
3040 markers.Report( ERCE_FOOTPRINT_FILTERS, { source.item }, source.sheet, source.position, ITEM_PATHS::MAIN,
3041 wxString::Format( _( "Assigned footprint (%s) doesn't match footprint filters (%s)" ),
3042 footprint.GetUniStringLibItemName(), wxJoin( source.filters, ' ' ) ) );
3043 }
3044
3045 return markers.Count();
3046}
3047
3048
3050{
3051 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
3052 {
3053 const int grid = m_schematic->Settings().m_ConnectionGridSize;
3054 return reportSourceErrors( *m_schematic, ERCE_ENDPOINT_OFF_GRID,
3055 m_schematic->Connectivity().Engine().OffGridEndpoints( grid ) );
3056 }
3057
3058 const int gridSize = m_schematic->Settings().m_ConnectionGridSize;
3059 int err_count = 0;
3060
3061 for( SCH_SCREEN* screen = m_screens.GetFirst(); screen; screen = m_screens.GetNext() )
3062 {
3063 std::vector<SCH_MARKER*> markers;
3064
3065 for( SCH_ITEM* item : screen->Items() )
3066 {
3067 if( item->Type() == SCH_LINE_T && item->IsConnectable() )
3068 {
3069 SCH_LINE* line = static_cast<SCH_LINE*>( item );
3070
3071 if( ( line->GetStartPoint().x % gridSize ) != 0
3072 || ( line->GetStartPoint().y % gridSize ) != 0 )
3073 {
3074 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_ENDPOINT_OFF_GRID );
3075 ercItem->SetItems( line );
3076
3077 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), line->GetStartPoint() ) );
3078 }
3079 else if( ( line->GetEndPoint().x % gridSize ) != 0
3080 || ( line->GetEndPoint().y % gridSize ) != 0 )
3081 {
3082 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_ENDPOINT_OFF_GRID );
3083 ercItem->SetItems( line );
3084
3085 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), line->GetEndPoint() ) );
3086 }
3087 }
3088 if( item->Type() == SCH_BUS_WIRE_ENTRY_T )
3089 {
3090 SCH_BUS_WIRE_ENTRY* entry = static_cast<SCH_BUS_WIRE_ENTRY*>( item );
3091
3092 for( const VECTOR2I& point : entry->GetConnectionPoints() )
3093 {
3094 if( ( point.x % gridSize ) != 0
3095 || ( point.y % gridSize ) != 0 )
3096 {
3097 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_ENDPOINT_OFF_GRID );
3098 ercItem->SetItems( entry );
3099
3100 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), point ) );
3101 }
3102 }
3103 }
3104 else if( item->Type() == SCH_SYMBOL_T )
3105 {
3106 SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
3107
3108 for( SCH_PIN* pin : symbol->GetPins( nullptr ) )
3109 {
3110 if( pin->GetType() == ELECTRICAL_PINTYPE::PT_NC )
3111 continue;
3112
3113 VECTOR2I pinPos = pin->GetPosition();
3114
3115 if( ( pinPos.x % gridSize ) != 0 || ( pinPos.y % gridSize ) != 0 )
3116 {
3117 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_ENDPOINT_OFF_GRID );
3118 ercItem->SetItems( pin );
3119
3120 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), pinPos ) );
3121 break;
3122 }
3123 }
3124 }
3125 }
3126
3127 for( SCH_MARKER* marker : markers )
3128 {
3129 screen->Append( marker );
3130 err_count += 1;
3131 }
3132 }
3133
3134 return err_count;
3135}
3136
3137
3139{
3141 int err_count = 0;
3142 SIM_LIB_MGR libMgr( &m_schematic->Project() );
3143 wxString variant = m_schematic->GetCurrentVariant();
3144
3145 for( SCH_SHEET_PATH& sheet : m_sheetList )
3146 {
3147 const auto sources = ADVANCED_CFG::GetCfg().m_ConnectivityEngine
3148 ? m_schematic->Connectivity().SimulationModels( sheet.PathRef() )
3150 std::vector<SCH_MARKER*> markers;
3151
3152 for( const auto& source : sources )
3153 {
3154 reporter.Clear();
3155 libMgr.CreateModel( source.input, true, reporter );
3156
3157 if( reporter.HasMessage() )
3158 {
3159 wxString msg = reporter.GetMessages();
3160 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( ERCE_SIMULATION_MODEL );
3161
3162 //Remove \n and \r at e.o.l if any:
3163 msg.Trim();
3164
3165 ercItem->SetErrorMessage( msg );
3166 ercItem->SetItems( source.id );
3167 ercItem->SetSheetSpecificPath( sheet );
3168 ercItem->SetItemsSheetPaths( sheet );
3169
3170 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), source.position ) );
3171 }
3172 }
3173
3174 for( SCH_MARKER* marker : markers )
3175 {
3176 sheet.LastScreen()->Append( marker );
3177 err_count += 1;
3178 }
3179 }
3180
3181 return err_count;
3182}
3183
3184
3186{
3187 wxCHECK( m_schematic, 0 );
3188
3190
3191 if( !adapter )
3192 return 0;
3193
3194 int err_count = 0;
3195
3196 // Flatten each alternate once per ERC run rather than once per referencing symbol.
3197 std::map<wxString, std::unique_ptr<LIB_SYMBOL>> flatAltCache;
3198
3199 for( SCH_SHEET_PATH& sheet : m_sheetList )
3200 {
3201 SCH_SCREEN* screen = sheet.LastScreen();
3202
3203 if( !screen )
3204 continue;
3205
3206 std::vector<SCH_MARKER*> markers;
3207 std::vector<SCH_CONNECTIVITY::VARIANT_SYMBOL_FACT> sources;
3208 std::vector<SCH_CONNECTIVITY::LIBRARY_SYMBOL_FACT> libraries;
3209
3210 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
3211 {
3212 sources = m_schematic->Connectivity().Engine().VariantSymbols( sheet.PathRef() );
3213
3214 if( sources.empty() )
3215 continue;
3216
3217 libraries = m_schematic->Connectivity().Engine().LibrarySymbols( sheet.PathRef() );
3218 }
3219 else
3220 {
3221 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
3222 {
3223 const SCH_SYMBOL* symbol = static_cast<SCH_SYMBOL*>( item );
3224 auto source = SCH_CONNECTIVITY::ExtractVariantSymbolFact( *symbol, sheet );
3225
3226 if( !source )
3227 continue;
3228
3229 auto& base = libraries.emplace_back();
3230
3231 if( symbol->GetLibSymbolRef() )
3233
3234 base.id = symbol->m_Uuid;
3235 base.position = symbol->GetPosition();
3236 base.library = symbol->GetLibId();
3237 sources.push_back( std::move( *source ) );
3238 }
3239
3240 std::sort( libraries.begin(), libraries.end(),
3241 []( const auto& a, const auto& b )
3242 {
3243 return a.id < b.id;
3244 } );
3245 }
3246
3247 for( const auto& source : sources )
3248 {
3249 const auto base = std::lower_bound( libraries.begin(), libraries.end(), source.id,
3250 []( const auto& a, const KIID& id )
3251 {
3252 return a.id < id;
3253 } );
3254
3255 if( base == libraries.end() || base->id != source.id )
3256 continue;
3257
3258 auto addMarker =
3259 [&]( int aErrorCode, const wxString& aMessage )
3260 {
3261 std::shared_ptr<ERC_ITEM> ercItem = ERC_ITEM::Create( aErrorCode );
3262
3263 ercItem->SetItems( std::vector<KIID>{ source.id } );
3264 ercItem->SetSheetSpecificPath( sheet );
3265 ercItem->SetItemsSheetPaths( sheet );
3266 ercItem->SetErrorMessage( aMessage );
3267
3268 markers.emplace_back( new SCH_MARKER( std::move( ercItem ), base->position ) );
3269 err_count++;
3270 };
3271
3272 for( const auto& [variantName, libId] : source.overrides )
3273 {
3274 wxString libIdStr = libId.Format();
3275
3276 // A self-referencing override is ignored by resolution, so skip it here too.
3277 if( libId == base->library )
3278 continue;
3279
3280 auto cacheIt = flatAltCache.find( libIdStr );
3281
3282 if( cacheIt == flatAltCache.end() )
3283 {
3284 std::unique_ptr<LIB_SYMBOL> flatAlt;
3285
3286 try
3287 {
3288 if( LIB_SYMBOL* altSymbol = adapter->LoadSymbol( libId ) )
3289 flatAlt = altSymbol->Flatten();
3290 }
3291 catch( const IO_ERROR& )
3292 {
3293 }
3294
3295 cacheIt = flatAltCache.emplace( libIdStr, std::move( flatAlt ) ).first;
3296 }
3297
3298 const LIB_SYMBOL* flatAlt = cacheIt->second.get();
3299
3300 if( !flatAlt )
3301 {
3302 if( m_settings.IsTestEnabled( ERCE_VARIANT_SYMBOL_INVALID ) )
3303 {
3304 addMarker( ERCE_VARIANT_SYMBOL_INVALID,
3305 wxString::Format( _( "Variant '%s': symbol '%s' not found in libraries" ),
3306 variantName, libIdStr ) );
3307 }
3308
3309 continue;
3310 }
3311
3312 if( !m_settings.IsTestEnabled( ERCE_VARIANT_SYMBOL_INCOMPATIBLE ) )
3313 continue;
3314
3315 if( !base->hasEmbeddedSymbol )
3316 continue;
3317
3318 std::vector<VARIANT_COMPAT_RESULT> issues =
3319 ValidateVariantSymbolCompatibility( *base, *flatAlt );
3320
3321 for( const VARIANT_COMPAT_RESULT& issue : issues )
3322 {
3324 wxString::Format( _( "Variant '%s', alternate '%s': %s" ),
3325 variantName, libIdStr, issue.detail ) );
3326 }
3327 }
3328 }
3329
3330 for( SCH_MARKER* marker : markers )
3331 screen->Append( marker );
3332 }
3333
3334 return err_count;
3335}
3336
3337
3339 KIFACE* aCvPcb, PROJECT* aProject, PROGRESS_REPORTER* aProgressReporter )
3340{
3341 if( !aEditFrame )
3342 {
3343 m_schematic->RecordERCExclusions();
3344 m_screens.DeleteAllMarkers( MARKER_BASE::MARKER_ERC, true );
3345 }
3346
3347 if( aEditFrame )
3348 {
3349 if( ADVANCED_CFG::GetCfg().m_IncrementalConnectivity )
3350 aEditFrame->RecalculateConnections( nullptr, GLOBAL_CLEANUP );
3351 else
3352 aEditFrame->RecalculateConnections( nullptr, NO_CLEANUP );
3353 }
3354 else if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
3355 {
3356 // Captured sources track revisions and text context, so an update refreshes job overrides
3357 m_schematic->Connectivity().Recalculate( *m_schematic );
3358 }
3359 else
3360 {
3361 m_schematic->RebuildConnectivity( nullptr, aProgressReporter );
3362 }
3363
3364 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine
3365 && m_settings.IsTestEnabled( ERCE_SIMULATION_MODEL ) )
3366 {
3367 m_schematic->Connectivity().PrepareSimulationModels( *m_schematic );
3368 }
3369
3370 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine
3371 && m_settings.IsTestEnabled( ERCE_UNRESOLVED_VARIABLE ) )
3372 {
3373 m_schematic->Connectivity().PrepareTextChecks( *m_schematic, aDrawingSheet != nullptr );
3374 }
3375
3376 // Test duplicate sheet names inside a given sheet. While one can have multiple references
3377 // to the same file, each must have a unique name.
3378 if( m_settings.IsTestEnabled( ERCE_DUPLICATE_SHEET_NAME ) )
3379 {
3380 if( aProgressReporter )
3381 aProgressReporter->AdvancePhase( _( "Checking sheet names..." ) );
3382
3384 }
3385
3386 // Test pin-to-pad maps for stale pins, duplicate pad targets and bad pad references (issue #2282).
3387 if( m_settings.IsTestEnabled( ERCE_PIN_MAP_STALE_PIN ) || m_settings.IsTestEnabled( ERCE_PIN_MAP_DUPLICATE_PAD )
3388 || m_settings.IsTestEnabled( ERCE_PIN_MAP_BAD_PAD ) || m_settings.IsTestEnabled( ERCE_PIN_MAP_UNMAPPED_PIN ) )
3389 {
3390 if( aProgressReporter )
3391 aProgressReporter->AdvancePhase( _( "Checking pin maps..." ) );
3392
3393 TestPinMap( aCvPcb, aProject );
3394 }
3395
3396 if( aProgressReporter )
3397 aProgressReporter->AdvancePhase( _( "Checking conflicts..." ) );
3398
3399 if( ADVANCED_CFG::GetCfg().m_ConnectivityEngine )
3401 else
3402 m_schematic->ConnectionGraph()->RunERC();
3403
3404 if( aProgressReporter )
3405 aProgressReporter->AdvancePhase( _( "Checking units..." ) );
3406
3407 // Test is all units of each multiunit symbol have the same footprint assigned.
3408 if( m_settings.IsTestEnabled( ERCE_DIFFERENT_UNIT_FP ) )
3409 {
3410 if( aProgressReporter )
3411 aProgressReporter->AdvancePhase( _( "Checking footprints..." ) );
3412
3414 }
3415
3416 if( m_settings.IsTestEnabled( ERCE_MISSING_UNIT )
3417 || m_settings.IsTestEnabled( ERCE_MISSING_INPUT_PIN )
3418 || m_settings.IsTestEnabled( ERCE_MISSING_POWER_INPUT_PIN )
3419 || m_settings.IsTestEnabled( ERCE_MISSING_BIDI_PIN ) )
3420 {
3422 }
3423
3424 if( aProgressReporter )
3425 aProgressReporter->AdvancePhase( _( "Checking pins..." ) );
3426
3427 if( m_settings.IsTestEnabled( ERCE_DIFFERENT_UNIT_NET ) )
3429
3430 if( m_settings.IsTestEnabled( ERCE_DUPLICATE_PIN_ERROR ) )
3432
3433 // Test pins on each net against the pin connection table
3434 if( m_settings.IsTestEnabled( ERCE_PIN_TO_PIN_ERROR )
3435 || m_settings.IsTestEnabled( ERCE_PIN_TO_PIN_WARNING )
3436 || m_settings.IsTestEnabled( ERCE_POWERPIN_NOT_DRIVEN )
3437 || m_settings.IsTestEnabled( ERCE_PIN_NOT_DRIVEN ) )
3438 {
3439 TestPinToPin();
3440 }
3441
3442 if( m_settings.IsTestEnabled( ERCE_GROUND_PIN_NOT_GROUND ) )
3444
3445 if( m_settings.IsTestEnabled( ERCE_STACKED_PIN_SYNTAX ) )
3447
3448 // Test similar labels (i;e. labels which are identical when
3449 // using case insensitive comparisons)
3450 if( m_settings.IsTestEnabled( ERCE_SIMILAR_LABELS )
3451 || m_settings.IsTestEnabled( ERCE_SIMILAR_POWER )
3452 || m_settings.IsTestEnabled( ERCE_SIMILAR_LABEL_AND_POWER ) )
3453 {
3454 if( aProgressReporter )
3455 aProgressReporter->AdvancePhase( _( "Checking similar labels..." ) );
3456
3458 }
3459
3460 if( m_settings.IsTestEnabled( ERCE_SAME_LOCAL_GLOBAL_LABEL )
3461 || m_settings.IsTestEnabled( ERCE_SAME_LOCAL_GLOBAL_POWER ) )
3462 {
3463 if( aProgressReporter )
3464 aProgressReporter->AdvancePhase( _( "Checking local and global labels..." ) );
3465
3467 }
3468
3469 if( m_settings.IsTestEnabled( ERCE_UNRESOLVED_VARIABLE ) )
3470 {
3471 if( aProgressReporter )
3472 aProgressReporter->AdvancePhase( _( "Checking for unresolved variables..." ) );
3473
3474 TestTextVars( aDrawingSheet );
3475 }
3476
3477 if( m_settings.IsTestEnabled( ERCE_FIELD_NAME_WHITESPACE ) )
3478 {
3479 if( aProgressReporter )
3480 aProgressReporter->AdvancePhase( _( "Checking field names..." ) );
3481
3483 }
3484
3485 if( m_settings.IsTestEnabled( ERCE_EMPTY_LABEL_NAME ) )
3486 {
3487 if( aProgressReporter )
3488 aProgressReporter->AdvancePhase( _( "Checking for empty label names..." ) );
3489
3491 }
3492
3493 if( m_settings.IsTestEnabled( ERCE_SIMULATION_MODEL ) )
3494 {
3495 if( aProgressReporter )
3496 aProgressReporter->AdvancePhase( _( "Checking SPICE models..." ) );
3497
3499 }
3500
3501 if( m_settings.IsTestEnabled( ERCE_NOCONNECT_CONNECTED ) )
3502 {
3503 if( aProgressReporter )
3504 aProgressReporter->AdvancePhase( _( "Checking no connect pins for connections..." ) );
3505
3507 }
3508
3509 if( m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_ISSUES )
3510 || m_settings.IsTestEnabled( ERCE_LIB_SYMBOL_MISMATCH ) )
3511 {
3512 if( aProgressReporter )
3513 aProgressReporter->AdvancePhase( _( "Checking for library symbol issues..." ) );
3514
3516 }
3517
3518 if( m_settings.IsTestEnabled( ERCE_FOOTPRINT_LINK_ISSUES ) && aCvPcb )
3519 {
3520 if( aProgressReporter )
3521 aProgressReporter->AdvancePhase( _( "Checking for footprint link issues..." ) );
3522
3523 TestFootprintLinkIssues( aCvPcb, aProject );
3524 }
3525
3526 if( m_settings.IsTestEnabled( ERCE_FOOTPRINT_FILTERS ) )
3527 {
3528 if( aProgressReporter )
3529 aProgressReporter->AdvancePhase( _( "Checking footprint assignments against footprint filters..." ) );
3530
3532 }
3533
3534 if( m_settings.IsTestEnabled( ERCE_ENDPOINT_OFF_GRID ) )
3535 {
3536 if( aProgressReporter )
3537 aProgressReporter->AdvancePhase( _( "Checking for off grid pins and wires..." ) );
3538
3540 }
3541
3542 if( m_settings.IsTestEnabled( ERCE_FOUR_WAY_JUNCTION ) )
3543 {
3544 if( aProgressReporter )
3545 aProgressReporter->AdvancePhase( _( "Checking for four way junctions..." ) );
3546
3548 }
3549
3550 if( m_settings.IsTestEnabled( ERCE_LABEL_MULTIPLE_WIRES ) )
3551 {
3552 if( aProgressReporter )
3553 aProgressReporter->AdvancePhase( _( "Checking for labels on more than one wire..." ) );
3554
3556 }
3557
3558 if( m_settings.IsTestEnabled( ERCE_UNDEFINED_NETCLASS ) )
3559 {
3560 if( aProgressReporter )
3561 aProgressReporter->AdvancePhase( _( "Checking for undefined netclasses..." ) );
3562
3564 }
3565
3566 if( m_settings.IsTestEnabled( ERCE_VARIANT_SYMBOL_INVALID )
3567 || m_settings.IsTestEnabled( ERCE_VARIANT_SYMBOL_INCOMPATIBLE ) )
3568 {
3569 if( aProgressReporter )
3570 aProgressReporter->AdvancePhase( _( "Checking variant symbols..." ) );
3571
3573 }
3574
3575 m_schematic->ResolveERCExclusionsPostUpdate();
3576}
int index
const char * name
constexpr EDA_IU_SCALE schIUScale
Definition base_units.h:130
static const ADVANCED_CFG & GetCfg()
Get the singleton instance's config, which is shared by all consumers.
const NET_MAP & GetNetMap() const
A subgraph is a set of items that are electrically connected on a single sheet.
const std::set< SCH_ITEM * > & GetItems() const
Provide a read-only reference to the items in the subgraph.
const SCH_ITEM * GetNoConnect() const
const SCH_SHEET_PATH & GetSheet() const
Base class to handle basic graphic items.
Store the list of graphic items: rect, lines, polygons and texts to draw/plot the title block and fra...
DS_DRAW_ITEM_BASE * GetFirst()
void BuildDrawItemsList(const PAGE_INFO &aPageInfo, const TITLE_BLOCK &aTitleBlock)
Drawing or plot the drawing sheet.
void SetFileName(const wxString &aFileName)
Set the filename to draw/plot.
void SetSheetName(const wxString &aSheetName)
Set the sheet name to draw/plot.
void SetSheetLayer(const wxString &aSheetLayer)
Set the sheet layer to draw/plot.
void SetSheetCount(int aSheetCount)
Set the value of the count of sheets, for basic inscriptions.
void SetPageNumber(const wxString &aPageNumber)
Set the value of the sheet number.
DS_DRAW_ITEM_BASE * GetNext()
void SetProject(const PROJECT *aProject)
A graphic text.
const PAGE_INFO & GetPageInfo()
const TITLE_BLOCK & GetTitleBlock()
const KIID m_Uuid
Definition eda_item.h:599
KICAD_T Type() const
Returns the type of object.
Definition eda_item.h:110
virtual const wxString & GetText() const
Return the string associated with the text object.
Definition eda_text.h:118
EE_TYPE Overlapping(const BOX2I &aRect) const
Definition sch_rtree.h:253
EE_TYPE OfType(KICAD_T aType) const
Definition sch_rtree.h:248
static std::shared_ptr< ERC_ITEM > Create(int aErrorCode)
Constructs an ERC_ITEM for the given error code.
Definition erc_item.cpp:309
A class used to associate a SCH_PIN with its owning SCH_SHEET_PATH, in order to handle ERC checks acr...
const SCH_SHEET_PATH & Sheet() const
Get the SCH_SHEET_PATH context for the paired SCH_PIN.
SCH_PIN * Pin() const
Get the SCH_PIN for this context.
Container for ERC settings.
bool IsTestEnabled(int aErrorCode) const
ERC_PIN_SORTING_METRIC GetERCSortingMetric() const
Get the type of sorting metric the ERC checker should use to resolve multi-pin errors.
PIN_ERROR GetPinMapValue(int aFirstType, int aSecondType) const
int GetPinTypeWeight(ELECTRICAL_PINTYPE aPinType) const
Get the weight for an electrical pin type.
int TestLibSymbolIssues()
Test symbols for changed library symbols and broken symbol library links.
Definition erc.cpp:2768
const NET_MAP & m_nets
Definition erc.h:234
int TestStackedPinNotation()
Checks for pin numbers that resemble stacked pin notation but are invalid.
Definition erc.cpp:2613
ERC_TESTER(SCHEMATIC *aSchematic, bool aShowAllErrors=false)
Definition erc.cpp:337
void TestTextVars(DS_PROXY_VIEW_ITEM *aDrawingSheet)
Check for any unresolved text variable references.
Definition erc.cpp:648
int TestPinToPin()
Checks the full netlist against the pin-to-pin connectivity requirements.
Definition erc.cpp:1709
int TestSimilarLabels()
Checks for labels that differ only in capitalization.
Definition erc.cpp:2696
SCH_MULTI_UNIT_REFERENCE_MAP m_refMap
Definition erc.h:233
SCH_SCREENS m_screens
Definition erc.h:232
int TestEmptyLabelNames()
Check for labels with empty or whitespace-only names.
Definition erc.cpp:759
int TestFootprintLinkIssues(KIFACE *aCvPcb, PROJECT *aProject)
Test footprint links against the current footprint libraries.
Definition erc.cpp:2950
static int TestConnectivity(SCHEMATIC &aSchematic)
Definition erc.cpp:2260
int TestOffGridEndpoints()
Test pins and wire ends for being off grid.
Definition erc.cpp:3049
int TestDuplicateSheetNames(bool aCreateMarker)
Inside a given sheet, one cannot have sheets with duplicate names (file names can be duplicated).
Definition erc.cpp:350
int TestSameLocalGlobalLabel()
Checks for global and local labels with the same name.
Definition erc.cpp:2655
int TestMultUnitPinConflicts()
Checks if shared pins on multi-unit symbols have been connected to different nets.
Definition erc.cpp:2145
int TestNoConnectPins()
In KiCad 5 and earlier, you could connect stuff up to pins with NC electrical type.
Definition erc.cpp:1288
int TestFootprintFilters()
Test symbols to ensure that assigned footprint passes any given footprint filters.
Definition erc.cpp:3011
int TestPinMap(KIFACE *aCvPcb, PROJECT *aProject)
Check pin-to-pad maps (issue #2282): stale pin references, duplicate pad targets, bad pads and unmapp...
Definition erc.cpp:417
int TestFieldNameWhitespace()
Check for field names with leading or trailing whitespace.
Definition erc.cpp:804
int TestDuplicatePinNets()
Checks if duplicate pin numbers within a symbol are connected to different nets.
Definition erc.cpp:2446
ERC_SETTINGS & m_settings
Definition erc.h:230
int TestFourWayJunction()
Test to see if there are potentially confusing 4-way junctions in the schematic.
Definition erc.cpp:1195
int TestMissingNetclasses()
Tests for netclasses that are referenced but not defined.
Definition erc.cpp:1051
int TestSimModelIssues()
Test SPICE models for various issues.
Definition erc.cpp:3138
SCH_SHEET_LIST m_sheetList
Definition erc.h:231
bool m_showAllErrors
Definition erc.h:235
int TestGroundPins()
Checks for ground-labeled pins not on a ground net while another pin is.
Definition erc.cpp:2529
SCHEMATIC * m_schematic
Definition erc.h:229
std::vector< SCH_CONNECTIVITY::MULTI_UNIT_GROUP > multiUnitSources() const
Definition erc.cpp:889
void RunTests(DS_PROXY_VIEW_ITEM *aDrawingSheet, SCH_EDIT_FRAME *aEditFrame, KIFACE *aCvPcb, PROJECT *aProject, PROGRESS_REPORTER *aProgressReporter)
Definition erc.cpp:3338
int TestMissingUnits()
Test for uninstantiated units of multi unit symbols.
Definition erc.cpp:970
int TestLabelMultipleWires()
Test to see if there are labels that are connected to more than one wire.
Definition erc.cpp:1124
int TestVariantSymbols()
Test all variant symbol overrides for resolution and pin compatibility.
Definition erc.cpp:3185
int TestMultiunitFootprints()
Test if all units of each multiunit symbol have the same footprint assigned.
Definition erc.cpp:923
Hold an error message and may be used when throwing exceptions containing meaningful error messages.
Represents a group of jumper pins or pads, keyed by name.
wxString AsString() const
Definition kiid.cpp:423
Definition kiid.h:46
bool IsLibraryLoaded(const wxString &aNickname)
std::optional< wxString > GetFullURI(LIBRARY_TABLE_TYPE aType, const wxString &aNickname, bool aSubstituted=false)
Return the full location specifying URI for the LIB, either in original UI form or in environment var...
std::optional< LIBRARY_TABLE_ROW * > GetRow(LIBRARY_TABLE_TYPE aType, const wxString &aNickname, LIBRARY_TABLE_SCOPE aScope=LIBRARY_TABLE_SCOPE::BOTH)
A logical library item identifier and consists of various portions much like a URI.
Definition lib_id.h:45
int Parse(const UTF8 &aId, bool aFix=false)
Parse LIB_ID with the information from aId.
Definition lib_id.cpp:65
wxString GetUniStringLibId() const
Definition lib_id.h:144
const wxString GetUniStringLibItemName() const
Get strings for display messages in dialogs.
Definition lib_id.h:108
const UTF8 & GetLibItemName() const
Definition lib_id.h:98
const UTF8 & GetLibNickname() const
Return the logical library name portion of a LIB_ID.
Definition lib_id.h:83
Define a library symbol object.
Definition lib_symbol.h:114
const std::vector< ASSOCIATED_FOOTPRINT > & GetEffectiveAssociatedFootprints() const
Definition lib_symbol.h:300
std::unique_ptr< LIB_SYMBOL > Flatten() const
Return a flattened symbol inheritance to the caller.
bool GetDuplicatePinNumbersAreJumpers() const
Definition lib_symbol.h:884
virtual LIBRARY_MANAGER & GetLibraryManager() const
Definition pgm_base.h:125
A symbol-owned ordered set of named pin maps.
Definition pin_map.h:124
const std::vector< PIN_MAP > & GetAll() const
Definition pin_map.h:139
const PIN_MAP * FindByName(const wxString &aName) const
Definition pin_map.cpp:133
A named pin map.
Definition pin_map.h:65
const std::vector< PIN_MAP_ENTRY > & GetEntries() const
Definition pin_map.h:92
const wxString & GetName() const
Definition pin_map.h:70
A progress reporter interface for use in multi-threaded environments.
virtual void AdvancePhase()=0
Use the next available virtual zone of the dialog progress bar.
static SYMBOL_LIBRARY_ADAPTER * SymbolLibAdapter(PROJECT *aProject)
Accessor for project symbol library manager adapter.
Container for project specific data.
Definition project.h:63
std::vector< KIID > KIIDS
Definition rc_item.h:83
Holds all the data relating to one schematic.
Definition schematic.h:149
SCH_CONNECTIVITY::NETCHAIN_MANAGER & NetChains() const
Definition schematic.h:317
SCH_SHEET_LIST Hierarchy() const
Return the full schematic flattened hierarchical sheet list.
SCH_CONNECTIVITY::FACADE & Connectivity() const
Definition schematic.h:316
CONNECTION_GRAPH * ConnectionGraph() const
Definition schematic.h:319
ERC_SETTINGS & ErcSettings() const
std::vector< VECTOR2I > GetConnectionPoints() const override
Add all the connection points for this item to aPoints.
Class for a wire to bus entry.
Each graphical item can have a SCH_CONNECTION describing its logical connection (to a bus or net).
wxString Name(bool aIgnoreSheet=false) const
std::vector< ERC_PIN_NET > PinNets() const
Active pins for each named net, in net name order.
std::vector< NAMED_ITEM > NamedItems() const
Every label and power pin with its resolved name, on every instance.
std::vector< FOOTPRINT_SOURCE > FootprintSources() const
Resolved footprint and filters of every symbol on every instance.
const ENGINE & Engine() const
const std::vector< std::unique_ptr< SCH_NETCHAIN > > & GetCommittedNetChains() const
Return user-created (committed) net chains (legacy accessor retained under net-chain API).
Schematic editor (Eeschema) main window.
bool RecalculateConnections(SCH_COMMIT *aCommit, SCH_CLEANUP_FLAGS aCleanupFlags, PROGRESS_REPORTER *aProgressReporter=nullptr, bool aCleanupDone=false)
Generate the connection data for the entire schematic hierarchy.
wxString GetUntranslatedName() const
Get the untranslated field name for storage, variable look-up, etc.
wxString GetShownText(const SCH_SHEET_PATH *aPath, RESOLUTION_CONTEXT aContext, const wxString &aVariantName=wxEmptyString, int aDepth=0) const
Base class for any item which can be embedded within the SCHEMATIC container class,...
Definition sch_item.h:170
std::vector< VECTOR2I > GetConnectionPoints() const override
Add all the connection points for this item to aPoints.
Segment description base class to describe items which have 2 end points (track, wire,...
Definition sch_line.h:39
std::vector< VECTOR2I > GetConnectionPoints() const override
Add all the connection points for this item to aPoints.
Definition sch_line.cpp:808
VECTOR2I GetEndPoint() const
Definition sch_line.h:145
VECTOR2I GetStartPoint() const
Definition sch_line.h:136
bool IsEndPoint(const VECTOR2I &aPoint) const override
Test if aPt is an end point of this schematic object.
Definition sch_line.h:88
bool IsGraphicLine() const
Return if the line is a graphic (non electrical line)
bool IsVisible() const
Definition sch_pin.cpp:513
PAD_RESOLUTION
Outcome of pin-to-pad resolution (issue #2282).
Definition sch_pin.h:175
VECTOR2I GetPosition() const override
Definition sch_pin.cpp:378
bool IsStacked(const SCH_PIN *aPin) const
Definition sch_pin.cpp:605
static bool HasIdentityPad(const wxString &aPinNumber, const std::set< wxString > &aPads)
Definition sch_pin.cpp:819
bool IsPower() const
Check if the pin is either a global or local power pin.
Definition sch_pin.cpp:507
ELECTRICAL_PINTYPE GetType() const
Definition sch_pin.cpp:435
A helper to define a symbol's reference designator in a schematic.
const SCH_SHEET_PATH & GetSheetPath() const
const wxString GetFootprint() const
SCH_SYMBOL * GetSymbol() const
int GetUnit() const
void Append(SCH_ITEM *aItem, bool aUpdateLibSymbol=true)
EE_RTREE & Items()
Get the full RTree, usually for iterating.
Definition sch_screen.h:122
Handle access to a stack of flattened SCH_SHEET objects by way of a path for creating a flattened sch...
const SCH_SHEET * GetSheet(unsigned aIndex) const
SCH_SCREEN * LastScreen()
const KIID_PATH & PathRef() const
Borrow the cached path until this sheet path is modified or destroyed.
Sheet symbol placed in a schematic, and is the entry point for a sub schematic.
Definition sch_sheet.h:48
std::vector< SCH_FIELD > & GetFields()
Return a reference to the vector holding the sheet's fields.
Definition sch_sheet.h:91
SCH_FIELD * GetField(FIELD_T aFieldType)
Return a mandatory field in this sheet.
VECTOR2I GetPosition() const override
Definition sch_sheet.h:506
Schematic symbol object.
Definition sch_symbol.h:73
const wxString GetFootprintFieldText(const SCH_SHEET_PATH *aPath, RESOLUTION_CONTEXT aContext, const wxString &aVariantName=wxEmptyString) const
std::vector< const SCH_PIN * > GetPins(const SCH_SHEET_PATH *aSheet) const
Retrieve a list of the SCH_PINs for the given sheet path.
bool IsGlobalPower() const override
void GetFields(std::vector< SCH_FIELD * > &aVector, bool aVisibleOnly) const override
Populate a std::vector with SCH_FIELDs, sorted in ordinal order.
VECTOR2I GetPosition() const override
Definition sch_symbol.h:895
const LIB_ID & GetLibId() const override
Definition sch_symbol.h:163
const wxString GetValue(const SCH_SHEET_PATH *aPath, RESOLUTION_CONTEXT aContext, const wxString &aVariantName=wxEmptyString) const override
std::unique_ptr< LIB_SYMBOL > & GetLibSymbolRef()
Definition sch_symbol.h:182
const wxString GetRef(const SCH_SHEET_PATH *aSheet, bool aIncludeUnit=false) const override
VECTOR2I GetPosition() const override
Definition sch_text.h:143
SIM_MODEL & CreateModel(SIM_MODEL::TYPE aType, std::span< const wxString > aPins, REPORTER &aReporter)
An interface to the global shared library manager that is schematic-specific and linked to one projec...
LIB_SYMBOL * LoadSymbol(const wxString &aNickname, const wxString &aName)
Load a LIB_SYMBOL having aName from the library given by aNickname.
double Distance(const VECTOR2< extended_type > &aVector) const
Compute the distance between two vectors.
Definition vector2d.h:574
A wrapper for reporting to a wxString object.
Definition reporter.h:242
@ FOR_ERC_DRC
Definition common.h:93
@ FOR_NETNAME
Definition common.h:92
@ RESOLVED
Definition common.h:95
#define _(s)
@ NONE
Definition eda_fill.h:42
@ NO_RECURSE
Definition eda_item.h:52
void CheckDuplicatePins(LIB_SYMBOL *aSymbol, std::vector< wxString > &aMessages, UNITS_PROVIDER *aUnitsProvider)
const wxString CommentERC_V[]
Definition erc.cpp:290
const wxString CommentERC_H[]
Definition erc.cpp:273
const std::set< ELECTRICAL_PINTYPE > DrivenPinTypes
Definition erc.cpp:328
const std::set< ELECTRICAL_PINTYPE > DrivingPinTypes
Definition erc.cpp:310
const std::set< ELECTRICAL_PINTYPE > DrivingPowerPinTypes
Definition erc.cpp:322
ERCE_T
ERC error codes.
@ ERCE_POWERPIN_NOT_DRIVEN
Power input pin connected to some others pins but no power out pin to drive it.
@ ERCE_DRIVER_CONFLICT
Conflicting drivers (labels, etc) on a subgraph.
@ ERCE_SIMILAR_POWER
2 power pins are equal for case insensitive comparisons.
@ ERCE_MISSING_POWER_INPUT_PIN
Symbol has power input pins that are not placed on the schematic.
@ ERCE_UNCONNECTED_WIRE_ENDPOINT
A label is connected to more than one wire.
@ ERCE_GROUND_PIN_NOT_GROUND
A ground-labeled pin is not on a ground net while another pin is.
@ ERCE_SIMILAR_LABELS
2 labels are equal for case insensitive comparisons.
@ ERCE_VARIANT_SYMBOL_INCOMPATIBLE
Variant symbol override fails pin compatibility.
@ ERCE_STACKED_PIN_SYNTAX
Pin name resembles stacked pin notation.
@ ERCE_LABEL_NOT_CONNECTED
Label not connected to any pins.
@ ERCE_ENDPOINT_OFF_GRID
Pin or wire-end off grid.
@ ERCE_EMPTY_LABEL_NAME
Label has an empty or whitespace-only name.
@ ERCE_SAME_LOCAL_GLOBAL_LABEL
2 labels are equal for case insensitive comparisons.
@ ERCE_BUS_TO_BUS_CONFLICT
A connection between bus objects doesn't share at least one net.
@ ERCE_SIMILAR_LABEL_AND_POWER
label and pin are equal for case insensitive comparisons.
@ ERCE_SAME_LOCAL_GLOBAL_POWER
Local power port and global power port have the same name.
@ ERCE_PIN_MAP_BAD_PAD
Pin map references a pad absent from the footprint.
@ ERCE_LABEL_SINGLE_PIN
A label is connected only to a single pin.
@ ERCE_BUS_ENTRY_CONFLICT
A wire connected to a bus doesn't match the bus.
@ ERCE_FOOTPRINT_LINK_ISSUES
The footprint link is invalid, or points to a missing (or inactive) footprint or library.
@ ERCE_PIN_MAP_DUPLICATE_PAD
Two symbol pins map to one pad (not stacked/jumper).
@ ERCE_BUS_TO_NET_CONFLICT
A bus wire is graphically connected to a net port/pin (or vice versa).
@ ERCE_DUPLICATE_PIN_ERROR
@ ERCE_NOCONNECT_NOT_CONNECTED
A no connect symbol is not connected to anything.
@ ERCE_DIFFERENT_UNIT_NET
Shared pin in a multi-unit symbol is connected to more than one net.
@ ERCE_FOUR_WAY_JUNCTION
A four-way junction was found.
@ ERCE_PIN_NOT_CONNECTED
Pin not connected and not no connect symbol.
@ ERCE_UNDEFINED_NETCLASS
A netclass was referenced but not defined.
@ ERCE_UNRESOLVED_VARIABLE
A text variable could not be resolved.
@ ERCE_SIMULATION_MODEL
An error was found in the simulation model.
@ ERCE_LIB_SYMBOL_MISMATCH
Symbol doesn't match copy in library.
@ ERCE_GENERIC_ERROR
@ ERCE_DIFFERENT_UNIT_FP
Different units of the same symbol have different footprints assigned.
@ ERCE_NOCONNECT_CONNECTED
A no connect symbol is connected to more than 1 pin.
@ ERCE_PIN_TO_PIN_WARNING
@ ERCE_PIN_NOT_DRIVEN
Pin connected to some others pins but no pin to drive it.
@ ERCE_MISSING_INPUT_PIN
Symbol has input pins that are not placed.
@ ERCE_MISSING_UNIT
Symbol has units that are not placed on the schematic.
@ ERCE_FIELD_NAME_WHITESPACE
Field name has leading or trailing whitespace.
@ ERCE_DUPLICATE_SHEET_NAME
Duplicate sheet names within a given sheet.
@ ERCE_PIN_MAP_STALE_PIN
Pin map references a pin number not on the symbol.
@ ERCE_MISSING_BIDI_PIN
Symbol has bi-directional pins that are not placed.
@ ERCE_LIB_SYMBOL_ISSUES
Symbol not found in active libraries.
@ ERCE_FOOTPRINT_FILTERS
The assigned footprint doesn't match the footprint filters.
@ ERCE_HIERACHICAL_LABEL
Mismatch between hierarchical labels and pins sheets.
@ ERCE_WIRE_DANGLING
Some wires are not connected to anything else.
@ ERCE_GENERIC_WARNING
@ ERCE_VARIANT_SYMBOL_INVALID
Variant symbol override LIB_ID cannot be resolved.
@ ERCE_SINGLE_GLOBAL_LABEL
A label only exists once in the schematic.
@ ERCE_PIN_MAP_UNMAPPED_PIN
A connected pin resolves to no footprint pad.
@ ERCE_LABEL_MULTIPLE_WIRES
A label is connected to more than one wire.
@ ERCE_WIRED_IMPLICIT_POWER
Wired hidden power input also joins its global net by name.
@ ERCE_PIN_TO_PIN_ERROR
PIN_ERROR
The values a pin-to-pin entry in the pin matrix can take on.
bool m_ConnectivityEngine
Use the schematic connectivity engine instead of CONNECTION_GRAPH.
const wxChar *const traceSchNetChain
Flag to enable tracing of schematic net chain rebuild and ERC cross-chain checks.
std::string source
std::string message
#define TO_UTF8(wxstring)
Convert a wxString to a UTF8 encoded C string for all wxWidgets build modes.
Definition idf_helpers.h:37
@ KIFACE_TEST_FOOTPRINT_LINK_LIBRARY_NOT_ENABLED
Definition kiface_ids.h:66
@ KIFACE_TEST_FOOTPRINT_LINK
Definition kiface_ids.h:64
@ KIFACE_TEST_FOOTPRINT_LINK_NO_LIBRARY
Definition kiface_ids.h:65
@ KIFACE_TEST_FOOTPRINT_LINK_NO_FOOTPRINT
Definition kiface_ids.h:67
@ KIFACE_FOOTPRINT_PAD_NUMBERS
Function pointer type: void (*)( const wxString& aFootprint, PROJECT* aProject, std::set<wxString>& a...
Definition kiface_ids.h:72
KIID niluuid(0)
Value keys and the key session of the schematic connectivity engine.
SOURCE_LOCATION UNCONNECTED_PIN
std::optional< PIN_MAP_FACT > ExtractPinMapFacts(const SCH_SYMBOL &aSymbol)
std::vector< SIMULATION_MODEL_FACT > ExtractSimulationModelFacts(const SCH_SHEET_PATH &aPath, const wxString &aVariantName)
std::vector< TEXT_CHECK_FACT > ExtractTextChecks(const SCH_SCREEN &aScreen, const SCH_SHEET_PATH &aPath)
SOURCE_LOCATION LABEL_LOCATION
LIBRARY_SYMBOL_FACT ExtractLibrarySymbolFact(const LIB_SYMBOL &aSymbol)
std::vector< TEXT_ASSERTION > ExtractTextAssertions(const wxString &aText)
std::optional< VARIANT_SYMBOL_FACT > ExtractVariantSymbolFact(const SCH_SYMBOL &aSymbol, const SCH_SHEET_PATH &aPath)
std::vector< UNIT_FACT > ExtractUnitFacts(const LIB_SYMBOL &aSymbol)
PGM_BASE & Pgm()
The global program "get" accessor.
see class PGM_BASE
ELECTRICAL_PINTYPE
The symbol library pin object electrical types used in ERC tests.
Definition pin_type.h:32
@ PT_INPUT
usual pin input: must be connected
Definition pin_type.h:33
@ PT_NC
not connected (must be left open)
Definition pin_type.h:46
@ PT_OUTPUT
usual output
Definition pin_type.h:34
@ PT_TRISTATE
tri state bus pin
Definition pin_type.h:36
@ PT_NIC
not internally connected (may be connected to anything)
Definition pin_type.h:40
@ PT_BIDI
input or output (like port for a microprocessor)
Definition pin_type.h:35
@ PT_POWER_OUT
output of a regulator: intended to be connected to power input pins
Definition pin_type.h:43
@ PT_POWER_IN
power input (GND, VCC for ICs). Must be connected to a power output.
Definition pin_type.h:42
@ PT_UNSPECIFIED
unknown electrical properties: creates always a warning when connected
Definition pin_type.h:41
@ PT_PASSIVE
pin for passive symbols: must be connected, and can be connected to any pin.
Definition pin_type.h:39
wxString ElectricalPinTypeGetText(ELECTRICAL_PINTYPE)
Definition pin_type.cpp:203
static float distance(const SFVEC2UI &a, const SFVEC2UI &b)
static const std::vector< KICAD_T > labelTypes
Definition sch_field.cpp:48
@ SYMBOL_FILTER_ALL
@ NO_CLEANUP
Definition schematic.h:93
@ GLOBAL_CLEANUP
Definition schematic.h:95
int StrNumCmp(const wxString &aString1, const wxString &aString2, bool aIgnoreCase)
Compare two strings with alphanumerical content.
std::vector< wxString > ExpandStackedPinNotation(const wxString &aPinName, bool *aValid)
Expand stacked pin notation like [1,2,3], [1-4], [A1-A4], or [AA1-AA3,AB4,CD12-CD14] into individual ...
wxString UnescapeString(const wxString &aSource)
int SplitString(const wxString &strToSplit, wxString *strBeginning, wxString *strDigits, wxString *strEnd)
Break a string into three parts: he alphabetic preamble, the numeric part, and any alphabetic ending.
A first-class footprint choice on a LIB_SYMBOL, tied to a named pin map.
Definition pin_map.h:159
LIB_ID m_FootprintLibId
Definition pin_map.h:160
Implement a participant in the KIWAY alchemy.
Definition kiway.h:153
virtual void * IfaceOrAddress(int aDataId)=0
Return pointer to the requested object.
One symbol-pin to footprint-pad mapping inside a PIN_MAP.
Definition pin_map.h:42
Two bus claims on one island that share no member, or a bus vector joined to a bus group.
Definition conn_engine.h:82
A bus wire entry whose net is not a member of the bus it touches.
Definition conn_engine.h:95
An island that mixes net and bus items.
Definition conn_engine.h:70
Two different strong names on one island.
Definition conn_engine.h:45
One active symbol pin on one sheet instance, with the reference of its symbol.
Up to four wires and bus entries of one island that has no driver.
A hierarchical label or sheet pin with no partner, or a dangling sheet pin.
A label that connects to nothing, or to only one pin.
bool Matches(const LIBRARY_SYMBOL_FACT &aOther, int aCompareFlags) const
All placed units that share one reference, with the unit table of the library symbol.
One placed unit of an annotated multi-unit symbol.
A label or a power pin with its resolved net name.
A no-connect flag on a net with more than one pin, or on a net with no pin and no label.
One item on one sheet instance, for a diagnostic that needs only a location.
One dangling end of a wire or a bus wire entry.
Definition conn_engine.h:58
std::string path
IbisParser parser & reporter
KIBIS_PIN * pin
static std::set< FOOTPRINT * > collectFootprints(const PCB_GROUP *aGroup)
const SHAPE_LINE_CHAIN chain
wxString result
Test unit parsing edge cases and error handling.
wxLogTrace helper definitions.
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition typeinfo.h:70
@ SCH_LINE_T
Definition typeinfo.h:159
@ SCH_NO_CONNECT_T
Definition typeinfo.h:156
@ SCH_SYMBOL_T
Definition typeinfo.h:168
@ SCH_FIELD_T
Definition typeinfo.h:146
@ SCH_LABEL_T
Definition typeinfo.h:163
@ SCH_SHEET_T
Definition typeinfo.h:171
@ SCH_HIER_LABEL_T
Definition typeinfo.h:165
@ SCH_BUS_WIRE_ENTRY_T
Definition typeinfo.h:157
@ SCH_GLOBAL_LABEL_T
Definition typeinfo.h:164
@ SCH_PIN_T
Definition typeinfo.h:149
std::vector< VARIANT_COMPAT_RESULT > ValidateVariantSymbolCompatibility(const LIB_SYMBOL &aBase, const LIB_SYMBOL &aCandidate)
Check whether aCandidate can be used as a variant symbol override for aBase.
VECTOR2< int32_t > VECTOR2I
Definition vector2d.h:708