KiCad PCB EDA Suite
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connectivity_algo.cpp
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1/*
2 * This program source code file is part of KICAD, a free EDA CAD application.
3 *
4 * Copyright (C) 2016-2018 CERN
5 * Copyright (C) 2020-2023 KiCad Developers, see AUTHORS.txt for contributors.
6 *
7 * @author Tomasz Wlostowski <[email protected]>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, you may find one here:
21 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
22 * or you may search the http://www.gnu.org website for the version 2 license,
23 * or you may write to the Free Software Foundation, Inc.,
24 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
25 */
26
27
28#include <algorithm>
29#include <future>
30#include <mutex>
31
33#include <progress_reporter.h>
35#include <board_commit.h>
36#include <core/thread_pool.h>
37#include <pcb_shape.h>
38
39#include <wx/log.h>
40
41#ifdef PROFILE
42#include <core/profile.h>
43#endif
44
45
47{
48 markItemNetAsDirty( aItem );
49
50 switch( aItem->Type() )
51 {
52 case PCB_FOOTPRINT_T:
53 for( PAD* pad : static_cast<FOOTPRINT*>( aItem )->Pads() )
54 {
55 m_itemMap[pad].MarkItemsAsInvalid();
56 m_itemMap.erase( pad );
57 }
58
59 m_itemList.SetDirty( true );
60 break;
61
62 case PCB_PAD_T:
63 case PCB_TRACE_T:
64 case PCB_ARC_T:
65 case PCB_VIA_T:
66 case PCB_ZONE_T:
67 case PCB_SHAPE_T:
68 m_itemMap[aItem].MarkItemsAsInvalid();
69 m_itemMap.erase ( aItem );
70 m_itemList.SetDirty( true );
71 break;
72
73 default:
74 return false;
75 }
76
77 // Once we delete an item, it may connect between lists, so mark both as potentially invalid
79
80 return true;
81}
82
83
85{
86 if( aItem->IsConnected() )
87 {
88 const BOARD_CONNECTED_ITEM* citem = static_cast<const BOARD_CONNECTED_ITEM*>( aItem );
89 MarkNetAsDirty( citem->GetNetCode() );
90 }
91 else
92 {
93 if( aItem->Type() == PCB_FOOTPRINT_T )
94 {
95 const FOOTPRINT* footprint = static_cast<const FOOTPRINT*>( aItem );
96
97 for( PAD* pad : footprint->Pads() )
98 MarkNetAsDirty( pad->GetNetCode() );
99 }
100 }
101}
102
103
105{
106 if( !aItem->IsOnCopperLayer() )
107 return false;
108
109 auto alreadyAdded =
110 [this]( BOARD_ITEM* item )
111 {
112 auto it = m_itemMap.find( item );
113
114 if( it == m_itemMap.end() )
115 return false;
116
117 // Don't be fooled by an empty ITEM_MAP_ENTRY auto-created by operator[].
118 return !it->second.GetItems().empty();
119 };
120
121 switch( aItem->Type() )
122 {
123 case PCB_NETINFO_T:
124 MarkNetAsDirty( static_cast<NETINFO_ITEM*>( aItem )->GetNetCode() );
125 break;
126
127 case PCB_FOOTPRINT_T:
128 {
129 if( static_cast<FOOTPRINT*>( aItem )->GetAttributes() & FP_JUST_ADDED )
130 return false;
131
132 for( PAD* pad : static_cast<FOOTPRINT*>( aItem )->Pads() )
133 {
134 if( alreadyAdded( pad ) )
135 return false;
136
137 add( m_itemList, pad );
138 }
139
140 break;
141 }
142
143 case PCB_PAD_T:
144 {
145 if( FOOTPRINT* fp = aItem->GetParentFootprint() )
146 {
147 if( fp->GetAttributes() & FP_JUST_ADDED )
148 return false;
149 }
150
151 if( alreadyAdded( aItem ) )
152 return false;
153
154 add( m_itemList, static_cast<PAD*>( aItem ) );
155 break;
156 }
157
158 case PCB_TRACE_T:
159 if( alreadyAdded( aItem ) )
160 return false;
161
162 add( m_itemList, static_cast<PCB_TRACK*>( aItem ) );
163 break;
164
165 case PCB_ARC_T:
166 if( alreadyAdded( aItem ) )
167 return false;
168
169 add( m_itemList, static_cast<PCB_ARC*>( aItem ) );
170 break;
171
172 case PCB_VIA_T:
173 if( alreadyAdded( aItem ) )
174 return false;
175
176 add( m_itemList, static_cast<PCB_VIA*>( aItem ) );
177 break;
178
179 case PCB_SHAPE_T:
180 if( alreadyAdded( aItem ) )
181 return false;
182
183 if( !IsCopperLayer( aItem->GetLayer() ) )
184 return false;
185
186 add( m_itemList, static_cast<PCB_SHAPE*>( aItem ) );
187 break;
188
189 case PCB_ZONE_T:
190 {
191 ZONE* zone = static_cast<ZONE*>( aItem );
192
193 if( alreadyAdded( aItem ) )
194 return false;
195
196 m_itemMap[zone] = ITEM_MAP_ENTRY();
197
198 // Don't check for connections on layers that only exist in the zone but
199 // were disabled in the board
200 BOARD* board = zone->GetBoard();
201 LSET layerset = board->GetEnabledLayers() & zone->GetLayerSet();
202
203 layerset.RunOnLayers(
204 [&]( PCB_LAYER_ID layer )
205 {
206 for( CN_ITEM* zitem : m_itemList.Add( zone, layer ) )
207 m_itemMap[zone].Link( zitem );
208 } );
209 }
210 break;
211
212 default:
213 return false;
214 }
215
216 markItemNetAsDirty( aItem );
217
218 return true;
219}
220
221
223{
224 for( CN_ITEM* item : m_itemList )
225 item->RemoveInvalidRefs();
226}
227
228
230{
231#ifdef PROFILE
232 PROF_TIMER garbage_collection( "garbage-collection" );
233#endif
234 std::vector<CN_ITEM*> garbage;
235 garbage.reserve( 1024 );
236
238
239 if( m_isLocal )
240 m_globalConnectivityData->RemoveInvalidRefs();
241
243
244 for( CN_ITEM* item : garbage )
245 delete item;
246
247#ifdef PROFILE
248 garbage_collection.Show();
249 PROF_TIMER search_basic( "search-basic" );
250#endif
251
253 std::vector<CN_ITEM*> dirtyItems;
254 std::copy_if( m_itemList.begin(), m_itemList.end(), std::back_inserter( dirtyItems ),
255 [] ( CN_ITEM* aItem )
256 {
257 return aItem->Dirty();
258 } );
259
261 {
262 m_progressReporter->SetMaxProgress( dirtyItems.size() );
263
265 return;
266 }
267
268 if( m_itemList.IsDirty() )
269 {
270
271 std::vector<std::future<size_t>> returns( dirtyItems.size() );
272
273 auto conn_lambda =
274 [&dirtyItems]( size_t aItem, CN_LIST* aItemList,
275 PROGRESS_REPORTER* aReporter) -> size_t
276 {
277 if( aReporter && aReporter->IsCancelled() )
278 return 0;
279
280 CN_VISITOR visitor( dirtyItems[aItem] );
281 aItemList->FindNearby( dirtyItems[aItem], visitor );
282
283 if( aReporter )
284 aReporter->AdvanceProgress();
285
286 return 1;
287 };
288
289 for( size_t ii = 0; ii < dirtyItems.size(); ++ii )
290 returns[ii] = tp.submit( conn_lambda, ii, &m_itemList, m_progressReporter );
291
292 for( const std::future<size_t>& ret : returns )
293 {
294 // Here we balance returns with a 250ms timeout to allow UI updating
295 std::future_status status = ret.wait_for( std::chrono::milliseconds( 250 ) );
296
297 while( status != std::future_status::ready )
298 {
301
302 status = ret.wait_for( std::chrono::milliseconds( 250 ) );
303 }
304 }
305
308 }
309
310#ifdef PROFILE
311 search_basic.Show();
312#endif
313
315}
316
317
319{
320 static const std::vector<KICAD_T> withoutZones = { PCB_TRACE_T,
321 PCB_ARC_T,
322 PCB_PAD_T,
323 PCB_VIA_T,
325 PCB_SHAPE_T };
326 static const std::vector<KICAD_T> withZones = { PCB_TRACE_T,
327 PCB_ARC_T,
328 PCB_PAD_T,
329 PCB_VIA_T,
332 PCB_SHAPE_T };
333
334 return SearchClusters( aMode, aMode == CSM_PROPAGATE ? withoutZones : withZones, -1 );
335}
336
337
339CN_CONNECTIVITY_ALGO::SearchClusters( CLUSTER_SEARCH_MODE aMode, const std::vector<KICAD_T>& aTypes,
340 int aSingleNet, CN_ITEM* rootItem )
341{
342 bool withinAnyNet = ( aMode != CSM_PROPAGATE );
343
344 std::deque<CN_ITEM*> Q;
345 std::set<CN_ITEM*> item_set;
346
347 CLUSTERS clusters;
348
349 if( m_itemList.IsDirty() )
351
352 auto addToSearchList =
353 [&item_set, withinAnyNet, aSingleNet, &aTypes, rootItem ]( CN_ITEM *aItem )
354 {
355 if( withinAnyNet && aItem->Net() <= 0 )
356 return;
357
358 if( !aItem->Valid() )
359 return;
360
361 if( aSingleNet >=0 && aItem->Net() != aSingleNet )
362 return;
363
364 bool found = false;
365
366 for( KICAD_T type : aTypes )
367 {
368 if( aItem->Parent()->Type() == type )
369 {
370 found = true;
371 break;
372 }
373 }
374
375 if( !found && aItem != rootItem )
376 return;
377
378 aItem->SetVisited( false );
379
380 item_set.insert( aItem );
381 };
382
383 std::for_each( m_itemList.begin(), m_itemList.end(), addToSearchList );
384
386 return CLUSTERS();
387
388 while( !item_set.empty() )
389 {
390 std::shared_ptr<CN_CLUSTER> cluster = std::make_shared<CN_CLUSTER>();
391 CN_ITEM* root;
392 auto it = item_set.begin();
393
394 while( it != item_set.end() && (*it)->Visited() )
395 it = item_set.erase( item_set.begin() );
396
397 if( it == item_set.end() )
398 break;
399
400 root = *it;
401 root->SetVisited( true );
402
403 Q.clear();
404 Q.push_back( root );
405
406 while( Q.size() )
407 {
408 CN_ITEM* current = Q.front();
409
410 Q.pop_front();
411 cluster->Add( current );
412
413 for( CN_ITEM* n : current->ConnectedItems() )
414 {
415 if( withinAnyNet && n->Net() != root->Net() )
416 continue;
417
418 if( !n->Visited() && n->Valid() )
419 {
420 n->SetVisited( true );
421 Q.push_back( n );
422 }
423 }
424 }
425
426 clusters.push_back( cluster );
427 }
428
430 return CLUSTERS();
431
432 std::sort( clusters.begin(), clusters.end(),
433 []( const std::shared_ptr<CN_CLUSTER>& a, const std::shared_ptr<CN_CLUSTER>& b )
434 {
435 return a->OriginNet() < b->OriginNet();
436 } );
437
438 return clusters;
439}
440
441
443{
444 // Generate CN_ZONE_LAYERs for each island on each layer of each zone
445 //
446 std::vector<CN_ZONE_LAYER*> zitems;
447
448 for( ZONE* zone : aBoard->Zones() )
449 {
450 if( zone->IsOnCopperLayer() )
451 {
452 m_itemMap[zone] = ITEM_MAP_ENTRY();
453 markItemNetAsDirty( zone );
454
455 // Don't check for connections on layers that only exist in the zone but
456 // were disabled in the board
457 BOARD* board = zone->GetBoard();
458 LSET layerset = board->GetEnabledLayers() & zone->GetLayerSet() & LSET::AllCuMask();
459
460 layerset.RunOnLayers(
461 [&]( PCB_LAYER_ID layer )
462 {
463 for( int j = 0; j < zone->GetFilledPolysList( layer )->OutlineCount(); j++ )
464 zitems.push_back( new CN_ZONE_LAYER( zone, layer, j ) );
465 } );
466 }
467 }
468
469 // Setup progress metrics
470 //
471 int progressDelta = 50;
472 double size = 0.0;
473
474 size += zitems.size(); // Once for building RTrees
475 size += zitems.size(); // Once for adding to connectivity
476 size += aBoard->Tracks().size();
477 size += aBoard->Drawings().size();
478
479 for( FOOTPRINT* footprint : aBoard->Footprints() )
480 size += footprint->Pads().size();
481
482 size *= 1.5; // Our caller gets the other third of the progress bar
483
484 progressDelta = std::max( progressDelta, (int) size / 4 );
485
486 auto report =
487 [&]( int progress )
488 {
489 if( aReporter && ( progress % progressDelta ) == 0 )
490 {
491 aReporter->SetCurrentProgress( progress / size );
492 aReporter->KeepRefreshing( false );
493 }
494 };
495
496 // Generate RTrees for CN_ZONE_LAYER items (in parallel)
497 //
499 std::vector<std::future<size_t>> returns( zitems.size() );
500
501 auto cache_zones =
502 [aReporter]( CN_ZONE_LAYER* aZoneLayer ) -> size_t
503 {
504 if( aReporter && aReporter->IsCancelled() )
505 return 0;
506
507 aZoneLayer->BuildRTree();
508
509 if( aReporter )
510 aReporter->AdvanceProgress();
511
512 return 1;
513 };
514
515 for( size_t ii = 0; ii < zitems.size(); ++ii )
516 returns[ii] = tp.submit( cache_zones, zitems[ii] );
517
518 for( const std::future<size_t>& ret : returns )
519 {
520 std::future_status status = ret.wait_for( std::chrono::milliseconds( 250 ) );
521
522 while( status != std::future_status::ready )
523 {
524 if( aReporter )
525 aReporter->KeepRefreshing();
526
527 status = ret.wait_for( std::chrono::milliseconds( 250 ) );
528 }
529
530 }
531
532 // Add CN_ZONE_LAYERS, tracks, and pads to connectivity
533 //
534 int ii = zitems.size();
535
536 for( CN_ZONE_LAYER* zitem : zitems )
537 {
538 m_itemList.Add( zitem );
539 m_itemMap[ zitem->Parent() ].Link( zitem );
540 report( ++ii );
541 }
542
543 for( PCB_TRACK* tv : aBoard->Tracks() )
544 {
545 Add( tv );
546 report( ++ii );
547 }
548
549 for( FOOTPRINT* footprint : aBoard->Footprints() )
550 {
551 for( PAD* pad : footprint->Pads() )
552 {
553 Add( pad );
554 report( ++ii );
555 }
556 }
557
558 for( BOARD_ITEM* drawing : aBoard->Drawings() )
559 {
560 if( PCB_SHAPE* shape = dynamic_cast<PCB_SHAPE*>( drawing ) )
561 {
562 if( shape->IsOnCopperLayer() )
563 Add( shape );
564 }
565
566 report( ++ii );
567 }
568
569 if( aReporter )
570 {
571 aReporter->SetCurrentProgress( (double) ii / (double) size );
572 aReporter->KeepRefreshing( false );
573 }
574}
575
576
577void CN_CONNECTIVITY_ALGO::LocalBuild( std::shared_ptr<CONNECTIVITY_DATA> aGlobalConnectivity,
578 const std::vector<BOARD_ITEM*>& aLocalItems )
579{
580 m_isLocal = true;
581 m_globalConnectivityData = aGlobalConnectivity;
582
583 for( BOARD_ITEM* item : aLocalItems )
584 {
585 switch( item->Type() )
586 {
587 case PCB_TRACE_T:
588 case PCB_ARC_T:
589 case PCB_VIA_T:
590 case PCB_PAD_T:
591 case PCB_FOOTPRINT_T:
592 case PCB_SHAPE_T:
593 Add( item );
594 break;
595
596 default:
597 break;
598 }
599 }
600}
601
602
604{
605 for( const std::shared_ptr<CN_CLUSTER>& cluster : m_connClusters )
606 {
607 if( cluster->IsConflicting() )
608 {
609 // Conflicting pads in cluster: we don't know the user's intent so best to do
610 // nothing.
611 wxLogTrace( wxT( "CN" ), wxT( "Conflicting pads in cluster %p; skipping propagation" ),
612 cluster.get() );
613 }
614 else if( cluster->HasValidNet() )
615 {
616 // Propagate from the origin (will be a pad if there are any, or another item if
617 // there are no pads).
618 int n_changed = 0;
619
620 for( CN_ITEM* item : *cluster )
621 {
622 if( item->Valid() && item->CanChangeNet()
623 && item->Parent()->GetNetCode() != cluster->OriginNet() )
624 {
625 MarkNetAsDirty( item->Parent()->GetNetCode() );
626 MarkNetAsDirty( cluster->OriginNet() );
627
628 if( aCommit )
629 aCommit->Modify( item->Parent() );
630
631 item->Parent()->SetNetCode( cluster->OriginNet() );
632 n_changed++;
633 }
634 }
635
636 if( n_changed )
637 {
638 wxLogTrace( wxT( "CN" ), wxT( "Cluster %p: net: %d %s" ),
639 cluster.get(),
640 cluster->OriginNet(),
641 (const char*) cluster->OriginNetName().c_str() );
642 }
643 else
644 {
645 wxLogTrace( wxT( "CN" ), wxT( "Cluster %p: no changeable items to propagate to" ),
646 cluster.get() );
647 }
648 }
649 else
650 {
651 wxLogTrace( wxT( "CN" ), wxT( "Cluster %p: connected to unused net" ),
652 cluster.get() );
653 }
654 }
655}
656
657
659{
661 propagateConnections( aCommit );
662}
663
664
666 std::map<ZONE*, std::map<PCB_LAYER_ID, ISOLATED_ISLANDS>>& aMap,
667 bool aConnectivityAlreadyRebuilt )
668{
669 int progressDelta = 50;
670 int ii = 0;
671
672 progressDelta = std::max( progressDelta, (int) aMap.size() / 4 );
673
674 if( !aConnectivityAlreadyRebuilt )
675 {
676 for( const auto& [ zone, islands ] : aMap )
677 {
678 Remove( zone );
679 Add( zone );
680 ii++;
681
682 if( m_progressReporter && ( ii % progressDelta ) == 0 )
683 {
684 m_progressReporter->SetCurrentProgress( (double) ii / (double) aMap.size() );
686 }
687
689 return;
690 }
691 }
692
694
695 for( auto& [ zone, zoneIslands ] : aMap )
696 {
697 for( auto& [ layer, layerIslands ] : zoneIslands )
698 {
699 if( zone->GetFilledPolysList( layer )->IsEmpty() )
700 continue;
701
702 for( const std::shared_ptr<CN_CLUSTER>& cluster : m_connClusters )
703 {
704 for( CN_ITEM* item : *cluster )
705 {
706 if( item->Parent() == zone && item->GetBoardLayer() == layer )
707 {
708 CN_ZONE_LAYER* z = static_cast<CN_ZONE_LAYER*>( item );
709
710 if( cluster->IsOrphaned() )
711 layerIslands.m_IsolatedOutlines.push_back( z->SubpolyIndex() );
712 else if( z->HasSingleConnection() )
713 layerIslands.m_SingleConnectionOutlines.push_back( z->SubpolyIndex() );
714 }
715 }
716 }
717 }
718 }
719}
720
721
723{
725 return m_ratsnestClusters;
726}
727
728
730{
731 if( aNet < 0 )
732 return;
733
734 if( (int) m_dirtyNets.size() <= aNet )
735 {
736 int lastNet = m_dirtyNets.size() - 1;
737
738 if( lastNet < 0 )
739 lastNet = 0;
740
741 m_dirtyNets.resize( aNet + 1 );
742
743 for( int i = lastNet; i < aNet + 1; i++ )
744 m_dirtyNets[i] = true;
745 }
746
747 m_dirtyNets[aNet] = true;
748}
749
750
752{
753 PCB_LAYER_ID layer = aZoneLayer->GetLayer();
754 BOARD_CONNECTED_ITEM* item = aItem->Parent();
755
756 if( !item->IsOnLayer( layer ) )
757 return;
758
759 auto connect =
760 [&]()
761 {
762 aZoneLayer->Connect( aItem );
763 aItem->Connect( aZoneLayer );
764 };
765
766 // Try quick checks first...
767 if( item->Type() == PCB_PAD_T )
768 {
769 PAD* pad = static_cast<PAD*>( item );
770
771 if( pad->ConditionallyFlashed( layer )
772 && pad->GetZoneLayerOverride( layer ) == ZLO_FORCE_NO_ZONE_CONNECTION )
773 {
774 return;
775 }
776 }
777 else if( item->Type() == PCB_VIA_T )
778 {
779 PCB_VIA* via = static_cast<PCB_VIA*>( item );
780
781 if( via->ConditionallyFlashed( layer )
782 && via->GetZoneLayerOverride( layer ) == ZLO_FORCE_NO_ZONE_CONNECTION )
783 {
784 return;
785 }
786 }
787
788 for( int i = 0; i < aItem->AnchorCount(); ++i )
789 {
790 if( aZoneLayer->ContainsPoint( aItem->GetAnchor( i ) ) )
791 {
792 connect();
793 return;
794 }
795 }
796
797 if( item->Type() == PCB_VIA_T || item->Type() == PCB_PAD_T )
798 {
799 // As long as the pad/via crosses the zone layer, check for the full effective shape
800 // We check for the overlapping layers above
801 if( aZoneLayer->Collide( item->GetEffectiveShape( layer, FLASHING::ALWAYS_FLASHED ).get() ) )
802 connect();
803
804 return;
805 }
806
807 if( aZoneLayer->Collide( item->GetEffectiveShape( layer ).get() ) )
808 connect();
809}
810
812{
813 const ZONE* zoneA = static_cast<const ZONE*>( aZoneLayerA->Parent() );
814 const ZONE* zoneB = static_cast<const ZONE*>( aZoneLayerB->Parent() );
815
816 const BOX2I& boxA = aZoneLayerA->BBox();
817 const BOX2I& boxB = aZoneLayerB->BBox();
818
819 PCB_LAYER_ID layer = aZoneLayerA->GetLayer();
820
821 if( aZoneLayerB->GetLayer() != layer )
822 return;
823
824 if( !boxA.Intersects( boxB ) )
825 return;
826
827 const SHAPE_LINE_CHAIN& outline =
828 zoneA->GetFilledPolysList( layer )->COutline( aZoneLayerA->SubpolyIndex() );
829
830 for( int i = 0; i < outline.PointCount(); i++ )
831 {
832 if( !boxB.Contains( outline.CPoint( i ) ) )
833 continue;
834
835 if( aZoneLayerB->ContainsPoint( outline.CPoint( i ) ) )
836 {
837 aZoneLayerA->Connect( aZoneLayerB );
838 aZoneLayerB->Connect( aZoneLayerA );
839 return;
840 }
841 }
842
843 const SHAPE_LINE_CHAIN& outline2 =
844 zoneB->GetFilledPolysList( layer )->COutline( aZoneLayerB->SubpolyIndex() );
845
846 for( int i = 0; i < outline2.PointCount(); i++ )
847 {
848 if( !boxA.Contains( outline2.CPoint( i ) ) )
849 continue;
850
851 if( aZoneLayerA->ContainsPoint( outline2.CPoint( i ) ) )
852 {
853 aZoneLayerA->Connect( aZoneLayerB );
854 aZoneLayerB->Connect( aZoneLayerA );
855 return;
856 }
857 }
858}
859
860
862{
863 const BOARD_CONNECTED_ITEM* parentA = aCandidate->Parent();
864 const BOARD_CONNECTED_ITEM* parentB = m_item->Parent();
865
866 if( !aCandidate->Valid() || !m_item->Valid() )
867 return true;
868
869 if( parentA == parentB )
870 return true;
871
872 // Don't connect items in different nets that can't be changed
873 if( !aCandidate->CanChangeNet() && !m_item->CanChangeNet() && aCandidate->Net() != m_item->Net() )
874 return true;
875
876 // If both m_item and aCandidate are marked dirty, they will both be searched
877 // Since we are reciprocal in our connection, we arbitrarily pick one of the connections
878 // to conduct the expensive search
879 if( aCandidate->Dirty() && aCandidate < m_item )
880 return true;
881
882 // We should handle zone-zone connection separately
883 if ( parentA->Type() == PCB_ZONE_T && parentB->Type() == PCB_ZONE_T )
884 {
886 static_cast<CN_ZONE_LAYER*>( aCandidate ) );
887 return true;
888 }
889
890 if( parentA->Type() == PCB_ZONE_T )
891 {
892 checkZoneItemConnection( static_cast<CN_ZONE_LAYER*>( aCandidate ), m_item );
893 return true;
894 }
895
896 if( parentB->Type() == PCB_ZONE_T )
897 {
898 checkZoneItemConnection( static_cast<CN_ZONE_LAYER*>( m_item ), aCandidate );
899 return true;
900 }
901
902 LSET commonLayers = parentA->GetLayerSet() & parentB->GetLayerSet();
903
904 for( size_t ii = 0; ii < commonLayers.size(); ++ii )
905 {
906 if( commonLayers.test( ii ) )
907 {
908 PCB_LAYER_ID layer = PCB_LAYER_ID( ii );
909 FLASHING flashingA = FLASHING::NEVER_FLASHED;
910 FLASHING flashingB = FLASHING::NEVER_FLASHED;
911
912 if( parentA->Type() == PCB_PAD_T )
913 {
914 if( !static_cast<const PAD*>( parentA )->ConditionallyFlashed( layer ) )
915 flashingA = FLASHING::ALWAYS_FLASHED;
916 }
917 else if( parentA->Type() == PCB_VIA_T )
918 {
919 if( !static_cast<const PCB_VIA*>( parentA )->ConditionallyFlashed( layer ) )
920 flashingA = FLASHING::ALWAYS_FLASHED;
921 }
922
923 if( parentB->Type() == PCB_PAD_T )
924 {
925 if( !static_cast<const PAD*>( parentB )->ConditionallyFlashed( layer ) )
926 flashingB = FLASHING::ALWAYS_FLASHED;
927 }
928 else if( parentB->Type() == PCB_VIA_T )
929 {
930 if( !static_cast<const PCB_VIA*>( parentB )->ConditionallyFlashed( layer ) )
931 flashingB = FLASHING::ALWAYS_FLASHED;
932 }
933
934 if( parentA->GetEffectiveShape( layer, flashingA )->Collide(
935 parentB->GetEffectiveShape( layer, flashingB ).get() ) )
936 {
937 m_item->Connect( aCandidate );
938 aCandidate->Connect( m_item );
939 return true;
940 }
941 }
942 }
943
944 return true;
945};
946
947
949{
950 m_ratsnestClusters.clear();
951 m_connClusters.clear();
952 m_itemMap.clear();
954
955}
956
958{
959 m_progressReporter = aReporter;
960}
@ ZLO_FORCE_NO_ZONE_CONNECTION
Definition: board_item.h:70
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:80
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:238
virtual bool IsConnected() const
Returns information if the object is derived from BOARD_CONNECTED_ITEM.
Definition: board_item.h:134
virtual bool IsOnLayer(PCB_LAYER_ID aLayer) const
Test to see if this object is on the given layer.
Definition: board_item.h:320
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: board_item.cpp:279
virtual const BOARD * GetBoard() const
Return the BOARD in which this BOARD_ITEM resides, or NULL if none.
Definition: board_item.cpp:47
FOOTPRINT * GetParentFootprint() const
Definition: board_item.cpp:299
virtual LSET GetLayerSet() const
Return a std::bitset of all layers on which the item physically resides.
Definition: board_item.h:258
virtual bool IsOnCopperLayer() const
Definition: board_item.h:151
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:290
LSET GetEnabledLayers() const
A proxy function that calls the corresponding function in m_BoardSettings.
Definition: board.cpp:773
const ZONES & Zones() const
Definition: board.h:335
const FOOTPRINTS & Footprints() const
Definition: board.h:331
const TRACKS & Tracks() const
Definition: board.h:329
const DRAWINGS & Drawings() const
Definition: board.h:333
constexpr bool Contains(const Vec &aPoint) const
Definition: box2.h:168
constexpr bool Intersects(const BOX2< Vec > &aRect) const
Definition: box2.h:311
void FillIsolatedIslandsMap(std::map< ZONE *, std::map< PCB_LAYER_ID, ISOLATED_ISLANDS > > &aMap, bool aConnectivityAlreadyRebuilt)
Fill in the isolated islands map with copper islands that are not connected to a net.
bool Remove(BOARD_ITEM *aItem)
CONNECTIVITY_DATA * m_parentConnectivityData
void add(Container &c, BItem brditem)
PROGRESS_REPORTER * m_progressReporter
std::vector< std::shared_ptr< CN_CLUSTER > > m_connClusters
void LocalBuild(std::shared_ptr< CONNECTIVITY_DATA > aGlobalConnectivity, const std::vector< BOARD_ITEM * > &aLocalItems)
void propagateConnections(BOARD_COMMIT *aCommit=nullptr)
const CLUSTERS & GetClusters()
void MarkNetAsDirty(int aNet)
void markItemNetAsDirty(const BOARD_ITEM *aItem)
std::vector< std::shared_ptr< CN_CLUSTER > > m_ratsnestClusters
void PropagateNets(BOARD_COMMIT *aCommit=nullptr)
Propagate nets from pads to other items in clusters.
std::shared_ptr< CONNECTIVITY_DATA > m_globalConnectivityData
const CLUSTERS SearchClusters(CLUSTER_SEARCH_MODE aMode, const std::vector< KICAD_T > &aTypes, int aSingleNet, CN_ITEM *rootItem=nullptr)
std::vector< bool > m_dirtyNets
std::vector< std::shared_ptr< CN_CLUSTER > > CLUSTERS
std::unordered_map< const BOARD_ITEM *, ITEM_MAP_ENTRY > m_itemMap
void SetProgressReporter(PROGRESS_REPORTER *aReporter)
void Build(BOARD *aBoard, PROGRESS_REPORTER *aReporter=nullptr)
bool Add(BOARD_ITEM *aItem)
CN_ITEM represents a BOARD_CONNETED_ITEM in the connectivity system (ie: a pad, track/arc/via,...
void Connect(CN_ITEM *b)
const BOX2I & BBox()
virtual int AnchorCount() const
const std::vector< CN_ITEM * > & ConnectedItems() const
int Net() const
bool Valid() const
virtual const VECTOR2I GetAnchor(int n) const
bool CanChangeNet() const
void SetVisited(bool aVisited)
bool Dirty() const
BOARD_CONNECTED_ITEM * Parent() const
CN_ITEM * Add(PAD *pad)
std::vector< CN_ITEM * >::iterator begin()
void SetDirty(bool aDirty=true)
bool IsDirty() const
std::vector< CN_ITEM * >::iterator end()
void ClearDirtyFlags()
void SetHasInvalid(bool aInvalid=true)
void RemoveInvalidItems(std::vector< CN_ITEM * > &aGarbage)
void checkZoneItemConnection(CN_ZONE_LAYER *aZoneLayer, CN_ITEM *aItem)
CN_ITEM * m_item
The item we are looking for connections to.
void checkZoneZoneConnection(CN_ZONE_LAYER *aZoneLayerA, CN_ZONE_LAYER *aZoneLayerB)
bool operator()(CN_ITEM *aCandidate)
PCB_LAYER_ID GetLayer() const
bool Collide(SHAPE *aRefShape) const
int SubpolyIndex() const
bool ContainsPoint(const VECTOR2I &p) const
COMMIT & Modify(EDA_ITEM *aItem, BASE_SCREEN *aScreen=nullptr)
Create an undo entry for an item that has been already modified.
Definition: commit.h:105
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:101
std::deque< PAD * > & Pads()
Definition: footprint.h:205
LSET is a set of PCB_LAYER_IDs.
Definition: lset.h:36
void RunOnLayers(const std::function< void(PCB_LAYER_ID)> &aFunction) const
Execute a function on each layer of the LSET.
Definition: lset.h:241
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:676
Handle the data for a net.
Definition: netinfo.h:56
Definition: pad.h:54
A small class to help profiling.
Definition: profile.h:49
void Show(std::ostream &aStream=std::cerr)
Print the elapsed time (in a suitable unit) to a stream.
Definition: profile.h:105
A progress reporter interface for use in multi-threaded environments.
virtual bool IsCancelled() const =0
virtual bool KeepRefreshing(bool aWait=false)=0
Update the UI (if any).
virtual void AdvanceProgress()=0
Increment the progress bar length (inside the current virtual zone).
virtual void SetCurrentProgress(double aProgress)=0
Set the progress value to aProgress (0..1).
virtual void SetMaxProgress(int aMaxProgress)=0
Fix the value that gives the 100 percent progress bar length (inside the current virtual zone).
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
int PointCount() const
Return the number of points (vertices) in this line chain.
const VECTOR2I & CPoint(int aIndex) const
Return a reference to a given point in the line chain.
Handle a list of polygons defining a copper zone.
Definition: zone.h:73
const std::shared_ptr< SHAPE_POLY_SET > & GetFilledPolysList(PCB_LAYER_ID aLayer) const
Definition: zone.h:617
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: zone.h:130
@ FP_JUST_ADDED
Definition: footprint.h:79
a few functions useful in geometry calculations.
FLASHING
Enum used during connectivity building to ensure we do not query connectivity while building the data...
Definition: layer_ids.h:147
bool IsCopperLayer(int aLayerId)
Tests whether a layer is a copper layer.
Definition: layer_ids.h:530
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
static thread_pool * tp
Definition: thread_pool.cpp:30
BS::thread_pool thread_pool
Definition: thread_pool.h:30
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
Definition: thread_pool.cpp:32
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:78
@ PCB_SHAPE_T
class PCB_SHAPE, a segment not on copper layers
Definition: typeinfo.h:88
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:97
@ PCB_ZONE_T
class ZONE, a copper pour area
Definition: typeinfo.h:107
@ PCB_FOOTPRINT_T
class FOOTPRINT, a footprint
Definition: typeinfo.h:86
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:98
@ PCB_NETINFO_T
class NETINFO_ITEM, a description of a net
Definition: typeinfo.h:109
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:96