KiCad PCB EDA Suite
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connectivity_algo.cpp
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1/*
2 * This program source code file is part of KICAD, a free EDA CAD application.
3 *
4 * Copyright (C) 2016-2018 CERN
5 * Copyright (C) 2020-2023 KiCad Developers, see AUTHORS.txt for contributors.
6 *
7 * @author Tomasz Wlostowski <[email protected]>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, you may find one here:
21 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
22 * or you may search the http://www.gnu.org website for the version 2 license,
23 * or you may write to the Free Software Foundation, Inc.,
24 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
25 */
26
27
28#include <algorithm>
29#include <future>
30#include <mutex>
31
33#include <progress_reporter.h>
35#include <board_commit.h>
36#include <core/thread_pool.h>
37#include <pcb_shape.h>
38
39#include <wx/log.h>
40
41#ifdef PROFILE
42#include <core/profile.h>
43#endif
44
45
47{
48 markItemNetAsDirty( aItem );
49
50 switch( aItem->Type() )
51 {
52 case PCB_FOOTPRINT_T:
53 for( PAD* pad : static_cast<FOOTPRINT*>( aItem )->Pads() )
54 {
55 m_itemMap[pad].MarkItemsAsInvalid();
56 m_itemMap.erase( pad );
57 }
58
59 m_itemList.SetDirty( true );
60 break;
61
62 case PCB_PAD_T:
63 case PCB_TRACE_T:
64 case PCB_ARC_T:
65 case PCB_VIA_T:
66 case PCB_ZONE_T:
67 case PCB_SHAPE_T:
68 m_itemMap[aItem].MarkItemsAsInvalid();
69 m_itemMap.erase ( aItem );
70 m_itemList.SetDirty( true );
71 break;
72
73 default:
74 return false;
75 }
76
77 // Once we delete an item, it may connect between lists, so mark both as potentially invalid
79
80 return true;
81}
82
83
85{
86 if( aItem->IsConnected() )
87 {
88 const BOARD_CONNECTED_ITEM* citem = static_cast<const BOARD_CONNECTED_ITEM*>( aItem );
89 MarkNetAsDirty( citem->GetNetCode() );
90 }
91 else
92 {
93 if( aItem->Type() == PCB_FOOTPRINT_T )
94 {
95 const FOOTPRINT* footprint = static_cast<const FOOTPRINT*>( aItem );
96
97 for( PAD* pad : footprint->Pads() )
98 MarkNetAsDirty( pad->GetNetCode() );
99 }
100 }
101}
102
103
105{
106 if( !aItem->IsOnCopperLayer() )
107 return false;
108
109 auto alreadyAdded =
110 [this]( BOARD_ITEM* item )
111 {
112 auto it = m_itemMap.find( item );
113
114 if( it == m_itemMap.end() )
115 return false;
116
117 // Don't be fooled by an empty ITEM_MAP_ENTRY auto-created by operator[].
118 return !it->second.GetItems().empty();
119 };
120
121 switch( aItem->Type() )
122 {
123 case PCB_NETINFO_T:
124 MarkNetAsDirty( static_cast<NETINFO_ITEM*>( aItem )->GetNetCode() );
125 break;
126
127 case PCB_FOOTPRINT_T:
128 {
129 if( static_cast<FOOTPRINT*>( aItem )->GetAttributes() & FP_JUST_ADDED )
130 return false;
131
132 for( PAD* pad : static_cast<FOOTPRINT*>( aItem )->Pads() )
133 {
134 if( alreadyAdded( pad ) )
135 return false;
136
137 add( m_itemList, pad );
138 }
139
140 break;
141 }
142
143 case PCB_PAD_T:
144 {
145 if( FOOTPRINT* fp = aItem->GetParentFootprint() )
146 {
147 if( fp->GetAttributes() & FP_JUST_ADDED )
148 return false;
149 }
150
151 if( alreadyAdded( aItem ) )
152 return false;
153
154 add( m_itemList, static_cast<PAD*>( aItem ) );
155 break;
156 }
157
158 case PCB_TRACE_T:
159 if( alreadyAdded( aItem ) )
160 return false;
161
162 add( m_itemList, static_cast<PCB_TRACK*>( aItem ) );
163 break;
164
165 case PCB_ARC_T:
166 if( alreadyAdded( aItem ) )
167 return false;
168
169 add( m_itemList, static_cast<PCB_ARC*>( aItem ) );
170 break;
171
172 case PCB_VIA_T:
173 if( alreadyAdded( aItem ) )
174 return false;
175
176 add( m_itemList, static_cast<PCB_VIA*>( aItem ) );
177 break;
178
179 case PCB_SHAPE_T:
180 if( alreadyAdded( aItem ) )
181 return false;
182
183 if( !IsCopperLayer( aItem->GetLayer() ) )
184 return false;
185
186 add( m_itemList, static_cast<PCB_SHAPE*>( aItem ) );
187 break;
188
189 case PCB_ZONE_T:
190 {
191 ZONE* zone = static_cast<ZONE*>( aItem );
192
193 if( alreadyAdded( aItem ) )
194 return false;
195
196 m_itemMap[zone] = ITEM_MAP_ENTRY();
197
198 // Don't check for connections on layers that only exist in the zone but
199 // were disabled in the board
200 BOARD* board = zone->GetBoard();
201 LSET layerset = board->GetEnabledLayers() & zone->GetLayerSet();
202
203 for( PCB_LAYER_ID layer : layerset.Seq() )
204 {
205 for( CN_ITEM* zitem : m_itemList.Add( zone, layer ) )
206 m_itemMap[zone].Link( zitem );
207 }
208 }
209 break;
210
211 default:
212 return false;
213 }
214
215 markItemNetAsDirty( aItem );
216
217 return true;
218}
219
220
222{
223 for( CN_ITEM* item : m_itemList )
224 item->RemoveInvalidRefs();
225}
226
227
229{
230#ifdef PROFILE
231 PROF_TIMER garbage_collection( "garbage-collection" );
232#endif
233 std::vector<CN_ITEM*> garbage;
234 garbage.reserve( 1024 );
235
237
238 if( m_isLocal )
239 m_globalConnectivityData->RemoveInvalidRefs();
240
242
243 for( CN_ITEM* item : garbage )
244 delete item;
245
246#ifdef PROFILE
247 garbage_collection.Show();
248 PROF_TIMER search_basic( "search-basic" );
249#endif
250
252 std::vector<CN_ITEM*> dirtyItems;
253 std::copy_if( m_itemList.begin(), m_itemList.end(), std::back_inserter( dirtyItems ),
254 [] ( CN_ITEM* aItem )
255 {
256 return aItem->Dirty();
257 } );
258
260 {
261 m_progressReporter->SetMaxProgress( dirtyItems.size() );
262
264 return;
265 }
266
267 if( m_itemList.IsDirty() )
268 {
269
270 std::vector<std::future<size_t>> returns( dirtyItems.size() );
271
272 auto conn_lambda =
273 [&dirtyItems]( size_t aItem, CN_LIST* aItemList,
274 PROGRESS_REPORTER* aReporter) -> size_t
275 {
276 if( aReporter && aReporter->IsCancelled() )
277 return 0;
278
279 CN_VISITOR visitor( dirtyItems[aItem] );
280 aItemList->FindNearby( dirtyItems[aItem], visitor );
281
282 if( aReporter )
283 aReporter->AdvanceProgress();
284
285 return 1;
286 };
287
288 for( size_t ii = 0; ii < dirtyItems.size(); ++ii )
289 returns[ii] = tp.submit( conn_lambda, ii, &m_itemList, m_progressReporter );
290
291 for( const std::future<size_t>& ret : returns )
292 {
293 // Here we balance returns with a 250ms timeout to allow UI updating
294 std::future_status status = ret.wait_for( std::chrono::milliseconds( 250 ) );
295
296 while( status != std::future_status::ready )
297 {
300
301 status = ret.wait_for( std::chrono::milliseconds( 250 ) );
302 }
303 }
304
307 }
308
309#ifdef PROFILE
310 search_basic.Show();
311#endif
312
314}
315
316
318{
319 if( aMode == CSM_PROPAGATE )
320 {
321 return SearchClusters( aMode,
323 PCB_SHAPE_T },
324 -1 );
325 }
326 else
327 {
328 return SearchClusters( aMode,
331 -1 );
332 }
333}
334
335
338 const std::initializer_list<KICAD_T>& aTypes,
339 int aSingleNet, CN_ITEM* rootItem )
340{
341 bool withinAnyNet = ( aMode != CSM_PROPAGATE );
342
343 std::deque<CN_ITEM*> Q;
344 std::set<CN_ITEM*> item_set;
345
346 CLUSTERS clusters;
347
348 if( m_itemList.IsDirty() )
350
351 auto addToSearchList =
352 [&item_set, withinAnyNet, aSingleNet, &aTypes, rootItem ]( CN_ITEM *aItem )
353 {
354 if( withinAnyNet && aItem->Net() <= 0 )
355 return;
356
357 if( !aItem->Valid() )
358 return;
359
360 if( aSingleNet >=0 && aItem->Net() != aSingleNet )
361 return;
362
363 bool found = false;
364
365 for( KICAD_T type : aTypes )
366 {
367 if( aItem->Parent()->Type() == type )
368 {
369 found = true;
370 break;
371 }
372 }
373
374 if( !found && aItem != rootItem )
375 return;
376
377 aItem->SetVisited( false );
378
379 item_set.insert( aItem );
380 };
381
382 std::for_each( m_itemList.begin(), m_itemList.end(), addToSearchList );
383
385 return CLUSTERS();
386
387 while( !item_set.empty() )
388 {
389 std::shared_ptr<CN_CLUSTER> cluster = std::make_shared<CN_CLUSTER>();
390 CN_ITEM* root;
391 auto it = item_set.begin();
392
393 while( it != item_set.end() && (*it)->Visited() )
394 it = item_set.erase( item_set.begin() );
395
396 if( it == item_set.end() )
397 break;
398
399 root = *it;
400 root->SetVisited( true );
401
402 Q.clear();
403 Q.push_back( root );
404
405 while( Q.size() )
406 {
407 CN_ITEM* current = Q.front();
408
409 Q.pop_front();
410 cluster->Add( current );
411
412 for( CN_ITEM* n : current->ConnectedItems() )
413 {
414 if( withinAnyNet && n->Net() != root->Net() )
415 continue;
416
417 if( !n->Visited() && n->Valid() )
418 {
419 n->SetVisited( true );
420 Q.push_back( n );
421 }
422 }
423 }
424
425 clusters.push_back( cluster );
426 }
427
429 return CLUSTERS();
430
431 std::sort( clusters.begin(), clusters.end(),
432 []( const std::shared_ptr<CN_CLUSTER>& a, const std::shared_ptr<CN_CLUSTER>& b )
433 {
434 return a->OriginNet() < b->OriginNet();
435 } );
436
437 return clusters;
438}
439
440
442{
443 // Generate CN_ZONE_LAYERs for each island on each layer of each zone
444 //
445 std::vector<CN_ZONE_LAYER*> zitems;
446
447 for( ZONE* zone : aBoard->Zones() )
448 {
449 if( zone->IsOnCopperLayer() )
450 {
451 m_itemMap[zone] = ITEM_MAP_ENTRY();
452 markItemNetAsDirty( zone );
453
454 // Don't check for connections on layers that only exist in the zone but
455 // were disabled in the board
456 BOARD* board = zone->GetBoard();
457 LSET layerset = board->GetEnabledLayers() & zone->GetLayerSet() & LSET::AllCuMask();
458
459 for( PCB_LAYER_ID layer : layerset.Seq() )
460 {
461 for( int j = 0; j < zone->GetFilledPolysList( layer )->OutlineCount(); j++ )
462 zitems.push_back( new CN_ZONE_LAYER( zone, layer, j ) );
463 }
464 }
465 }
466
467 // Setup progress metrics
468 //
469 int progressDelta = 50;
470 double size = 0.0;
471
472 size += zitems.size(); // Once for building RTrees
473 size += zitems.size(); // Once for adding to connectivity
474 size += aBoard->Tracks().size();
475 size += aBoard->Drawings().size();
476
477 for( FOOTPRINT* footprint : aBoard->Footprints() )
478 size += footprint->Pads().size();
479
480 size *= 1.5; // Our caller gets the other third of the progress bar
481
482 progressDelta = std::max( progressDelta, (int) size / 4 );
483
484 auto report =
485 [&]( int progress )
486 {
487 if( aReporter && ( progress % progressDelta ) == 0 )
488 {
489 aReporter->SetCurrentProgress( progress / size );
490 aReporter->KeepRefreshing( false );
491 }
492 };
493
494 // Generate RTrees for CN_ZONE_LAYER items (in parallel)
495 //
497 std::vector<std::future<size_t>> returns( zitems.size() );
498
499 auto cache_zones =
500 [aReporter]( CN_ZONE_LAYER* aZoneLayer ) -> size_t
501 {
502 if( aReporter && aReporter->IsCancelled() )
503 return 0;
504
505 aZoneLayer->BuildRTree();
506
507 if( aReporter )
508 aReporter->AdvanceProgress();
509
510 return 1;
511 };
512
513 for( size_t ii = 0; ii < zitems.size(); ++ii )
514 returns[ii] = tp.submit( cache_zones, zitems[ii] );
515
516 for( const std::future<size_t>& ret : returns )
517 {
518 std::future_status status = ret.wait_for( std::chrono::milliseconds( 250 ) );
519
520 while( status != std::future_status::ready )
521 {
522 if( aReporter )
523 aReporter->KeepRefreshing();
524
525 status = ret.wait_for( std::chrono::milliseconds( 250 ) );
526 }
527
528 }
529
530 // Add CN_ZONE_LAYERS, tracks, and pads to connectivity
531 //
532 int ii = zitems.size();
533
534 for( CN_ZONE_LAYER* zitem : zitems )
535 {
536 m_itemList.Add( zitem );
537 m_itemMap[ zitem->Parent() ].Link( zitem );
538 report( ++ii );
539 }
540
541 for( PCB_TRACK* tv : aBoard->Tracks() )
542 {
543 Add( tv );
544 report( ++ii );
545 }
546
547 for( FOOTPRINT* footprint : aBoard->Footprints() )
548 {
549 for( PAD* pad : footprint->Pads() )
550 {
551 Add( pad );
552 report( ++ii );
553 }
554 }
555
556 for( BOARD_ITEM* drawing : aBoard->Drawings() )
557 {
558 if( PCB_SHAPE* shape = dynamic_cast<PCB_SHAPE*>( drawing ) )
559 {
560 if( shape->IsOnCopperLayer() )
561 Add( shape );
562 }
563
564 report( ++ii );
565 }
566
567 if( aReporter )
568 {
569 aReporter->SetCurrentProgress( (double) ii / (double) size );
570 aReporter->KeepRefreshing( false );
571 }
572}
573
574
575void CN_CONNECTIVITY_ALGO::LocalBuild( std::shared_ptr<CONNECTIVITY_DATA> aGlobalConnectivity,
576 const std::vector<BOARD_ITEM*>& aLocalItems )
577{
578 m_isLocal = true;
579 m_globalConnectivityData = aGlobalConnectivity;
580
581 for( BOARD_ITEM* item : aLocalItems )
582 {
583 switch( item->Type() )
584 {
585 case PCB_TRACE_T:
586 case PCB_ARC_T:
587 case PCB_VIA_T:
588 case PCB_PAD_T:
589 case PCB_FOOTPRINT_T:
590 case PCB_SHAPE_T:
591 Add( item );
592 break;
593
594 default:
595 break;
596 }
597 }
598}
599
600
602{
603 for( const std::shared_ptr<CN_CLUSTER>& cluster : m_connClusters )
604 {
605 if( cluster->IsConflicting() )
606 {
607 // Conflicting pads in cluster: we don't know the user's intent so best to do
608 // nothing.
609 wxLogTrace( wxT( "CN" ), wxT( "Conflicting pads in cluster %p; skipping propagation" ),
610 cluster.get() );
611 }
612 else if( cluster->HasValidNet() )
613 {
614 // Propagate from the origin (will be a pad if there are any, or another item if
615 // there are no pads).
616 int n_changed = 0;
617
618 for( CN_ITEM* item : *cluster )
619 {
620 if( item->Valid() && item->CanChangeNet()
621 && item->Parent()->GetNetCode() != cluster->OriginNet() )
622 {
623 MarkNetAsDirty( item->Parent()->GetNetCode() );
624 MarkNetAsDirty( cluster->OriginNet() );
625
626 if( aCommit )
627 aCommit->Modify( item->Parent() );
628
629 item->Parent()->SetNetCode( cluster->OriginNet() );
630 n_changed++;
631 }
632 }
633
634 if( n_changed )
635 {
636 wxLogTrace( wxT( "CN" ), wxT( "Cluster %p: net: %d %s" ),
637 cluster.get(),
638 cluster->OriginNet(),
639 (const char*) cluster->OriginNetName().c_str() );
640 }
641 else
642 {
643 wxLogTrace( wxT( "CN" ), wxT( "Cluster %p: no changeable items to propagate to" ),
644 cluster.get() );
645 }
646 }
647 else
648 {
649 wxLogTrace( wxT( "CN" ), wxT( "Cluster %p: connected to unused net" ),
650 cluster.get() );
651 }
652 }
653}
654
655
657{
659 propagateConnections( aCommit );
660}
661
662
664 std::map<ZONE*, std::map<PCB_LAYER_ID, ISOLATED_ISLANDS>>& aMap,
665 bool aConnectivityAlreadyRebuilt )
666{
667 int progressDelta = 50;
668 int ii = 0;
669
670 progressDelta = std::max( progressDelta, (int) aMap.size() / 4 );
671
672 if( !aConnectivityAlreadyRebuilt )
673 {
674 for( const auto& [ zone, islands ] : aMap )
675 {
676 Remove( zone );
677 Add( zone );
678 ii++;
679
680 if( m_progressReporter && ( ii % progressDelta ) == 0 )
681 {
682 m_progressReporter->SetCurrentProgress( (double) ii / (double) aMap.size() );
684 }
685
687 return;
688 }
689 }
690
692
693 for( auto& [ zone, zoneIslands ] : aMap )
694 {
695 for( auto& [ layer, layerIslands ] : zoneIslands )
696 {
697 if( zone->GetFilledPolysList( layer )->IsEmpty() )
698 continue;
699
700 for( const std::shared_ptr<CN_CLUSTER>& cluster : m_connClusters )
701 {
702 for( CN_ITEM* item : *cluster )
703 {
704 if( item->Parent() == zone && item->Layer() == layer )
705 {
706 CN_ZONE_LAYER* z = static_cast<CN_ZONE_LAYER*>( item );
707
708 if( cluster->IsOrphaned() )
709 layerIslands.m_IsolatedOutlines.push_back( z->SubpolyIndex() );
710 else if( z->HasSingleConnection() )
711 layerIslands.m_SingleConnectionOutlines.push_back( z->SubpolyIndex() );
712 }
713 }
714 }
715 }
716 }
717}
718
719
721{
723 return m_ratsnestClusters;
724}
725
726
728{
729 if( aNet < 0 )
730 return;
731
732 if( (int) m_dirtyNets.size() <= aNet )
733 {
734 int lastNet = m_dirtyNets.size() - 1;
735
736 if( lastNet < 0 )
737 lastNet = 0;
738
739 m_dirtyNets.resize( aNet + 1 );
740
741 for( int i = lastNet; i < aNet + 1; i++ )
742 m_dirtyNets[i] = true;
743 }
744
745 m_dirtyNets[aNet] = true;
746}
747
748
750{
751 PCB_LAYER_ID layer = aZoneLayer->GetLayer();
752 BOARD_CONNECTED_ITEM* item = aItem->Parent();
753
754 if( !item->IsOnLayer( layer ) )
755 return;
756
757 auto connect =
758 [&]()
759 {
760 aZoneLayer->Connect( aItem );
761 aItem->Connect( aZoneLayer );
762 };
763
764 // Try quick checks first...
765 if( item->Type() == PCB_PAD_T )
766 {
767 PAD* pad = static_cast<PAD*>( item );
768
769 if( pad->ConditionallyFlashed( layer )
770 && pad->GetZoneLayerOverride( layer ) == ZLO_FORCE_NO_ZONE_CONNECTION )
771 {
772 return;
773 }
774 }
775 else if( item->Type() == PCB_VIA_T )
776 {
777 PCB_VIA* via = static_cast<PCB_VIA*>( item );
778
779 if( via->ConditionallyFlashed( layer )
780 && via->GetZoneLayerOverride( layer ) == ZLO_FORCE_NO_ZONE_CONNECTION )
781 {
782 return;
783 }
784 }
785
786 for( int i = 0; i < aItem->AnchorCount(); ++i )
787 {
788 if( aZoneLayer->ContainsPoint( aItem->GetAnchor( i ) ) )
789 {
790 connect();
791 return;
792 }
793 }
794
795 if( item->Type() == PCB_VIA_T || item->Type() == PCB_PAD_T )
796 {
797 // As long as the pad/via crosses the zone layer, check for the full effective shape
798 // We check for the overlapping layers above
799 if( aZoneLayer->Collide( item->GetEffectiveShape( layer, FLASHING::ALWAYS_FLASHED ).get() ) )
800 connect();
801
802 return;
803 }
804
805 if( aZoneLayer->Collide( item->GetEffectiveShape( layer ).get() ) )
806 connect();
807}
808
810{
811 const ZONE* zoneA = static_cast<const ZONE*>( aZoneLayerA->Parent() );
812 const ZONE* zoneB = static_cast<const ZONE*>( aZoneLayerB->Parent() );
813
814 const BOX2I& boxA = aZoneLayerA->BBox();
815 const BOX2I& boxB = aZoneLayerB->BBox();
816
817 PCB_LAYER_ID layer = aZoneLayerA->GetLayer();
818
819 if( aZoneLayerB->GetLayer() != layer )
820 return;
821
822 if( !boxA.Intersects( boxB ) )
823 return;
824
825 const SHAPE_LINE_CHAIN& outline =
826 zoneA->GetFilledPolysList( layer )->COutline( aZoneLayerA->SubpolyIndex() );
827
828 for( int i = 0; i < outline.PointCount(); i++ )
829 {
830 if( !boxB.Contains( outline.CPoint( i ) ) )
831 continue;
832
833 if( aZoneLayerB->ContainsPoint( outline.CPoint( i ) ) )
834 {
835 aZoneLayerA->Connect( aZoneLayerB );
836 aZoneLayerB->Connect( aZoneLayerA );
837 return;
838 }
839 }
840
841 const SHAPE_LINE_CHAIN& outline2 =
842 zoneB->GetFilledPolysList( layer )->COutline( aZoneLayerB->SubpolyIndex() );
843
844 for( int i = 0; i < outline2.PointCount(); i++ )
845 {
846 if( !boxA.Contains( outline2.CPoint( i ) ) )
847 continue;
848
849 if( aZoneLayerA->ContainsPoint( outline2.CPoint( i ) ) )
850 {
851 aZoneLayerA->Connect( aZoneLayerB );
852 aZoneLayerB->Connect( aZoneLayerA );
853 return;
854 }
855 }
856}
857
858
860{
861 const BOARD_CONNECTED_ITEM* parentA = aCandidate->Parent();
862 const BOARD_CONNECTED_ITEM* parentB = m_item->Parent();
863
864 if( !aCandidate->Valid() || !m_item->Valid() )
865 return true;
866
867 if( parentA == parentB )
868 return true;
869
870 // Don't connect items in different nets that can't be changed
871 if( !aCandidate->CanChangeNet() && !m_item->CanChangeNet() && aCandidate->Net() != m_item->Net() )
872 return true;
873
874 // If both m_item and aCandidate are marked dirty, they will both be searched
875 // Since we are reciprocal in our connection, we arbitrarily pick one of the connections
876 // to conduct the expensive search
877 if( aCandidate->Dirty() && aCandidate < m_item )
878 return true;
879
880 // We should handle zone-zone connection separately
881 if ( parentA->Type() == PCB_ZONE_T && parentB->Type() == PCB_ZONE_T )
882 {
884 static_cast<CN_ZONE_LAYER*>( aCandidate ) );
885 return true;
886 }
887
888 if( parentA->Type() == PCB_ZONE_T )
889 {
890 checkZoneItemConnection( static_cast<CN_ZONE_LAYER*>( aCandidate ), m_item );
891 return true;
892 }
893
894 if( parentB->Type() == PCB_ZONE_T )
895 {
896 checkZoneItemConnection( static_cast<CN_ZONE_LAYER*>( m_item ), aCandidate );
897 return true;
898 }
899
900 LSET commonLayers = parentA->GetLayerSet() & parentB->GetLayerSet();
901
902 for( PCB_LAYER_ID layer : commonLayers.Seq() )
903 {
904 FLASHING flashingA = FLASHING::NEVER_FLASHED;
905 FLASHING flashingB = FLASHING::NEVER_FLASHED;
906
907 if( parentA->Type() == PCB_PAD_T )
908 {
909 if( !static_cast<const PAD*>( parentA )->ConditionallyFlashed( layer ) )
910 flashingA = FLASHING::ALWAYS_FLASHED;
911 }
912 else if( parentA->Type() == PCB_VIA_T )
913 {
914 if( !static_cast<const PCB_VIA*>( parentA )->ConditionallyFlashed( layer ) )
915 flashingA = FLASHING::ALWAYS_FLASHED;
916 }
917
918 if( parentB->Type() == PCB_PAD_T )
919 {
920 if( !static_cast<const PAD*>( parentB )->ConditionallyFlashed( layer ) )
921 flashingB = FLASHING::ALWAYS_FLASHED;
922 }
923 else if( parentB->Type() == PCB_VIA_T )
924 {
925 if( !static_cast<const PCB_VIA*>( parentB )->ConditionallyFlashed( layer ) )
926 flashingB = FLASHING::ALWAYS_FLASHED;
927 }
928
929 if( parentA->GetEffectiveShape( layer, flashingA )->Collide(
930 parentB->GetEffectiveShape( layer, flashingB ).get() ) )
931 {
932 m_item->Connect( aCandidate );
933 aCandidate->Connect( m_item );
934 return true;
935 }
936 }
937
938 return true;
939};
940
941
943{
944 m_ratsnestClusters.clear();
945 m_connClusters.clear();
946 m_itemMap.clear();
948
949}
950
952{
953 m_progressReporter = aReporter;
954}
@ ZLO_FORCE_NO_ZONE_CONNECTION
Definition: board_item.h:67
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
A base class for any item which can be embedded within the BOARD container class, and therefore insta...
Definition: board_item.h:77
virtual PCB_LAYER_ID GetLayer() const
Return the primary layer this item is on.
Definition: board_item.h:231
virtual bool IsConnected() const
Returns information if the object is derived from BOARD_CONNECTED_ITEM.
Definition: board_item.h:134
virtual bool IsOnLayer(PCB_LAYER_ID aLayer) const
Test to see if this object is on the given layer.
Definition: board_item.h:296
virtual std::shared_ptr< SHAPE > GetEffectiveShape(PCB_LAYER_ID aLayer=UNDEFINED_LAYER, FLASHING aFlash=FLASHING::DEFAULT) const
Some pad shapes can be complex (rounded/chamfered rectangle), even without considering custom shapes.
Definition: board_item.cpp:228
virtual const BOARD * GetBoard() const
Return the BOARD in which this BOARD_ITEM resides, or NULL if none.
Definition: board_item.cpp:46
FOOTPRINT * GetParentFootprint() const
Definition: board_item.cpp:248
virtual LSET GetLayerSet() const
Return a std::bitset of all layers on which the item physically resides.
Definition: board_item.h:236
virtual bool IsOnCopperLayer() const
Definition: board_item.h:151
Information pertinent to a Pcbnew printed circuit board.
Definition: board.h:282
LSET GetEnabledLayers() const
A proxy function that calls the corresponding function in m_BoardSettings.
Definition: board.cpp:677
const ZONES & Zones() const
Definition: board.h:327
const FOOTPRINTS & Footprints() const
Definition: board.h:323
const TRACKS & Tracks() const
Definition: board.h:321
const DRAWINGS & Drawings() const
Definition: board.h:325
bool Intersects(const BOX2< Vec > &aRect) const
Definition: box2.h:294
bool Contains(const Vec &aPoint) const
Definition: box2.h:158
void FillIsolatedIslandsMap(std::map< ZONE *, std::map< PCB_LAYER_ID, ISOLATED_ISLANDS > > &aMap, bool aConnectivityAlreadyRebuilt)
Fill in the isolated islands map with copper islands that are not connected to a net.
bool Remove(BOARD_ITEM *aItem)
CONNECTIVITY_DATA * m_parentConnectivityData
void add(Container &c, BItem brditem)
PROGRESS_REPORTER * m_progressReporter
std::vector< std::shared_ptr< CN_CLUSTER > > m_connClusters
void LocalBuild(std::shared_ptr< CONNECTIVITY_DATA > aGlobalConnectivity, const std::vector< BOARD_ITEM * > &aLocalItems)
void propagateConnections(BOARD_COMMIT *aCommit=nullptr)
const CLUSTERS & GetClusters()
const CLUSTERS SearchClusters(CLUSTER_SEARCH_MODE aMode, const std::initializer_list< KICAD_T > &aTypes, int aSingleNet, CN_ITEM *rootItem=nullptr)
void MarkNetAsDirty(int aNet)
void markItemNetAsDirty(const BOARD_ITEM *aItem)
std::vector< std::shared_ptr< CN_CLUSTER > > m_ratsnestClusters
void PropagateNets(BOARD_COMMIT *aCommit=nullptr)
Propagate nets from pads to other items in clusters.
std::shared_ptr< CONNECTIVITY_DATA > m_globalConnectivityData
std::vector< bool > m_dirtyNets
std::vector< std::shared_ptr< CN_CLUSTER > > CLUSTERS
std::unordered_map< const BOARD_ITEM *, ITEM_MAP_ENTRY > m_itemMap
void SetProgressReporter(PROGRESS_REPORTER *aReporter)
void Build(BOARD *aBoard, PROGRESS_REPORTER *aReporter=nullptr)
bool Add(BOARD_ITEM *aItem)
CN_ITEM represents a BOARD_CONNETED_ITEM in the connectivity system (ie: a pad, track/arc/via,...
void Connect(CN_ITEM *b)
const BOX2I & BBox()
virtual int AnchorCount() const
const std::vector< CN_ITEM * > & ConnectedItems() const
int Net() const
bool Valid() const
virtual const VECTOR2I GetAnchor(int n) const
bool CanChangeNet() const
void SetVisited(bool aVisited)
bool Dirty() const
BOARD_CONNECTED_ITEM * Parent() const
CN_ITEM * Add(PAD *pad)
std::vector< CN_ITEM * >::iterator begin()
void SetDirty(bool aDirty=true)
bool IsDirty() const
std::vector< CN_ITEM * >::iterator end()
void ClearDirtyFlags()
void SetHasInvalid(bool aInvalid=true)
void RemoveInvalidItems(std::vector< CN_ITEM * > &aGarbage)
void checkZoneItemConnection(CN_ZONE_LAYER *aZoneLayer, CN_ITEM *aItem)
CN_ITEM * m_item
The item we are looking for connections to.
void checkZoneZoneConnection(CN_ZONE_LAYER *aZoneLayerA, CN_ZONE_LAYER *aZoneLayerB)
bool operator()(CN_ITEM *aCandidate)
PCB_LAYER_ID GetLayer() const
bool Collide(SHAPE *aRefShape) const
int SubpolyIndex() const
bool ContainsPoint(const VECTOR2I &p) const
COMMIT & Modify(EDA_ITEM *aItem, BASE_SCREEN *aScreen=nullptr)
Create an undo entry for an item that has been already modified.
Definition: commit.h:105
KICAD_T Type() const
Returns the type of object.
Definition: eda_item.h:100
PADS & Pads()
Definition: footprint.h:193
LSET is a set of PCB_LAYER_IDs.
Definition: layer_ids.h:576
LSEQ Seq(const PCB_LAYER_ID *aWishListSequence, unsigned aCount) const
Return an LSEQ from the union of this LSET and a desired sequence.
Definition: lset.cpp:418
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Return a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:863
Handle the data for a net.
Definition: netinfo.h:56
Definition: pad.h:53
A small class to help profiling.
Definition: profile.h:49
void Show(std::ostream &aStream=std::cerr)
Print the elapsed time (in a suitable unit) to a stream.
Definition: profile.h:105
A progress reporter interface for use in multi-threaded environments.
virtual bool IsCancelled() const =0
virtual bool KeepRefreshing(bool aWait=false)=0
Update the UI (if any).
virtual void AdvanceProgress()=0
Increment the progress bar length (inside the current virtual zone).
virtual void SetCurrentProgress(double aProgress)=0
Set the progress value to aProgress (0..1).
virtual void SetMaxProgress(int aMaxProgress)=0
Fix the value that gives the 100 percent progress bar length (inside the current virtual zone).
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
int PointCount() const
Return the number of points (vertices) in this line chain.
const VECTOR2I & CPoint(int aIndex) const
Return a reference to a given point in the line chain.
Handle a list of polygons defining a copper zone.
Definition: zone.h:72
const std::shared_ptr< SHAPE_POLY_SET > & GetFilledPolysList(PCB_LAYER_ID aLayer) const
Definition: zone.h:615
virtual LSET GetLayerSet() const override
Return a std::bitset of all layers on which the item physically resides.
Definition: zone.h:129
@ FP_JUST_ADDED
Definition: footprint.h:77
a few functions useful in geometry calculations.
FLASHING
Enum used during connectivity building to ensure we do not query connectivity while building the data...
Definition: layer_ids.h:149
bool IsCopperLayer(int aLayerId)
Tests whether a layer is a copper layer.
Definition: layer_ids.h:882
PCB_LAYER_ID
A quick note on layer IDs:
Definition: layer_ids.h:60
static thread_pool * tp
Definition: thread_pool.cpp:30
BS::thread_pool thread_pool
Definition: thread_pool.h:30
thread_pool & GetKiCadThreadPool()
Get a reference to the current thread pool.
Definition: thread_pool.cpp:32
KICAD_T
The set of class identification values stored in EDA_ITEM::m_structType.
Definition: typeinfo.h:78
@ PCB_SHAPE_T
class PCB_SHAPE, a segment not on copper layers
Definition: typeinfo.h:88
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:97
@ PCB_ZONE_T
class ZONE, a copper pour area
Definition: typeinfo.h:107
@ PCB_FOOTPRINT_T
class FOOTPRINT, a footprint
Definition: typeinfo.h:86
@ PCB_PAD_T
class PAD, a pad in a footprint
Definition: typeinfo.h:87
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
Definition: typeinfo.h:98
@ PCB_NETINFO_T
class NETINFO_ITEM, a description of a net
Definition: typeinfo.h:109
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:96