34 const int start = aForward ? 0 : aLine.
PointCount() - 1;
35 const int delta = aForward ? 1 : -1;
47 for(
int vertex = start +
delta; aForward ? vertex < aLine.
PointCount() : vertex >= 0; vertex +=
delta )
51 bool containsA = shape->Contains( seg.
A );
52 bool containsB = shape->Contains( seg.
B );
54 if( containsA && containsB )
64 if( shape->Collide( seg, 0,
nullptr, &loc ) )
71 if( !aForward && clip < start )
72 aLine.
Remove( clip + 1, start );
73 else if( clip > start )
74 aLine.
Remove( start, clip - 1 );
83 const PAD* aStartPad,
const PAD* aEndPad,
90 std::vector<LENGTH_DELAY_CALCULATION_ITEM*> pads;
91 std::vector<LENGTH_DELAY_CALCULATION_ITEM*> lines;
92 std::vector<LENGTH_DELAY_CALCULATION_ITEM*> vias;
95 std::map<VECTOR2I, std::unordered_set<LENGTH_DELAY_CALCULATION_ITEM*>> linesPositionMap;
98 std::map<VECTOR2I, std::unordered_set<LENGTH_DELAY_CALCULATION_ITEM*>> padsPositionMap;
102 if( item.Type() == LENGTH_DELAY_CALCULATION_ITEM::TYPE::PAD )
104 pads.emplace_back( &item );
105 padsPositionMap[item.GetPad()->GetPosition()].insert( &item );
107 else if( item.Type() == LENGTH_DELAY_CALCULATION_ITEM::TYPE::VIA )
109 vias.emplace_back( &item );
111 else if( item.Type() == LENGTH_DELAY_CALCULATION_ITEM::TYPE::LINE )
113 lines.emplace_back( &item );
114 linesPositionMap[item.GetLine().CPoint( 0 )].insert( &item );
115 linesPositionMap[item.GetLine().CLastPoint()].insert( &item );
132 if( aLayerOpt == LENGTH_DELAY_LAYER_OPT::WITH_LAYER_DETAIL )
134 details.
LayerLengths = std::make_unique<std::map<PCB_LAYER_ID, int64_t>>();
136 if( aDomain == LENGTH_DELAY_DOMAIN_OPT::WITH_DELAY_DETAIL )
137 details.
LayerDelays = std::make_unique<std::map<PCB_LAYER_ID, int64_t>>();
156 || item.Type() == LENGTH_DELAY_CALCULATION_ITEM::TYPE::UNKNOWN )
162 if( item.Type() == LENGTH_DELAY_CALCULATION_ITEM::TYPE::LINE )
164 const int64_t length = item.GetLine().Length();
169 ( *details.
LayerLengths )[item.GetStartLayer()] += length;
171 else if( item.Type() == LENGTH_DELAY_CALCULATION_ITEM::TYPE::VIA && useHeight )
173 const auto [layerStart, layerEnd] = item.GetLayers();
177 else if( item.Type() == LENGTH_DELAY_CALCULATION_ITEM::TYPE::PAD )
185 if( aDomain == LENGTH_DELAY_DOMAIN_OPT::WITH_DELAY_DETAIL && !aItems.empty() )
189 ctx.
NetClass = aItems.front().GetEffectiveNetClass();
193 wxASSERT( itemDelays.size() == aItems.size() );
195 for(
size_t i = 0; i < aItems.size(); ++i )
199 if( item.
Type() == LENGTH_DELAY_CALCULATION_ITEM::TYPE::LINE )
206 else if( item.
Type() == LENGTH_DELAY_CALCULATION_ITEM::TYPE::VIA && useHeight )
210 else if( item.
Type() == LENGTH_DELAY_CALCULATION_ITEM::TYPE::PAD )
224 if( aPad && aItem.
Type() == LENGTH_DELAY_CALCULATION_ITEM::TYPE::LINE )
229 if( !padLayers.
Contains( startBottomLayer ) )
243 const PAD* aEndPad )
const
251 const PAD* aEndPad )
const
253 return CalculateLengthDetails( aItems, aOptimisations, aStartPad, aEndPad, LENGTH_DELAY_LAYER_OPT::NO_LAYER_DETAIL,
254 LENGTH_DELAY_DOMAIN_OPT::WITH_DELAY_DETAIL )
279 std::vector<LENGTH_DELAY_CALCULATION_ITEM*>& aLines,
280 std::map<
VECTOR2I, std::unordered_set<LENGTH_DELAY_CALCULATION_ITEM*>>& aLinesPositionMap )
283 std::vector<LENGTH_DELAY_CALCULATION_ITEM*> pads;
287 aLinesPositionMap[line->GetLine().CPoint( 0 )].erase( line );
288 aLinesPositionMap[line->GetLine().CLastPoint()].erase( line );
292 auto tryMerge = [&removeFromPositionMap, &aLinesPositionMap](
const MERGE_POINT aMergePoint,
297 const auto startItr = aLinesPositionMap.find( aMergePos );
299 if( startItr == aLinesPositionMap.end() )
302 std::unordered_set<LENGTH_DELAY_CALCULATION_ITEM*>& startItems = startItr->second;
304 if( startItems.size() != 1 )
314 if( aPrimaryItem->GetStartLayer() != lineToMerge->
GetStartLayer() )
320 removeFromPositionMap( lineToMerge );
332 removeFromPositionMap( primaryItem );
338 bool mergeComplete =
false;
340 while( !mergeComplete )
342 bool startMerged =
false;
343 bool endMerged =
false;
351 mergeComplete = !startMerged && !endMerged;
364 for(
auto itr = aSecondary.
CPoints().begin() + 1; itr != aSecondary.
CPoints().end(); ++itr )
365 aPrimary.
Insert( 0, *itr );
371 for(
auto itr = aSecondary.
CPoints().rbegin() + 1; itr != aSecondary.
CPoints().rend(); ++itr )
372 aPrimary.
Insert( 0, *itr );
379 for(
auto itr = aSecondary.
CPoints().begin() + 1; itr != aSecondary.
CPoints().end(); ++itr )
386 for(
auto itr = aSecondary.
CPoints().rbegin() + 1; itr != aSecondary.
CPoints().rend(); ++itr )
394 const std::vector<LENGTH_DELAY_CALCULATION_ITEM*>& aLines )
398 const PAD*
pad = padItem->GetPad();
406 const PCB_LAYER_ID pcbLayer = lineItem->GetStartLayer();
416 const std::vector<LENGTH_DELAY_CALCULATION_ITEM*>& aVias, std::vector<LENGTH_DELAY_CALCULATION_ITEM*>& aLines,
417 std::map<
VECTOR2I, std::unordered_set<LENGTH_DELAY_CALCULATION_ITEM*>>& aLinesPositionMap,
418 const std::map<
VECTOR2I, std::unordered_set<LENGTH_DELAY_CALCULATION_ITEM*>>& aPadsPositionMap )
422 auto lineItr = aLinesPositionMap.find(
via->GetVia()->GetPosition() );
424 if( lineItr == aLinesPositionMap.end() )
427 std::unordered_set<LENGTH_DELAY_CALCULATION_ITEM*>& connectedLines = lineItr->second;
429 if( connectedLines.empty() )
432 via->SetLayers(
via->GetVia()->GetLayer(),
via->GetVia()->GetLayer() );
434 else if( connectedLines.size() == 1 )
437 bool isViaInPad =
false;
438 const PCB_LAYER_ID lineLayer = ( *connectedLines.begin() )->GetStartLayer();
440 auto padItr = aPadsPositionMap.find(
via->GetVia()->GetPosition() );
442 if( padItr != aPadsPositionMap.end() )
445 const std::unordered_set<LENGTH_DELAY_CALCULATION_ITEM*>& pads = padItr->second;
447 if( pads.size() == 1 )
463 via->SetLayers( lineLayer, lineLayer );
473 layers.
set( lineItem->GetStartLayer() );
489 via->SetLayers( firstLayer, firstLayer );
491 via->SetLayers( firstLayer, lastLayer );
509 if( shape->Contains( aLine.
CPoint( 0 ) ) )
511 else if( shape->Contains( aLine.
CPoint( -1 ) ) )
550 std::vector<VECTOR2I> points{ track->GetStart(), track->GetEnd() };
561 else if(
const PAD*
pad =
dynamic_cast<const PAD*
>( aBoardItem ) )
566 const LSET& layers =
pad->Padstack().LayerSet();
578 item.
SetLayers( firstLayer, secondLayer );
589 std::unique_ptr<TIME_DOMAIN_PARAMETERS_IFACE>&& aProvider )
BASE_SET & set(size_t pos)
A base class derived from BOARD_ITEM for items that can be connected and have a net,...
virtual NETCLASS * GetEffectiveNetClass() const
Return the NETCLASS for this item.
BOARD_STACKUP & GetStackupDescriptor()
bool m_UseHeightForLengthCalcs
Enable inclusion of stackup height in track length measurements and length tuning.
Manage layers needed to make a physical board.
void BuildDefaultStackupList(const BOARD_DESIGN_SETTINGS *aSettings, int aActiveCopperLayersCount=0)
Create a default stackup, according to the current BOARD_DESIGN_SETTINGS settings.
int GetLayerDistance(PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer) const
Calculate the distance (height) between the two given copper layers.
int GetCopperLayerCount() const
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Lightweight class which holds a pad, via, or a routed trace outline.
void SetLine(const SHAPE_LINE_CHAIN &aLine)
Sets the source SHAPE_LINE_CHAIN of this item.
void SetVia(const PCB_VIA *aVia)
Sets the VIA associated with this item.
TYPE Type() const
Gets the routing item type.
void SetPad(const PAD *aPad)
Sets the parent PAD associated with this item.
void SetMergeStatus(const MERGE_STATUS aStatus)
Sets the MERGE_STATUS of this item.
SHAPE_LINE_CHAIN & GetLine() const
Gets the SHAPE_LINE_CHAIN associated with this item.
const PAD * GetPad() const
Gets the parent PAD associated with this item.
PCB_LAYER_ID GetStartLayer() const
Gets the start board layer for the proxied item.
void SetEffectiveNetClass(const NETCLASS *aNetClass)
Sets the effective net class for the item.
void CalculateViaLayers(const BOARD *aBoard)
Calculates active via payers for a proxied VIA object.
void SetLayers(const PCB_LAYER_ID aStart, const PCB_LAYER_ID aEnd=PCB_LAYER_ID::UNDEFINED_LAYER)
Sets the first and last layers associated with this item.
int64_t CalculateLengthForDelay(int64_t aDesiredDelay, const TIME_DOMAIN_GEOMETRY_CONTEXT &aCtx) const
Calculates the length of track required for the given delay in a specific geometry context.
void SynchronizeTimeDomainProperties() const
Ensure time domain properties provider is synced with board / project settings if required.
static void clipLineToPad(SHAPE_LINE_CHAIN &aLine, const PAD *aPad, PCB_LAYER_ID aLayer, bool aForward=true)
Clips the given line to the minimal direct electrical length within the pad.
MERGE_POINT
Enum to describe whether track merging is attempted from the start or end of a track segment.
int64_t CalculatePropagationDelayForShapeLineChain(const SHAPE_LINE_CHAIN &aShape, const TIME_DOMAIN_GEOMETRY_CONTEXT &aCtx) const
Gets the propagation delay for the given shape line chain.
void inferViaInPad(const PAD *aPad, const LENGTH_DELAY_CALCULATION_ITEM &aItem, LENGTH_DELAY_STATS &aDetails) const
Infers if there is a via in the given pad.
static void optimiseTracesInPads(const std::vector< LENGTH_DELAY_CALCULATION_ITEM * > &aPads, const std::vector< LENGTH_DELAY_CALCULATION_ITEM * > &aLines)
Optimises the given set of items to minimise the electrical path length.
static void mergeLines(std::vector< LENGTH_DELAY_CALCULATION_ITEM * > &aLines, std::map< VECTOR2I, std::unordered_set< LENGTH_DELAY_CALCULATION_ITEM * > > &aLinesPositionMap)
Merges any lines (traces) that are contiguous, on one layer, and with no junctions.
int64_t CalculateDelay(std::vector< LENGTH_DELAY_CALCULATION_ITEM > &aItems, PATH_OPTIMISATIONS aOptimisations, const PAD *aStartPad=nullptr, const PAD *aEndPad=nullptr) const
Calculates the electrical propagation delay of the given items.
int64_t CalculateLength(std::vector< LENGTH_DELAY_CALCULATION_ITEM > &aItems, PATH_OPTIMISATIONS aOptimisations, const PAD *aStartPad=nullptr, const PAD *aEndPad=nullptr) const
Calculates the electrical length of the given items.
int StackupHeight(PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSecondLayer) const
Returns the stackup distance between the two given layers.
void SetTimeDomainParametersProvider(std::unique_ptr< TIME_DOMAIN_PARAMETERS_IFACE > &&aProvider)
Sets the provider for time domain parameter resolution.
BOARD * m_board
The parent board for all items.
LENGTH_DELAY_CALCULATION_ITEM GetLengthCalculationItem(const BOARD_CONNECTED_ITEM *aBoardItem) const
Return a LENGTH_CALCULATION_ITEM constructed from the given BOARD_CONNECTED_ITEM.
static void optimiseViaLayers(const std::vector< LENGTH_DELAY_CALCULATION_ITEM * > &aVias, std::vector< LENGTH_DELAY_CALCULATION_ITEM * > &aLines, std::map< VECTOR2I, std::unordered_set< LENGTH_DELAY_CALCULATION_ITEM * > > &aLinesPositionMap, const std::map< VECTOR2I, std::unordered_set< LENGTH_DELAY_CALCULATION_ITEM * > > &aPadsPositionMap)
Optimises the via layers.
static void mergeShapeLineChains(SHAPE_LINE_CHAIN &aPrimary, const SHAPE_LINE_CHAIN &aSecondary, MERGE_POINT aMergePoint)
Merges two SHAPE_LINE_CHAINs where there is a shared endpoing.
LENGTH_DELAY_STATS CalculateLengthDetails(std::vector< LENGTH_DELAY_CALCULATION_ITEM > &aItems, PATH_OPTIMISATIONS aOptimisations, const PAD *aStartPad=nullptr, const PAD *aEndPad=nullptr, LENGTH_DELAY_LAYER_OPT aLayerOpt=LENGTH_DELAY_LAYER_OPT::NO_LAYER_DETAIL, LENGTH_DELAY_DOMAIN_OPT aDomain=LENGTH_DELAY_DOMAIN_OPT::NO_DELAY_DETAIL) const
Calculates the electrical length of the given items.
static void OptimiseTraceInPad(SHAPE_LINE_CHAIN &aLine, const PAD *aPad, PCB_LAYER_ID aPcbLayer)
Optimises the given trace / line to minimise the electrical path length within the given pad.
std::unique_ptr< TIME_DOMAIN_PARAMETERS_IFACE > m_timeDomainParameters
The active provider of time domain parameters.
LSEQ is a sequence (and therefore also a set) of PCB_LAYER_IDs.
LSET is a set of PCB_LAYER_IDs.
copper_layers_iterator copper_layers_end() const
LSEQ CuStack() const
Return a sequence of copper layers in starting from the front/top and extending to the back/bottom.
copper_layers_iterator copper_layers_begin() const
bool Contains(PCB_LAYER_ID aLayer) const
See if the layer set contains a PCB layer.
const LSET & LayerSet() const
bool FlashLayer(int aLayer, bool aOnlyCheckIfPermitted=false) const
Check to see whether the pad should be flashed on the specific layer.
VECTOR2I GetPosition() const override
const PADSTACK & Padstack() const
const std::shared_ptr< SHAPE_POLY_SET > & GetEffectivePolygon(PCB_LAYER_ID aLayer, ERROR_LOC aErrorLoc=ERROR_INSIDE) const
const VECTOR2I & GetMid() const
const VECTOR2I & GetStart() const
const VECTOR2I & GetEnd() const
virtual int GetWidth() const
Represent a polyline containing arcs as well as line segments: A chain of connected line and/or arc s...
bool IsPtOnArc(size_t aPtIndex) const
virtual const VECTOR2I GetPoint(int aIndex) const override
int PointCount() const
Return the number of points (vertices) in this line chain.
void Replace(int aStartIndex, int aEndIndex, const VECTOR2I &aP)
Replace points with indices in range [start_index, end_index] with a single point aP.
const std::vector< SHAPE_ARC > & CArcs() const
void Append(int aX, int aY, bool aAllowDuplication=false)
Append a new point at the end of the line chain.
const VECTOR2I & CPoint(int aIndex) const
Return a reference to a given point in the line chain.
const VECTOR2I & CLastPoint() const
Return the last point in the line chain.
void Remove(int aStartIndex, int aEndIndex)
Remove the range of points [start_index, end_index] from the line chain.
void Insert(size_t aVertex, const VECTOR2I &aP)
const std::vector< VECTOR2I > & CPoints() const
a few functions useful in geometry calculations.
PCB_LAYER_ID
A quick note on layer IDs:
LENGTH_DELAY_DOMAIN_OPT
Enum which controls the calculation domain of the length / delay calculation methods.
LENGTH_DELAY_LAYER_OPT
Enum which controls the level of detail returned by the length / delay calculation methods.
Holds length measurement result details and statistics.
std::unique_ptr< std::map< PCB_LAYER_ID, int64_t > > LayerDelays
int64_t TotalLength() const
Calculates the total electrical length for this set of statistics.
std::unique_ptr< std::map< PCB_LAYER_ID, int64_t > > LayerLengths
int64_t TotalDelay() const
Calculates the total electrical propagation delay for this set of statistics.
Struct to control which optimisations the length calculation code runs on the given path objects.
bool InferViaInPad
Determines if there is a via-in-pad present on the board but not in the item set.
bool OptimiseViaLayers
Optimise via layers for height calculations, ensuring only the distance between routed segments is co...
bool MergeTracks
Merges all contiguous (end-to-end, same layer) tracks.
bool OptimiseTracesInPads
Optimises the electrical length of tracks within pads.
A data structure to contain basic geometry data which can affect signal propagation calculations.
const NETCLASS * NetClass
The net class this track belongs to.
@ PCB_VIA_T
class PCB_VIA, a via (like a track segment on a copper layer)
@ PCB_ARC_T
class PCB_ARC, an arc track segment on a copper layer
@ PCB_TRACE_T
class PCB_TRACK, a track segment (segment on a copper layer)