参考手册

This manual is in the process of being revised to cover the latest stable release version of KiCad. It contains some sections that have not yet been completed. We ask for your patience while our volunteer technical writers work on this task, and we welcome new contributors who would like to help make KiCad’s documentation better than ever.

This document is Copyright © 2010-2022 by its contributors as listed below. You may distribute it and/or modify it under the terms of either the GNU General Public License (http://www.gnu.org/licenses/gpl.html), version 3 or later, or the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0/), version 3.0 or later.

本指南中的所有商标均属于其合法所有者。

贡献者

Jean-Pierre Charras, Fabrizio Tappero, Graham Keeth

翻译人员

taotieren <[email protected]>, 2019, 2020, 2021.

Telegram 简体中文交流群: https://t.me/KiCad_zh_CN

反馈

请将任何错误报告、建议或新版本引导到此处:

Introduction to the KiCad Schematic Editor

描述

The KiCad Schematic Editor is a schematic capture software distributed as a part of KiCad and available under the following operating systems:

  • Linux

  • Apple OS X

  • Windows

Regardless of the OS, all KiCad files are 100% compatible from one OS to another.

The Schematic Editor is an integrated application where all functions of drawing, control, layout, library management and access to the PCB design software are carried out within the editor itself.

The KiCad Schematic Editor is intended to cooperate with the KiCad PCB Editor, which is KiCad’s printed circuit design software. It can also export netlist files, which lists all the electrical connections, for other packages.

The Schematic Editor includes a symbol library editor, which can create and edit symbols and manage libraries. It also integrates the following additional but essential functions needed for modern schematic capture software:

  • 电气规则检查(ERC),用于自动控制错误和缺失的连接

  • 以多种格式导出绘图文件(Postscript,PDF,HPGL和SVG)

  • 物料清单生成(通过 Python 或 XSLT 脚本,允许许多灵活的格式)。

技术概述

The Schematic Editor is limited only by the available memory. There is thus no real limitation to the number of components, component pins, connections or sheets. In the case of multi-sheet schematics, the representation is hierarchical.

The Schematic Editor can use multi-sheet schematics in a few ways:

  • 简单的层次结构(每个原理图只使用一次)。

  • 复杂的层次结构(一些原理图在多个实例中不止一次使用)。

  • 扁平层次结构(原理图未在主图中明确连接)。

Generic Schematic Editor commands

命令可以通过以下方式执行:

  • 单击菜单栏(屏幕顶部)。

  • 单击屏幕顶部的图标 (常规命令)。

  • 点击屏幕右侧的图标 (特定命令或 “工具”)。

  • 单击屏幕左侧的图标 (显示选项)。

  • 按下鼠标按钮(重要的补充命令)。 特别是右键单击打开光标下元素的上下文菜单(缩放,网格和元素编辑)。

  • Function keys (F1, F2, F3, F4, Insert and Space). Specifically: Escape cancels the command in progress. Insert allows the duplication of the last element created.

  • Pressing hotkeys. For a list of hotkeys, see the Help→List Hotkeys menu entry or press Ctrl+F1. Many hotkeys select a tool but do not perform the tool’s action until the canvas is clicked. This behavior can be changed by unchecking First hotkey selects tool in the Common Preferences pane. With this option unchecked, pressing a hotkey will select the tool and immediately perform the tool’s action at the current cursor location.

命令概述

鼠标命令

基本命令

左键

  • Single click: Selects the item under the cursor and displays the item’s characteristics in the status bar.

  • Double click: edits the item if it is editable.

  • Long click (click and hold): opens a pop-up menu to clarify the selection.

右键

  • Opens a pop-up menu. If an item is selected, the items in the menu are related to the selected item. If an item is under the cursor when the right mouse button is clicked, the item is selected.

Selection operations

Schematic editor items can be selected by clicking on them. Multiple items can be selected at once. Add items to the selection with Shift + click, and remove items from the selection with Ctrl+Shift + click.

On Apple keyboards, use the Cmd key instead of Ctrl.

left mouse button

Select item.

Shift + left mouse button

Add item to selection.

Ctrl+Shift + left mouse button

Remove item from selection.

long click

Clarify selection from a pop-up menu.

Ctrl + left mouse button

Highlight net.

Items can also be selected by drawing a box around them using the left mouse button.

Dragging from left to right includes all items fully enclosed by the box. Dragging from right to left includes all items touched by the box, even if they are not fully enclosed.

The Shift and Ctrl+Shift modifiers also work with drag selections to add and remove items from the selection, respectively.

热键

  • The Ctrl+F1 displays the current hotkey list.

  • All hotkeys can be redefined using the hotkey editor (PreferencesPreferences…​Hotkeys).

The default hotkey list is below. Many additional actions do not have hotkeys by default, but hotkeys can be assigned to them with the hotkey editor.

The hotkeys described in this manual use the key labels that appear on a standard PC keyboard. On an Apple keyboard layout, use the Cmd key in place of Ctrl, and the Option key in place of Alt.

Action Default Hotkey Description

Click

Return

Performs left mouse button click

Double-click

End

Performs left mouse button double-click

Cursor Down

Down

Cursor Down Fast

Ctrl+Down

Cursor Left

Left

Cursor Left Fast

Ctrl+Left

Cursor Right

Right

Cursor Right Fast

Ctrl+Right

Cursor Up

Up

Cursor Up Fast

Ctrl+Up

Switch to Fast Grid 1

Alt+1

Switch to Fast Grid 2

Alt+2

Switch to Next Grid

N

Switch to Previous Grid

Shift+N

Reset Grid Origin

Z

Grid Origin

S

Set the grid origin point

New…​

Ctrl+N

Create a new document in the editor

Open…​

Ctrl+O

Open existing document

Pan Down

Shift+Down

Pan Left

Shift+Left

Pan Right

Shift+Right

Pan Up

Shift+Up

Print…​

Ctrl+P

Print

Reset Local Coordinates

Space

Save

Ctrl+S

Save changes

Save As…

Ctrl+Shift+S

Save current document to another location

Always Show Cursor

Ctrl+Shift+X

Display crosshairs even in selection tool

Switch units

Ctrl+U

Switch between imperial and metric units

Update PCB from Schematic…

F8

Update PCB with changes made to schematic

Center

F4

Center

Zoom to Objects

Ctrl+Home

Zoom to Objects

Zoom to Fit

Home

Zoom to Fit

Zoom In at Cursor

F1

Zoom In at Cursor

Zoom Out at Cursor

F2

Zoom Out at Cursor

Refresh

F5

Refresh

Zoom to Selection

Ctrl+F5

Zoom to Selection

Change Edit Method

Ctrl+Space

Change edit method constraints

Copy

Ctrl+C

Copy selected item(s) to clipboard

Cut

Ctrl+X

Cut selected item(s) to clipboard

Delete

Del

Deletes selected item(s)

Duplicate

Ctrl+D

Duplicates the selected item(s)

Find

Ctrl+F

Find text

Find and Replace

Ctrl+Alt+F

Find and replace text

Find Next

F3

Find next match

Find Next Marker

Shift+F3

Paste

Ctrl+V

Paste item(s) from clipboard

Redo

Ctrl+Y

Redo last edit

Select All

Ctrl+A

Select all items on screen

Undo

Ctrl+Z

Undo last edit

List Hotkeys…​

Ctrl+F1

Displays current hotkeys table and corresponding commands

Preferences…​

Ctrl+,

Show preferences for all open tools

Clear Net Highlighting

~

Clear any existing net highlighting

Edit Library Symbol…​

Ctrl+Shift+E

Open the library symbol in the Symbol Editor

Edit with Symbol Editor

Ctrl+E

Open the selected symbol in the Symbol Editor

Highlight Net

`

Highlight net under cursor

Show Datasheet

D

Opens the datasheet in a browser

Add Sheet

S

Add a hierarchical sheet

Add Wire to Bus Entry

Z

Add a wire entry to a bus

Add Global Label

Ctrl+L

Add a global label

Add Hierarchical Label

H

Add a hierarchical label

Add Junction

J

Add a junction

Add Label

L

Add a net label

Add No Connect Flag

Q

Add a no-connection flag

Add Power

P

Add a power port

Add Text

T

Add text

Add Symbol

A

Add a symbol

Add Bus

B

Add a bus

Add Lines

I

Add connected graphic lines

Add Wire

W

Add a wire

Finish Wire or Bus

K

Complete drawing at current segment

Unfold from Bus

C

Break a wire out of a bus

Autoplace Fields

O

Runs the automatic placement algorithm on the symbol or sheet’s fields

Edit Footprint…

F

Displays footprint field dialog

Edit Reference Designator…​

U

Displays reference designator dialog

Edit Value…

V

Displays value field dialog

Mirror Horizontally

X

Flips selected item(s) from left to right

Mirror Vertically

Y

Flips selected item(s) from top to bottom

Properties…

E

Displays item properties dialog

Repeat Last Item

Ins

Duplicates the last drawn item

Rotate Counterclockwise

R

Rotates selected item(s) counter-clockwise

Drag

G

Drags the selected item(s)

Move

M

Moves the selected item(s)

Select Connection

Alt+4

Select a complete connection

Select Node

Alt+3

Select a connection item under the cursor

Leave Sheet

Alt+Back

Display the parent sheet in the schematic editor

Hotkeys are stored in the file user.hotkeys in KiCad’s configuration directory. The location is platform-specific:

  • Windows: %APPDATA%\kicad\6.0\user.hotkeys

  • Linux: ~/.config/kicad/6.0/user.hotkeys

  • macOS: ~/Library/Preferences/kicad/6.0/user.hotkeys

It is possible to import hotkey settings from a user.hotkeys file using menu PreferencesPreferences…​HotkeysImport Hotkeys…​.

格点

In the Schematic Editor the cursor always moves over a grid. The grid can be customized:

  • Size can be changed using the right click menu or using ViewGrid Properties…​.

  • Color can be changed in the Colors page of the Preferences dialog (menu PreferencesGeneral Options).

  • Visibility can be switched using the left-hand toolbar button.

The default grid size is 50 mil (0.050") or 1.27 millimeters.

这是在符号编辑器中设计符号时将符号和电线放置在原理图中以及放置引脚的首选网格。

Wires connect with other wires or pins only if their ends coincide exactly. Therefore it is important to keep symbol pins and wires aligned to the grid. It is recommended to always use a 50 mil grid when placing symbols and drawing wires because the KiCad standard symbol library and all libraries that follow its style also use a 50 mil grid.

人们还可以使用 25mil 到 10mil 的较小网格。 这仅用于设计符号体或放置文本和注释,不建议用于放置引脚和电线。

Symbols, wires, and other elements that are not aligned to the grid can be snapped back to the grid by selecting them, right clicking, and clicking Align Elements to Grid.

Snapping

Schematic elements such as symbols, wires, text, and graphic lines are snapped to the grid when moving, dragging, and drawing them. Additionally, the wire tool snaps to pins even when grid snapping is disabled. Both grid and pin snapping can be disabled while moving the mouse by using the modifier keys in the table below.

On Apple keyboards, use the Cmd key instead of Ctrl.
Modifier Key Effect

Ctrl

Disable grid snapping.

Shift

Disable snapping wires to pins.

缩放选择

要更改缩放级别:

  • 右键单击以打开弹出菜单,然后选择所需的缩放。

  • Or use hotkeys:

    • F1: Zoom in

    • F2: Zoom out

    • F4: Center the view around the cursor pointer position

    • Home: Zoom and center the view to fit the entire schematic sheet

    • Ctrl+Home: Zoom and center the view to fit all of the objects in the schematic

    • Ctrl+F5: Activate the Zoom to Selection tool

  • 窗口缩放:

    • 鼠标滚轮:放大/缩小

    • Shift +鼠标滚轮:向上/向下平移

    • Ctrl +鼠标滚轮:向左/向右平移

Mouse scroll gestures are configurable in the Mouse and Touchpad page of the Preferences dialog.

显示光标坐标

The display units are in inches, mils, or millimeters.

窗口右下角显示以下信息:

  • 缩放系数

  • 光标的绝对位置

  • 光标的相对位置

  • The grid size

  • The active unit system

  • The active tool

按空格可以将相对坐标重置为零。这对于测量两点之间的距离或对齐对象很有用。

状态栏

顶级菜单栏

顶部菜单栏允许打开和保存原理图,程序配置和查看文档。

菜单栏

上方工具栏

This toolbar gives access to the main functions of the Schematic Editor.

If the Schematic Editor is run in standalone mode, this is the available tool set:

images/toolbar_schedit_standalone.png

请注意,当 KiCad 在项目模式下运行时,前两个图标不可用,因为它们可以处理单个文件。

New schematic icon

Create a new schematic (only in standalone mode).

Open schematic icon

Open a schematic (only in standalone mode).

Save schematic icon

Save complete schematic project.

Schematic Setup icon

Set the schematic-specific options.

Page Settings icon

Select the sheet size and edit the title block.

Print icon

Open print dialog.

Plot icon

Open plot dialog.

paste icon

Paste a copied/cut item or block to the current sheet.

undo icon

Undo: Revert the last change.

redo icon

Redo: Revert the last undo operation.

search icon

Show the dialog to search symbols and texts in the schematic.

search replace icon

Show the dialog to search and replace texts in the schematic.

refresh icon

Refresh screen.

zoom in icon

Zoom in.

zoom out icon

Zoom out.

zoom to fit icon

Zoom to fit the entire schematic sheet.

zoom fit to objects icon

Zoom to fit all objects in the schematic.

zoom fit to selection icon

Zoom to fit selected items.

hierarchy navigator icon

View and navigate the hierarchy tree.

leave sheet icon

Leave the current sheet and go up in the hierarchy.

rotate counter-clockwise icon

Rotate selected items counter-clockwise.

rotate clockwise icon

Rotate selected items clockwise.

mirror vertical icon

Mirror selected items vertically.

mirror horizontal icon

Mirror selected items horizontally.

symbol editor icon

Call the symbol library editor to view and modify libraries and symbols.

symbol library browser icon

Browse symbol libraries.

footprint editor icon

Open the footprint library editor to view and modify libraries and footprints.

annotate icon

Annotate symbols.

ERC icon

Electrical Rules Checker (ERC), automatically validate electrical connections.

run footprint assignment icon

Open the footprint assignment tool to assign footprints to symbols.

Symbol fields editor icon

Bulk edit symbol fields in a spreadsheet interface.

BOM icon

Generate the Bill of Materials (BOM).

pcb editor icon

Open the PCB editor.

python scripting console icon

Open the Python scripting console.

右侧工具栏图标

此工具栏包含以下工具:

  • 放置符号,电线,总线,交叉点,标签,文本等。

  • 创建分层子表和连接符号。

Selection tool icon

Cancel the active command or tool and go into selection mode.

Highlight net icon

Highlight a net by marking its wires and net labels with a different color. If the PCB Editor is also open then copper corresponding to the selected net will be highlighted as well.

New Symbol icon

Display the symbol selector dialog to select a new symbol to be placed.

Add Power icon

Display the power symbol selector dialog to select a power symbol to be placed.

Draw Wire icon

Draw a wire.

Draw Bus icon

Draw a bus.

Draw wire to bus icon

Draw wire-to-bus entry points. These elements are only graphical and do not create a connection, thus they should not be used to connect wires together.

draw no connect flag icon

Place a "No Connect" flag. These flags should be placed on symbol pins which are meant to be left unconnected. It is done to notify the Electrical Rules Checker that lack of connection for a particular pin is intentional and should not be reported.

place junction icon

Place a junction. This connects two crossing wires or a wire and a pin, when it can be ambiguous (i.e. if a wire end or a pin is not directly connected to another wire end).

Local label icon

Place a local label. Local label connects items located in the same sheet. For connections between two different sheets, you have to use global or hierarchical labels.

Global label icon

Place a global label. All global labels with the same name are connected, even when located on different sheets.

Hierarchical label icon

Place a hierarchical label. Hierarchical labels are used to create a connection between a subsheet and the parent sheet that contains it.

Hierarchical subsheet icon

Place a hierarchical subsheet. You must specify the file name for this subsheet.

Import hierarchical label icon

Import a hierarchical pin from a subsheet. This command can be executed only on hierarchical subsheets. It will create hierarchical pins corresponding to hierarchical labels placed in the target subsheet.

draw dashed line icon

Draw a line. These are only graphical and do not connect anything.

place text icon

Place a text comment.

place bitmap icon

Place a bitmap image.

interactive delete tool icon

Delete clicked items.

左工具栏图标

此工具栏管理显示选项:

grid visibility icon

Toggle grid visibility.

inch unit icon

Switch units to inches.

mil unit icon

Switch units to mils (0.001 inches).

millimeter unit icon

Switch units to millimeters.

cursor shape icon

Choose the cursor shape (full screen/small).

hidden pin icon

Toggle visibility of "invisible" pins.

free angle wire icon

Toggle free angle/90 degrees wires and buses placement.

弹出菜单和快速编辑

右键单击可打开所选元素的上下文菜单。 这包含:

  • 缩放系数。

  • 网格调整。

  • Copy/Paste/Delete commands.

  • Add Wire/Bus.

  • 通常编辑所选元素的参数。

主菜单

文件菜单

文件菜单
New Close current schematic and start a new one (only in standalone mode).

Open

Load a schematic project (only in standalone mode).

Open Recent

Open a schematic project from the list of recently opened files (only in standalone mode).

Save

Save current sheet and all its subsheets.

Save As…​

Save the current sheet under a new name (only in standalone mode).

Save Current Sheet Copy As…​

Save a copy of the current sheet under a new name (only in project mode).

Insert Schematic Sheet Content…​

Insert the contents of another schematic sheet into the current sheet (only in standalone mode).

Import

Import a non-KiCad schematic or a footprint assignment file.

Export

Export a netlist or a drawing of the schematic to the clipboard.

Schematic Setup…​

Set up schematic formatting, electrical rules, net classes, and text variables.

Page Settings…​

Configure page dimensions and title block.

Print

Print schematic project (See also chapter Plot and Print).

Plot

Export to PDF, PostScript, HPGL or SVG format (See chapter Plot and Print).

Quit

Terminate the application.

Schematic Setup

The Schematic Setup window is used to set schematic options that are specific to the currently active schematic. For example, the Schematic Setup window contains formatting options, electrical rule configuration, netclass setup, and schematic text variable setup.

首选项菜单

首选项菜单

Configure Paths…​

Set the default search paths.

Manage Symbol Library Tables…​

Add/remove symbol libraries.

Preferences…​

Preferences (units, grid size, field names, etc.).

Set Language

Select interface language.

管理符号库表

符号库表

KiCad uses two library tables to store the list of available symbol libraries, which differ by the scope:

全局库

Libraries listed in the Global Library table are available to every project. They are saved in the sym-lib-table in the KiCad configuration directory, which is system-dependent:

  • Windows: %APPDATA%\kicad\6.0\sym-lib-table

  • Linux: ~/.config/kicad/6.0/sym-lib-table

  • macOS: ~/Library/Preferences/kicad/6.0/sym-lib-table

项目专用库

Libraries listed in Project Specific Libraries table are available to the currently opened project. They are saved in a sym-lib-table file in the project directory.

Both library tables are visible by clicking on Global Libraries or Project Specific Libraries tab in the Manage Library Tables window.

添加一个新库

Add a library either by clicking the Folder icon button and selecting a file or clicking the Plus icon button and typing a path to a library file. The selected library will be added to the currently opened library table (Global/Project Specific).

删除库

Remove a library by selecting one or more libraries and clicking the Trash icon button.

库属性

表中的每一行都存储了几个描述库的字段:

Active

Enables/disables the library. It is useful to temporarily reduce the loaded library set.

Nickname

Nickname is a short, unique identifier used for assigning symbols to components. Symbols are represented by '<Library Nickname>:<Symbol Name>' strings.

Library Path

Path points to the library location.

Plugin Type

Determines the library file format. KiCad 6.0 libraries use the "KiCad" format, while KiCad 5.x libraries use the "Legacy" format. Legacy libraries are read-only.

Options

Stores library specific options, if used by plugin.

Description

Briefly characterizes the library contents.

Preferences

Common Preferences
TODO: write this section
Common settings
Mouse and Touchpad

Center and warp cursor on zoom

If checked, the pointed location is warped to the screen center when zooming in/out.

Use touchpad to pan

When enabled, view is panned using scroll wheels (or touchpad gestures) and to zoom one needs to hold Ctrl. Otherwise scroll wheels zoom in/out and Ctrl/Shift are the panning modifiers.

Pan while moving object

If checked, automatically pans the window if the cursor leaves the window during drawing or moving.

热键

Redefine hotkeys.

Hotkeys settings

通过双击操作选择新的热键,或右键单击操作以显示弹出菜单:

Edit

Define a new hotkey for the action (same as double click).

Undo Changes

Reverts the recent hotkey changes for the action.

Clear Assigned Hotkey

Restore Default

Sets the action hotkey to its default value.

Display Options
Display options

网格尺寸

网格大小选择。

建议 使用普通网格(0.050英寸或1,27毫米)。较小 网格用于元件构建。

总线厚度

用于绘制总线的笔大小。

线条粗细

用于绘制没有对象的对象的笔大小 指定的笔大小。

元件 ID 表示法

用于表示符号单元的后缀样式(U1A, U1.A,U1-1等)

图标比例

调整工具栏图标大小。

显示网格

网格可见性设置。

将总线和电线限制为 H 和 V 方向

如果检查,总线和 电线仅用垂直或水平线绘制。 否则,可以在任何方向放置总线和电线。

显示隐藏的引脚:

通常显示不可见(或 隐藏 )引脚 电源引脚。

显示页面限制

如果选中,则在屏幕上显示页面边界。

符号选择器中的封装预览

显示封装预览框和 放置新符号时的封装选择器。

注意: 可能会导致问题或延迟,使用风险自负。

Editing Options
编辑设置

Measurement units

Select the display and the cursor coordinate units (inches or millimeters).

Horizontal pitch of repeated items

Increment on X axis during element duplication (default: 0) (after placing an item like a symbol, label or wire, a duplication is made by the Insert key)

Vertical pitch of repeated items

Increment on Y axis during element duplication (default: 0.100 inches or 2,54 mm).

Increment of repeated labels

Increment of label value during duplication of texts ending in a number, such as bus members (usual value 1 or -1).

Default text size

Text size used when creating new text items or labels.

Auto-save time interval

Time in minutes between saving backups.

Automatically place symbol fields

If checked, symbol fields (e.g. value and reference) in newly placed symbols might be moved to avoid collisions with other items.

Allow field autoplace to change justification

Extension of 'Automatically place symbol fields' option. Enable text justification adjustment for symbol fields when placing a new part.

Always align autoplaced fields to the 50 mil grid

Extension of 'Automatically place symbol fields' option. If checked, fields are autoplaced using 50 mils grid, otherwise they are placed freely.

颜色

各种图形元素的配色方案。 单击任何颜色样本以选择特定元素的新颜色。

颜色设置
默认字段

定义将在新放置的符号中显示的其他自定义字段和相应的值。

默认字段设置

帮助菜单

访问在线帮助(本文档),获取有关 KiCad 的广泛教程。

Use the Report a Bug item to report a bug online. Full KiCad version and user system information is available via the Copy Version Info button in the About KiCad window.

通用顶部工具栏

表格管理

The Sheet Settings icon (Sheet Settings icon) allows you to define the sheet size and the contents of the title block.

页面设置

工作表编号会自动更新。 您可以通过按 “发布日期” 按左箭头按钮将日期设置为今天,但不会自动更改。

搜索工具

The Find icon (Find icon) can be used to access the search tool.

查找对话框

您可以在当前工作表或整个层次结构中搜索引用,值或文本字符串。 找到后,光标将定位在相关子表中的找到元素上。

网表工具

The Netlist icon (Netlist icon) opens the netlist generation tool.

该工具创建一个文件,描述整个层次结构中的所有连接。

在多表层次结构中,任何本地标签仅在其所属的工作表内可见。 例如:表3的标签 LABEL1 与表5的标签 LABEL1 不同(如果没有故意引入连接以连接它们)。 这是因为工作表名称路径在内部与本地标签相关联。

Even though there is no text length limit for labels in KiCad, please take into account that other programs reading the generated netlist may have such constraints.
Avoid spaces in labels, because they will appear as separated words in the generated file. It is not a limitation of KiCad, but of many netlist formats, which often assume that a label has no spaces.
网表对话框

选项:

默认格式

选中以选择 Pcbnew 作为默认格式。

还可以生成其他格式:

  • Orcad PCB2

  • CadStar

  • Spice (simulators)

可以添加外部插件来扩展网表格式列表(上图中添加了 PadsPcb 插件)。

有关在《create-a-netlist, Create a Netlist》一章中创建网表的更多信息。

批注工具

The icon Annotate icon launches the annotation tool. This tool assigns references to components.

对于多部件元件(例如包含4个门的 7400 TTL),还分配了多部件后缀(因此,指定为 U3 的 7400 TTL将分为 U3A,U3B,U3C 和 U3D)。

您可以无条件地批注所有元件或仅批注新元件,即之前未批注的元件。

annotate-dialog_img

范围

使用整个原理图 所有工作表都重新批注(默认)。

仅使用当前页面

仅重新批注当前工作表 (此选项仅在特殊情况下使用,例如 评估当前表中的电阻数量。

保留现有批注

条件批注,只有新的 元件将被重新批注(默认)。

重置现有批注

所有的无条件批注 元件将被重新批注(此选项将在那里使用 是重复的参考)。

重置,但不要交换任何带批注的多单元部件

保持 当重新批注时,所有多个单元组(例如U2A,U2B)在一起。

批注顺序

选择元件编号的顺序(水平或垂直)。

批注选择

选择指定的参考格式。

电气规则检查工具

The icon ERC icon launches the electrical rules check (ERC) tool.

该工具执行设计验证,能够检测被遗忘的连接和不一致。

Once you have run the ERC, KiCad places markers to highlight problems. The error description is displayed after left clicking on the marker. An error report file can also be generated.

主要 ERC 对话框

ERC 对话框

错误显示在 Electrical Rules Checker 对话框中:

  • 错误和警告的总数。

  • 错误计数。

  • 警告计数。

选项:

创建 ERC 文件报告

选中此选项可生成 ERC 报告文件。

命令:

删除标记

删除所有ERC错误/警告标记。

运行

启动电气规则检查。

关闭

关闭对话框。

  • 单击错误消息将跳转到原理图中的相应标记。

ERC 选项对话框

ERC 选项对话框

此选项卡允许您定义引脚之间的连接规则; 您可以为每种情况选择3个选项:

  • 无错误

  • 警告

  • 错误

可以通过单击修改单元格的每个方格。

选项:

测试类似标签

报告标签只有字母大小写(例如 lable/Lable/LaBeL)。 网络名称区分大小写,因此这些标签被视为单独的网络。

测试独特的全局标签

报告仅出现一次的全局标签 特别网。 通常需要至少有两个连接。

命令:

初始化为默认值

恢复原始设置。

物料清单工具

The icon BOM icon launches the bill of materials (BOM) generator. This tool generates a file listing the components and/or hierarchical connections (global labels).

BOM 对话框

The Schematic Editor’s BOM generator makes use of external plugins, either as XSLT or Python scripts. There are a few examples installed inside the KiCad program files directory.

用于 BOM 的一组有用的元件属性包括:

  • 值 - 使用的每个部件的唯一名称。

  • 封装 - 手动输入或反标注(见下文)。

  • 字段1 - 制造商的名称。

  • 字段2 - 制造商的元件号。

  • 字段3 - 分销商的元件号。

例如:

元件属性对话框

MS Windows 上,BOM 生成器对话框有一个特殊选项(由红色箭头指示),用于控制外部插件窗口的可见性。 + 默认情况下,BOM 生成器命令执行控制台窗口隐藏,输出重定向到 Plugin info 字段。 设置此选项可显示正在运行的命令的窗口。 如果插件提供了图形用户界面,则可能是必要的。

MS Windows 上的 BOM 对话框额外选项

编辑字段工具

The icon Edit Fields icon opens a spreadsheet to view and modify field values for all symbols.

Symbol Dialog

修改字段值后,您需要通过单击 “应用” 按钮接受更改,或通过单击 恢复 按钮撤消更改。

简化字段填充的技巧

电子表格中有几种特殊的复制/粘贴方法。 在输入在少数元件中重复的字段值时,它们可能很有用。

这些方法如下所示。

复制 (Ctrl+C) 选择 黏贴 (Ctrl+V)

1copy

1selection

1paste

2copy

2selection

2paste

3copy

3selection

3paste

4copy

4selection

4paste

5copy

5selection

5paste

这些技术也可以在具有网格控制元素的其他对话框中使用。

用于封装分配的导入工具

访问:

The icon Import Footprint Names icon launches the back-annotate tool.

This tool allows footprint changes made in the PCB Editor to be imported back into the footprint fields in the Schematic Editor.

管理符号库

符号库包含创建原理图时使用的符号集合。 原理图中的每个符号由一个全名唯一标识,该全名由库昵称和符号名称组成。 一个例子是 “音频:AD1853”。

符号库表

符号库表包含 KiCad 知道的所有库文件的列表。 符号库表由全局符号库表文件和项目特定符号库表文件构成。

When a symbol is loaded, KiCad uses the library nickname, Audio in our example, to lookup the library location in the symbol library table.

The image below shows the symbol library table editing dialog which can be opened by invoking the Manage Symbol Libraries…​ entry in the Preferences menu.

符号列表文件对话框

全局符号库表

The global symbol library table contains the list of libraries that are always available regardless of the currently loaded project file. The table is saved in the file sym-lib-table in the user’s KiCad configuration folder. The location of this folder is dependent upon the operating system being used.

项目特定符号库表

项目特定符号库表包含专门用于当前加载的项目文件的库列表。 项目特定符号库表只能在与项目文件一起加载时进行编辑。 如果未加载项目文件或当前项目路径中没有符号库表文件,则会创建一个空表,可以对其进行编辑,然后将其与项目文件一起保存。

初始配置

The first time the KiCad Schematic Editor is run and the global symbol table file sym-lib-table is not found in the KiCad configuration folder, KiCad will present the "Configure Global Symbol Library Table" dialog to the user. The dialog presents the user with three options.

  • Copy default global symbol library table (recommended). If this option is selected, KiCad will copy the default symbol library table file stored in the system’s Kicad template folder to the file sym-lib-table in the user’s KiCad configuration folder. If the default template sym-lib-table file cannot be found, this option will be grayed out. The missing default table is usually caused by the KiCad default libraries not being installed (on some systems they are installed by a separate package). If the libraries are installed in a non-standard location, use the second option and browse to the library table location manually.

  • Copy custom global symbol library table. If this option is selected, the user must browse to the desired symbol library table file, which will be copied to the user’s KiCad configuration directory.

  • Create an empty global symbol library table. An empty symbol library table file will be created in the user’s KiCad configuration directory. The user must add libraries to the table manually.

symbol library table initial configuration

默认符号库表包括作为 KiCad 的一部分安装的所有符号库。 根据用途和系统的速度,这可能是也可能不是所希望的。 加载符号库所需的时间与符号库表中的库数量成正比。 如果符号库加载时间过长,请从全局库表中删除很少和/或从未使用过的库,并根据需要将它们添加到项目库表中。

添加表项

为了使用符号库, 必须首先将其添加到全局表或项目特定表中。特定于项目的表仅适用于打开项目文件的情况。

Each library entry must have a unique nickname.

The library nickname does not have to be related in any way to the actual library file name or path. The colon : and \ characters cannot be used anywhere in the library nickname. Each library entry must have a valid path and/or file name depending on the type of library. Paths can be defined as absolute, relative, or by environment variable substitution (see section below).

The appropriate library format must be selected in order for the library to be properly read. "KiCad" format is used for KiCad version 6 libraries (.kicad_sym files), while "Legacy" format is used for libraries from older versions of KiCad (.lib files). Legacy libraries are read-only, but can be migrated to KiCad format libraries using the Migrate Libraries button (see section Migrating Legacy Libraries).

还有一个描述字段用于添加库条目的描述。 此时不使用选项字段,因此在加载库时添加选项将不起作用。

  • 请注意,您不能在同一个表中包含重复的库昵称。 但是,您可以在全局和项目特定的符号库表中包含重复的库昵称。

  • 当出现重复的昵称时,项目特定的表条目将优先于全局表条目。

  • 在项目特定表中定义条目时,包含这些条目的 sym-lib-table 文件将写入当前打开的项目文件的文件夹中。

环境变量替代

One of the most powerful features of the symbol library table is environment variable substitution. This allows for definition of custom paths to where symbol libraries are stored in environment variables. Environment variable substitution is supported by using the syntax ${ENV_VAR_NAME} in the library path.

By default, at run time KiCad defines two environment variables relevant for locating symbol libraries:

  • the $KIPRJMOD environment variable that always points to the currently open project directory. $KIPRJMOD cannot be modified.

  • the $KICAD6_SYMBOL_DIR environment variable. This points to the path where the default symbol libraries that were installed with KiCad.

You can override $KICAD6_SYMBOL_DIR by redefining it in PreferencesConfigure Paths…​. This is useful for using libraries installed in a nonstandard location.

$KIPRJMOD allows you to store libraries in the project path without having to define the absolute path (which is not always known) to the library in the project specific symbol library table.

使用模式

Symbol libraries can be defined either globally or specifically to the currently loaded project. Symbol libraries defined in the user’s global table are always available and are stored in the sym-lib-table file in the user’s KiCad configuration folder. The project-specific symbol library table is active only for the currently open project file.

每种方法都有优点和缺点。 在全局表中定义所有库意味着它们将在需要时始终可用。 这样做的缺点是加载时间会增加。

在项目特定的基础上定义所有符号库意味着您只有项目所需的库,这会减少符号库加载时间。 缺点是您必须始终记住添加每个项目所需的每个符号库。

一种使用模式是全局定义常用库,而库只需要项目特定库表中的项目。 对如何定义库没有限制。

Migrating Legacy Libraries

Legacy libraries (.lib files) are read-only, but they can be migrated to KiCad version 6 libraries (.kicad_sym). KiCad version 6 libraries cannot be viewed or edited by KiCad versions older than 6.0.0.

Legacy libraries can be converted to KiCad 6 libraries by selecting them in the symbol library table and clicking the Migrate Libraries button. Multiple libraries can be selected and migrated at once by Ctrl-clicking or shift-clicking.

Libraries can also be converted one at a time by opening them in the Symbol Editor and saving them as a new library.

遗留项目重新映射

When loading a schematic created prior to the symbol library table implementation, KiCad will attempt to remap the symbol library links in the schematic to the appropriate library table symbols. The success of this process is dependent on several factors:

  • 原理图中使用的原始库仍然可用,并且在符号添加到原理图时保持不变。

  • 在检测到所有恢复行动时,执行所有恢复行动以创建恢复库或使现有恢复库保持最新状态。

  • 项目符号缓存库的完整性尚未损坏。

重新映射将备份在重新映射期间在项目文件夹中的 rescue-backup 文件夹中更改的所有文件。 在重新映射之前,请务必备份项目以防万一出错。

即使已禁用恢复操作以执行恢复操作以确保正确的符号可用于重新映射。 请勿取消此操作,否则重映射将无法正确重新映射原理图符号。 任何损坏的符号链接都必须手动修复。

If the original libraries have been removed and the rescue was not performed, the cache library can be used as a recovery library as a last resort. Copy the cache library to a new file name and add the new library file to the top of the library list using a version of KiCad prior to the symbol library table implementation.

原理图创建和编辑

简介

原理图可以用单张纸表示,但是,如果足够大,则需要多张纸。

A schematic represented by several sheets is hierarchical, and all its sheets (each one represented by its own file) constitute a complete KiCad schematic. The manipulation of hierarchical schematics will be described in the Hierarchical Schematics chapter.

一般考虑

A schematic designed with KiCad is more than a simple graphic representation of an electronic device. It is normally the entry point of a development chain that allows for:

  • 验证一组规则(ERC,电气规则检查)以检测错误和遗漏。

  • 自动生成物料清单(BOM)。

  • 用于仿真软件(如 SPICE)的(创建 - 定制 - 网表和文件 - 文件,生成网表)。

  • Defining a circuit for transferring to PCB layout.

原理图主要由符号,电线,标签,连接点,总线和电源端口组成。 为了清晰起见,您可以放置纯粹的图形元素,如总线条目,注释和折线。

Symbols are added to the schematic from symbol libraries. After the schematic is made, the set of connections and footprints is imported into the PCB editor for designing a board.

符号放置和编辑

找到并放置一个符号

To load a symbol into your schematic you can use the icon New Symbol icon. A dialog box allows you to type the name of the symbol to load.

选择元件对话框

“选择符号” 对话框将根据您在搜索字段中键入的内容按名称,关键字和说明过滤符号。 只需输入高级过滤器即可使用它们:

  • 通配符: 分别使用字符 “?” 和 “*” 表示 “任意 字符” 和 “任意数量的字符” 。

  • 关联: 如果库部分的描述或关键字包含标签 格式为 “Key:123” ,您可以通过键入相对于该匹配 “Key> 123” (大于),“Key <123” (小于)等。数字可能包括 以下不区分大小写的后缀之一:

    p

    n

    u

    m

    k

    meg

    g

    t

    10-12

    10-9

    10-6

    10-3

    103

    106

    109

    1012

    ki

    mi

    gi

    ti

    210

    220

    230

    240

  • 正则表达式: 如果你熟悉正则表达式,这些 也可以用。 使用的正则表达式风味是 wxWidgets 高级正则表达式 ,类似于 Perl 常规 表达式。

If the symbol specifies a default footprint, this footprint will be previewed in the lower right. If the symbol includes footprint filters, alternate footprints that satisfy the footprint filters can be selected in the footprint dropdown menu at right.

After selecting a symbol to place, the symbol will be attached to the cursor. Left clicking the desired location in the schematic places the symbol into the schematic. Before placing the symbol in the schematic, you can rotate it, mirror it, and edit its fields, by either using the hotkeys or the right-click context menu. These actions can also be performed after placement.

这是放置期间的符号:

放置期间的元件

If the "Place repeated copies" option is checked, after placing a symbol KiCad will start placing another copy of the symbol. This process continues until the user presses Esc.

For symbols with multiple units, if the "Place all units" option is checked, after placing the symbol KiCad will start placing the next unit in the symbol. This continues until the last unit has been placed or the user presses Esc.

Placing power ports

A power port symbol is a symbol representing a connection to a power net. The symbols are grouped in the power library, so they can be placed using the symbol chooser. However, as power placements are frequent, the Add Power icon tool is available. This tool is similar, except that the search is done directly in the power library.

符号编辑和修改(已放置的元件)

编辑符号有两种方法:

  • 符号本身的修改:多单元符号上的位置,方向,单位选择。

  • 修改符号的其中一个字段:引用,值,覆盖区等。

刚刚放置符号时,您可能需要修改其值(特别是电阻器,电容器等),但是立即为其分配参考编号或选择单元是没有用的(除了元件之外) 锁定单位,您必须手动分配)。 这可以通过批注功能自动完成。

符号修改

要修改符号的某些功能,请将光标放在符号上,然后执行以下任一操作:

  • 双击符号以打开完整的编辑对话框。

  • 右键单击以打开上下文菜单并使用以下命令之一:移动,方向,编辑,删除等。

  • Use a hotkey to perform an action on the symbol (E to open the properties dialog, R to rotate, etc.). Note that hotkeys act on the selected symbol; if no symbol is selected hotkeys act on the symbol under the cursor.

Symbols can also be selected by clicking on them or drag-selecting them. Selected symbols can be modified by clicking relevant buttons in the top toolbar or using a hotkey.

文本字段修改

您可以修改字段的参考,值,位置,方向,文本大小和可见性:

  • 双击文本字段进行修改。

  • 右键单击以打开上下文菜单并使用以下命令之一:移动,旋转,编辑,删除等。

  • Position the cursor over the field (if nothing is selected) or select the field and press E to edit the field.

  • Position the cursor over the symbol (if nothing is selected) or select the symbol and press V, U, or F hotkeys to directly edit the symbol’s value, reference designator, or footprint fields, respectively.

要获得更多选项,或者要创建字段,请双击该符号以打开 符号属性 对话框。

元件属性对话框

每个字段都可以是可见的或隐藏的,并且可以水平或垂直显示。 始终为正常显示的符号(无旋转或镜像)指示显示的位置,并且相对于符号的锚点。

The position and orientation properties of each field may be hidden in this dialog. They can be shown by right-clicking on the column header of the fields table and enabling the "Orientation", "X Position", and/or "Y Position" columns. Other columns can be shown or hidden as desired.

The "Update Symbol from Library…​" button is used to update the schematic’s copy of the symbol to match the copy in the library. The "Change Symbol…​" button is used to swap the current symbol to a different symbol in the library.

"Edit Symbol…​" opens the Symbol Editor to edit the copy of the symbol in the schematic. Note that the original symbol in the library will not be modified. The "Edit Library Symbol…​" button opens the Symbol Editor to edit the original symbol in the library. In this case, the symbol in the schematic will not be modified until the user clicks the "Update Symbol from Library…​" button.

Electrical Connections

简介

There are a number of elements that can be added to a schematic to electrically connect components. All of these elements can be placed with the buttons on the vertical right toolbar or using hotkeys.

这些元素是:

  • Wires: direct connection between pins.

  • Buses: connections for a group of signals.

  • Bus entries: connections between wires and buses.

  • No-connection flags: terminations for pins or wires that are intentionally unconnected. These flags prevent ERC violations for unconnected pins.

  • Junctions: connections between crossing wires or buses.

  • Net labels: local name for a signal. Signals within a sheet that have the same net label are connected.

  • Global labels: global name for a signal. Signals with the same global label are connected even if they are not in the same sheet.

  • Hierarchical labels: a label for a signal in a subsheet that enables the signal to be accessed in a parent sheet. See the Hierarchical Schematics section for more information about hierarchical labels, sheets, and pins.

  • Hierarchical sheets: an instantiation of a subsheet within a parent sheet. The parent sheet can connect to the subsheet through the subsheet’s hierarchical pins.

  • Hierarchical pins: connection points between a parent sheet and a subsheet. Hierarchical pins appear at the parent sheet’s level and correspond to hierarchical labels in the subsheet.

Several other types of items can be placed on the schematic but do not affect connectivity:

  • Graphical lines: graphical lines for presentation.

  • Text: textual comments and annotations.

  • Bitmap images: raster graphics from an external file.

This section will also discuss two special types of symbols that can be added with the "Power port" button on the right toolbar:

  • Power ports: symbols for connecting wires to a power or ground net.

  • PWR_FLAG: a specific symbol for indicating that a net is powered when it is not connected to a power output pin (for example, a power net that is supplied by an off-board connector).

连接(电线和标签)

有两种方法可以建立连接:

  • 引脚到引脚的电线。

  • 标签。

下图显示了这两种方法:

电线标签
Label Connections

The point of "contact" of a label is the small square in the corner of the label. The square disappears when the label is connected. The position of the connection point relative to the label text can be changed by choosing a different label orientation in the label properties, or by mirroring/rotating the label.

The label’s connection point must be in contact with a wire or the end of a pin for the label to be connected.

Wire Connections

要建立连接,必须将一段导线的两端连接到另一个段或一个引脚。

如果有重叠(如果导线通过引脚,但没有连接到引脚端)则没有连接。

Wires connect with other wires or pins only if their ends coincide exactly. Therefore it is important to keep symbol pins and wires aligned to the grid. It is recommended to always use a 50 mil grid when placing symbols and drawing wires because the KiCad standard symbol library and all libraries that follow its style also use a 50 mil grid.
Symbols, wires, and other elements that are not aligned to the grid can be snapped back to the grid by selecting them, right clicking, and selecting Align Elements to Grid.
Wire Junctions

Wires that cross are not implicitly connected. It is necessary to join them with a junction dot if a connection is desired. Junction dots will be automatically added to wires that start or end on top of an existing wire.

Junction dots are used in the previous figure on the wires connected to P1 pins 18, 19, 20, 21, 22, and 23.

Nets with Multiple Names

A signal can only have one name. If two different labels are placed on the same net, an ERC violation will be generated. Only one of the net names will be used in the netlist.

Hidden Power Pins

When the power pins of a symbol are visible, they must be connected, as with any other signal.

However, symbols such as gates and flip-flops are sometimes drawn with hidden power input pins which are connected implicitly.

KiCad automatically connects invisible pins with type "power input" to a global net with the same name as the pin. For example, if a symbol has a hidden power input pin named VCC, this pin will automatically be connected to the global VCC net.

Care must be taken with hidden power input pins because they can create unintentional connections. By nature, hidden pins are invisible and do not display their pin name. This makes it easy to accidentally connect two power pins to the same net. For this reason, the use of invisible power pins in symbols is not recommended outside of power port symbols, and is only supported for compatibility with legacy designs and symbols.
Hidden pins can be shown in the schematic by checking the Show hidden pins option in the Schematic EditorDisplay Options section of the preferences, or by selecting ViewShow hidden pins. There is also a toggle icon hidden pin 24 on the left (options) toolbar.

It may be necessary to join power nets of different names (for example, GND in TTL components and VSS in MOS components). To accomplish this, add a power port symbol for each net and connect them with a wire.

It is not recommended to use labels for power connection. These only have a "local" connection scope, and will not connect to invisible power pins.

Wiring

To begin connecting elements, you may either use the 'Wire' or 'Bus' tools from the right-hand toolbar, or you can auto-start a new wire from any existing pin or unconnected wire.

The wire drag action will drag the entire wire if you start dragging from the middle of the wire. Alternatively, it will drag just one corner if you start the drag action over a corner where two wires connect

连接(总线)

在下面的原理图中,许多引脚连接到总线。

总线示例示意图
总线编号

总线是一种在原理图中对相关信号进行分组的方法,以简化复杂的设计。 可以使用总线工具将总线绘制成电线,并使用与信号线相同的标签命名。 KiCad 6.0 及更高版本中有两种类型的总线:矢量总线和组总线。

一个 向量总线 是以公共前缀开头并以数字结尾的信号集合。 向量总线命名为‘<PREFIX> [M..N]’,其中‘PREFIX’是任何有效的信号名称,‘M’是第一个后缀号,‘N’是最后一个后缀号。 例如,总线‘DATA [0..7]’包含信号‘DATA0’,‘DATA1’,依此类推,直到‘DATA7’。 指定‘M’和‘N’的顺序无关紧要,但两者都必须是非负的。

一个 组总线 是一个或多个信号和/或矢量总线的集合。 组总线可用于将相关信号捆绑在一起,即使它们具有不同的名称。 组总线使用特殊标签语法:

‘<OPTIONAL_NAME>{SIGNAL1 SIGNAL2 SIGNAL3}’

该组的成员列在由空格字符分隔的花括号(‘{}’)内。 该组的可选名称位于左大括号之前。 如果组总线未命名,则 PCB 上生成的网络将只是组内的信号名称。 如果组总线具有名称,则生成的网络将具有名称作为前缀,其中句点(‘.’)将前缀与信号名称分开。

例如,总线‘{SCL SDA}’有两个信号成员,在网表中这些信号将是‘SCL’和‘SDA’。 总线“USB1 {DP DM}”将生成名为“USB1.DP”和“USB1.DM”的网络。 对于在几个类似电路上重复使用较大总线的设计,使用这种技术可以节省时间。

组总线还可以包含矢量总线。 例如,总线‘MEMORY {A [7..0] D [7..0] OE WE}’包含矢量总线和普通信号,并将产生诸如“MEMORY.A7”和“MEMORY.OE”之类的网络在 PCB 上的 。

Bus wires can be drawn and connected in the same manner as signal wires, including using junctions to create connections between crossing wires. Like signals, buses cannot have more than one name — if two conflicting labels are attached to the same bus, an ERC violation will be generated.

总线成员之间的连接

Pins connected between the same members of a bus must be connected by labels. It is not possible to connect a pin directly to a bus; this type of connection will be ignored by KiCad.

在上面的示例中,连接是通过放置在连接到引脚的导线上的标签进行的。 到总线的总线入口(45度线段)仅是图形化的,并不是形成逻辑连接所必需的。

In fact, using the repetition command (Insert), connections can be very quickly made in the following way, if component pins are aligned in increasing order (a common case in practice on components such as memories, microprocessors…​):

  • Place the first label (for example PCA0)

  • Use the repetition command as much as needed to place members. KiCad will automatically create the next labels (PCA1, PCA2…​) vertically aligned, theoretically on the position of the other pins.

  • 在第一个标签下画线。 然后使用重复命令将其他导线放在标签下。

  • 如果需要,以相同的方式放置总线条目(放置第一个条目,然后使用重复命令)。

In the Schematic EditorEditing Options section of the Preferences menu, you can set the repetition parameters:

  • Horizontal pitch.

  • Vertical pitch.

  • Label increment (labels can be incremented or decremented by 1, 2, 3, etc.).

总线正在展开

The unfold tool allows you to quickly break out signals from a bus. To unfold a signal, right-click on a bus object (a bus wire, etc) and choose Unfold from Bus. Alternatively, use the Unfold Bus hotkey (default: C) when the cursor is over a bus object. The menu allows you to select which bus member to unfold.

选择总线成员后,下一次单击将把总线成员标签放在所需位置。 该工具自动生成总线入口和导线,通向标签位置。 放置标签后,您可以继续放置其他线段(例如,连接到组件引脚)并以任何正常方式完成线缆。

总线别名

总线别名是一种快捷方式,可让您更有效地使用大型组总线。 它们允许您定义组总线并为其指定一个简短的名称,然后可以在原理图中使用该名称而不是完整的组名。

To create bus aliases, open the Bus Definitions dialog in the Tools menu.

总线定义对话框

别名可以被命名为任何有效的信号名称。 使用该对话框,您可以向别名添加信号或矢量总线。 作为一种快捷方式,您可以键入或粘贴由空格分隔的信号和/或总线列表,并将它们全部添加到别名定义中。 在这个例子中,我们定义了一个名为‘USB’的别名,其成员为“DP”,“DM”和“VBUS”。

定义别名后,可以通过将别名放在组总线的大括号内来用于组总线标签:‘{USB}’。 这与标记总线“{DP DM VBUS}”具有相同的效果。 您还可以为组添加前缀名称,例如“USB1 {USB}”,这会产生如上所述的“USB1.DP”等网络。 对于复杂的总线,使用别名可以使原理图上的标签更短。 请记住,别名只是一个快捷方式,别名的名称不包含在网表中。

总线别名保存在原理图文件中。 在给定的原理图工作表中创建的任何别名都可用于同一层次结构设计中的任何其他原理图工作表。

有多个标签的总线

KiCad 5.0 及更早版本允许将具有不同标签的总线连接在一起,并且在网络列表期间将加入这些总线的成员。 此行为已在 KiCad 6.0 中删除,因为它与组总线不兼容,并且还导致令人困惑的网表,因为不容易预测给定信号将接收的名称。

如果您在现代版本的 KiCad 中打开使用此功能的设计,您将看到“迁移总线”对话框,该对话框将指导您更新原理图,以便在任何给定的总线线路上只存在一个标签。

总线迁移对话框

对于具有多个标签的每组总线,您必须选择要保留的标签。 下拉名称框允许您在设计中存在的标签之间进行选择,或者您可以通过手动将其输入新名称字段来选择其他名称。

Power Ports

Power port symbols are conventionally used to connect pins to power nets. Power port symbols have a single pin which is invisible and marked as a power input. As described in the hidden power pins section, any wire connected to the pin of a power port is therefore automatically connected to the power net with the same name as the port’s pin.

In the KiCad standard library, power ports are found in the power library, but power port symbols can be created in any library. To create a custom power port, make a new symbol with a hidden pin marked as a power input. Name the pin according to the desired power net.

下图显示了电源端口连接的示例。

电源端口示例

In this example, power ports symbols are used to connect the positive and negative terminals of the capacitors to the VCC and GND nets, respectively.

Power port symbols are found in the power symbol library. They can also be created by drawing a symbol with a hidden "power input" pin that has the name of the desired power net.

PWR_FLAG

Two PWR_FLAG symbols are visible in the screenshot above. They indicate to ERC that the two power nets VCC and GND are actually connected to a power source, as there is no explicit power source such as a voltage regulator output attached to either net.

Without these two flags, the ERC tool would diagnose: Error: Input Power pin not driven by any Output Power pins.

The PWR_FLAG symbol is found in the power symbol library. The same effect can be achieved by connecting any "Power Output" pin to the net.

No-connection flag

No-connection flags (No-connection icon) are used to indicate that a pin is intentionally unconnected. These flags do not have any effect on the schematic’s connectivity, but they prevent "unconnected pin" ERC warnings for pins that are intentionally unconnected.

绘图补充

Text comments and graphic lines

It can be useful to place annotations such as text fields and frames to aid in understanding the schematic. Text fields (text 24) and graphic lines (add dashed line 24) are intended for this use, as opposed to labels and wires, which are connection elements.

The image below shows graphic lines and text in addition to wires, local labels, and hierarchical labels.

框架与评论示例

表格标题栏

The title block is edited with the Page Settings tool (Page Settings tool).

页面设置对话框

Each field in the title block can be edited, as well as the paper size and orientation. If the "Export to other sheets" option is checked for a field, that field will be updated in the title block of all sheets, rather than only the current sheet.

A drawing sheet template file can also be selected.

标题栏

The sheet number (Sheet X/Y) is automatically updated, but sheet page numbers can also be manually set using EditEdit Sheet Page Number…​.

抢救缓存的符号

By default, KiCad loads symbols from the project libraries according to the set paths and library order. This can cause a problem when loading a very old project: if the symbols in the library have changed or have been removed or the library no longer exists since they were used in the project, the ones in the project would be automatically replaced with the new versions. The new versions might not line up correctly or might be oriented differently leading to a broken schematic.

When a project is saved, a cache library with the contents of the current library symbols is saved along with the schematic. This allows the project to be distributed without the full libraries. If you load a project where symbols are present both in its cache and in the system libraries, KiCad will scan the libraries for conflicts. Any conflicts found will be listed in the following dialog:

恢复冲突对话框

您可以在此示例中看到该项目最初使用的是阴极朝上的二极管,但现在库中包含阴极朝下的二极管。 这种改变会打破原理图! 在此处按 OK 将使符号缓存库保存到特殊的 恢复 库中,并重命名所有符号以避免命名冲突。

If you press Cancel, no rescues will be made, so KiCad will load all the new components by default. If you save the schematic at this point, your cache will be overwritten and the old symbols will not be recoverable. If you have saved the schematic, you can still go back and run the rescue function again by selecting "Rescue Cached Components" in the "Tools" menu to call up the rescue dialog again.

如果您不想看到此对话框,可以按 从不再显示 。 默认设置是不执行任何操作并允许加载新元件。 可以在 首选项中更改此选项。

分层原理图

简介

对于大于几张的项目,分层表示通常是一个很好的解决方案。 如果要管理此类项目,则需要:

  • 使用大纸张会导致打印和处理问题。

  • 使用多个工作表,这将引导您进入层次结构。

然后,完整的原理图包含一个主要的原理图表,称为根表,以及构成该层次结构的子表。 此外,巧妙地将设计细分为单独的表格通常会提高其可读性。

From the root sheet, you must be able to find all sub-sheets. Hierarchical schematics management is very easy with KiCad, thanks to an integrated "hierarchy navigator" accessible via the icon Hierarchy navigator icon of the top toolbar.

有两种类型的层次结构可以同时存在:第一种层次结构刚刚被唤起并且具有普遍用途。 第二个包括在库中创建符号,这些符号在原理图中看起来像传统符号,但实际上对应于描述其内部结构的示意图。

第二种类型用于开发集成电路,因为在这种情况下,您必须在绘制的原理图中使用函数库。

KiCad currently doesn’t treat this second case.

层次结构可以是:

  • 简单: 给定的工作表只使用一次

  • 复杂: 给定的工作表被多次使用 (倍数实例)

  • 平面: 这是一个简单的层次结构, 但不会绘制工作表之间的连接。

KiCad can deal with all these hierarchies.

创建分层原理图很容易,整个层次结构从根原理图开始处理,就像您只有一个原理图一样。

要理解的两个重要步骤是:

  • 如何创建子表。

  • 如何在子表之间建立电气连接。

Navigation among sub-sheets is acheived by using the navigator tool accessible via the button Hierarchy navigator icon on the top toolbar.

hierarchy_navigator_dialog_png

单击其名称即可访问每个工作表。 要快速访问,请右键单击工作表名称,然后选择“输入工作表”或双击工作表的范围。

要将当前工作表退出到父工作表,请右键单击原理图中没有对象的任何位置,然后在上下文菜单中选择 “离开工作表” 或按 “Alt + Backspace”。

本地、分层和全局标签

属性

Local labels, tool Local label icon, are connecting signals only within a sheet. Hierarchical labels (tool Hierarchical label icon) are connecting signals only within a sheet and to a hierarchical pin placed in the parent sheet.

Global labels (tool Global label icon) are connecting signals across all the hierarchy. Power pins (type power in and power out) invisible are like global labels because they are seen as connected between them across all the hierarchy.

在层次结构(简单或复杂)中,可以使用分层标签和/或全局标签。

层次结构创建摘要

您必须:

  • 在根工作表中放置一个名为 工作表符号 的层次结构符号。

  • 使用导航器进入新原理图(子工作表)并绘制它,就像任何其他原理图一样。

  • 通过将全局标签(HLabels)放在新的原理图(子表)中,并在根表中使用相同名称的标签(称为 SheetLabels)绘制两个原理图之间的电气连接。 这些 SheetLabel 将连接到根表的工作表符号,连接到原理图的其他元素,如标准符号引脚。

工作表符号

绘制一个由两个对角点定义的矩形,表示子表格。

此矩形的大小必须允许您放置以后特定标签,层次结构引脚,对应于子表中的全局标签(HLabels)。

These labels are similar to usual symbol pins. Select the tool Add hierarchical subsheet icon.

单击以放置矩形的左上角。 再次单击以放置右下角,具有足够大的矩形。

然后,系统将提示您为此子表单键入文件名和表单名称(以便使用层次结构导航器访问相应的原理图)。

hsheet_properties_1_png

您必须至少提供一个文件名。 如果没有工作表名称,则文件名将用作工作表名称(通常的方法)。

连接 - 分层引脚

您将在此处创建刚刚创建的符号的连接点(层次结构引脚)。

这些连接点类似于普通符号引脚,但是只需一个连接点就可以连接一个完整的总线。

Importing Hierarchical Sheet Pins

  • Select the tool Import hierarchical pin icon.

  • Click on the hierarchical sheet from where you want to import the pins corresponding to hierarchical labels placed in the corresponding schematic. A hierarchical pin appears, if a new hierarchical label exists, i.e. not corresponding to an already placed pin.

  • 单击要放置此引脚的位置。

All necessary pins can thus be placed quickly and without error. Their aspect is in accordance with corresponding hierarchical labels.

连接 - 分层标签

Each pin of the sheet symbol just created, must correspond to a label called hierarchical Label in the sub-sheet. Hierarchical labels are similar to labels, but they provide connections between sub-sheet and root sheet. The graphical representation of the two complementary labels (pin and hierarchical labels) is similar. Hierarchical labels are made with the tool Add hierarchical label icon.

请参阅下面的根表示例:

hierarchical_label_root_png

注意引脚 VCC_PIC,连接到连接器 JP1。

以下是子表中的相应连接:

hierarchical_label_sub_png

您再次找到两个相应的分层标签,提供两个分层表之间的连接。

根据前面描述的语法(Bus [N. .m]),您可以使用分层标签和层次结构引脚连接两条总线。

标签,分层标签,全局标签和隐形电源引脚

以下是有关提供连接的各种方法的一些注释,而不是有线连接。

简单的标签

简单标签具有局部连接能力,即限于放置它们的示意图。 这是因为:

  • 每张纸都有一个纸张编号。

  • 此工作表编号与标签相关联。

因此,如果在标签 n°3 中放置标签 “TOTO” ,实际上真正的标签是 “TOTO_3” 。 如果您还在工作表 n°1(根表)中放置了标签 “TOTO” ,则实际上放置一个名为 “TOTO_1” 的标签,与 “TOTO_3” 不同。 即使只有一张纸也是如此。

分层标签

对于简单标签而言,对于分层标签也是如此。

因此,在同一张纸中,分层标签 “TOTO” 被认为连接到本地标签 “TOTO” ,但没有连接到另一张纸中称为 “TOTO” 的分层标签或标签。

分层标签被认为连接到放置在父表中的分层符号中的相应表引脚符号。

隐形电源引脚

可以看出,如果隐形电源引脚具有相同的名称,它们将连接在一起。 因此,所有声称为 隐形电源引脚 并命名为 VCC 的电源引脚都将所有符号 VCC 的电源引脚连接在它们所放置的工作表内。

这意味着如果将 VCC 标签放在子表中,它将不会连接到 VCC 引脚,因为该标签实际上是 VCC_n,其中 n 是表单号。

如果您希望此标签 VCC 真正连接到整个原理图的 VCC,则必须通过 VCC 电源符号将其明确连接到不可见的电源引脚。

全局标签

具有相同名称的全局标签跨整个层次结构连接。

(像vcc这样的强力标签…​…​是全局标签)

复杂层次结构

这是一个例子。 相同的原理图使用两次(两个实例)。 这两个工作表共享相同的原理图,因为两个工作表的文件名相同( other_sheet.sch )。 工作表名称必须是唯一的。

eeschema_complex_hierarchy_png

平面层次结构

如果遵守以下规则,则可以使用多个工作表创建项目,而无需在这些工作表(平面层次结构)之间创建连接:

  • 创建包含其他工作表的根工作表,这些工作表充当其他工作表之间的链接。

  • 不需要明确的连接。

  • 在所有工作表中使用全局标签而不是分层标签。

以下是根表的示例。

eeschema_flat_hierarchy_png

这是两页,由全局标签连接。

这是 pic_programmer.sch。

eeschema_flat_hierarchy_1_png

这是 pic_sockets.sch。

eeschema_flat_hierarchy_2_png

查看全局标签。

eeschema_flat_hierarchy_3_png

符号批注工具

简介

The annotation tool allows you to automatically assign a designator to symbols in your schematic. Annotation of symbols with multiple units will assign a unique suffix to minimize the number of these symbols. The annotation tool is accessible via the icon Annotate icon. Here you find its main window.

annotate-dialog_img

可用的批注方案:

  • 批注所有符号 (重置现有批注选项)

  • 批注所有符号, 但不要交换任何以前批注的多单元元件。

  • 仅批注当前未批注的符号。 未批注的符号将具有以 "?" 字符结尾的指示符。

  • 批注整个层次结构 (使用整个原理图选项)。

  • 仅批注当前工作表 (仅使用当前页选项)。

“重置, 但不交换任何带批注的多单元部件” 选项保留具有多单元的符号之间的所有现有关联。例如, U22 和 U2A 可能分别重新批注为 U1B 和 U1B, 但它们永远不会重新批注到 U1B 和 U2A, 也不会重新批注为 U2B 和 U2A。如果要确保保持引脚分组, 这很有用。

批注顺序选择提供了用于在层次结构的每个工作表内设置参考编号的方法。

除特定情况外, 如果您不想修改以前的批注, 则自动批注将应用于整个项目 (所有工作表) 和新元件。

“批注选择” 给出了用于计算参考的方法:

  • 在原理图中使用第一个空闲编号:元件从 1 开始批注(对于每个引用前缀)。 如果存在先前的批注,则仅使用未使用的数字。

  • 从纸张编号 *100 开始并使用第一个空闲编号:从纸张 1 的 101 开始批注,从纸张 2 的 201 开始,等等。如果在工作表内有超过 99 个具有相同参考前缀(U,R)的项目 在图 1 中,批注工具使用数字 200 和更多,并且工作表 2 的批注将从下一个空闲编号开始。

  • 从表格编号 *1000 开始并使用第一个空闲编号。 对于纸张 1,批注从 1001 开始,从纸张 2 的 2001 开始。

一些例子

批注顺序

此示例显示放置了 5 个元素,但未批注。

eeschema_annotation_order_none_png

执行批注工具后,获得以下结果。

按 X 位置排序。

eeschema_annotation_order_x_png

按 Y 位置排序。

eeschema_annotation_order_y_png

您可以看到四个 74LS00 门分布在 U1 包中,第五个 74LS00 已分配给下一个 U2。

批注选择

这是表 2 中的批注,其中选项使用原理图中的第一个空闲编号。

eeschema_annotation_choice_free_png

选项开始到工作表编号 *100并使用第一个空闲编号给出以下结果。

eeschema_annotation_choice_x100_png

选项开始到工作表编号 *1000并使用第一个空闲编号给出以下结果。

eeschema_annotation_choice_x1000_png

使用电气规则检查进行设计验证

简介

电气规则检查(ERC)工具会自动检查原理图。 ERC 检查工作表中的任何错误,例如未连接的引脚,未连接的分层符号,短路输出等。当然,自动检查不是绝对可靠的,并且可以检测所有设计错误的软件还不是100% 完成。 这样的检查非常有用,因为它允许您检测许多疏忽和小错误。

实际上,必须检查所有检测到的错误,然后在正常进行之前进行纠正。 ERC 的质量与在符号库创建期间声明电引脚属性时所采取的谨慎直接相关。 ERC 输出报告为 错误警告

ERC 对话框

如何使用 ERC

ERC can be started by clicking on the icon ERC icon.

在原理图元素上设置警告, 以引发 ERC 错误 (引脚或标签)。

  • 在此对话框窗口中,单击错误消息时,您可以跳转到原理图中的相应标记。

  • 在原理图中,右键单击标记以访问相应的诊断消息。

You can also delete error markers from the dialog and set specific ERC messages to be suppressed by using the right-click context menu.

Ignore ERC warning

ERC 的示例

ERC 指针

在这里, 您可以看到四个错误:

  • 两个输出错误地连接在一起(红色箭头)。

  • 两个输入未连接(绿色箭头)。

  • 隐藏电源端口出现错误,缺少电源标志(顶部为绿色箭头)。

显示诊断

通过右键单击标记,弹出菜单允许您访问 ERC 标记诊断窗口。

ERC 指针信息

当单击标记错误信息时,您可以获得错误的描述。

ERC pointers message

电源引脚和电源标志

通常在电源引脚上出现错误或警告,即使一切看起来都很正常。 见上面的例子。 之所以会发生这种情况,是因为在大多数设计中,电源是由不是电源的连接器提供的(如稳压器输出,它被声明为电源输出)。

因此,ERC 不会检测到任何电源输出引脚来控制该电线,并声明它们不是由电源驱动的。

要避免此警告,您必须在此类电源端口上放置 “PWR_FLAG”。 看一下下面的例子:

Power pins and flags

然后错误标记将消失。

大多数情况下,PWR_FLAG 必须连接到 GND,因为稳压器的输出声明为断电,但接地引脚永远不会断电(正常属性是电源输入),因此,在没有电源标志的情况下,接地不会与电源相连。

配置

The Pin Conflicts Map panel in Schematic Setup allows you to configure connectivity rules to define electrical conditions for errors and warnings based on what types of pins are connected to each other

Schematic ERC Pin Conflicts Map

单击所需的单元格方块可以更改规则,使其循环选择:正常,警告,错误。

Schematic ERC severity settings

The Violation Severity panel in Schematic Setup lets you configure what types of ERC messages should be reported as Errors, Warnings or ignored.

ERC 报告文件

通过选中写入 ERC 报告选项,可以生成并保存 ERC 报告文件。 ERC 报告文件的文件扩展名为 .erc。 以下是 ERC 报告文件的示例。

ERC control (4/1/1997-14:16:4)

***** Sheet 1 (INTERFACE UNIVERSAL)
ERC: Warning Pin input Unconnected @ 8.450, 2.350
ERC: Warning passive Pin Unconnected @ 8.450, 1.950
ERC: Warning: BiDir Pin connected to power Pin (Net 6) @ 10.100, 3.300
ERC: Warning: Power Pin connected to BiDir Pin (Net 6) @ 4.950, 1.400

>> Errors ERC: 4

Transfer Schematic to PCB

概述

Use the Update PCB from Schematic tool to sync design information from the Schematic Editor to the Board Editor. The tool can be accessed with ToolsUpdate PCB from Schematic (F8) in both the schematic and board editors. You can also use the Update PCB from Schematic icon icon in the top toolbar of the Board Editor.

Update PCB from Schematic is the preferred way to transfer design information from the schematic to the PCB. In older versions of KiCad, the equivalent process was to export a netlist from the Schematic Editor and import it into the Board Editor. It is no longer necessary to use a netlist file.
Update PCB from schematic

The tool adds the footprint for each symbol to the board and transfers updated schematic information to the board. In particular, the board’s net connections are updated to match the schematic.

The changes that will be made to the PCB are listed in the Changes To Be Applied pane. The PCB is not modified until you click the Update PCB button.

You can show or hide different types of messages using the checkboxes at the bottom of the window. A report of the changes can be saved to a file using the Save…​ button.

Options

The tool has several options to control its behavior.

Option Description

Re-link footprints to schematic symbols based on their reference designators

Footprints are normally linked to schematic symbols via a unique identifier created when the symbol is added to the schematic. A symbol’s unique identifier cannot be changed.

If checked, each footprint in the PCB will be re-linked to the symbol that has the same reference designator as the footprint.

If unchecked, footprints and symbols will be linked by unique identifier as usual, rather than by reference designator. Each footprint’s reference designator will be updated to match the reference designator of its linked symbol.

This option should generally be left unchecked. It is useful for specific workflows that rely on changing the links between schematic symbols and footprints, such as refactoring a schematic for easier layout or replicating layout between identical channels of a design.

Delete footprints with no symbols

If checked, any footprint in the PCB without a corresponding symbol in the schematic will be deleted from the PCB. Footprints with the "Not in schematic" attribute will be unaffected.

If unchecked, footprints without a corresponding symbol will not be deleted.

Replace footprints with those specified in the schematic

If checked, footprints in the PCB will be replaced with the footprint that is specified in the corresponding schematic symbol.

If unchecked, footprints that are already in the PCB will not be changed, even if the schematic symbol is updated to specify a different footprint.

绘图和打印

简介

您可以通过文件菜单访问打印和绘图命令。

eeschema_file_menu_plot_png

支持的输出格式是 Postscript,PDF,SVG,DXF 和 HPGL。 您也可以直接打印到您的打印机。

常见的打印命令

绘制当前页面

仅打印当前工作表的一个文件。

绘制所有页面

允许您绘制整个层次结构(为每个工作表生成一个打印文件)。

在 Postscript 中绘制

此命令允许您创建 PostScript 文件。

eeschema_plot_postscript_png

文件名是扩展名为 .ps 的工作表名称。 您可以禁用 ”绘制边框和标题栏“ 选项。 如果要创建用于封装的 postscript 文件(格式 .eps),这通常用于在文字处理软件中插入图表,这非常有用。 消息窗口显示创建的文件名。

以 PDF 格式绘制

eeschema_plot_pdf.png

允许您使用 PDF 格式创建打印文件。 文件名是扩展名为 .pdf 的工作表名称。

在 SVG 中绘图

eeschema_plot_svg_png

允许您使用矢量格式 SVG 创建打印文件。 文件名是扩展名为 .svg 的工作表名称。

在 DXF 中绘图

eeschema_plot_dxf_png

允许您使用 DXF 格式创建打印文件。 文件名是扩展名为 .dxf 的工作表名称。

在 HPGL 中绘图

此命令允许您创建 HPGL 文件。 在这种格式中,您可以定义:

  • 页面大小。

  • 原点。

  • 笔宽(mm)。

绘图仪设置对话框窗口如下所示:

eeschema_plot_hpgl_png

输出文件名将是工作表名称加上扩展名 .plt。

纸张尺寸选择

通常检查纸张尺寸。 在这种情况下,将使用标题栏菜单中定义的纸张尺寸,并且所选的比例将为1.如果选择了不同的纸张尺寸(A4 为 A0,或 A 为 E),则自动调整比例以填充页面。

偏移调整

对于所有标准尺寸,您可以调整偏移以尽可能准确地使图形居中。 由于绘图仪在工作表的中心或左下角有原点,因此必须能够引入偏移以便正确绘图。

一般来说:

  • 对于原点位于纸张中心的绘图仪,偏移量必须为负值并设置为纸张尺寸的一半。

  • 对于原点位于纸张左下角的绘图仪,偏移量必须设置为0。

要设置偏移量:

  • 选择纸张尺寸。

  • 设置偏移量 X 和偏移量 Y.

  • 单击接受偏移量。

This command, available via the icon Print icon, allows you to visualize and generate design files for the standard printer.

print_dialog_png

“打印表格参考和标题栏” 选项可启用或禁用图纸参考和标题栏。

“黑白打印” 选项设置单色打印。 如果使用黑白激光打印机,通常需要此选项,因为颜色打印成半色调,通常不太可读。

Symbol Editor

关于符号库的一般信息

A symbol is a schematic element which contains a graphical representation, electrical connections, and text fields describing the symbol. Symbols used in a schematic are stored in symbol libraries. KiCad provides a symbol editing tool that allows you to create libraries, add, delete or transfer symbols between libraries, export symbols to files, and import symbols from files. The symbol editing tool provides a simple way to manage symbols and symbol libraries.

符号库概述

符号库由一个或多个符号组成。 通常,符号按功能,类型和/或制造商进行逻辑分组。

符号由以下部分组成:

  • Graphical items (lines, circles, arcs, text, etc.) that determine how symbol looks in a schematic.

  • Pins which have both graphic properties (line, clock, inverted, low level active, etc.) and electrical properties (input, output, bidirectional, etc.) used by the Electrical Rules Check (ERC) tool.

  • 诸如参考,值,PCB设计的相应封装名称等字段等。

Symbols can be derived from another symbol in the same library. Derived symbols share the base symbol’s graphical shape and pin definitions, but can override the base symbol’s property fields (value, footprint, footprint filters, datasheet, description, etc.). Derived symbols can be used to define symbols that are similar to a base part. For example, 74LS00, 74HC00, and 7437 symbols could all be derived from a 7400 symbol. In previous versions of KiCad, derived symbols were referred to as aliases.

正确的符号设计需要:

  • 定义符号是否由一个或多个单元组成。

  • Defining if the symbol has an alternate body style (also known as a De Morgan representation).

  • 使用线条,矩形,圆形,多边形和文本设计其符号表示。

  • 通过仔细定义每个引脚的图形元素,名称,编号和电气属性(输入,输出,三态,电源端口等)来添加引脚。

  • Determining if the symbol should be derived from another symbol with the same graphical design and pin definition.

  • 添加可选字段,例如 PCB 设计软件使用的封装名称和/或定义其可见性。

  • 通过添加描述字符串和数据表链接等来记录符号。

  • 将其保存在所需的库中。

符号库编辑器概述

符号库编辑器主窗口如下所示。 它由三个工具栏组成,可快速访问常用功能和符号查看/编辑区域。 并非所有命令都可在工具栏上使用,但可以使用菜单访问。

Symbol Editor main window

主工具栏

The main tool bar is located at the top of the main window. It consists of the undo/redo commands, zoom commands, symbol properties dialogs, and unit/representation management controls.

Symbol Editor toolbar

New symbol icon

Create a new symbol in the selected library.

Save icon

Save the currently selected library. All modified symbols in the library will be saved.

Undo icon

Undo last edit.

Redo icon

Redo last undo.

Refresh icon

Refresh display.

Zoom in icon

Zoom in.

Zoom out icon

Zoom out.

Zoom to fit page icon

Zoom to fit symbol in display.

Zoom to selection icon

Zoom to fit selection.

Rotate counterclockwise icon

Rotate counter-clockwise.

Rotate clockwise icon

Rotate clockwise.

Mirror horizontally icon

Mirror horizontally.

Mirror vertically icon

Mirror vertically.

Symbol properties icon

Edit the current symbol properties.

Pin table icon

Edit the symbol’s pins in a tablular interface.

Datasheet icon

Open the symbol’s datasheet. The button will be disabled if no datasheet is defined for the current symbol.

ERC icon

Test the current symbol for design errors.

Normal body style icon

Select the normal body style. The button is disabled if the current symbol does not have an alternate body style.

Alternate body style icon

Select the alternate body style. The button is disabled if the current symbol does not have an alternate body style.

Unit dropdown

Select the unit to display. The drop down control will be disabled if the current symbol is not derived from a symbol with multiple units.

Synchronized pin edit mode icon

Enable synchronized pins edit mode. When this mode is enabled, any pin modifications are propagated to all other symbol units. Pin number changes are not propagated. This mode is automatically enabled for symbols with multiple interchangable units and cannot be enabled for symbols with only one unit.

元素工具栏

The vertical toolbar located on the right hand side of the main window allows you to place all of the elements required to design a symbol.

Cursor icon

Select tool. Right-clicking with the select tool opens the context menu for the object under the cursor. Left-clicking with the select tool displays the attributes of the object under the cursor in the message panel at the bottom of the main window. Double-left-clicking with the select tool will open the properties dialog for the object under the cursor.

Pin icon

Pin tool. Left-click to add a new pin.

Text icon

Graphical text tool. Left-click to add a new graphical text item.

Add rectangle icon

Rectangle tool. Left-click to begin drawing the first corner of a graphical rectangle. Left-click again to place the opposite corner of the rectangle.

Add circle icon

Circle tool. Left-click to begin drawing a new graphical circle from the center. Left-click again to define the radius of the circle.

Add arc icon

Arc tool. Left-click to begin drawing a new graphical arc item from the first arc end point. Left-click again to define the second arc end point. Adjust the radius by dragging the arc center point.

Add line icon

Connected line tool. Left-click to begin drawing a new graphical line item in the current symbol. Left-click for each additional connected line. Double-left-click to complete the line.

Anchor icon

Anchor tool. Left-click to set the anchor position of the symbol.

Delete icon

Delete tool. Left-click to delete an object from the current symbol.

选项工具栏

The vertical tool bar located on the left hand side of the main window allows you to set some of the editor drawing options.

Grid icon

Toggle grid visibility on and off.

Inch unit icon

Set units to inches.

Millimeter unit icon

Set units to mils (0.001 inch).

Millimeter unit icon

Set units to millimeters.

Cursor shape icon

Toggle full screen cursor on and off.

Show pintype icon

Toggle display of pin electrical types.

Symbol tree icon

Toggle display of libraries and symbols.

库选择与维护

The selection of the current library is possible via the Symbol tree icon icon which shows you all available libraries and allows you to select one. When a symbol is loaded or saved, it will be put in this library. The library name of a symbol is the contents of its Value field.

选择并保存符号

符号选择

Clicking the Symbol tree icon icon on the left tool bar toggles the treeview of libraries and symbols. Clicking on a symbol opens that symbol.

Some symbols are derived from other symbols. Derived symbol names are displayed in italics in the treeview. If a derived symbol is opened, its symbol graphics will not be editable. Its symbol fields will be editable as normal. To edit the graphics of a base symbol and all of its derived symbols, open the base symbol.
保存符号

After modification, a symbol can be saved in the current library or a different library.

To save the modified symbol in the current library, click the Save icon icon. The modifications will be written to the existing symbol.

Saving a modified symbol also saves all other modified symbols in the same library.

To save the symbol changes to a new symbol, click FileSave As…​. The symbol can be saved in the current library or a different library. A new name can be set for the symbol.

To create a new file containing only the current symbol, click FileExportSymbol…​. This file will be a standard library file which will contain only one symbol.

创建库符号

创建一个新符号

A new symbol can be created by clicking the New symbol icon icon. You will be asked for a number of symbol properties.

  • A symbol name (this name is used as the default value for the Value field in the schematic editor)

  • An optional base symbol to derive the new symbol from. The new symbol will use the base symbol’s graphical shape and pin configuration, but other symbol information can be modified in the derived symbol. The base symbol must be in the same library as the new derived symbol.

  • The reference designator prefix (U, C, R…​).

  • The number of units per package, and whether those units are interchangeable (for example a 7400 is made of 4 units per package).

  • If an alternate body style (sometimes referred to as a "De Morgan equivalent") is desired.

  • Whether the symbol is a power symbol. Power symbols appear in the "Add Power Port" dialog in the Schematic editor, their Value fields are not editable in the schematic, they cannot be assigned a footprint and they are not added to the PCB, and they are not included in the bill of materials.

  • Whether the symbol should be excluded from the bill of materials.

  • Whether the symbol should be excluded from the PCB.

There are also several graphical options.

  • The offset between the end of each pin and its pin name.

  • Whether the pin number and pin name should be displayed.

  • Whether the pin names should be displayed alongside the pins or at the ends of the pins inside the symbol body.

These properties can also be changed later in the Symbol Properties window.

New symbol properties

将使用上面的属性创建一个新符号,它将出现在编辑器中,如下所示。

Newly created symbol

The blue cross in the center is the symbol anchor, which specifies the symbol origin i.e. the coordinates (0, 0). The anchor can be repositioned by selecting the Anchor icon icon and clicking on the new desired anchor position.

从另一个符号创建符号

通常,您要制作的符号类似于符号库中已有的符号。 在这种情况下,很容易加载和修改现有符号。

  • 加载将用作起点的符号。

  • Save a new copy of the symbol using FileSave As…​. The Save As dialog will prompt for a name for the new symbol and the library to save it in.

  • 根据需要编辑新符号。

  • Save the modified symbol.

符号属性

Symbol properties are set when the symbol is created but they can be modified at any point. To change the symbol properties, click on the Symbol properties icon icon to show the dialog below.

符号属性

It is important to correctly set the number of units per package and the alternate symbolic representation, if enabled, because when pins are edited or created the corresponding pins for each unit will be affected. If you change the number of units per package after pin creation and editing, there will be additional work to specify the pins and graphics for the new unit. Nevertheless, it is possible to modify these properties at any time.

The graphic options "Show pin number" and "Show pin name" define the visibility of the pin number and pin name text. The option "Place pin names inside" defines the pin name position relative to the pin body. The pin names will be displayed inside the symbol outline if the option is checked. In this case the "Pin Name Position Offset" property defines the shift of the text away from the body end of the pin. A value from 0.02 to 0.05 inches is usually reasonable.

下面的示例显示了未选中 “放置引脚名称” 选项的符号。 注意名称和引脚号的位置。

Place pin name inside unchecked
Symbol Name, Description, and Keywords

The symbol’s name is the same as the Value field. When the symbol name is changed the value also changes, and vice versa. The symbol’s name in the library also changes accordingly.

The symbol description should contain a brief description of the component, such as the component function, distinguishing features, and package options. The keywords should contain additional terms related to the component. Keywords are used primarily to assist in searching for the symbol.

Searching for a symbol in the add a symbol dialog

A symbol’s name, description, and keywords are all used when searching for symbols in the Symbol Editor and Add a Symbol dialog. The description and keywords are displayed in the Symbol Library Browser and Add a Symbol dialog.

Footprint Filters

The footprint filters tab is used to define which footprints are appropriate to use with the symbol. The filters can be applied in the Footprint Assignment tool so that only appropriate footprints are displayed for each symbol.

Multiple footprint filters can be defined. Footprints that match any of the filters will be displayed; if no filters are defined, then all footprints will be displayed.

Filters can use wildcards: * matches any number of characters, including zero, and ? matches zero or one characters. For example, SOIC-* would match the SOIC-8_3.9x4.9mm_P1.27mm footprint as well as any other footprint beginning with SOIC-. The filter SOT?23 matches SOT23 as well as SOT-23.

Footprint filters

带有替代符号表示的符号

If the symbol has an alternate body style defined, one body style must be selected for editing at a time. To edit the normal representation, click the Normal representation icon icon.

To edit the alternate representation, click on the Alternate representation icon icon. Use the images/toolbar_libedit_part.png dropdown shown below to select the unit you wish to edit.

Selecting a symbol unit

图形元素

Graphical elements create the visual representation of a symbol and contain no electrical connection information. Graphical elements are created with the following tools:

  • 由起点和终点定义的线和多边形。

  • 由两个对角线定义的矩形。

  • 由中心和半径定义的圆。

  • 由弧的起点和终点及其中心定义的弧。 弧度从0°到180°。

主窗口右侧的垂直工具栏允许您放置设计符号表示所需的所有图形元素。

图形元素成员资格

每个图形元素(线,弧,圆等)可以被定义为对于所有单元和/或主体样式是共同的或者对于给定单元和/或主体样式是特定的。 右键单击元素可以快速访问元素选项,以显示所选元素的上下文菜单。 下面是线元素的上下文菜单。

Graphic line context menu

您还可以双击元素以修改其属性。 下面是多边形元素的属性对话框。

Graphic line properties

图形元素的属性是:

  • "Line width" defines the width of the element’s line in the current drawing units.

  • "Fill Style" determines if the shape defined by the graphical element is to be drawn unfilled, background filled, or foreground filled.

  • "Common to all units in symbol" determines if the graphical element is drawn for each unit in symbol with more than one unit per package or if the graphical element is only drawn for the current unit.

  • "Common to all body styles (De Morgan)" determines if the graphical element is drawn for each symbolic representation in symbols with an alternate body style or if the graphical element is only drawn for the current body style.

图形文本元素

The Text icon icon allows for the creation of graphical text. Graphical text is automatically oriented to be readable, even when the symbol is mirrored. Please note that graphical text items are not the same as symbol fields.

每个符号多个单位和替代体型样式

Symbols can have up to two body styles (a standard symbol and an alternate symbol often referred to as a "De Morgan equivalent") and/or have more than one unit per package (logic gates for example). Some symbols can have more than one unit per package each with different symbols and pin configurations.

Consider for instance a relay with two switches, which can be designed as a symbol with three different units: a coil, switch 1, and switch 2. Designing a symbol with multiple units per package and/or alternate body styles is very flexible. A pin or a body symbol item can be common to all units or specific to a given unit or they can be common to both symbolic representation so are specific to a given symbol representation.

By default, pins are specific to a unit and body style. When a pin is common to all units or all body styles, it only needs to be created once. This is also the case for the body style graphic shapes and text, which may be common to each unit, but typically are specific to each body style).

Example of a Symbol With Multiple Noninterchangeable Units

For an example of a symbol with multiple units that are not interchangeable, consider a relay with 3 units per package: a coil, switch 1, and switch 2.

The three units are not all the same, so "All units are interchangeable" should be deselected in the Symbol Properties dialog. Alternatively, this option could have been specified when the symbol was initially created.

Uncheck all units are interchangeable
Unit A
Relay unit A
Unit B
Relay unit B
Unit C
Relay unit C

Unit A does not have the same symbol and pin layout as Units B and C, so the units are not interchangeable.

"Synchronized Pins Edit Mode" can be enabled by clicking the Synchronized pins edit mode icon icon. In this mode, pin modifications are propagated between symbol units; changes made in one unit will be reflected in the other units as well. When this mode is disabled, pin changes made in one unit do not affect other units. This mode is enabled automatically when "All units are interchangeable" is checked, but it can be disabled. The mode cannot be enabled when "All units are interchangeable" is unchecked or when the symbol only has one unit.
图形符号元素

Shown below are properties for a graphic body element. In the relay example above, the three units have different symbolic representations. Therefore, each unit was created separately and the graphical body elements have the "Common to all units in symbol" setting disabled.

Disable common to all units in symbol

引脚创建和编辑

You can click on the Pin icon icon to create and insert a pin. The editing of all pin properties is done by double-clicking on the pin or right-clicking on the pin to open the pin context menu. Pins must be created carefully, because any error will have consequences on the PCB design. Any pin already placed can be edited, deleted, and/or moved.

引笔概述

A pin is defined by its graphical representation, its name and its number. The pin’s name and number can contain letters, numbers, and symbols, but not spaces. For the Electrical Rules Check (ERC) tool to be useful, the pin’s electrical type (input, output, tri-state…​) must also be defined correctly. If this type is not defined properly, the schematic ERC check results may be invalid.

重要笔记:

  • Symbol pins are matched to footprint pads by number. The pin number in the symbol must match the corresponding pad number in the footprint.

  • Do not use spaces in pin names and numbers. Spaces will be automatically replaced with underscores (_).

  • To define a pin name with an inverted signal (overline) use the ~ (tilde) character followed by the text to invert in braces. For example ~{FO}O would display FO O.

  • If the pin name is empty, the pin is considered unnamed.

  • Pin names can be repeated in a symbol.

  • Pin numbers must be unique in a symbol.

引脚属性

Pin properties

引脚属性对话框允许您编辑引脚的所有特性。 创建引脚或双击现有引脚时,会自动弹出此对话框。 此对话框允许您修改:

  • The pin name and text size.

  • The pin number and text size.

  • The pin length.

  • The pin electrical type and graphical style.

  • 单位和替代代表成员资格。

  • Pin visibility.

  • Alternate pin definitions.

Pin Graphic Styles

Shown in the figure below are the different pin graphic styles. The choice of graphic style does not have any influence on the pin’s electrical type.

Pin graphic styles

引脚电气类型

Choosing the correct electrical type is important for the schematic ERC tool. ERC will check that pins are connected appropriately, for example ensuring that input pins are driven and power inputs receive power from an appropriate source.

Pin Type

Description

Input

A pin which is exclusively an input.

Output

A pin which is exclusively an output.

Bidirectional

A pin that can be either an input or an output, such as a microcontroller data bus pin.

Tri-state

A three state output pin (high, low, or high impedance)

Passive

A passive symbol pin: resistors, connectors, etc.

Free

A pin that can be freely connected to any other pin without electrical concerns.

Unspecified

A pin for which the ERC check does not matter.

Power input

A symbol’s power pin. As a special case, power input pins that are marked invisible are automatically connected to the net with the same name. See the Power Ports section for more information.

Power output

A pin that provides power to other pins, such as a regulator output.

Open collector

An open collector logic output.

Open emitter

An open emitter logic output.

Unconnected

A pin that should not be connected to anything.

Pushing Pin Properties to Other Pins

You can apply the length, name size, or number size of a pin to the other pins in the symbol by right clicking the pin and selecting Push Pin Length, Push Pin Name Size, or Push Pin Number Size, respectively.

Pin context menu

为多个单元和备用符号表示定义引脚

Symbols with multiple units and/or graphical representations are particularly problematic when creating and editing pins. The majority of pins are specific to each symbol unit (because each unit has a different set of pins) and to each body style (because the form and position is different between the normal body style and the alternate form).

The symbol library editor allows the simultaneous creation of pins. By default, changes made to a pin are made for all units of a multiple unit symbol and to both representations for symbols with an alternate symbolic representation. The only exception to this is the pin’s graphical type and name, which remain unlinked between symbol units and body styles. This dependency was established to allow for easier pin creation and editing in most cases. This dependency can be disabled by toggling the Synchronized pin edit mode icon icon on the main tool bar. This will allow you to create pins for each unit and representation completely independently.

Pins can be common or specific to different units. Pins can also be common to both symbolic representations or specific to each symbolic representation. When a pin is common to all units, it only has to drawn once. Pins are set as common or specific in the pin properties dialog.

An example is the output pin in the 7400 quad dual input NAND gate. Since there are four units and two symbolic representations, there are eight separate output pins defined in the symbol definition. When creating a new 7400 symbol, unit A of the normal symbolic representation will be shown in the library editor. To edit the pin style in the alternate symbolic representation, it must first be enabled by clicking the Alternate representation icon button on the tool bar. To edit the pin number for each unit, select the appropriate unit using the images/toolbar_libedit_alias.png drop down control.

Pin Table

Another way to edit pins is to use the Pin Table, which is accessible via the Pin table icon icon. The Pin Table displays all of the pins in the symbol and their properties in a table view, so it is useful for making bulk pin changes.

Any pin property can be edited by clicking on the appropriate cell. Pins can be added and removed with the Plus icon and Trash icon icons, respectively.

Columns of the pin table can be shown or hidden by right-clicking on the header row and checking or unchecking additional columns. Some columns are hidden by default.

The screenshot below shows the pin table for a quad opamp.

Pin table

Alternate Pin Definitions

Pins can have alternate pin definitions added to them. Alternate pin definitions allow a user to select a different name, electrical type, and graphical style for a pin when the symbol has been placed in the schematic. This can be used for pins that have multiple functions, such as microcontroller pins.

Alternate pin definitions are added in the Pin Properties dialog as shown below. Each alternate definition contains a pin name, electrical type, and graphic style. This microcontroller pin has all of its peripheral functions defined in the symbol as alternate pin names.

Alternate pin definitions

Alternate pin definitions are selected in the Schematic Editor once the symbol has been placed in the schematic. The alternate pin is assigned in the Alternate Pin Assignments tab of the Symbol Properties dialog. Alternate definitions are selectable in the dropdown in the Alternate Assignment column.

Selecting an alternate pin definition

符号字段

All library symbols are defined with four default fields. The reference designator, value, footprint assignment, and datasheet link fields are created whenever a symbol is created or copied. Only the reference designator and value fields are required.

Symbols defined in libraries are typically defined with only these four default fields. Additional fields such as vendor, part number, unit cost, etc. can be added to library symbols but generally this is done in the schematic editor so the additional fields can be applied to all of the symbols in the schematic.

A convenient way to create additional empty symbol fields is to use define field name templates. Field name templates define empty fields that are added to each symbol when it is inserted into the schematic. Field name templates can be defined globally (for all schematics) in the Schematic Editor Preferences, or they can be defined locally (specific to each project) in the Schematic Setup dialog.

编辑符号字段

要编辑现有符号字段,请右键单击字段文本以显示下面显示的字段上下文菜单。

Symbol field context menu

To add new fields, delete optional fields, or edit existing fields, use the Component properties icon icon on the main tool bar to open the Symbol Properties dialog.

Fields are text information associated a the symbol. Do not confuse them with text in the graphic representation of a symbol.

重要笔记:

  • Modifying the Value field changes the name of the symbol. The symbol’s name in the library will change when the symbol is saved.

  • The Symbol Properties dialog must be used to edit a field that is empty or has the invisible attribute enabled because such fields cannot be clicked on.

  • The footprint is defined as an absolute footprint using the LIBNAME:FOOTPRINTNAME format where LIBNAME is the name of the footprint library defined in the footprint library table (see the "Footprint Library Table" section in the PCB Editor manual) and FOOTPRINTNAME is the name of the footprint in the library LIBNAME.

Power Ports

Power ports, or power symbols, are conventionally used to label a wire as part of a power net, like VCC, +5V, or GND. In the schematic below, the +3.3V and GND symbols are power ports. In addition to acting as a visual indicator that a net is a power rail, a power port will determine the name of the net it is attached to. This is true even if there is another net label attached to the net; the net name determined by the power symbol overrides any other net names.

Power port example

It may be useful to place power symbols in a dedicated library. KiCad’s symbol library places power symbols in the power library, and users may create libraries to store their own power symbols. If the "Define as power symbol" box is checked in a symbol’s properties, that symbol will appear in the Schematic Editor’s "Add Power Port" dialog for convenient access.

Power symbols are handled and created the same way as normal symbols, but there are several additional considerations described below. They consist of a graphical symbol and a pin of the type "Power input" that is marked hidden.

Below is an example of a GND power symbol.

Editing a power symbol

Creating a Power Port Symbol

Power Port symbols consist of a pin of type "Power input" that is marked invisible. Invisible power input pins have a special property of automatically connecting to a net with the same name as the pin name. A net that is wired to an invisible power input pin will therefore be named after the pin, even if there are other net labels on the net. This connection is global.

If the power symbol has the "Define as power symbol" property checked, the power input pin does not need to be marked invisible. However, the convention is to make these pins invisible anyway.
Power symbol pin

要创建电源符号, 请使用以下步骤:

  • Add a pin of type "Power input", with "Visible" unchecked, and the pin named according to the desired net. Make the pin number 1, the length 0, and set the graphic style to "Line". The pin name establishes the connection to the net; in this case the pin will automatically connect to the net GND. The pin number, length, and line style do not matter electrically.

  • Place the pin on the symbol anchor.

  • Use the shape tools to draw the symbol graphics.

  • Set the symbol value. The symbol value does not matter electrically, but it is displayed in the schematic. To eliminate confusion, it should match the pin name (which determines the connected net name).

  • Check the "Define as power symbol" box in Symbol Properties window. This makes the symbol appear in the "Add Power Port" dialog, makes the Value field read-only in the schematic, prevents the symbol from being assigned a footprint, and excludes the symbol from the board, BOM, and netlists.

  • Set the symbol reference and uncheck the "Show" box. The reference text is not important except for the first character, which should be #. For the power port shown above, the reference could be #GND. Symbols with references that begin with # are not added to the PCB, are not included in Bill of Materials exports or netlists, and they cannot be assigned a footprint in the footprint assignment tool. If a power port’s reference does not begin with #, the character will be inserted automatically when the annotation or footprint assignment tools are run.

An easier method to create a new power port symbol is to use another symbol as a starting point, as described earlier.

When modifying an existing power port symbol, make sure to rename the pin name so that the new symbol connects to the appropriate power net.

符号库浏览器

简介

The Symbol Library Browser allows you to quickly examine the content of symbol libraries. The Symbol Library Viewer can be accessed by clicking Library viewer icon icon on the main toolbar, ViewSymbol Library Browser…​, or clicking Select With Browser in the "Choose Symbol" window.

eeschema_viewlib_choose_png

视图-主屏幕

eeschema_viewlib_select_library_png

要检查库的内容,请从左侧窗格的列表中选择一个库。 所选库中的所有符号都将显示在第二个窗格中。 选择符号名称以查看符号。

eeschema_viewlib_select_component_png

符号库浏览器顶部工具栏

符号库浏览器中的顶部工具栏如下所示。

images/toolbar_viewlib.png

可用的命令是:

Symbol selection icon

Selection of the symbol which can be also selected in the displayed list.

Previous symbol icon

Display previous symbol.

Next symbol icon

Display next symbol.

refresh 24 zoom in 24 zoom out 24 zoom fit in page 24

Zoom tools.

morgan1 24 morgan2 24

Selection of the representation (normal or alternate) if an alternate representation exists.

images/toolbar_viewlib_part.png

Selection of the unit for symbols that contain multiple units.

icons/datasheet_png

If they exist, display the associated documents.

Add symbol to schematic icon

Close the browser and place the selected symbol in the schematic.

创建网络列表

概述

A netlist is a file which describes electrical connections between symbol pins. These connections are referred to as nets. Netlist files contain:

  • A list of symbols and their pins.

  • A list of connections (nets) between symbol pins.

Many different netlist formats exist. Sometimes the symbols list and the list of nets are two separate files. This netlist is fundamental in the use of schematic capture software, because the netlist is the link with other electronic CAD software, such as:

  • PCB 布局软件。

  • 原理图和电信号模拟器。

  • Programmable logic (FPGA, CPLD, etc.) compilers.

KiCad supports several netlist formats:

  • KiCad format, which can be imported by the KiCad PCB Editor. However, the "Update PCB from Schematic" tool should be used instead of importing a KiCad netlist into the PCB editor.

  • OrCAD PCB2 format, for designing PCBs with OrCAD.

  • CADSTAR format, for designing PCBs with CADSTAR.

  • Spice format, for use with various external circuit simulators.

In KiCad version 5.0 and later, it is not necessary to create a netlist for transfering a design from the schematic editor to the PCB editor. Instead, use the "Update PCB from Schematic" tool.

网表格式

Netlists are exported with the Export Netlist dialog (FileExportNetlist…​).

Several netlist formats are available, and are selectable with the tabs at the top of the window. Some netlist formats have options.

Clicking the Export Netlist button prompts for a netlist filename and saves the netlist.

Netlist generation can take up to several minutes for large schematics.

Custom generators can be added by clicking the Add Generator…​ button. Custom generators are external tools that are called by KiCad, for example Python scripts or XSLT stylesheets. For more information on custom netlist generators, see the section on adding custom netlist generators.

KiCad Netlist Format

KiCad netlist export

The KiCad netlist exporter does not have any options.

In KiCad version 5.0 and later, it is not necessary to create a netlist for transfering a design from the schematic editor to the PCB editor. Instead, use the "Update PCB from Schematic" tool.

OrCAD PCB2 Netlist Format

OrCAD netlist export

The OrCAD netlist exporter does not have any options.

CADSTAR Netlist Format

CADSTAR netlist export

The CADSTAR netlist exporter does not have any options.

Spice Netlist Format

Spice netlist export

The Spice netlist format offers several options.

When the Reformat passive symbol values box is checked, passive symbol values will be adjusted to be compatible with Spice. Specifically:

  • μ and M as unit prefixes are replaced with u and Meg, respectively

  • Units are removed (e.g. 4.7kΩ is changed to 4.7k)

  • Values in RKM format are rewritten to be Spice-compatible (e.g. 4u7 is changed to 4.7u)

The Spice netlist exporter also provides an easy way to simulate the generated netlist with an external simulator. This can be useful for running a simulation without using KiCad’s internal ngspice simulator, or for running an ngspice simulation with options that are not supported by KiCad’s simulator tool.

Enter the path to the external simulator in the text box, with %I representing the generated netlist. Click the Create Netlist and Run Simulator Command button to generate the netlist and automatically run the simulator.

The default simulator command (spice "%I") must be adjusted to point to a simulator installed on your system.

For more information on the contents of Spice netlists, see the Spice netlist section.

网表示例

Below is the schematic from the sallen_key project included in KiCad’s simulation demos.

sallen_key demo schematic

The KiCad format netlist for this schematic is as follows:

(export (version "E")
  (design
    (source "/usr/share/kicad/demos/simulation/sallen_key/sallen_key.kicad_sch")
    (date "Sun 01 May 2022 03:14:05 PM EDT")
    (tool "Eeschema (6.0.4)")
    (sheet (number "1") (name "/") (tstamps "/")
      (title_block
        (title)
        (company)
        (rev)
        (date)
        (source "sallen_key.kicad_sch")
        (comment (number "1") (value ""))
        (comment (number "2") (value ""))
        (comment (number "3") (value ""))
        (comment (number "4") (value ""))
        (comment (number "5") (value ""))
        (comment (number "6") (value ""))
        (comment (number "7") (value ""))
        (comment (number "8") (value ""))
        (comment (number "9") (value "")))))
  (components
    (comp (ref "C1")
      (value "100n")
      (libsource (lib "sallen_key_schlib") (part "C") (description ""))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-00005789077d"))
    (comp (ref "C2")
      (value "100n")
      (fields
        (field (name "Fieldname") "Value")
        (field (name "SpiceMapping") "1 2")
        (field (name "Spice_Primitive") "C"))
      (libsource (lib "sallen_key_schlib") (part "C") (description ""))
      (property (name "Fieldname") (value "Value"))
      (property (name "Spice_Primitive") (value "C"))
      (property (name "SpiceMapping") (value "1 2"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-00005789085b"))
    (comp (ref "R1")
      (value "1k")
      (fields
        (field (name "Fieldname") "Value")
        (field (name "SpiceMapping") "1 2")
        (field (name "Spice_Primitive") "R"))
      (libsource (lib "sallen_key_schlib") (part "R") (description ""))
      (property (name "Fieldname") (value "Value"))
      (property (name "SpiceMapping") (value "1 2"))
      (property (name "Spice_Primitive") (value "R"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-0000578906ff"))
    (comp (ref "R2")
      (value "1k")
      (fields
        (field (name "Fieldname") "Value")
        (field (name "SpiceMapping") "1 2")
        (field (name "Spice_Primitive") "R"))
      (libsource (lib "sallen_key_schlib") (part "R") (description ""))
      (property (name "Fieldname") (value "Value"))
      (property (name "SpiceMapping") (value "1 2"))
      (property (name "Spice_Primitive") (value "R"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-000057890691"))
    (comp (ref "U1")
      (value "AD8051")
      (fields
        (field (name "Spice_Lib_File") "ad8051.lib")
        (field (name "Spice_Model") "AD8051")
        (field (name "Spice_Netlist_Enabled") "Y")
        (field (name "Spice_Primitive") "X"))
      (libsource (lib "sallen_key_schlib") (part "Generic_Opamp") (description ""))
      (property (name "Spice_Primitive") (value "X"))
      (property (name "Spice_Model") (value "AD8051"))
      (property (name "Spice_Lib_File") (value "ad8051.lib"))
      (property (name "Spice_Netlist_Enabled") (value "Y"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-00005788ff9f"))
    (comp (ref "V1")
      (value "AC 1")
      (libsource (lib "sallen_key_schlib") (part "VSOURCE") (description ""))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-000057336052"))
    (comp (ref "V2")
      (value "DC 10")
      (fields
        (field (name "Fieldname") "Value")
        (field (name "Spice_Node_Sequence") "1 2")
        (field (name "Spice_Primitive") "V"))
      (libsource (lib "sallen_key_schlib") (part "VSOURCE") (description ""))
      (property (name "Fieldname") (value "Value"))
      (property (name "Spice_Primitive") (value "V"))
      (property (name "Spice_Node_Sequence") (value "1 2"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-0000578900ba"))
    (comp (ref "V3")
      (value "DC 10")
      (fields
        (field (name "Fieldname") "Value")
        (field (name "Spice_Node_Sequence") "1 2")
        (field (name "Spice_Primitive") "V"))
      (libsource (lib "sallen_key_schlib") (part "VSOURCE") (description ""))
      (property (name "Fieldname") (value "Value"))
      (property (name "Spice_Primitive") (value "V"))
      (property (name "Spice_Node_Sequence") (value "1 2"))
      (property (name "Sheetname") (value ""))
      (property (name "Sheetfile") (value "sallen_key.kicad_sch"))
      (sheetpath (names "/") (tstamps "/"))
      (tstamps "00000000-0000-0000-0000-000057890232")))
  (libparts
    (libpart (lib "sallen_key_schlib") (part "C")
      (footprints
        (fp "C?")
        (fp "C_????_*")
        (fp "C_????")
        (fp "SMD*_c")
        (fp "Capacitor*"))
      (fields
        (field (name "Reference") "C")
        (field (name "Value") "C"))
      (pins
        (pin (num "1") (name "") (type "passive"))
        (pin (num "2") (name "") (type "passive"))))
    (libpart (lib "sallen_key_schlib") (part "Generic_Opamp")
      (fields
        (field (name "Reference") "U")
        (field (name "Value") "Generic_Opamp"))
      (pins
        (pin (num "1") (name "+") (type "input"))
        (pin (num "2") (name "-") (type "input"))
        (pin (num "3") (name "V+") (type "power_in"))
        (pin (num "4") (name "V-") (type "power_in"))
        (pin (num "5") (name "") (type "output"))))
    (libpart (lib "sallen_key_schlib") (part "R")
      (footprints
        (fp "R_*")
        (fp "Resistor_*"))
      (fields
        (field (name "Reference") "R")
        (field (name "Value") "R"))
      (pins
        (pin (num "1") (name "") (type "passive"))
        (pin (num "2") (name "") (type "passive"))))
    (libpart (lib "sallen_key_schlib") (part "VSOURCE")
      (fields
        (field (name "Reference") "V")
        (field (name "Value") "VSOURCE")
        (field (name "Fieldname") "Value")
        (field (name "Spice_Primitive") "V")
        (field (name "Spice_Node_Sequence") "1 2"))
      (pins
        (pin (num "1") (name "") (type "input"))
        (pin (num "2") (name "") (type "input")))))
  (libraries
    (library (logical "sallen_key_schlib")
      (uri "/usr/share/kicad/demos/simulation/sallen_key/sallen_key_schlib.kicad_sym")))
  (nets
    (net (code "1") (name "/lowpass")
      (node (ref "C1") (pin "1") (pintype "passive"))
      (node (ref "U1") (pin "2") (pinfunction "-") (pintype "input"))
      (node (ref "U1") (pin "5") (pintype "output")))
    (net (code "2") (name "GND")
      (node (ref "C2") (pin "2") (pintype "passive"))
      (node (ref "V1") (pin "2") (pintype "input"))
      (node (ref "V2") (pin "2") (pintype "input"))
      (node (ref "V3") (pin "1") (pintype "input")))
    (net (code "3") (name "Net-(C1-Pad2)")
      (node (ref "C1") (pin "2") (pintype "passive"))
      (node (ref "R1") (pin "1") (pintype "passive"))
      (node (ref "R2") (pin "2") (pintype "passive")))
    (net (code "4") (name "Net-(C2-Pad1)")
      (node (ref "C2") (pin "1") (pintype "passive"))
      (node (ref "R2") (pin "1") (pintype "passive"))
      (node (ref "U1") (pin "1") (pinfunction "+") (pintype "input")))
    (net (code "5") (name "Net-(R1-Pad2)")
      (node (ref "R1") (pin "2") (pintype "passive"))
      (node (ref "V1") (pin "1") (pintype "input")))
    (net (code "6") (name "VDD")
      (node (ref "U1") (pin "3") (pinfunction "V+") (pintype "power_in"))
      (node (ref "V2") (pin "1") (pintype "input")))
    (net (code "7") (name "VSS")
      (node (ref "U1") (pin "4") (pinfunction "V-") (pintype "power_in"))
      (node (ref "V3") (pin "2") (pintype "input")))))

In Spice format, the netlist is as follows:

.title KiCad schematic
.include "ad8051.lib"
XU1 Net-_C2-Pad1_ /lowpass VDD VSS /lowpass AD8051
C2 Net-_C2-Pad1_ GND 100n
C1 /lowpass Net-_C1-Pad2_ 100n
R2 Net-_C2-Pad1_ Net-_C1-Pad2_ 1k
R1 Net-_C1-Pad2_ Net-_R1-Pad2_ 1k
V1 Net-_R1-Pad2_ GND AC 1
V2 VDD GND DC 10
V3 GND VSS DC 10
.ac dec 10 1 1Meg
.end

关于网表的说明

网表名称注意事项

Many software tools that use netlists do not accept spaces in component names, pins, nets, or other fields. Avoid using spaces in pins, labels, names, and value fields of components to ensure maximum compatibility.

In the same way, special characters other than letters and numbers can cause problems. Note that this limitation is not related to KiCad, but to the netlist formats that can then become untranslatable by other software that reads those netlist files.

Spice netlists

Spice simulators expect simulation commands (.PROBE, .AC, .TRAN, etc.) to be included in the netlist.

Any text line included in the schematic diagram starting with a period (.) will be included in the netlist. If a text object contains multiple lines, only the lines beginning with a period will be included.

.include directives for including model library files are automatically added to the netlist based on the Spice model settings for the symbols in the schematic.

其他格式

KiCad supports custom netlist generators for exporting netlists in other formats. Some examples of netlist generators are given in the custom netlist generators section.

A netlist generator is a script or program that converts the intermediate netlist file created by KiCad into the desired netlist format. The intermediate netlist file contains all of the netlist information required to create an arbitrary netlist for the schematic. Python and XSLT are commonly used tools to create custom netlist generators.

Adding new netlist generators

New netlist generators are added by clicking the Add Generator…​ button.

Custom Netlist Generator

New generators require a name and a command. The name is shown in the tab label, and the command is run whenever the Export Netlist button is clicked.

When the netlist is generated, KiCad creates an intermediate XML file which contains all of the netlist information from the schematic. The generator command is then run in order to transform the intermediate netlist into the desired netlist format.

The netlist command must be set up properly so that the netlist generator script takes the intermediate netlist file as input and outputs the desired netlist file. The %I argument represents the input intermediate netlist filename and the %O argument represents the output netlist filename. The exact netlist command will depend on the generator script used.

命令行格式

Consider the following example which uses xsltproc to generate a netlist in PADS ASC format. xsltproc converts the intermediate netlist using the netlist_form_pads-pcb.asc.xsl stylesheet to define the output format:

xsltproc -o %O.net /usr/share/kicad/plugins/netlist_form_pads-pcb.asc.xsl %I

The purpose of each part of the command is as follows:

xsltproc

A tool to convert an XML file (the intermediate netlist) according to an XSLT stylesheet.

-o %O.net

Output filename. %O is replaced with the name of the intermediate netlist file, which is <schematic name>.xml. Therefore in this example the complete output filename is <schematic name>.xml.net. An arbitrary output filename can be specified if desired with -o <filename>.

/usr/share/kicad/plugins/netlist_form_pads-pcb.asc.xsl

XSLT stylesheet which determines how the output is formatted. This particular stylesheet is included with KiCad, but custom stylesheets can also be created.

%I

Input (intermediate netlist) filename. %I is replaced with the name of the intermediate netlist file, which is <schematic name>.xml.

For netlist generators that do not use xsltproc, the generator command will differ.

中间网表文件格式

See the custom netlist generators section for more information about netlist generators, a description of the intermediate netlist format, and some examples of netlist generators.

创建自定义网表和 BOM 文件

中间网表文件格式

BOM files and netlist files can be converted from an Intermediate netlist file created by KiCad.

此文件使用 XML 语法,称为中间网表。中间网表包含有关您的电路板的大量数据,因此,它可以与后处理一起用于创建 BOM 或其他报告。

根据输出(BOM 或网表),将在后处理中使用完整的中间网表文件的不同子集。

原理图样本

原理图样本

中间网表文件示例

上述电路的相应中间网表 (使用 XML 语法) 如下所示。

<?xml version="1.0" encoding="utf-8"?>
<export version="D">
  <design>
    <source>F:\kicad_aux\netlist_test\netlist_test.sch</source>
    <date>29/08/2010 20:35:21</date>
    <tool>eeschema (2010-08-28 BZR 2458)-unstable</tool>
  </design>
  <components>
    <comp ref="P1">
      <value>CONN_4</value>
      <libsource lib="conn" part="CONN_4"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2141</tstamp>
    </comp>
    <comp ref="U2">
      <value>74LS74</value>
      <libsource lib="74xx" part="74LS74"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20BA</tstamp>
    </comp>
    <comp ref="U1">
      <value>74LS04</value>
      <libsource lib="74xx" part="74LS04"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20A6</tstamp>
    </comp>
    <comp ref="C1">
      <value>CP</value>
      <libsource lib="device" part="CP"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2094</tstamp>
    </comp>
    <comp ref="R1">
      <value>R</value>
      <libsource lib="device" part="R"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E208A</tstamp>
    </comp>
  </components>
  <libparts>
    <libpart lib="device" part="C">
      <description>Condensateur non polarise</description>
      <footprints>
        <fp>SM*</fp>
        <fp>C?</fp>
        <fp>C1-1</fp>
      </footprints>
      <fields>
        <field name="Reference">C</field>
        <field name="Value">C</field>
      </fields>
      <pins>
        <pin num="1" name="~" type="passive"/>
        <pin num="2" name="~" type="passive"/>
      </pins>
    </libpart>
    <libpart lib="device" part="R">
      <description>Resistance</description>
      <footprints>
        <fp>R?</fp>
        <fp>SM0603</fp>
        <fp>SM0805</fp>
        <fp>R?-*</fp>
        <fp>SM1206</fp>
      </footprints>
      <fields>
        <field name="Reference">R</field>
        <field name="Value">R</field>
      </fields>
      <pins>
        <pin num="1" name="~" type="passive"/>
        <pin num="2" name="~" type="passive"/>
      </pins>
    </libpart>
    <libpart lib="conn" part="CONN_4">
      <description>Symbole general de connecteur</description>
      <fields>
        <field name="Reference">P</field>
        <field name="Value">CONN_4</field>
      </fields>
      <pins>
        <pin num="1" name="P1" type="passive"/>
        <pin num="2" name="P2" type="passive"/>
        <pin num="3" name="P3" type="passive"/>
        <pin num="4" name="P4" type="passive"/>
      </pins>
    </libpart>
    <libpart lib="74xx" part="74LS04">
      <description>Hex Inverseur</description>
      <fields>
        <field name="Reference">U</field>
        <field name="Value">74LS04</field>
      </fields>
      <pins>
        <pin num="1" name="~" type="input"/>
        <pin num="2" name="~" type="output"/>
        <pin num="3" name="~" type="input"/>
        <pin num="4" name="~" type="output"/>
        <pin num="5" name="~" type="input"/>
        <pin num="6" name="~" type="output"/>
        <pin num="7" name="GND" type="power_in"/>
        <pin num="8" name="~" type="output"/>
        <pin num="9" name="~" type="input"/>
        <pin num="10" name="~" type="output"/>
        <pin num="11" name="~" type="input"/>
        <pin num="12" name="~" type="output"/>
        <pin num="13" name="~" type="input"/>
        <pin num="14" name="VCC" type="power_in"/>
      </pins>
    </libpart>
    <libpart lib="74xx" part="74LS74">
      <description>Dual D FlipFlop, Set &amp; Reset</description>
      <docs>74xx/74hc_hct74.pdf</docs>
      <fields>
        <field name="Reference">U</field>
        <field name="Value">74LS74</field>
      </fields>
      <pins>
        <pin num="1" name="Cd" type="input"/>
        <pin num="2" name="D" type="input"/>
        <pin num="3" name="Cp" type="input"/>
        <pin num="4" name="Sd" type="input"/>
        <pin num="5" name="Q" type="output"/>
        <pin num="6" name="~Q" type="output"/>
        <pin num="7" name="GND" type="power_in"/>
        <pin num="8" name="~Q" type="output"/>
        <pin num="9" name="Q" type="output"/>
        <pin num="10" name="Sd" type="input"/>
        <pin num="11" name="Cp" type="input"/>
        <pin num="12" name="D" type="input"/>
        <pin num="13" name="Cd" type="input"/>
        <pin num="14" name="VCC" type="power_in"/>
      </pins>
    </libpart>
  </libparts>
  <libraries>
    <library logical="device">
      <uri>F:\kicad\share\library\device.lib</uri>
    </library>
    <library logical="conn">
      <uri>F:\kicad\share\library\conn.lib</uri>
    </library>
    <library logical="74xx">
      <uri>F:\kicad\share\library\74xx.lib</uri>
    </library>
  </libraries>
  <nets>
    <net code="1" name="GND">
      <node ref="U1" pin="7"/>
      <node ref="C1" pin="2"/>
      <node ref="U2" pin="7"/>
      <node ref="P1" pin="4"/>
    </net>
    <net code="2" name="VCC">
      <node ref="R1" pin="1"/>
      <node ref="U1" pin="14"/>
      <node ref="U2" pin="4"/>
      <node ref="U2" pin="1"/>
      <node ref="U2" pin="14"/>
      <node ref="P1" pin="1"/>
    </net>
    <net code="3" name="">
      <node ref="U2" pin="6"/>
    </net>
    <net code="4" name="">
      <node ref="U1" pin="2"/>
      <node ref="U2" pin="3"/>
    </net>
    <net code="5" name="/SIG_OUT">
      <node ref="P1" pin="2"/>
      <node ref="U2" pin="5"/>
      <node ref="U2" pin="2"/>
    </net>
    <net code="6" name="/CLOCK_IN">
      <node ref="R1" pin="2"/>
      <node ref="C1" pin="1"/>
      <node ref="U1" pin="1"/>
      <node ref="P1" pin="3"/>
    </net>
  </nets>
</export>

转换为新的网表格式

通过将后处理过滤器应用于中间网表文件,您可以生成外部网表文件以及 BOM 文件。 由于此转换是文本到文本转换,因此可以使用 Python,XSLT 或任何其他能够将 XML 作为输入的工具来编写此后处理过滤器。

XSLT itself is an XML language very suitable for XML transformations. There is a free program called xsltproc that you can download and install. The xsltproc program can be used to read the Intermediate XML netlist input file, apply a style-sheet to transform the input, and save the results in an output file. Use of xsltproc requires a style-sheet file using XSLT conventions. The full conversion process is handled by KiCad, after it is configured once to run xsltproc in a specific way.

XSLT 方法

描述 XSL 转换(XSLT)的文档可在此处获得:

创建 Pads-Pcb 网表文件

“pads-pcb” 的格式由两部分组成。

  • 封装列表。

  • 网表: 按网络对焊盘引用进行分组。

紧接下面是样式表,它将中间网表文件转换为 pad-pcb 网表格式:

<?xml version="1.0" encoding="ISO-8859-1"?>
<!--XSL style sheet to Eeschema Generic Netlist Format to PADS netlist format
    Copyright (C) 2010, SoftPLC Corporation.
    GPL v2.

    如何使用:
        https://lists.launchpad.net/kicad-developers/msg05157.html
-->

<!DOCTYPE xsl:stylesheet [
  <!ENTITY nl  "&#xd;&#xa;"> <!--new line CR, LF -->
]>

<xsl:stylesheet version="1.0" xmlns:xsl="http://www.w3.org/1999/XSL/Transform">
<xsl:output method="text" omit-xml-declaration="yes" indent="no"/>

<xsl:template match="/export">
    <xsl:text>*PADS-PCB*&nl;*PART*&nl;</xsl:text>
    <xsl:apply-templates select="components/comp"/>
    <xsl:text>&nl;*NET*&nl;</xsl:text>
    <xsl:apply-templates select="nets/net"/>
    <xsl:text>*END*&nl;</xsl:text>
</xsl:template>

<!-- for each component -->
<xsl:template match="comp">
    <xsl:text> </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "footprint != '' ">
            <xsl:apply-templates select="footprint"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>unknown</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!-- for each net -->
<xsl:template match="net">
    <!-- nets are output only if there is more than one pin in net -->
    <xsl:if test="count(node)>1">
        <xsl:text>*SIGNAL* </xsl:text>
        <xsl:choose>
            <xsl:when test = "@name != '' ">
                <xsl:value-of select="@name"/>
            </xsl:when>
            <xsl:otherwise>
                <xsl:text>N-</xsl:text>
                <xsl:value-of select="@code"/>
            </xsl:otherwise>
        </xsl:choose>
        <xsl:text>&nl;</xsl:text>
        <xsl:apply-templates select="node"/>
    </xsl:if>
</xsl:template>

<!-- for each node -->
<xsl:template match="node">
    <xsl:text> </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text>.</xsl:text>
    <xsl:value-of select="@pin"/>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

</xsl:stylesheet>

这是运行 xsltproc 后的 pads-pcb 输出文件:

*PADS-PCB*
*PART*
P1 unknown
U2 unknown
U1 unknown
C1 unknown
R1 unknown
*NET*
*SIGNAL* GND
U1.7
C1.2
U2.7
P1.4
*SIGNAL* VCC
R1.1
U1.14
U2.4
U2.1
U2.14
P1.1
*SIGNAL* N-4
U1.2
U2.3
*SIGNAL* /SIG_OUT
P1.2
U2.5
U2.2
*SIGNAL* /CLOCK_IN
R1.2
C1.1
U1.1
P1.3

*END*

进行此转换的命令行是:

kicad\\bin\\xsltproc.exe -o test.net kicad\\bin\\plugins\\netlist_form_pads-pcb.xsl test.tmp

创建一个 Cadstar 网表文件

Cadstar 格式由两个部分组成。

  • 封装列表。

  • 网表: 按网络对焊盘引用进行分组。

以下是进行此特定转换的样式表文件:

<?xml version="1.0" encoding="ISO-8859-1"?>
<!--XSL style sheet to Eeschema Generic Netlist Format to CADSTAR netlist format
    Copyright (C) 2010, Jean-Pierre Charras.
    Copyright (C) 2010, SoftPLC Corporation.
    GPL v2.

<!DOCTYPE xsl:stylesheet [
  <!ENTITY nl  "&#xd;&#xa;"> <!--new line CR, LF -->
]>

<xsl:stylesheet version="1.0" xmlns:xsl="http://www.w3.org/1999/XSL/Transform">
<xsl:output method="text" omit-xml-declaration="yes" indent="no"/>

<!-- Netlist header -->
<xsl:template match="/export">
    <xsl:text>.HEA&nl;</xsl:text>
    <xsl:apply-templates select="design/date"/>  <!-- Generate line .TIM <time> -->
    <xsl:apply-templates select="design/tool"/>  <!-- Generate line .APP <eeschema version> -->
    <xsl:apply-templates select="components/comp"/>  <!-- Generate list of components -->
    <xsl:text>&nl;&nl;</xsl:text>
    <xsl:apply-templates select="nets/net"/>          <!-- Generate list of nets and connections -->
    <xsl:text>&nl;.END&nl;</xsl:text>
</xsl:template>

 <!-- Generate line .TIM 20/08/2010 10:45:33 -->
<xsl:template match="tool">
    <xsl:text>.APP "</xsl:text>
    <xsl:apply-templates/>
    <xsl:text>"&nl;</xsl:text>
</xsl:template>

 <!-- Generate line .APP "eeschema (2010-08-17 BZR 2450)-unstable" -->
<xsl:template match="date">
    <xsl:text>.TIM </xsl:text>
    <xsl:apply-templates/>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!-- for each component -->
<xsl:template match="comp">
    <xsl:text>.ADD_COM </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "value != '' ">
            <xsl:text>"</xsl:text> <xsl:apply-templates select="value"/> <xsl:text>"</xsl:text>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>""</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!-- for each net -->
<xsl:template match="net">
    <!-- nets are output only if there is more than one pin in net -->
    <xsl:if test="count(node)>1">
    <xsl:variable name="netname">
        <xsl:text>"</xsl:text>
        <xsl:choose>
            <xsl:when test = "@name != '' ">
                <xsl:value-of select="@name"/>
            </xsl:when>
            <xsl:otherwise>
                <xsl:text>N-</xsl:text>
                <xsl:value-of select="@code"/>
        </xsl:otherwise>
        </xsl:choose>
        <xsl:text>"&nl;</xsl:text>
        </xsl:variable>
        <xsl:apply-templates select="node" mode="first"/>
        <xsl:value-of select="$netname"/>
        <xsl:apply-templates select="node" mode="others"/>
    </xsl:if>
</xsl:template>

<!-- for each node -->
<xsl:template match="node" mode="first">
    <xsl:if test="position()=1">
       <xsl:text>.ADD_TER </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text>.</xsl:text>
    <xsl:value-of select="@pin"/>
    <xsl:text> </xsl:text>
    </xsl:if>
</xsl:template>

<xsl:template match="node" mode="others">
    <xsl:choose>
        <xsl:when test='position()=1'>
        </xsl:when>
        <xsl:when test='position()=2'>
           <xsl:text>.TER     </xsl:text>
        </xsl:when>
        <xsl:otherwise>
           <xsl:text>         </xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:if test="position()>1">
        <xsl:value-of select="@ref"/>
        <xsl:text>.</xsl:text>
        <xsl:value-of select="@pin"/>
        <xsl:text>&nl;</xsl:text>
    </xsl:if>
</xsl:template>

</xsl:stylesheet>

这是 Cadstar 输出文件。

.HEA
.TIM 21/08/2010 08:12:08
.APP "eeschema (2010-08-09 BZR 2439)-unstable"
.ADD_COM P1 "CONN_4"
.ADD_COM U2 "74LS74"
.ADD_COM U1 "74LS04"
.ADD_COM C1 "CP"
.ADD_COM R1 "R"


.ADD_TER U1.7 "GND"
.TER     C1.2
         U2.7
         P1.4
.ADD_TER R1.1 "VCC"
.TER     U1.14
         U2.4
         U2.1
         U2.14
         P1.1
.ADD_TER U1.2 "N-4"
.TER     U2.3
.ADD_TER P1.2 "/SIG_OUT"
.TER     U2.5
         U2.2
.ADD_TER R1.2 "/CLOCK_IN"
.TER     C1.1
         U1.1
         P1.3

.END

创建 OrcadPCB2 网表文件

此格式只有一个部分是封装列表。 每个封装包括其参考网络的焊盘列表。

以下是此特定转换的样式表:

<?xml version="1.0" encoding="ISO-8859-1"?>
<!--XSL style sheet to Eeschema Generic Netlist Format to CADSTAR netlist format
    Copyright (C) 2010, SoftPLC Corporation.
    GPL v2.

    如何使用:
        https://lists.launchpad.net/kicad-developers/msg05157.html
-->

<!DOCTYPE xsl:stylesheet [
  <!ENTITY nl  "&#xd;&#xa;"> <!--new line CR, LF -->
]>

<xsl:stylesheet version="1.0" xmlns:xsl="http://www.w3.org/1999/XSL/Transform">
<xsl:output method="text" omit-xml-declaration="yes" indent="no"/>

<!--
    Netlist header
    Creates the entire netlist
    (can be seen as equivalent to main function in C
-->
<xsl:template match="/export">
    <xsl:text>( { Eeschema Netlist Version 1.1  </xsl:text>
    <!-- Generate line .TIM <time> -->
<xsl:apply-templates select="design/date"/>
<!-- Generate line eeschema version ... -->
<xsl:apply-templates select="design/tool"/>
<xsl:text>}&nl;</xsl:text>

<!-- Generate the list of components -->
<xsl:apply-templates select="components/comp"/>  <!-- Generate list of components -->

<!-- end of file -->
<xsl:text>)&nl;*&nl;</xsl:text>
</xsl:template>

<!--
    Generate id in header like "eeschema (2010-08-17 BZR 2450)-unstable"
-->
<xsl:template match="tool">
    <xsl:apply-templates/>
</xsl:template>

<!--
    Generate date in header like "20/08/2010 10:45:33"
-->
<xsl:template match="date">
    <xsl:apply-templates/>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!--
    This template read each component
    (path = /export/components/comp)
    creates lines:
     ( 3EBF7DBD $noname U1 74LS125
      ... pin list ...
      )
    and calls "create_pin_list" template to build the pin list
-->
<xsl:template match="comp">
    <xsl:text> ( </xsl:text>
    <xsl:choose>
        <xsl:when test = "tstamp != '' ">
            <xsl:apply-templates select="tstamp"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>00000000</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "footprint != '' ">
            <xsl:apply-templates select="footprint"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>$noname</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text> </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "value != '' ">
            <xsl:apply-templates select="value"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>"~"</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text>&nl;</xsl:text>
    <xsl:call-template name="Search_pin_list" >
        <xsl:with-param name="cmplib_id" select="libsource/@part"/>
        <xsl:with-param name="cmp_ref" select="@ref"/>
    </xsl:call-template>
    <xsl:text> )&nl;</xsl:text>
</xsl:template>

<!--
    This template search for a given lib component description in list
    lib component descriptions are in /export/libparts,
    and each description start at ./libpart
    We search here for the list of pins of the given component
    This template has 2 parameters:
        "cmplib_id" (reference in libparts)
        "cmp_ref"   (schematic reference of the given component)
-->
<xsl:template name="Search_pin_list" >
    <xsl:param name="cmplib_id" select="0" />
    <xsl:param name="cmp_ref" select="0" />
        <xsl:for-each select="/export/libparts/libpart">
            <xsl:if test = "@part = $cmplib_id ">
                <xsl:apply-templates name="build_pin_list" select="pins/pin">
                    <xsl:with-param name="cmp_ref" select="$cmp_ref"/>
                </xsl:apply-templates>
            </xsl:if>
        </xsl:for-each>
</xsl:template>


<!--
    This template writes the pin list of a component
    from the pin list of the library description
    The pin list from library description is something like
          <pins>
            <pin num="1" type="passive"/>
            <pin num="2" type="passive"/>
          </pins>
    Output pin list is ( <pin num> <net name> )
    something like
            ( 1 VCC )
            ( 2 GND )
-->
<xsl:template name="build_pin_list" match="pin">
    <xsl:param name="cmp_ref" select="0" />

    <!-- write pin numner and separator -->
    <xsl:text>  ( </xsl:text>
    <xsl:value-of select="@num"/>
    <xsl:text> </xsl:text>

    <!-- search net name in nets section and write it: -->
    <xsl:variable name="pinNum" select="@num" />
    <xsl:for-each select="/export/nets/net">
        <!-- net name is output only if there is more than one pin in net
             else use "?" as net name, so count items in this net
        -->
        <xsl:variable name="pinCnt" select="count(node)" />
        <xsl:apply-templates name="Search_pin_netname" select="node">
            <xsl:with-param name="cmp_ref" select="$cmp_ref"/>
            <xsl:with-param name="pin_cnt_in_net" select="$pinCnt"/>
            <xsl:with-param name="pin_num"> <xsl:value-of select="$pinNum"/>
            </xsl:with-param>
        </xsl:apply-templates>
    </xsl:for-each>

    <!-- close line -->
    <xsl:text> )&nl;</xsl:text>
</xsl:template>

<!--
    This template writes the pin netname of a given pin of a given component
    from the nets list
    The nets list description is something like
      <nets>
        <net code="1" name="GND">
          <node ref="J1" pin="20"/>
              <node ref="C2" pin="2"/>
        </net>
        <net code="2" name="">
          <node ref="U2" pin="11"/>
        </net>
    </nets>
    This template has 2 parameters:
        "cmp_ref"   (schematic reference of the given component)
        "pin_num"   (pin number)
-->

<xsl:template name="Search_pin_netname" match="node">
    <xsl:param name="cmp_ref" select="0" />
    <xsl:param name="pin_num" select="0" />
    <xsl:param name="pin_cnt_in_net" select="0" />

    <xsl:if test = "@ref = $cmp_ref ">
        <xsl:if test = "@pin = $pin_num">
        <!-- net name is output only if there is more than one pin in net
             else use "?" as net name
        -->
            <xsl:if test = "$pin_cnt_in_net>1">
                <xsl:choose>
                    <!-- if a net has a name, use it,
                        else build a name from its net code
                    -->
                    <xsl:when test = "../@name != '' ">
                        <xsl:value-of select="../@name"/>
                    </xsl:when>
                    <xsl:otherwise>
                        <xsl:text>$N-0</xsl:text><xsl:value-of select="../@code"/>
                    </xsl:otherwise>
                </xsl:choose>
            </xsl:if>
            <xsl:if test = "$pin_cnt_in_net &lt;2">
                <xsl:text>?</xsl:text>
            </xsl:if>
        </xsl:if>
    </xsl:if>

</xsl:template>

</xsl:stylesheet>

这是 OrcadPCB2 输出文件。

( { Eeschema Netlist Version 1.1  29/08/2010 21:07:51
eeschema (2010-08-28 BZR 2458)-unstable}
 ( 4C6E2141 $noname P1 CONN_4
  (  1 VCC )
  (  2 /SIG_OUT )
  (  3 /CLOCK_IN )
  (  4 GND )
 )
 ( 4C6E20BA $noname U2 74LS74
  (  1 VCC )
  (  2 /SIG_OUT )
  (  3 N-04 )
  (  4 VCC )
  (  5 /SIG_OUT )
  (  6 ? )
  (  7 GND )
  (  14 VCC )
 )
 ( 4C6E20A6 $noname U1 74LS04
  (  1 /CLOCK_IN )
  (  2 N-04 )
  (  7 GND )
  (  14 VCC )
 )
 ( 4C6E2094 $noname C1 CP
  (  1 /CLOCK_IN )
  (  2 GND )
 )
 ( 4C6E208A $noname R1 R
  (  1 VCC )
  (  2 /CLOCK_IN )
 )
)
*

Netlist plugins interface

Intermediate Netlist converters can be automatically launched within the Schematic Editor.

初始化对话窗口

可以通过单击 添加插件 按钮添加新的网表插件用户界面选项卡。

eeschema_plugin_add_plugin_png

以下是 PadsPcb 选项卡的配置数据:

eeschema_plugin_padspcb_png
插件配置参数

The netlist plug-in configuration dialog requires the following information:

  • 标题:例如,网表格式的名称。

  • 用于启动转换器的命令行。

单击网表按钮后,将发生以下情况:

  1. KiCad creates an intermediate netlist file *.xml, for instance test.xml.

  2. KiCad runs the plug-in by reading test.xml and creates test.net.

使用命令行生成网络列表文件

假设我们使用程序 xsltproc.exe 将工作表样式应用于中间文件,则使用以下命令执行 xsltproc.exe

xsltproc.exe -o <output filename> < style-sheet filename> <input XML file to convert>

在 Windows 下的 KiCad 中,命令行如下:

f:/kicad/bin/xsltproc.exe -o "%O" f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"

在 Linux 下,命令变为如下:

xsltproc -o "%O" /usr/local/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"

Where netlist_form_pads-pcb.xsl is the style-sheet that you are applying. Do not forget the double quotes around the file names, this allows them to have spaces after the substitution by KiCad.

命令行格式接受文件名的参数:

支持的格式设置参数是。

  • %B ⇒ 基本文件名和所选输出文件的路径,减去路径和扩展名。

  • %I ⇒ 完整的文件名和临时输入文件的路径(中间网络文件)。

  • %O ⇒ 完整的文件名和用户选择的输出文件的路径。

%I 将被实际的中间文件名替换

%O 将替换为实际输出文件名。

命令行格式:xsltproc 的示例

xsltproc 的命令行格式如下:

<path of xsltproc> xsltproc <xsltproc parameters>

在 Windows 下:

f:/kicad/bin/xsltproc.exe -o "%O" f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"

在 Linux 下:

xsltproc -o "%O" /usr/local/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"

上面的示例假设 xsltproc 安装在 Windows 下的 PC 上,所有文件都位于 kicad/bin 中。

物料清单(BOM)生成

由于中间网表文件包含有关已使用元件的所有信息,因此可以从中提取 BOM。 以下是用于创建自定义物料清单(BOM)文件的插件设置窗口(在 Linux 上):

bom-netlist-tab_png

样式表 bom2csv.xsl 的路径取决于系统。 目前用于 BOM 生成的最佳 XSLT 样式表称为 bom2csv.xsl。 您可以根据自己的需要自由修改它,如果您开发了一些非常有用的东西,请让它成为 KiCad 项目的一部分。

命令行格式:python 脚本的示例

python 的命令行格式如下:

python <脚本文件名> <输入文件名> <输出文件名>

在 Windows 下:

python *.exe f:/kicad/python/my_python_script.py "%I" "%O"

在 Linux 下:

python /usr/local/kicad/python/my_python_script.py "%I" "%O"

假设你的 PC 上安装了 python。

中间网表结构

此示例提供了网表文件格式的概念。

<?xml version="1.0" encoding="utf-8"?>
<export version="D">
  <design>
    <source>F:\kicad_aux\netlist_test\netlist_test.sch</source>
    <date>29/08/2010 21:07:51</date>
    <tool>eeschema (2010-08-28 BZR 2458)-unstable</tool>
  </design>
  <components>
    <comp ref="P1">
      <value>CONN_4</value>
      <libsource lib="conn" part="CONN_4"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2141</tstamp>
    </comp>
    <comp ref="U2">
      <value>74LS74</value>
      <libsource lib="74xx" part="74LS74"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20BA</tstamp>
    </comp>
    <comp ref="U1">
      <value>74LS04</value>
      <libsource lib="74xx" part="74LS04"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20A6</tstamp>
    </comp>
    <comp ref="C1">
      <value>CP</value>
      <libsource lib="device" part="CP"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2094</tstamp>
    <comp ref="R1">
      <value>R</value>
      <libsource lib="device" part="R"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E208A</tstamp>
    </comp>
  </components>
  <libparts/>
  <libraries/>
  <nets>
    <net code="1" name="GND">
      <node ref="U1" pin="7"/>
      <node ref="C1" pin="2"/>
      <node ref="U2" pin="7"/>
      <node ref="P1" pin="4"/>
    </net>
    <net code="2" name="VCC">
      <node ref="R1" pin="1"/>
      <node ref="U1" pin="14"/>
      <node ref="U2" pin="4"/>
      <node ref="U2" pin="1"/>
      <node ref="U2" pin="14"/>
      <node ref="P1" pin="1"/>
    </net>
    <net code="3" name="">
      <node ref="U2" pin="6"/>
    </net>
    <net code="4" name="">
      <node ref="U1" pin="2"/>
      <node ref="U2" pin="3"/>
    </net>
    <net code="5" name="/SIG_OUT">
      <node ref="P1" pin="2"/>
      <node ref="U2" pin="5"/>
      <node ref="U2" pin="2"/>
    </net>
    <net code="6" name="/CLOCK_IN">
      <node ref="R1" pin="2"/>
      <node ref="C1" pin="1"/>
      <node ref="U1" pin="1"/>
      <node ref="P1" pin="3"/>
    </net>
  </nets>
</export>

一般网表文件结构

中间网表占五个部分。

  • “标题” 部分。

  • “元件” 部分。

  • “库元件” 部分。

  • “库” 部分。

  • “网” 部分。

文件内容具有分隔符 <export>

<export version="D">
...
</export>

“标题” 部分

标题具有分隔符 <design>

<design>
<source>F:\kicad_aux\netlist_test\netlist_test.sch</source>
<date>21/08/2010 08:12:08</date>
<tool>eeschema (2010-08-09 BZR 2439)-unstable</tool>
</design>

此部分可被视为批注部分。

“元件” 部分

元件部分具有分隔符 <components>

<components>
<comp ref="P1">
<value>CONN_4</value>
<libsource lib="conn" part="CONN_4"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>4C6E2141</tstamp>
</comp>
</components>

本节包含原理图中的元件列表。 每个元件都是这样描述的:

<comp ref="P1">
<value>CONN_4</value>
<libsource lib="conn" part="CONN_4"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>4C6E2141</tstamp>
</comp>
libsource 找到此元件的库的名称。

part

此库中的组件名称。

sheetpath

层次结构中工作表的路径:标识工作表 在完整的原理图层次结构中。

tstamps (time stamps)

原理图文件的时间戳。

tstamp (time stamp)

元件的时间戳。

关于元件的时间戳的注意事项

要识别网表中的元件,从而识别板上,时间戳参考对每个元件都是唯一的。 然而,KiCad 提供了一种辅助方法来识别元件,该元件是电路板上相应的占位面积。 这允许重新批注原理图项目中的元件,并且不会丢失元件与其占用空间之间的链接。

时间戳是原理图项目中每个元件或工作表的唯一标识符。但是, 在复杂的层次结构中, 同一工作表多次使用, 因此此工作表包含具有相同时间戳的元件。

复杂层次结构中的给定工作表具有唯一标识符:其 sheetpath。 给定元件(在复杂层次结构内)具有唯一标识符:sheetpath + 其 tstamp

“库部件” 部分

库部件部分具有分隔符 <libparts>,并且此部分的内容在原理图库中定义。 库部件部分包含

  • 允许的封装名称(名称使用通配符)以 <fp> 为分隔符。

  • 库分隔符中定义的字段 <fields>。

  • 引脚列表分隔 <pins>。

<libparts>
<libpart lib="device" part="CP">
  <description>Condensateur polarise</description>
  <footprints>
    <fp>CP*</fp>
    <fp>SM*</fp>
  </footprints>
  <fields>
    <field name="Reference">C</field>
    <field name="Valeur">CP</field>
  </fields>
  <pins>
    <pin num="1" name="1" type="passive"/>
    <pin num="2" name="2" type="passive"/>
  </pins>
</libpart>
</libparts>

类似 <pin num="1" type="passive"/> 的线路也给出了电气引脚类型。可能的电气引脚类型有

Input

输入引脚

Output

输出引脚

Bidirectional

输入或输出

Tri-state

总线输入/输出

Passive

无源元件的结束

Unspecified

未知电气类型

Power input

单元件电源输入引脚

Power output

电源输出引脚作为稳压器输出

Open collector

模拟比较器中常见的开路集电极输出

Open emitter

有时在逻辑中找到开放发射器输出。

Not connected

必须在原理图中保持未连接状态

“库” 部分

库部分具有分隔符<libraries>。 本节包含项目中使用的原理图库列表。

<libraries>
  <library logical="device">
    <uri>F:\kicad\share\library\device.lib</uri>
  </library>
  <library logical="conn">
    <uri>F:\kicad\share\library\conn.lib</uri>
  </library>
</libraries>

“网” 部分

“网” 部分具有分隔符 <nets>。本节包含原理图的 “连接”。

<nets>
  <net code="1" name="GND">
    <node ref="U1" pin="7"/>
    <node ref="C1" pin="2"/>
    <node ref="U2" pin="7"/>
    <node ref="P1" pin="4"/>
  </net>
  <net code="2" name="VCC">
    <node ref="R1" pin="1"/>
    <node ref="U1" pin="14"/>
    <node ref="U2" pin="4"/>
    <node ref="U2" pin="1"/>
    <node ref="U2" pin="14"/>
    <node ref="P1" pin="1"/>
  </net>
</nets>

本节列出了原理图中的所有网络。

可能的网络包含以下内容。

<net code="1" name="GND">
  <node ref="U1" pin="7"/>
  <node ref="C1" pin="2"/>
  <node ref="U2" pin="7"/>
  <node ref="P1" pin="4"/>
</net>

net code

是此网络的内部标识符

name

是此网络的名称

node

给出一个连接到该网络的引脚引用

有关 xsltproc 的更多信息

简介

xsltproc 是一个命令行工具,用于将 XSLT 样式表应用于 XML 文档。 虽然它是作为 GNOME 项目的一部分开发的,但它可以独立于 GNOME 桌面运行。

从命令行调用 xsltproc,其中包含要使用的样式表的名称,后跟要应用样式表的文件的名称。 如果提供的文件名是 - ,它将使用标准输入。

如果样式表包含在带有样式表处理指令的 XML 文档中,则不需要在命令行中命名样式表。xsltproc 将自动检测包含的样式表并使用它。 默认情况下,输出为 stdout。 您可以使用 -o 选项指定要输出的文件。

简介

xsltproc [[-V] | [-v] | [-o *file* ] | [--timing] | [--repeat] |
[--debug] | [--novalid] | [--noout] | [--maxdepth *val* ] | [--html] |
[--param *name* *value* ] | [--stringparam *name* *value* ] | [--nonet] |
[--path *paths* ] | [--load-trace] | [--catalogs] | [--xinclude] |
[--profile] | [--dumpextensions] | [--nowrite] | [--nomkdir] |
[--writesubtree] | [--nodtdattr]] [ *stylesheet* ] [ *file1* ] [ *file2* ]
[ *....* ]

命令行选项

-V o --version

显示使用的 libxml 和 libxslt 的版本。

-v o --verbose

输出 xsltproc 在处理样式表和文档时采取的每个步骤。

-o o --output file

直接输出到名为 file 的文件。对于多个输出,也称为 chunking,-o directory/ 将输出文件定向到指定的目录。该目录必须已存在。

--timing

显示用于解析样式表,解析文档和应用样式表并保存结果的时间。以毫秒显示。

--repeat

运行转换20次。用于定时测试。

--debug

输出转换后文档的 XML 树,以进行调试。

--novalid

跳过加载文档的 DTD。

--noout

不输出结果。

--maxdepth value

在 libxslt 断定它处于无限循环之前调整模板堆栈的最大深度。 默认值为500。

--html

输入文档是 HTML 文件。

--param name value

将名称 name 和值 value 的参数传递给样式表。 您可以传递多个名称/值对,最多为32.如果传递的值是字符串而不是节点标识符,请改用 --stringparam。

--stringparam name value

传递名称 name 和值 value 的参数,其中 value 是字符串而不是节点标识符。(注意:字符串必须是utf-8。)

--nonet

不要使用互联网来获取 DTD,实体或文档。

--path paths

使用 paths 指定的文件系统路径的列表(由空格或列分隔)来加载 DTD,实体或文档。

--load-trace

向 stderr 显示处理期间加载的所有文档。

--catalogs

使用 SGML_CATALOG_FILES 中指定的 SGML 目录来解析外部实体的位置。默认情况下,xsltproc 查找 XML_CATALOG_FILES 中指定的目录。如果未指定,则使用 /etc/xml/catalog。

--xinclude

使用 Xinclude 规范处理输入文档。有关这方面的更多详细信息,请参阅 Xinclude 规范:http://www.w3.org/TR/xinclude/[http://www.w3.org/TR/xinclude/]

--profile --norman

输出分析信息,详细说明样式表的每个部分所花费的时间。这在优化样式表性能时很有用。

--dumpextensions

将所有已注册扩展名的列表转储到 stdout。

--nowrite

拒绝写入任何文件或资源。

--nomkdir

拒绝创建目录。

--writesubtree path

仅允许在 path 子树内写入文件。

--nodtdattr

不要从文档的 DTD 应用默认属性。

Xsltproc 返回值

xsltproc 返回一个状态编号,在脚本中调用它时非常有用。

0: 正常

1: 无参数

2: 参数太多

3: 未知选项

4:无法解析样式表

5: 样式表中的错误

6:其中一个文件出错

7: 不支持的 xsl: 输出方法

8:字符串参数包含引号和双引号

9: 内部处理错误

10:通过终止消息停止处理

11:无法将结果写入输出文件

有关 xsltproc 的更多信息

libxml 网页:http://www.xmlsoft.org/[http://www.xmlsoft.org/]

W3C XSLT 页面:http://www.w3.org/TR/xslt[http://www.w3.org/TR/xslt]

仿真器

KiCad provides an embedded electrical circuit simulator using ngspice as the simulation engine.

使用模拟器时,您可能会发现官方的 pspice 库很有用。 它包含用于模拟的公共符号,如电压/电流源或晶体管,其引脚编号与 ngspice 节点顺序规范相匹配。

还有一些演示项目来说明模拟器的功能。 您将在 demos/simulation 目录中找到它们。

分配模型

在启动模拟之前,元件需要分配 Spice 模型。

即使元件由多个单元组成,每个元件也只能分配一个模型。 在这种情况下,第一个单元应该具有指定的模型。

”无源模型” 参考匹配 Spice 表示法中的器件类型的无源元件(R* 表示电阻器,C* 表示电容器,L* 表示电感器)将隐式分配模型并使用值字段 确定他们的属性。

请记住,在 Spice 表示法中,“M” 代表 milli,“Meg” 代表 mega。 如果您更喜欢使用 “M” 来表示超级前缀,您可以在(模拟设置,模拟设置对话框)中请求这样做。

Spice 模型信息作为文本存储在符号字段中,因此您可以在符号编辑器或原理图编辑器中定义它。 打开符号属性对话框,然后单击 编辑 Spice 模型 按钮以打开 Spice 模型编辑器 对话框。

Spice 模型编辑器 对话框有三个对应于不同模型类型的选项卡。 所有模型类型共有两个选项:

禁用模拟的符号

选中时,元件将从模拟中排除。

备用节点序列

允许用户将符号引脚覆盖为模型节点映射。 要定义不同的映射,请按模型预期的顺序指定引脚编号。

'例子:'+

“* 连接:”+ “* 1: 非反相输入”
“* 2: 反相输入”
“* 3: 正电源”
“* 4: 负电源”
“* 5: 输出”
“.子电路 tl071 1 2 3 4 5”

通用运算放大器符号

要将符号引脚与上面显示的 Spice 模型节点相匹配,需要使用具有值的备用节点序列选项:"1 3 5 2  4"。 它是与 Spice 模型节点顺序对应的引脚编号列表。

无源

无源 选项卡允许用户将无源器件模型(电阻,电容或电感)分配给元件。 这是一个很少使用的选项,因为通常被动元件的模型分配了 模拟无源模型,隐形 ,除非元件引用与实际设备类型不匹配。

明确定义的被动设备模型优先于隐式分配的模型。 这意味着一旦分配了被动设备模型,在模拟期间不会考虑参考和值字段。 当指定的模型值与原理图纸上显示的模型值不匹配时,可能会导致混乱的情况。
无源设备模型编辑器选项卡

类型

选择器件类型(电阻,电容或电感)。

定义器件属性(电阻,电容或电感)。 值 可以使用常见的 Spice 单元前缀(如文本输入字段下方列出的)和 应该使用点作为小数点分隔符。 请注意,Spice 不正确 解释在值中交织的前缀(例如 1k5)。

模型

Model 选项卡用于分配外部库文件中定义的半导体或复杂模型。 Spice 模型库通常由设备制造商提供。

主文本小部件显示所选的库文件内容。 将模型描述放在库文件中是常见的做法,包括节点顺序。

半导体器件型号编辑器选项卡

文件

Spice 库文件的路径。 该文件将由模拟器使用, 因为它是使用 .include 指令添加的。

型号

所选设备型号。 选择文件后,列表将填充可用 模型可供选择。

类型

选择型号类型(子电路,BJT,MOSFET 或二极管)。 通常是设定的 选择模型时自动选择。

Source 选项卡用于分配电源或信号源模型。 有两个部分:“DC/AC 分析” 和“转换分析”。 每个都定义了相应模拟类型的源参数。

Source type 选项适用于所有模拟类型。

源模型编辑器选项卡

有关源的更多详细信息,请参阅 ngspice文档 ,第4章(电压和电流源)。

Spice 指令

可以通过将 Spice 指令放在原理图工作表的文本字段中来添加它们。 此方法便于定义默认模拟类型。 此功能仅限于以点开头的 Spice 指令(例如 “.tran 10n 1m” ),无法使用文本字段放置其他元件。

仿真

要启动模拟,请在原理图编辑器窗口中选择菜单 工具→仿真 打开 Spice仿真 对话框。

主仿真对话框

该对话框分为几个部分:

  • 《模拟-工具栏,工具栏》

  • 《模拟面板, 绘图面板》

  • 《模拟输出控制台, 输出控制台》

  • 《模拟信号列表,信号列表》

  • 《模拟游标列表,游标列表》

  • 《模拟面板, 绘图面板》

菜单

文件

新绘制

在绘图面板中创建一个新选项卡。

打开工作簿

打开绘制信号列表。

保存工作簿

保存绘制信号列表。

另存为图像

将活动图导出为 .png 文件。

另存为 .csv 文件

将活动绘图原始数据点导出到 .csv 文件。

退出模拟

关闭对话框。

仿真

运行模拟

使用当前设置执行模拟。

添加信号…​…​

打开一个对话框以选择要绘制的信号。

原理图探测

启动原理图 “模拟探针工具,探针” 工具。

调整元件值

启动 “模拟调谐工具,调谐” 工具。

显示 SPICE 网表…​

打开一个对话框,显示生成的网表 模拟电路。

设置…​

打开 “模拟设置,模拟设置对话框”。

视图

缩小

缩小活动图。

适合屏幕

调整缩放设置以显示所有绘图。

显示网格

切换网格可见性。

显示长度

切换图表图例可见性。

工具栏

模拟对话框顶部工具栏

顶部工具栏提供对最常执行的操作的访问。

运行/停止模拟

启动或停止模拟。

添加信号

打开一个对话框以选择要绘制的信号。

探针

启动原理图 “模拟探针工具,探针” 工具。

调谐

启动 ”模拟调谐工具,调谐“ 工具。

设置

打开 “模拟设置,模拟设置对话框”。

绘图面板

将模拟结果可视化为图。 可以在单独的选项卡中打开多个图,但只有在执行模拟时才会更新活动图。 这样就可以比较不同运行的模拟结果。

可以使用 “模拟菜单视图,视图” 菜单切换网格和图例可见性来自定义绘图。 当图例可见时,可以拖动它来改变其位置。

绘图面板交互:

  • 滚动鼠标滚轮放大/缩小

  • 右键单击打开上下文菜单以调整视图

  • 绘制选择矩形以放大所选区域

  • 拖动光标以更改其坐标

输出控制台

输出控制台显示来自模拟器的消息。 建议检查控制台输出以确认没有错误或警告。

信号列表

显示活动图中显示的信号列表。

信号列表交互:

  • 右键单击打开上下文菜单以隐藏信号或切换光标

  • 双击以隐藏信号

游标列表

显示游标列表及其坐标。 每个信号可以显示一个光标。 使用 “模拟信号列表,信号” 列表设置游标可见性。

调谐面板

显示使用 “模拟调谐工具,调谐“ 工具选取的元件。 调谐面板允许用户快速修改元件值并观察它们对模拟结果的影响 - 每次更改元件值时,都会重新运行模拟并更新图形。

对于每个元件,有一些控件关联:

  • 顶部文本字段设置最大元件值。

  • 中间文本字段设置实际的元件值。

  • 底部文本字段设置最小元件值。

  • 滑块允许用户以平滑的方式修改元件值。

  • Save 按钮将原理图上的元件值修改为使用滑块选择的元件值。

  • X 按钮从调谐面板中删除元件并恢复其原始值。

三个文本字段识别 Spice 单元前缀。

调谐工具

调谐器工具允许用户选择要调整的元件。

要选择要调整的元件,请在工具处于活动状态时单击原理图编辑器中的一个元件。 所选元件将出现在 “模拟调谐工具,调谐” 面板中。 只能调整被动元件。

探针工具

探针工具提供了一种用户友好的方式来选择用于绘图的信号。

要向绘图添加信号,请在工具处于活动状态时单击原理图编辑器中的相应导线。

仿真设置

模拟设置对话框

模拟设置对话框允许用户设置模拟类型和参数。有四个选项卡:

  • 交流

  • 直流转换

  • 短暂的

  • 自定义

前三个选项卡提供可以指定模拟参数的表单。 最后一个选项卡允许用户键入自定义 Spice 指令以设置模拟。 有关仿真类型和参数的更多信息,请参见 ngspice文档 ,第1.2章。

配置模拟的另一种方法是在原理图上的文本字段中键入 “模拟指令,Spice 指令”。 与模拟类型相关的任何文本字段指令都会被对话框中选择的设置覆盖。 这意味着一旦开始使用模拟对话框,该对话框将覆盖原理图指令,直到重新打开模拟器。

所有模拟类型共有两个选项:

调整被动符号值

替换被动符号值以转换常见 元件值符号表示 Spice 表示法。

为 .include 库指令添加完整路径

Prepend Spice 模型库 文件名为完整路径。 通常,ngspice 需要完整路径才能访问 库文件。

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