KiCad PCB EDA Suite
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test_drc_chain_length_trunk.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <https://www.gnu.org/licenses/>.
18 */
19
20#include <boost/test/unit_test.hpp>
21
22#include <filesystem>
23#include <fstream>
24
25#include <board.h>
28#include <drc/drc_engine.h>
29#include <drc/drc_item.h>
30#include <footprint.h>
31#include <netinfo.h>
32#include <pad.h>
33#include <pcb_marker.h>
34#include <pcb_track.h>
36
37
38// Two-net daisy chain through a single bridge, terminals set. The trunk
39// length should equal the sum of both routed segments + the bridge span.
40// A `(constraint net_chain_length (max 80mm))` rule passes when trunk == 50 mm.
41static const char* DAISY_PCB = R"(
42(kicad_pcb
43 (version 20250904)
44 (generator "pcbnew")
45 (generator_version "9.99")
46 (layers
47 (0 "F.Cu" signal)
48 (2 "B.Cu" signal)
49 (44 "Edge.Cuts" user)
50 )
51 (net 0 "")
52 (net 1 "/NET_A")
53 (net 2 "/NET_B")
54 (gr_line (start -5 -5) (end 60 -5) (layer "Edge.Cuts") (width 0.05))
55 (gr_line (start 60 -5) (end 60 5) (layer "Edge.Cuts") (width 0.05))
56 (gr_line (start 60 5) (end -5 5) (layer "Edge.Cuts") (width 0.05))
57 (gr_line (start -5 5) (end -5 -5) (layer "Edge.Cuts") (width 0.05))
58 (footprint "Term1" (layer "F.Cu") (uuid "00000000-0000-0000-0000-000000000a01")
59 (at 0 0)
60 (pad "1" smd rect (at 0 0) (size 0.8 0.8) (layers "F.Cu") (net 1 "/NET_A") (uuid "00000000-0000-0000-0000-000000000a02"))
61 )
62 (footprint "Bridge" (layer "F.Cu") (uuid "00000000-0000-0000-0000-000000000b01")
63 (at 22.5 0)
64 (pad "1" smd rect (at -2.5 0) (size 0.8 0.8) (layers "F.Cu") (net 1 "/NET_A") (uuid "00000000-0000-0000-0000-000000000b02"))
65 (pad "2" smd rect (at 2.5 0) (size 0.8 0.8) (layers "F.Cu") (net 2 "/NET_B") (uuid "00000000-0000-0000-0000-000000000b03"))
66 )
67 (footprint "Term2" (layer "F.Cu") (uuid "00000000-0000-0000-0000-000000000c01")
68 (at 50 0)
69 (pad "1" smd rect (at 0 0) (size 0.8 0.8) (layers "F.Cu") (net 2 "/NET_B") (uuid "00000000-0000-0000-0000-000000000c02"))
70 )
71 (segment (start 0 0) (end 20 0) (width 0.2) (layer "F.Cu") (net 1))
72 (segment (start 25 0) (end 50 0) (width 0.2) (layer "F.Cu") (net 2))
73)
74)";
75
76
77// Same trunk as DAISY_PCB but adding three perpendicular branches off the trunk
78// (T-junctions in the routed copper) all carrying the same chain so the trunk
79// stays unaffected — provides a regression check that branches don't add to
80// the trunk length when terminals are set.
81static const char* BRANCHED_PCB = R"(
82(kicad_pcb
83 (version 20250904)
84 (generator "pcbnew")
85 (generator_version "9.99")
86 (layers
87 (0 "F.Cu" signal)
88 (2 "B.Cu" signal)
89 (44 "Edge.Cuts" user)
90 )
91 (net 0 "")
92 (net 1 "/NET_A")
93 (gr_line (start -5 -25) (end 60 -25) (layer "Edge.Cuts") (width 0.05))
94 (gr_line (start 60 -25) (end 60 25) (layer "Edge.Cuts") (width 0.05))
95 (gr_line (start 60 25) (end -5 25) (layer "Edge.Cuts") (width 0.05))
96 (gr_line (start -5 25) (end -5 -25) (layer "Edge.Cuts") (width 0.05))
97 (footprint "Term1" (layer "F.Cu") (uuid "00000000-0000-0000-0000-000000000d01")
98 (at 0 0)
99 (pad "1" smd rect (at 0 0) (size 0.8 0.8) (layers "F.Cu") (net 1 "/NET_A") (uuid "00000000-0000-0000-0000-000000000d02"))
100 )
101 (footprint "Term2" (layer "F.Cu") (uuid "00000000-0000-0000-0000-000000000e01")
102 (at 50 0)
103 (pad "1" smd rect (at 0 0) (size 0.8 0.8) (layers "F.Cu") (net 1 "/NET_A") (uuid "00000000-0000-0000-0000-000000000e02"))
104 )
105 (segment (start 0 0) (end 50 0) (width 0.2) (layer "F.Cu") (net 1))
106 (segment (start 12.5 0) (end 12.5 15) (width 0.2) (layer "F.Cu") (net 1))
107 (segment (start 25 0) (end 25 -20) (width 0.2) (layer "F.Cu") (net 1))
108 (segment (start 37.5 0) (end 37.5 18) (width 0.2) (layer "F.Cu") (net 1))
109)
110)";
111
112
113namespace
114{
115std::unique_ptr<BOARD> loadBoard( const char* aText, const std::string& aSubdir )
116{
117 namespace fs = std::filesystem;
118 fs::path tmpDir = fs::temp_directory_path() / aSubdir;
119 fs::create_directories( tmpDir );
120 fs::path pcbPath = tmpDir / "trunk.kicad_pcb";
121
122 {
123 std::ofstream out( pcbPath );
124 out << aText;
125 }
126
127 PCB_IO_KICAD_SEXPR plugin;
128 std::unique_ptr<BOARD> board = std::make_unique<BOARD>();
129 plugin.LoadBoard( pcbPath.string(), board.get() );
130 board->BuildConnectivity();
131 fs::remove( pcbPath );
132 return board;
133}
134
135// Tag every "/NET_*" net into the named chain. Terminal pads come from the
136// footprints whose anchor matches the given X positions (in mm) — the inline
137// PCB strings here don't set explicit Reference properties.
138void tagAndSetTerminals( BOARD* aBoard, const wxString& aChain,
139 double aTermAxMm, double aTermBxMm )
140{
141 for( NETINFO_ITEM* n : aBoard->GetNetInfo() )
142 {
143 if( n && n->GetNetname().StartsWith( wxS( "/NET_" ) ) )
144 n->SetNetChain( aChain );
145 }
146
147 PAD* termA = nullptr;
148 PAD* termB = nullptr;
149 constexpr int EPS = 100;
150 const VECTOR2I targetA( static_cast<int>( aTermAxMm * 1000000 ), 0 );
151 const VECTOR2I targetB( static_cast<int>( aTermBxMm * 1000000 ), 0 );
152
153 for( FOOTPRINT* fp : aBoard->Footprints() )
154 {
155 if( fp->Pads().empty() )
156 continue;
157
158 VECTOR2I pos = fp->GetPosition();
159
160 if( std::abs( pos.x - targetA.x ) <= EPS && std::abs( pos.y - targetA.y ) <= EPS )
161 termA = fp->Pads().front();
162
163 if( std::abs( pos.x - targetB.x ) <= EPS && std::abs( pos.y - targetB.y ) <= EPS )
164 termB = fp->Pads().front();
165 }
166
167 for( NETINFO_ITEM* n : aBoard->GetNetInfo() )
168 {
169 if( n && n->GetNetChain() == aChain )
170 {
171 if( termA )
172 n->SetTerminalPad( 0, termA );
173 if( termB )
174 n->SetTerminalPad( 1, termB );
175 }
176 }
177}
178
179} // namespace
180
181
182BOOST_AUTO_TEST_SUITE( DRCChainLengthTrunk )
183
184
185// Two-net daisy with terminals: trunk = (20 + 25 + 5 bridge) = 50 mm.
186BOOST_AUTO_TEST_CASE( DaisyChainTrunkEqualsSumExplicit )
187{
188 auto board = loadBoard( DAISY_PCB, "kicad_drc_trunk_daisy" );
189 tagAndSetTerminals( board.get(), wxS( "DSY" ), 0.0, 50.0 );
190
191 std::set<BOARD_CONNECTED_ITEM*> items;
192
193 for( PCB_TRACK* t : board->Tracks() )
194 {
195 if( t->GetNet() && t->GetNet()->GetNetChain() == wxS( "DSY" ) )
196 items.insert( t );
197 }
198
199 for( FOOTPRINT* fp : board->Footprints() )
200 {
201 for( PAD* p : fp->Pads() )
202 {
203 if( p->GetNet() && p->GetNet()->GetNetChain() == wxS( "DSY" ) )
204 items.insert( p );
205 }
206 }
207
208 CHAIN_TOPOLOGY topo( board.get(), wxS( "DSY" ), items );
209
210 BOOST_REQUIRE( topo.IsValid() );
211 BOOST_CHECK_CLOSE( topo.TrunkLength(), 50.0e6, 5.0 );
212}
213
214
215// Trunk + three perpendicular branches: trunk should be 50 mm, branches
216// reported as stubs (3 of them).
217BOOST_AUTO_TEST_CASE( BranchedChainTrunkExcludesStubs )
218{
219 auto board = loadBoard( BRANCHED_PCB, "kicad_drc_trunk_branched" );
220 tagAndSetTerminals( board.get(), wxS( "BR" ), 0.0, 50.0 );
221
222 std::set<BOARD_CONNECTED_ITEM*> items;
223
224 for( PCB_TRACK* t : board->Tracks() )
225 {
226 if( t->GetNet() && t->GetNet()->GetNetChain() == wxS( "BR" ) )
227 items.insert( t );
228 }
229
230 for( FOOTPRINT* fp : board->Footprints() )
231 {
232 for( PAD* p : fp->Pads() )
233 {
234 if( p->GetNet() && p->GetNet()->GetNetChain() == wxS( "BR" ) )
235 items.insert( p );
236 }
237 }
238
239 CHAIN_TOPOLOGY topo( board.get(), wxS( "BR" ), items );
240
241 BOOST_REQUIRE( topo.IsValid() );
242 BOOST_CHECK_CLOSE( topo.TrunkLength(), 50.0e6, 5.0 );
243 BOOST_CHECK_EQUAL( topo.Stubs().size(), 3u );
244}
245
246
Information pertinent to a Pcbnew printed circuit board.
Definition board.h:372
const NETINFO_LIST & GetNetInfo() const
Definition board.h:1086
const FOOTPRINTS & Footprints() const
Definition board.h:420
Build a topological view of a single named net chain's routed copper.
const std::vector< STUB > & Stubs() const
double TrunkLength() const
bool IsValid() const
Handle the data for a net.
Definition netinfo.h:46
Definition pad.h:61
A #PLUGIN derivation for saving and loading Pcbnew s-expression formatted files.
BOARD * LoadBoard(const wxString &aFileName, BOARD *aAppendToMe, const std::map< std::string, UTF8 > *aProperties=nullptr, PROJECT *aProject=nullptr) override
Load information from some input file format that this PCB_IO implementation knows about into either ...
constexpr double EPS
Floating point comparison epsilon.
EDA_ANGLE abs(const EDA_ANGLE &aAngle)
Definition eda_angle.h:400
BOOST_AUTO_TEST_CASE(HorizontalAlignment)
BOOST_AUTO_TEST_SUITE(CadstarPartParser)
BOOST_AUTO_TEST_CASE(DaisyChainTrunkEqualsSumExplicit)
static const char * BRANCHED_PCB
static const char * DAISY_PCB
BOOST_REQUIRE(intersection.has_value()==c.ExpectedIntersection.has_value())
BOOST_AUTO_TEST_SUITE_END()
BOOST_CHECK_EQUAL(result, "25.4")
VECTOR2< int32_t > VECTOR2I
Definition vector2d.h:683