test_drc_silk_rule_area_issue24177.cpp File Reference

Regression test for issue #24177: PcbNew 10.99 erroneously reported silk-to-rule-area clearance violations and solder-mask bridges against ZONE objects that are rule areas (logical keepouts/disallow regions). More...

#include <qa_utils/wx_utils/unit_test_utils.h>
#include <board.h>
#include <board_design_settings.h>
#include <pcb_shape.h>
#include <pcb_track.h>
#include <zone.h>
#include <drc/drc_engine.h>
#include <drc/drc_item.h>
#include <settings/settings_manager.h>
#include <widgets/report_severity.h>

Go to the source code of this file.

Classes
struct	DRC_SILK_RULE_AREA_FIXTURE

Functions
	BOOST_FIXTURE_TEST_CASE (RuleAreaDoesNotCauseSilkOrMaskViolationsIssue24177, DRC_SILK_RULE_AREA_FIXTURE)

Detailed Description

Regression test for issue #24177: PcbNew 10.99 erroneously reported silk-to-rule-area clearance violations and solder-mask bridges against ZONE objects that are rule areas (logical keepouts/disallow regions).

A rule area has GetIsRuleArea() == true and represents a constraint, not physical copper, mask or silk material. When the silk-clearance and solder-mask DRC providers inserted rule-area zones into their rtrees the resulting collisions produced bogus violations between the rule area and any nearby silk graphic.

The fix skips rule areas in both providers' rtree population. This test builds a synthetic board with one rule area placed near a silk segment and verifies that DRC reports zero silk-clearance, silk-mask-clearance and solder-mask-bridge violations.

Definition in file test_drc_silk_rule_area_issue24177.cpp.

Function Documentation

BOOST_FIXTURE_TEST_CASE()

BOOST_FIXTURE_TEST_CASE	(	RuleAreaDoesNotCauseSilkOrMaskViolationsIssue24177	,
		DRC_SILK_RULE_AREA_FIXTURE	)

Definition at line 62 of file test_drc_silk_rule_area_issue24177.cpp.

References ZONE::AppendCorner(), BOOST_CHECK_EQUAL(), DRC_ENGINE::ClearViolationHandler(), DRCE_LAST, DRCE_SILK_CLEARANCE, DRCE_SILK_EDGE_CLEARANCE, DRCE_SILK_MASK_CLEARANCE, DRCE_SOLDERMASK_BRIDGE, F_Cu, F_Mask, F_SilkS, DRC_ENGINE::InitEngine(), BOARD_DESIGN_SETTINGS::m_DRCEngine, BOARD_DESIGN_SETTINGS::m_DRCSeverities, MM, pcbIUScale, RPT_SEVERITY_ERROR, RPT_SEVERITY_IGNORE, DRC_ENGINE::RunTests(), SEGMENT, EDA_SHAPE::SetEnd(), PCB_TRACK::SetEnd(), ZONE::SetIsRuleArea(), BOARD_CONNECTED_ITEM::SetLayer(), PCB_SHAPE::SetLayer(), ZONE::SetLayerSet(), EDA_SHAPE::SetStart(), PCB_TRACK::SetStart(), PCB_SHAPE::SetStroke(), DRC_ENGINE::SetViolationHandler(), PCB_TRACK::SetWidth(), and SOLID.