test_drc_hole_clearance_issue24355.cpp File Reference

Regression test for issue #24355: DRC silently misses hole-clearance violations when the pointer-order dedup in testPadClearances picks the direction whose iterator pad does not flash the layer being tested. More...

#include <qa_utils/wx_utils/unit_test_utils.h>
#include <pcbnew_utils/board_test_utils.h>
#include <board.h>
#include <board_design_settings.h>
#include <footprint.h>
#include <pad.h>
#include <drc/drc_item.h>
#include <drc/drc_engine.h>
#include <settings/settings_manager.h>
#include <widgets/report_severity.h>

Go to the source code of this file.

Classes
struct	DRC_HOLE_CLEARANCE_FIXTURE

Functions
	BOOST_FIXTURE_TEST_CASE (HoleClearanceIssue24355, DRC_HOLE_CLEARANCE_FIXTURE)

Detailed Description

Regression test for issue #24355: DRC silently misses hole-clearance violations when the pointer-order dedup in testPadClearances picks the direction whose iterator pad does not flash the layer being tested.

testPadAgainstItem tested only "pad copper vs other hole" and gated it on pad->FlashLayer( aLayer ). The dedup at the caller picks exactly one direction per pad pair. When that direction puts a non-flashing pad (typical NPTH mounting tab where drill == pad size, or any PTH whose unconnected-layer-mode removes the inner annulus) as the iterator, the flash check zeroed the clearance and the test silently passed.

Fixture (qa/data/pcbnew/issue24355/) – single footprint with two pads:

Pad 1: NPTH, round, drill 2.0 mm, size 2.0 mm, at (0, 0). FlashLayer returns false on both F.Cu and B.Cu because drill_size.x >= size.x (pad.cpp PAD::FlashLayer). Pad 2: PTH, round, drill 0.6 mm, size 1.0 mm, at (1.6, 0). FlashLayer returns true on F.Cu and B.Cu.

Edge of NPTH drill to edge of PTH copper = 1.6 - 1.0 - 0.5 = 0.1 mm. Project hole clearance constraint = 0.2 mm – violated on both copper layers.

Pad-allocation order is asserted at fixture creation time so the bug deterministically manifests on common allocators (glibc/msvcrt): the NPTH pad is listed first in the .kicad_pcb so the parser allocates it at a lower address than the PTH, which is the direction the dedup picks and the buggy code short-circuits.

Expected: 2 DRCE_HOLE_CLEARANCE violations (one per shared copper layer; per-layer pad violation behavior is intentional in DRC_TEST_PROVIDER_ COPPER_CLEARANCE::testPadClearances).

Pre-fix: 0 violations (the only direction tested gets short-circuited). Post-fix: 2 violations (the swapped direction runs and finds them).

Definition in file test_drc_hole_clearance_issue24355.cpp.

Function Documentation

BOOST_FIXTURE_TEST_CASE()

BOOST_FIXTURE_TEST_CASE	(	HoleClearanceIssue24355	,
		DRC_HOLE_CLEARANCE_FIXTURE	)

Definition at line 98 of file test_drc_hole_clearance_issue24355.cpp.

References BOOST_CHECK_EQUAL(), BOOST_TEST_MESSAGE(), DRC_ENGINE::ClearViolationHandler(), DRCE_FIRST, DRCE_HOLE_CLEARANCE, DRCE_LAST, PAD::GetAttribute(), KI_TEST::LoadBoard(), BOARD_DESIGN_SETTINGS::m_DRCEngine, BOARD_DESIGN_SETTINGS::m_DRCSeverities, MM, NPTH, FOOTPRINT::Pads(), PTH, RPT_SEVERITY_ERROR, RPT_SEVERITY_IGNORE, DRC_ENGINE::RunTests(), and DRC_ENGINE::SetViolationHandler().