KiCad PCB EDA Suite
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test_connectivity_algo.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers, see AUTHORS.TXT for contributors.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 3
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <https://www.gnu.org/licenses/>.
18 */
19
20
23
24#include <connection_graph.h>
25#include <schematic.h>
26#include <sch_sheet.h>
27#include <sch_screen.h>
28#include <sch_symbol.h>
29#include <sch_pin.h>
31#include <locale_io.h>
32
41
43{
45
46 std::vector<std::pair<wxString, int>> tests =
47 {
48 { "issue18092/issue18092", 1 }
49 };
50
51 for( auto&[ name, nets] : tests )
52 {
53 KI_TEST::LoadSchematic( m_settingsManager, name, m_schematic );
54
55 SCH_SHEET_LIST sheets = m_schematic->BuildSheetListSortedByPageNumbers();
56 CONNECTION_GRAPH* graph = m_schematic->ConnectionGraph();
57
58 BOOST_CHECK( nets == graph->GetNetMap().size() );
59
60 }
61}
62
63
76{
78
79 KI_TEST::LoadSchematic( m_settingsManager, "issue17771/issue1771", m_schematic );
80
81 SCH_SHEET_LIST sheets = m_schematic->BuildSheetListSortedByPageNumbers();
82 CONNECTION_GRAPH* graph = m_schematic->ConnectionGraph();
83
84 // Find test points and their net connections
85 // TP101 and TP401 should be on the same net (m.X.Y.Z1)
86 // TP102 and TP402 should be on the same net (m.X.Y.Z2)
87 std::map<wxString, int> tpNetCodes; // Test point reference -> net code
88
89 for( const auto& [key, subgraphs] : graph->GetNetMap() )
90 {
91 for( CONNECTION_SUBGRAPH* subgraph : subgraphs )
92 {
93 for( SCH_ITEM* item : subgraph->GetItems() )
94 {
95 if( item->Type() == SCH_PIN_T )
96 {
97 SCH_PIN* pin = static_cast<SCH_PIN*>( item );
98 SCH_SYMBOL* symbol = dynamic_cast<SCH_SYMBOL*>( pin->GetParentSymbol() );
99
100 if( symbol )
101 {
102 wxString ref = symbol->GetRef( &subgraph->GetSheet() );
103
104 if( ref == "TP101" || ref == "TP102" ||
105 ref == "TP401" || ref == "TP402" )
106 {
107 tpNetCodes[ref] = key.Netcode;
108 }
109 }
110 }
111 }
112 }
113 }
114
115 // Verify we found all test points
116 BOOST_REQUIRE_MESSAGE( tpNetCodes.count( "TP101" ),
117 "TP101 should be found in netlist" );
118 BOOST_REQUIRE_MESSAGE( tpNetCodes.count( "TP102" ),
119 "TP102 should be found in netlist" );
120 BOOST_REQUIRE_MESSAGE( tpNetCodes.count( "TP401" ),
121 "TP401 should be found in netlist" );
122 BOOST_REQUIRE_MESSAGE( tpNetCodes.count( "TP402" ),
123 "TP402 should be found in netlist" );
124
125 // TP101 and TP401 should be on the same net (m.X.Y.Z1 path)
126 BOOST_CHECK_MESSAGE( tpNetCodes["TP101"] == tpNetCodes["TP401"],
127 "TP101 and TP401 should be on the same net (m.X.Y.Z1)" );
128
129 // TP102 and TP402 should be on the same net (m.X.Y.Z2 path)
130 // This is the bug - without the fix, these will be on different nets
131 BOOST_CHECK_MESSAGE( tpNetCodes["TP102"] == tpNetCodes["TP402"],
132 "TP102 and TP402 should be on the same net (m.X.Y.Z2)" );
133}
134
135
141BOOST_FIXTURE_TEST_CASE( Issue25086UnannotatedNetNames, CONNECTIVITY_TEST_FIXTURE )
142{
144
145 KI_TEST::LoadSchematic( m_settingsManager, "issue25086_unannotated_pins", m_schematic );
146
147 SCH_SHEET_PATH sheet = m_schematic->BuildSheetListSortedByPageNumbers().at( 0 );
148 SCH_SCREEN* screen = sheet.LastScreen();
149
150 std::vector<SCH_CONNECTION*> wireConns;
151
152 for( SCH_ITEM* item : screen->Items().OfType( SCH_LINE_T ) )
153 {
154 if( item->GetLayer() == LAYER_WIRE )
155 wireConns.push_back( item->Connection( &sheet ) );
156 }
157
158 BOOST_REQUIRE_EQUAL( wireConns.size(), 2 );
159 BOOST_REQUIRE( wireConns[0] && wireConns[1] );
160
161 // Each wire joins its own pair of unannotated pins, so the nets must be distinct
162 BOOST_CHECK_NE( wireConns[0]->Name(), wireConns[1]->Name() );
163
164 // Either pin on a wire may win the driver tie-break, so accept any symbol's name
165 std::vector<wxString> expectedNames;
166
167 for( SCH_ITEM* item : screen->Items().OfType( SCH_SYMBOL_T ) )
168 {
169 unsigned serial = (unsigned) ( item->m_Uuid.Hash() & 0xFFFFFFFF );
170 expectedNames.push_back( wxString::Format( wxS( "Net-(TP?-%08x-Pad1)" ), serial ) );
171 }
172
173 BOOST_REQUIRE_EQUAL( expectedNames.size(), 4 );
174
175 for( SCH_CONNECTION* conn : wireConns )
176 {
177 bool found = std::find( expectedNames.begin(), expectedNames.end(), conn->Name() ) != expectedNames.end();
178
179 BOOST_CHECK_MESSAGE( found, "Unexpected net name: " + conn->Name().ToStdString() );
180 }
181}
const char * name
Calculate the connectivity of a schematic and generate netlists.
const NET_MAP & GetNetMap() const
A subgraph is a set of items that are electrically connected on a single sheet.
EE_TYPE OfType(KICAD_T aType) const
Definition sch_rtree.h:248
Instantiate the current locale within a scope in which you are expecting exceptions to be thrown.
Definition locale_io.h:37
Each graphical item can have a SCH_CONNECTION describing its logical connection (to a bus or net).
Base class for any item which can be embedded within the SCHEMATIC container class,...
Definition sch_item.h:165
EE_RTREE & Items()
Get the full RTree, usually for iterating.
Definition sch_screen.h:118
A container for handling SCH_SHEET_PATH objects in a flattened hierarchy.
Handle access to a stack of flattened SCH_SHEET objects by way of a path for creating a flattened sch...
SCH_SCREEN * LastScreen()
SCH_SHEET * at(size_t aIndex) const
Forwarded method from std::vector.
Schematic symbol object.
Definition sch_symbol.h:75
const wxString GetRef(const SCH_SHEET_PATH *aSheet, bool aIncludeUnit=false) const override
@ LAYER_WIRE
Definition layer_ids.h:474
void LoadSchematic(SETTINGS_MANAGER &aSettingsManager, const wxString &aRelPath, std::unique_ptr< SCHEMATIC > &aSchematic)
std::vector< FAB_LAYER_COLOR > dummy
std::unique_ptr< SCHEMATIC > m_schematic
BOOST_FIXTURE_TEST_CASE(CheckNetCounts, CONNECTIVITY_TEST_FIXTURE)
BOOST_REQUIRE(intersection.has_value()==c.ExpectedIntersection.has_value())
KIBIS_PIN * pin
@ SCH_LINE_T
Definition typeinfo.h:159
@ SCH_SYMBOL_T
Definition typeinfo.h:168
@ SCH_PIN_T
Definition typeinfo.h:149