KiCad PCB EDA Suite
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test_connectivity_algo.cpp File Reference

Go to the source code of this file.

Classes

struct  CONNECTIVITY_TEST_FIXTURE
 

Functions

 BOOST_FIXTURE_TEST_CASE (CheckNetCounts, CONNECTIVITY_TEST_FIXTURE)
 
 BOOST_FIXTURE_TEST_CASE (Issue17771, CONNECTIVITY_TEST_FIXTURE)
 Test for issue #17771: Bus implicit connection not working across hierarchy.
 

Function Documentation

◆ BOOST_FIXTURE_TEST_CASE() [1/2]

BOOST_FIXTURE_TEST_CASE ( CheckNetCounts ,
CONNECTIVITY_TEST_FIXTURE  )

◆ BOOST_FIXTURE_TEST_CASE() [2/2]

BOOST_FIXTURE_TEST_CASE ( Issue17771 ,
CONNECTIVITY_TEST_FIXTURE  )

Test for issue #17771: Bus implicit connection not working across hierarchy.

The schematic has a hierarchy where bus members should connect through implicit bus connections. The bug was that V.Z1 connects through to the root but V.Z2 does not, because the intermediate net W.X.Y.Z1 is explicitly labeled on the "sub" sheet while W.X.Y.Z2 relies on implicit bus member expansion.

Expected: Both nets should connect properly:

  • m.X.Y.Z1 (TP101/TP102 on root) should connect to V.Z1/V.Z2 (TP401/TP402 on sub3)

Definition at line 79 of file test_connectivity_algo.cpp.

References dummy, CONNECTION_GRAPH::GetNetMap(), SCH_SYMBOL::GetRef(), KI_TEST::LoadSchematic(), pin, and SCH_PIN_T.