KiCad PCB EDA Suite
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test_board_design_settings.cpp File Reference

Go to the source code of this file.

Functions

 BOOST_AUTO_TEST_CASE (NegativeSilkClearanceRoundTrip)
 Regression test for https://gitlab.com/kicad/code/kicad/-/issues/23327.
 
 BOOST_AUTO_TEST_CASE (BiggestClearanceIncludesPhysicalHoleClearance)
 Regression test: physical_hole_clearance must count toward the worst-case clearance.
 

Function Documentation

◆ BOOST_AUTO_TEST_CASE() [1/2]

BOOST_AUTO_TEST_CASE ( BiggestClearanceIncludesPhysicalHoleClearance )

Regression test: physical_hole_clearance must count toward the worst-case clearance.

GetBiggestClearanceValue() seeds the interactive router's broad-phase search radius. It previously omitted PHYSICAL_HOLE_CLEARANCE_CONSTRAINT, so a physical_hole_clearance rule did not widen that radius. The router then discovered the hole only once a track was already well inside the rule distance, reacting far too late. The worst-case value must be at least the rule's minimum.

Definition at line 87 of file test_board_design_settings.cpp.

References BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue(), BOARD_DESIGN_SETTINGS::m_DRCEngine, pcbIUScale, PHYSICAL_HOLE_CLEARANCE_CONSTRAINT, MINOPTMAX< T >::SetMin(), and DRC_CONSTRAINT::Value().

◆ BOOST_AUTO_TEST_CASE() [2/2]

BOOST_AUTO_TEST_CASE ( NegativeSilkClearanceRoundTrip )

Regression test for https://gitlab.com/kicad/code/kicad/-/issues/23327.

Negative silk clearance values must survive a save/load round-trip through the project settings JSON. Previously the PARAM_SCALED lower bound was 0, causing negative values to be reset to the default on load.

Definition at line 58 of file test_board_design_settings.cpp.

References BOOST_AUTO_TEST_CASE(), BOOST_CHECK_EQUAL(), JSON_SETTINGS::Load(), BOARD_DESIGN_SETTINGS::m_SilkClearance, pcbIUScale, and JSON_SETTINGS::Store().