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KiCad PCB EDA Suite
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Regression test for issue #24523: creepage DRC fails to find the shortest surface path when it has to wind around two parallel NPTH slots. More...
#include <qa_utils/wx_utils/unit_test_utils.h>#include <pcbnew_utils/board_test_utils.h>#include <board.h>#include <board_design_settings.h>#include <layer_ids.h>#include <drc/drc_item.h>#include <drc/drc_engine.h>#include <footprint.h>#include <pad.h>#include <pcb_marker.h>#include <settings/settings_manager.h>#include <widgets/report_severity.h>Go to the source code of this file.
Classes | |
| struct | DRC_CREEPAGE_TWO_SLOTS_FIXTURE |
Functions | |
| BOOST_FIXTURE_TEST_CASE (CreepageTwoNPTHSlotsIssue24523, DRC_CREEPAGE_TWO_SLOTS_FIXTURE) | |
Regression test for issue #24523: creepage DRC fails to find the shortest surface path when it has to wind around two parallel NPTH slots.
The repro board has two capacitors (C4, C5), each with a 10 mm x 1 mm NPTH oval slot, placed side by side. Two nets ('Sitove' netclass, 5 mm creepage rule) snake around both slots. The true creepage path between the nets wraps around the slot end caps and threads the gap between the two slots, measuring roughly 3 mm - well below the 5 mm requirement. Before the fix the path search could not assemble this multi-leg route, so it overestimated the creepage distance and reported no violation (a false negative).
Definition in file test_drc_creepage_issue24523.cpp.
| BOOST_FIXTURE_TEST_CASE | ( | CreepageTwoNPTHSlotsIssue24523 | , |
| DRC_CREEPAGE_TWO_SLOTS_FIXTURE | ) |
Definition at line 75 of file test_drc_creepage_issue24523.cpp.
References BOOST_CHECK_MESSAGE(), BOOST_TEST_MESSAGE(), DRC_ENGINE::ClearViolationHandler(), DRCE_CREEPAGE, DRCE_FIRST, DRCE_LAST, PCB_MARKER::GetPath(), BOARD_DESIGN_SETTINGS::GetSeverity(), KI_TEST::LoadBoard(), BOARD_DESIGN_SETTINGS::m_DRCEngine, BOARD_DESIGN_SETTINGS::m_DRCSeverities, MM, RPT_SEVERITY_ERROR, RPT_SEVERITY_IGNORE, DRC_ENGINE::RunTests(), and DRC_ENGINE::SetViolationHandler().