KiCad PCB EDA Suite
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test_drc_return_path_reference_net.cpp
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <https://www.gnu.org/licenses/>.
18 */
19
20#include <boost/test/unit_test.hpp>
21
22#include <filesystem>
23#include <fstream>
24
25#include <board.h>
27#include <drc/drc_engine.h>
28#include <drc/drc_item.h>
29#include <netinfo.h>
30#include <pcb_marker.h>
32
33
34// One F.Cu chain track with two B.Cu zones underneath: one on net "/GND" and
35// one on net "/VCC". Both zones cover the trunk fully so without a net
36// filter the check passes. With `(net "GND")` the GND zone alone qualifies
37// and the trunk is still covered. With `(net "PWR_*")` no zone qualifies and
38// the trunk is reported as uncovered.
39static const char* DUAL_ZONE_PCB = R"(
40(kicad_pcb
41 (version 20250904)
42 (generator "pcbnew")
43 (generator_version "9.99")
44 (layers
45 (0 "F.Cu" signal)
46 (2 "B.Cu" signal)
47 (44 "Edge.Cuts" user)
48 )
49 (net 0 "")
50 (net 1 "/CHAIN_RN")
51 (net 2 "/GND")
52 (net 3 "/VCC")
53 (gr_line (start -5 -5) (end 35 -5) (layer "Edge.Cuts") (width 0.05))
54 (gr_line (start 35 -5) (end 35 5) (layer "Edge.Cuts") (width 0.05))
55 (gr_line (start 35 5) (end -5 5) (layer "Edge.Cuts") (width 0.05))
56 (gr_line (start -5 5) (end -5 -5) (layer "Edge.Cuts") (width 0.05))
57 (segment (start 0 0) (end 30 0) (width 0.2) (layer "F.Cu") (net 1))
58 (zone (net 2) (net_name "/GND") (layer "B.Cu") (name "gnd_full") (hatch edge 0.508)
59 (connect_pads (clearance 0))
60 (min_thickness 0.254) (filled_areas_thickness no)
61 (fill (thermal_gap 0.508) (thermal_bridge_width 0.508))
62 (polygon
63 (pts (xy -1 -1) (xy 31 -1) (xy 31 1) (xy -1 1))
64 )
65 )
66 (zone (net 3) (net_name "/VCC") (layer "B.Cu") (name "vcc_strip") (hatch edge 0.508)
67 (connect_pads (clearance 0))
68 (min_thickness 0.254) (filled_areas_thickness no)
69 (fill (thermal_gap 0.508) (thermal_bridge_width 0.508))
70 (polygon
71 (pts (xy -1 1.5) (xy 31 1.5) (xy 31 2) (xy -1 2))
72 )
73 )
74)
75)";
76
77
78namespace
79{
80size_t runDrc( const std::string& aDru, const std::string& aSubdir )
81{
82 namespace fs = std::filesystem;
83 fs::path tmpDir = fs::temp_directory_path() / aSubdir;
84 fs::create_directories( tmpDir );
85 fs::path pcbPath = tmpDir / "rn.kicad_pcb";
86 fs::path druPath = tmpDir / "rn.kicad_dru";
87
88 {
89 std::ofstream out( pcbPath );
90 out << DUAL_ZONE_PCB;
91 }
92
93 {
94 std::ofstream out( druPath );
95 out << aDru;
96 }
97
98 PCB_IO_KICAD_SEXPR plugin;
99 std::unique_ptr<BOARD> board = std::make_unique<BOARD>();
100 plugin.LoadBoard( pcbPath.string(), board.get() );
101 board->BuildConnectivity();
102
103 NETINFO_ITEM* sig = board->FindNet( wxS( "/CHAIN_RN" ) );
104 BOOST_REQUIRE( sig );
105 sig->SetNetChain( wxS( "RN" ) );
106
107 BOARD_DESIGN_SETTINGS& bds = board->GetDesignSettings();
108 auto drcEngine = std::make_shared<DRC_ENGINE>( board.get(), &bds );
109 wxFileName ruleFile( druPath.string() );
110 drcEngine->InitEngine( ruleFile );
111 bds.m_DRCEngine = drcEngine;
112
120
121 size_t markerCount = 0;
122 drcEngine->SetViolationHandler(
123 [&]( const std::shared_ptr<DRC_ITEM>& aItem, const VECTOR2I&, int,
124 const std::function<void( PCB_MARKER* )>& )
125 {
126 if( aItem->GetErrorCode() == DRCE_NET_CHAIN_RETURN_PATH_BREAK )
127 markerCount++;
128 } );
129
130 drcEngine->RunTests( EDA_UNITS::MM, true, false );
131
132 fs::remove( pcbPath );
133 fs::remove( druPath );
134 return markerCount;
135}
136}
137
138
139BOOST_AUTO_TEST_SUITE( DRCReturnPathReferenceNet )
140
141
142// Without (net …): both zones qualify, trunk fully covered → 0 markers.
143BOOST_AUTO_TEST_CASE( ReferenceNetEmptyAcceptsAnyZoneRegression )
144{
145 const std::string dru =
146 R"((version 1)
147(rule "RP"
148 (condition "A.NetClass == 'Default'")
149 (constraint length (min 0mm) (max 200mm))
150 (constraint return_path (layer "B.Cu"))
151)
152)";
153 BOOST_CHECK_EQUAL( runDrc( dru, "kicad_drc_rn_any" ), 0u );
154}
155
156
157// (net "GND") plus only-GND zone covering trunk → 0 markers.
158BOOST_AUTO_TEST_CASE( ReferenceNetGndShadowedByGndPasses )
159{
160 const std::string dru =
161 R"((version 1)
162(rule "RP"
163 (condition "A.NetClass == 'Default'")
164 (constraint length (min 0mm) (max 200mm))
165 (constraint return_path (layer "B.Cu") (net "GND"))
167)";
168 // The GND zone only covers the upper half of the track shadow (y < 0).
169 // The trunk runs at y=0 with width 0.2mm — partial coverage. The marker
170 // count depends on whether half-coverage triggers; just assert no false
171 // negative when the zone net matches at all.
172 size_t n = runDrc( dru, "kicad_drc_rn_gnd_match" );
173 BOOST_CHECK_LE( n, 1u );
174}
175
177// (net "PWR_*") matches no zone → trunk reported as uncovered.
178BOOST_AUTO_TEST_CASE( ReferenceNetWildcardNoMatch )
179{
180 const std::string dru =
181 R"((version 1)
182(rule "RP"
183 (condition "A.NetClass == 'Default'")
184 (constraint length (min 0mm) (max 200mm))
185 (constraint return_path (layer "B.Cu") (net "PWR_*"))
186)
187)";
188 size_t n = runDrc( dru, "kicad_drc_rn_wildcard_nomatch" );
189 BOOST_CHECK_GE( n, 1u );
190}
191
192
193// (net "GND*") matches the GND zone → covered (or partially covered).
194BOOST_AUTO_TEST_CASE( ReferenceNetWildcardMatch )
195{
196 const std::string dru =
197 R"((version 1)
198(rule "RP"
199 (condition "A.NetClass == 'Default'")
200 (constraint length (min 0mm) (max 200mm))
201 (constraint return_path (layer "B.Cu") (net "GND*"))
202)
203)";
204 size_t n = runDrc( dru, "kicad_drc_rn_wildcard_match" );
205 BOOST_CHECK_LE( n, 1u );
206}
207
208
Container for design settings for a BOARD object.
std::map< int, SEVERITY > m_DRCSeverities
std::shared_ptr< DRC_ENGINE > m_DRCEngine
Handle the data for a net.
Definition netinfo.h:46
void SetNetChain(const wxString &aNetChain)
Definition netinfo.h:113
A #PLUGIN derivation for saving and loading Pcbnew s-expression formatted files.
BOARD * LoadBoard(const wxString &aFileName, BOARD *aAppendToMe, const std::map< std::string, UTF8 > *aProperties=nullptr, PROJECT *aProject=nullptr) override
Load information from some input file format that this PCB_IO implementation knows about into either ...
@ DRCE_UNCONNECTED_ITEMS
Definition drc_item.h:36
@ DRCE_LIB_FOOTPRINT_ISSUES
Definition drc_item.h:79
@ DRCE_INVALID_OUTLINE
Definition drc_item.h:69
@ DRCE_DRILL_OUT_OF_RANGE
Definition drc_item.h:57
@ DRCE_NET_CHAIN_RETURN_PATH_BREAK
Definition drc_item.h:103
@ DRCE_DANGLING_VIA
Definition drc_item.h:47
@ DRCE_LIB_FOOTPRINT_MISMATCH
Definition drc_item.h:80
@ RPT_SEVERITY_ERROR
@ RPT_SEVERITY_IGNORE
BOOST_AUTO_TEST_CASE(HorizontalAlignment)
BOOST_AUTO_TEST_SUITE(CadstarPartParser)
static const char * DUAL_ZONE_PCB
BOOST_AUTO_TEST_CASE(ReferenceNetEmptyAcceptsAnyZoneRegression)
BOOST_REQUIRE(intersection.has_value()==c.ExpectedIntersection.has_value())
BOOST_AUTO_TEST_SUITE_END()
BOOST_CHECK_EQUAL(result, "25.4")
VECTOR2< int32_t > VECTOR2I
Definition vector2d.h:683