KiCad PCB EDA Suite
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test_drc_regressions.cpp
Go to the documentation of this file.
1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2022 KiCad Developers, see AUTHORS.txt for contributors.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you may find one here:
18 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19 * or you may search the http://www.gnu.org website for the version 2 license,
20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
26#include <board.h>
28#include <pad.h>
29#include <pcb_track.h>
30#include <pcb_marker.h>
31#include <footprint.h>
32#include <drc/drc_item.h>
34
35
37{
39 m_settingsManager( true /* headless */ )
40 { }
41
43 std::unique_ptr<BOARD> m_board;
44};
45
46
48{
49 // These documents at one time flagged DRC errors that they shouldn't have.
50
51 std::vector<wxString> tests =
52 {
53 "issue4139", // DRC fails wrongly with minimally-spaced pads at 45 degree
54 "issue4774", // Shape collisions missing SH_POLY_SET
55 "issue5978", // Hole clearance violation with non-copper pad
56 "issue5990", // DRC flags a board edge clearance violation although the clearance is respected
57 "issue6443", // Wrong DRC and rendering of THT pads with selective inner copper layers
58 "issue7567", // DRC constraint to disallow holes gets SMD pads also
59 "issue7975", // Differential pair gap out of range fault by DRC
60 "issue8407", // PCBNEW: Arc for diff pair has clearance DRC error
61 "issue10906", // Soldermask bridge for only one object
62 "issue11814", // Bad cache hit in isInsideArea
63 "issue12609", // Arc collison edge case
64 "issue14412", // Solder mask bridge between pads in a net-tie pad group
65 "issue15280", // Very wide spokes mis-counted as being single spoke
66 "unconnected-netnames/unconnected-netnames", // Raised false schematic partity error
67 };
68
69 for( const wxString& relPath : tests )
70 {
71 KI_TEST::LoadBoard( m_settingsManager, relPath, m_board );
72 // Do not refill zones here because this is testing the DRC engine, not the zone filler
73
74 std::vector<DRC_ITEM> violations;
75 BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
76
77 // Disable DRC tests not useful or not handled in this testcase
82 // These DRC tests are not useful and do not work because they need a footprint library
83 // associated to the board
86
87 bds.m_DRCEngine->SetViolationHandler(
88 [&]( const std::shared_ptr<DRC_ITEM>& aItem, VECTOR2I aPos, int aLayer )
89 {
90 if( bds.GetSeverity( aItem->GetErrorCode() ) == SEVERITY::RPT_SEVERITY_ERROR )
91 violations.push_back( *aItem );
92 } );
93
94 bds.m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
95
96 if( violations.empty() )
97 {
98 BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
99 BOOST_TEST_MESSAGE( wxString::Format( "DRC regression: %s, passed", relPath ) );
100 }
101 else
102 {
104
105 std::map<KIID, EDA_ITEM*> itemMap;
106 m_board->FillItemMap( itemMap );
107
108 for( const DRC_ITEM& item : violations )
109 {
110 BOOST_TEST_MESSAGE( item.ShowReport( &unitsProvider, RPT_SEVERITY_ERROR,
111 itemMap ) );
112 }
113
114 BOOST_ERROR( wxString::Format( "DRC regression: %s, failed (err: expected 0 found %d",
115 relPath, (int)violations.size() ) );
116 }
117 }
118}
119
120
122{
123 // These documents at one time failed to catch DRC errors that they should have
124
125 std::vector< std::pair<wxString, int> > tests =
126 {
127 { "issue1358", 2 },
128 { "issue2512", 5 },
129 { "issue2528", 1 },
130 { "issue5750", 4 }, // Shorting zone fills pass DRC in some cases
131 { "issue5854", 3 },
132 { "issue6879", 6 },
133 { "issue6945", 2 },
134 { "issue7241", 1 },
135 { "issue7267", 5 },
136 { "issue7325", 4 },
137 { "issue8003", 2 },
138 { "issue9081", 2 },
139 { "issue12109", 8 }, // Pads fail annular width test
140 { "issue14334", 2 }, // Thermal spoke to otherwise unconnected island
141 { "issue16566", 6 }, // Pad_Shape vs Shape property
142 { "issue18142", 1 }, // blind/buried via to micro-via hole-to-hole
143 { "reverse_via", 3 }, // Via/track ordering
144 { "intersectingzones", 1 }, // zones are too close to each other
145 { "fill_bad", 1 }, // zone max BBox was too small
146 { "issue17967/issue17967", 1} // Arc dp coupling
147 };
148
149 for( const auto& [testName, expectedErrors] : tests )
150 {
151 BOOST_TEST_CONTEXT( testName )
152 {
153 KI_TEST::LoadBoard( m_settingsManager, testName, m_board );
154 // Do not refill zones here because this is testing the DRC engine, not the zone filler
155
156 std::vector<PCB_MARKER> markers;
157 std::vector<DRC_ITEM> violations;
158 BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
159
160 // Disable DRC tests not useful in this testcase
164
165 bds.m_DRCEngine->SetViolationHandler(
166 [&]( const std::shared_ptr<DRC_ITEM>& aItem, VECTOR2I aPos, int aLayer )
167 {
168 markers.emplace_back( PCB_MARKER( aItem, aPos ) );
169
170 if( bds.m_DrcExclusions.find( markers.back().SerializeToString() )
171 == bds.m_DrcExclusions.end() )
172 {
173 violations.push_back( *aItem );
174 }
175 } );
176
177 bds.m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
178
179 if( violations.size() == expectedErrors )
180 {
181 BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
182 BOOST_TEST_MESSAGE( wxString::Format( "DRC regression: %s, passed", testName ) );
183 }
184 else
185 {
187
188 std::map<KIID, EDA_ITEM*> itemMap;
189 m_board->FillItemMap( itemMap );
190
191 for( const DRC_ITEM& item : violations )
192 {
193 BOOST_TEST_MESSAGE(
194 item.ShowReport( &unitsProvider, RPT_SEVERITY_ERROR, itemMap ) );
195 }
196
197 BOOST_CHECK_EQUAL( violations.size(), expectedErrors );
198
199 BOOST_ERROR( wxString::Format( "DRC regression: %s, failed", testName ) );
200 }
201 }
202 }
203}
constexpr EDA_IU_SCALE pcbIUScale
Definition: base_units.h:108
Container for design settings for a BOARD object.
std::map< int, SEVERITY > m_DRCSeverities
std::shared_ptr< DRC_ENGINE > m_DRCEngine
std::set< wxString > m_DrcExclusions
SEVERITY GetSeverity(int aDRCErrorCode)
@ DRCE_UNCONNECTED_ITEMS
Definition: drc_item.h:39
@ DRCE_LIB_FOOTPRINT_ISSUES
Definition: drc_item.h:82
@ DRCE_INVALID_OUTLINE
Definition: drc_item.h:72
@ DRCE_STARVED_THERMAL
Definition: drc_item.h:49
@ DRCE_COPPER_SLIVER
Definition: drc_item.h:92
@ DRCE_LIB_FOOTPRINT_MISMATCH
Definition: drc_item.h:83
void LoadBoard(SETTINGS_MANAGER &aSettingsManager, const wxString &aRelPath, std::unique_ptr< BOARD > &aBoard)
@ RPT_SEVERITY_ERROR
@ RPT_SEVERITY_IGNORE
BOOST_FIXTURE_TEST_CASE(DRCFalsePositiveRegressions, DRC_REGRESSION_TEST_FIXTURE)