KiCad PCB EDA Suite
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test_drc_regressions.cpp
Go to the documentation of this file.
1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <https://www.gnu.org/licenses/>.
18 */
19
22#include <board.h>
24#include <drc/drc_engine.h>
25#include <pad.h>
26#include <pcb_track.h>
27#include <pcb_marker.h>
28#include <footprint.h>
29#include <drc/drc_engine.h>
30#include <drc/drc_item.h>
33
34
36{
39
41 std::unique_ptr<BOARD> m_board;
42};
43
44
46{
47 // These documents at one time flagged DRC errors that they shouldn't have.
48
49 std::vector<wxString> tests = {
50 "issue4139", // DRC fails wrongly with minimally-spaced pads at 45 degree
51 "issue4774", // Shape collisions missing SH_POLY_SET
52 "issue5978", // Hole clearance violation with non-copper pad
53 "issue5990", // DRC flags a board edge clearance violation although the clearance is respected
54 "issue6443", // Wrong DRC and rendering of THT pads with selective inner copper layers
55 "issue7567", // DRC constraint to disallow holes gets SMD pads also
56 "issue7975", // Differential pair gap out of range fault by DRC
57 "issue8407", // PCBNEW: Arc for diff pair has clearance DRC error
58 "issue10906", // Soldermask bridge for only one object
59 "issue12609", // Arc collison edge case
60 "issue14412", // Solder mask bridge between pads in a net-tie pad group
61 "issue15280", // Very wide spokes mis-counted as being single spoke
62 "issue14008", // Net-tie clearance error
63 "issue17967/issue17967", // Arc dp coupling
64 "issue18203", // DRC error due to colliding arc and circle
65 "issue18839", // False positive board edge clearance between concentric arcs
66 "unconnected-netnames/unconnected-netnames", // Raised false schematic partity error
67 "net_tie_drc", // Net tie bridging soldermask DRC test
68 "issue24974", // Net-tie graphic copper on last pad, UUID-order-independent exemption
69 "diff_pair_uncoupled_tuning_drc" // Tuning pattern length wrongly counted as uncoupled
70 };
71
72 for( const wxString& relPath : tests )
73 {
74 KI_TEST::LoadBoard( m_settingsManager, relPath, m_board );
75 // Do not refill zones here because this is testing the DRC engine, not the zone filler
76
77 std::vector<DRC_ITEM> violations;
78 BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
79
80 // Disable DRC tests not useful or not handled in this testcase
85 // These DRC tests are not useful and do not work because they need a footprint library
86 // associated to the board
89
91 [&]( const std::shared_ptr<DRC_ITEM>& aItem, const VECTOR2I& aPos, int aLayer,
92 const std::function<void( PCB_MARKER* )>& aPathGenerator )
93 {
94 if( bds.GetSeverity( aItem->GetErrorCode() ) == SEVERITY::RPT_SEVERITY_ERROR )
95 violations.push_back( *aItem );
96 } );
97
98 bds.m_DRCEngine->RunTests( EDA_UNITS::MM, true, false );
99
100 if( violations.empty() )
101 {
102 BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
103 BOOST_TEST_MESSAGE( wxString::Format( "DRC regression: %s, passed", relPath ) );
104 }
105 else
106 {
107 UNITS_PROVIDER unitsProvider( pcbIUScale, EDA_UNITS::INCH );
108
109 wxString report;
110 std::map<KIID, EDA_ITEM*> itemMap;
111 m_board->FillItemMap( itemMap );
112
113 for( const DRC_ITEM& item : violations )
114 report += item.ShowReport( &unitsProvider, RPT_SEVERITY_ERROR, itemMap );
115
116 BOOST_ERROR( wxString::Format( "DRC regression: %s\n"
117 "%d violations found (expected 0)\n"
118 "%s",
119 relPath,
120 (int) violations.size(),
121 report ) );
122 }
123 }
124}
125
126
128{
129 // These documents at one time failed to catch DRC errors that they should have
130
131 std::map<int, SEVERITY> issue19325_ignore, issue22102_ignore;
135
136 std::vector<std::tuple<wxString, int, decltype(BOARD_DESIGN_SETTINGS::m_DRCSeverities)>> tests =
137 {
138 { "issue1358", 2, {} },
139 { "issue2512", 5, {} },
140 { "issue2528", 1, {} },
141 { "issue5750", 4, {} }, // Shorting zone fills pass DRC in some cases
142 { "issue5854", 3, {} },
143 { "issue6879", 6, {} },
144 { "issue6945", 2, {} },
145 { "issue7241", 1, {} },
146 { "issue7267", 5, {} },
147 { "issue7325", 2, {} },
148 { "issue8003", 2, {} },
149 { "issue9081", 2, {} },
150 { "issue12109", 8, {} }, // Pads fail annular width test
151 { "issue14334", 2, {} }, // Thermal spoke to otherwise unconnected island
152 { "issue16566", 6, {} }, // Pad_Shape vs Shape property
153 { "issue18142", 1, {} }, // blind/buried via to micro-via hole-to-hole
154 { "reverse_via", 3, {} }, // Via/track ordering
155 { "intersectingzones", 1, {} }, // zones are too close to each other
156 { "fill_bad", 1, {} }, // zone max BBox was too small
157 { "issue18878", 12, {} }, // Updated: fix reports all cross-net mask bridge pairs
158 { "issue19325/issue19325", 4, issue19325_ignore }, // Overlapping pad annular ring calculation
159 { "issue22102", 2, issue22102_ignore }, // arc-to-rect collision; colocated arcs collision
160 { "issue11814", 2, {} }, // Teardrop clearance to pad
161 };
162
163 for( const auto& [testName, expectedErrors, customSeverities] : tests )
164 {
165 KI_TEST::LoadBoard( m_settingsManager, testName, m_board );
166 // Do not refill zones here because this is testing the DRC engine, not the zone filler
167
168 std::vector<PCB_MARKER> markers;
169 std::vector<DRC_ITEM> violations;
170 BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
171
172 // Disable DRC tests not useful in this testcase
177
178 for(const auto [test, severity] : customSeverities)
179 bds.m_DRCSeverities[test] = severity;
180
182 [&]( const std::shared_ptr<DRC_ITEM>& aItem, const VECTOR2I& aPos, int aLayer,
183 const std::function<void( PCB_MARKER* )>& aPathGenerator )
184 {
185 markers.emplace_back( PCB_MARKER( aItem, aPos ) );
186
187 if( bds.m_DrcExclusions.find( markers.back().SerializeToString() )
188 == bds.m_DrcExclusions.end() )
189 {
190 violations.push_back( *aItem );
191 }
192 } );
193
194 bds.m_DRCEngine->RunTests( EDA_UNITS::MM, true, false );
195
196 if( violations.size() == expectedErrors )
197 {
198 BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
199 BOOST_TEST_MESSAGE( wxString::Format( "DRC regression: %s, passed", testName ) );
200 }
201 else
202 {
203 UNITS_PROVIDER unitsProvider( pcbIUScale, EDA_UNITS::INCH );
204
205 wxString report;
206 std::map<KIID, EDA_ITEM*> itemMap;
207 m_board->FillItemMap( itemMap );
208
209 for( const DRC_ITEM& item : violations )
210 report += item.ShowReport( &unitsProvider, RPT_SEVERITY_ERROR, itemMap );
211
212 BOOST_ERROR( wxString::Format( "DRC regression: %s\n"
213 "%d violations found (expected %d)\n"
214 "%s",
215 testName,
216 (int) violations.size(),
217 expectedErrors,
218 report ) );
219 }
220 }
221}
222
223
224BOOST_FIXTURE_TEST_CASE( DRCZoneFalsePositiveRegressions, DRC_REGRESSION_TEST_FIXTURE )
225{
226 // These documents at one time flagged DRC errors that they shouldn't have.
227 // These tests require zone filling to properly test the DRC checks.
228
229 std::vector<wxString> tests =
230 {
231 "issue19090/issue19090", // Copper graphic shapes count as thermal spoke connections
232 "issue23467/issue23467", // Zones must respect clearance from NPTH pads with no copper layers
233 };
234
235 for( const wxString& relPath : tests )
236 {
237 KI_TEST::LoadBoard( m_settingsManager, relPath, m_board );
238 KI_TEST::FillZones( m_board.get() );
239
240 std::vector<DRC_ITEM> violations;
241 BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
242
243 // Disable DRC tests not useful or not handled in this testcase
249
250 // Ensure starved thermal is enabled for this test
252
254 [&]( const std::shared_ptr<DRC_ITEM>& aItem, const VECTOR2I& aPos, int aLayer,
255 const std::function<void( PCB_MARKER* )>& aPathGenerator )
256 {
257 if( bds.GetSeverity( aItem->GetErrorCode() ) == SEVERITY::RPT_SEVERITY_ERROR )
258 violations.push_back( *aItem );
259 } );
260
261 bds.m_DRCEngine->RunTests( EDA_UNITS::MM, true, false );
262
263 if( violations.empty() )
264 {
265 BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
266 BOOST_TEST_MESSAGE( wxString::Format( "DRC zone regression: %s, passed", relPath ) );
267 }
268 else
269 {
270 UNITS_PROVIDER unitsProvider( pcbIUScale, EDA_UNITS::INCH );
271
272 wxString report;
273 std::map<KIID, EDA_ITEM*> itemMap;
274 m_board->FillItemMap( itemMap );
275
276 for( const DRC_ITEM& item : violations )
277 report += item.ShowReport( &unitsProvider, RPT_SEVERITY_ERROR, itemMap );
278
279 BOOST_ERROR( wxString::Format( "DRC zone regression: %s\n"
280 "%d violations found (expected 0)\n"
281 "%s",
282 relPath,
283 (int) violations.size(),
284 report ) );
285 }
286 }
287}
288
289
291{
292 // A knockout footprint reference designator on a copper layer fills as real copper, so a
293 // teardrop zone of another net overlapping it bridges the two nets. Footprint fields live in
294 // their own list rather than the graphical-items list, so the copper clearance test must reach
295 // them. The board also carries a hidden knockout field bridging the same two zones; hidden
296 // fields render no copper and must not produce a short.
297 // See https://gitlab.com/kicad/code/kicad/-/issues/24649
298
299 KI_TEST::LoadBoard( m_settingsManager, "issue24649", m_board );
300 KI_TEST::FillZones( m_board.get() );
301
302 std::vector<DRC_ITEM> violations;
303 BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
304
305 // The bare test board has unconnected fills by design; suppress checks unrelated to the
306 // short under test.
312
314 [&]( const std::shared_ptr<DRC_ITEM>& aItem, const VECTOR2I&, int,
315 const std::function<void( PCB_MARKER* )>& )
316 {
317 violations.push_back( *aItem );
318 } );
319
320 bds.m_DRCEngine->RunTests( EDA_UNITS::MM, true, false );
321
322 std::map<KIID, EDA_ITEM*> itemMap;
323 m_board->FillItemMap( itemMap );
324
325 auto involvesCopperField =
326 [&]( const DRC_ITEM& aItem )
327 {
328 for( const KIID& id : { aItem.GetMainItemID(), aItem.GetAuxItemID() } )
329 {
330 auto it = itemMap.find( id );
331
332 if( it != itemMap.end() && it->second->Type() == PCB_FIELD_T )
333 return true;
334 }
335
336 return false;
337 };
338
339 int fieldShorts = 0;
340
341 for( const DRC_ITEM& item : violations )
342 {
343 if( item.GetErrorCode() == DRCE_SHORTING_ITEMS && involvesCopperField( item ) )
344 fieldShorts++;
345 }
346
347 if( fieldShorts != 1 )
348 {
349 UNITS_PROVIDER unitsProvider( pcbIUScale, EDA_UNITS::MM );
350
351 for( const DRC_ITEM& item : violations )
352 BOOST_TEST_MESSAGE( item.ShowReport( &unitsProvider, RPT_SEVERITY_ERROR, itemMap ) );
353 }
354
355 // Exactly one short: the visible field bridges the two nets; the hidden field does not.
356 BOOST_CHECK_MESSAGE( fieldShorts == 1,
357 "Expected exactly one shorting-items violation involving a visible "
358 "knockout copper reference field; found "
359 << fieldShorts );
360}
361
362
364{
365 // The hole-to-hole test relaxes its comparison by the DRC epsilon, but it also reported that
366 // relaxed value as the rule minimum, so the violation quoted a different number than the one
367 // entered in Board Setup.
368 // See https://gitlab.com/kicad/code/kicad/-/issues/22267
369
370 KI_TEST::LoadBoard( m_settingsManager, "issue22267", m_board );
371
372 std::vector<DRC_ITEM> violations;
373 BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
374
378
380 [&]( const std::shared_ptr<DRC_ITEM>& aItem, const VECTOR2I&, int,
381 const std::function<void( PCB_MARKER* )>& )
382 {
383 if( aItem->GetErrorCode() == DRCE_DRILLED_HOLES_TOO_CLOSE )
384 violations.push_back( *aItem );
385 } );
386
387 bds.m_DRCEngine->RunTests( EDA_UNITS::MM, true, false );
388
389 BOOST_REQUIRE_MESSAGE( !violations.empty(), "Expected at least one hole-to-hole violation" );
390
391 UNITS_PROVIDER unitsProvider( pcbIUScale, EDA_UNITS::MM );
392 wxString ruleValue = unitsProvider.MessageTextFromValue( bds.m_HoleToHoleMin );
393 wxString relaxedValue = unitsProvider.MessageTextFromValue( bds.m_HoleToHoleMin
394 - bds.GetDRCEpsilon() );
395
396 BOOST_REQUIRE( ruleValue != relaxedValue );
397
398 // Match on the values alone; the surrounding detail text is translated at format time
399 for( const DRC_ITEM& item : violations )
400 {
401 wxString msg = item.GetErrorMessage( false );
402
403 BOOST_CHECK_MESSAGE( msg.Contains( ruleValue ),
404 wxString::Format( "Expected the configured minimum '%s' but got: %s",
405 ruleValue, msg ) );
406
407 BOOST_CHECK_MESSAGE( !msg.Contains( relaxedValue ),
408 wxString::Format( "Reported the epsilon-relaxed minimum '%s': %s",
409 relaxedValue, msg ) );
410 }
411}
constexpr EDA_IU_SCALE pcbIUScale
Definition base_units.h:121
Container for design settings for a BOARD object.
std::map< int, SEVERITY > m_DRCSeverities
std::shared_ptr< DRC_ENGINE > m_DRCEngine
std::set< wxString > m_DrcExclusions
int GetDRCEpsilon() const
Return an epsilon which accounts for rounding errors, etc.
SEVERITY GetSeverity(int aDRCErrorCode)
void RunTests(EDA_UNITS aUnits, bool aReportAllTrackErrors, bool aTestFootprints, BOARD_COMMIT *aCommit=nullptr)
Run the DRC tests.
void SetViolationHandler(DRC_VIOLATION_HANDLER aHandler)
Set an optional DRC violation handler (receives DRC_ITEMs and positions).
Definition drc_engine.h:164
Definition kiid.h:46
wxString MessageTextFromValue(double aValue, bool aAddUnitLabel=true, EDA_DATA_TYPE aType=EDA_DATA_TYPE::DISTANCE) const
A lower-precision version of StringFromValue().
@ DRCE_UNCONNECTED_ITEMS
Definition drc_item.h:37
@ DRCE_LIB_FOOTPRINT_ISSUES
Definition drc_item.h:80
@ DRCE_INVALID_OUTLINE
Definition drc_item.h:70
@ DRCE_STARVED_THERMAL
Definition drc_item.h:47
@ DRCE_TRACK_NOT_CENTERED_ON_VIA
Definition drc_item.h:119
@ DRCE_ISOLATED_COPPER
Definition drc_item.h:46
@ DRCE_DRILLED_HOLES_TOO_CLOSE
Definition drc_item.h:50
@ DRCE_COPPER_SLIVER
Definition drc_item.h:91
@ DRCE_SHORTING_ITEMS
Definition drc_item.h:38
@ DRCE_DANGLING_TRACK
Definition drc_item.h:49
@ DRCE_LIB_FOOTPRINT_MISMATCH
Definition drc_item.h:81
void LoadBoard(SETTINGS_MANAGER &aSettingsManager, const wxString &aRelPath, std::unique_ptr< BOARD > &aBoard)
void FillZones(BOARD *m_board)
@ RPT_SEVERITY_ERROR
@ RPT_SEVERITY_IGNORE
BOOST_FIXTURE_TEST_CASE(DRCFalsePositiveRegressions, DRC_REGRESSION_TEST_FIXTURE)
BOOST_REQUIRE(intersection.has_value()==c.ExpectedIntersection.has_value())
BOOST_TEST_MESSAGE("Polyline has "<< chain.PointCount()<< " points")
BOOST_CHECK_EQUAL(result, "25.4")
@ PCB_FIELD_T
class PCB_FIELD, text associated with a footprint property
Definition typeinfo.h:83
VECTOR2< int32_t > VECTOR2I
Definition vector2d.h:683