KiCad PCB EDA Suite
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test_drc_regressions.cpp
Go to the documentation of this file.
1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you may find one here:
18 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19 * or you may search the http://www.gnu.org website for the version 2 license,
20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
26#include <board.h>
28#include <pad.h>
29#include <pcb_track.h>
30#include <pcb_marker.h>
31#include <footprint.h>
32#include <drc/drc_item.h>
35
36
38{
40 m_settingsManager( true /* headless */ )
41 { }
42
44 std::unique_ptr<BOARD> m_board;
45};
46
47
49{
50 // These documents at one time flagged DRC errors that they shouldn't have.
51
52 std::vector<wxString> tests =
53 {
54 "issue4139", // DRC fails wrongly with minimally-spaced pads at 45 degree
55 "issue4774", // Shape collisions missing SH_POLY_SET
56 "issue5978", // Hole clearance violation with non-copper pad
57 "issue5990", // DRC flags a board edge clearance violation although the clearance is respected
58 "issue6443", // Wrong DRC and rendering of THT pads with selective inner copper layers
59 "issue7567", // DRC constraint to disallow holes gets SMD pads also
60 "issue7975", // Differential pair gap out of range fault by DRC
61 "issue8407", // PCBNEW: Arc for diff pair has clearance DRC error
62 "issue10906", // Soldermask bridge for only one object
63 "issue11814", // Bad cache hit in isInsideArea
64 "issue12609", // Arc collison edge case
65 "issue14412", // Solder mask bridge between pads in a net-tie pad group
66 "issue15280", // Very wide spokes mis-counted as being single spoke
67 "issue14008", // Net-tie clearance error
68 "issue17967/issue17967", // Arc dp coupling
69 "issue18203", // DRC error due to colliding arc and circle
70 "unconnected-netnames/unconnected-netnames", // Raised false schematic partity error
71 };
72
73 for( const wxString& relPath : tests )
74 {
75 KI_TEST::LoadBoard( m_settingsManager, relPath, m_board );
76 // Do not refill zones here because this is testing the DRC engine, not the zone filler
77
78 std::vector<DRC_ITEM> violations;
79 BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
80
81 // Disable DRC tests not useful or not handled in this testcase
86 // These DRC tests are not useful and do not work because they need a footprint library
87 // associated to the board
90
91 bds.m_DRCEngine->SetViolationHandler(
92 [&]( const std::shared_ptr<DRC_ITEM>& aItem, VECTOR2I aPos, int aLayer,
93 DRC_CUSTOM_MARKER_HANDLER* aCustomHandler )
94 {
95 if( bds.GetSeverity( aItem->GetErrorCode() ) == SEVERITY::RPT_SEVERITY_ERROR )
96 violations.push_back( *aItem );
97 } );
98
99 bds.m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
100
101 if( violations.empty() )
102 {
103 BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
104 BOOST_TEST_MESSAGE( wxString::Format( "DRC regression: %s, passed", relPath ) );
105 }
106 else
107 {
109
110 std::map<KIID, EDA_ITEM*> itemMap;
111 m_board->FillItemMap( itemMap );
112
113 for( const DRC_ITEM& item : violations )
114 {
115 BOOST_TEST_MESSAGE( item.ShowReport( &unitsProvider, RPT_SEVERITY_ERROR,
116 itemMap ) );
117 }
118
119 BOOST_ERROR( wxString::Format( "DRC regression: %s, failed (err: expected 0 found %d",
120 relPath, (int)violations.size() ) );
121 }
122 }
123}
124
125
127{
128 // These documents at one time failed to catch DRC errors that they should have
129
130 std::map<int, SEVERITY> issue19325_ignore;
132
133 std::vector<std::tuple<wxString, int, decltype(BOARD_DESIGN_SETTINGS::m_DRCSeverities)>> tests =
134 {
135 { "issue1358", 2, {} },
136 { "issue2512", 5, {} },
137 { "issue2528", 1, {} },
138 { "issue5750", 4, {} }, // Shorting zone fills pass DRC in some cases
139 { "issue5854", 3, {} },
140 { "issue6879", 6, {} },
141 { "issue6945", 2, {} },
142 { "issue7241", 1, {} },
143 { "issue7267", 5, {} },
144 { "issue7325", 4, {} },
145 { "issue8003", 2, {} },
146 { "issue9081", 2, {} },
147 { "issue12109", 8, {} }, // Pads fail annular width test
148 { "issue14334", 2, {} }, // Thermal spoke to otherwise unconnected island
149 { "issue16566", 6, {} }, // Pad_Shape vs Shape property
150 { "issue18142", 1, {} }, // blind/buried via to micro-via hole-to-hole
151 { "reverse_via", 3, {} }, // Via/track ordering
152 { "intersectingzones", 1, {} }, // zones are too close to each other
153 { "fill_bad", 1, {} }, // zone max BBox was too small
154 { "issue18878", 9, {} },
155 { "issue19325/issue19325", 4, issue19325_ignore }, // Overlapping pad annular ring calculation
156 };
157
158 for( const auto& [testName, expectedErrors, customSeverities] : tests )
159 {
160 BOOST_TEST_CONTEXT( testName )
161 {
162 KI_TEST::LoadBoard( m_settingsManager, testName, m_board );
163 // Do not refill zones here because this is testing the DRC engine, not the zone filler
164
165 std::vector<PCB_MARKER> markers;
166 std::vector<DRC_ITEM> violations;
167 BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
168
169 // Disable DRC tests not useful in this testcase
173
174 for(const auto [test, severity] : customSeverities)
175 bds.m_DRCSeverities[test] = severity;
176
177 bds.m_DRCEngine->SetViolationHandler(
178 [&]( const std::shared_ptr<DRC_ITEM>& aItem, VECTOR2I aPos, int aLayer,
179 DRC_CUSTOM_MARKER_HANDLER* aCustomHandler )
180 {
181 markers.emplace_back( PCB_MARKER( aItem, aPos ) );
182
183 if( bds.m_DrcExclusions.find( markers.back().SerializeToString() )
184 == bds.m_DrcExclusions.end() )
185 {
186 violations.push_back( *aItem );
187 }
188 } );
189
190 bds.m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
191
192 if( violations.size() == expectedErrors )
193 {
194 BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
195 BOOST_TEST_MESSAGE( wxString::Format( "DRC regression: %s, passed", testName ) );
196 }
197 else
198 {
200
201 std::map<KIID, EDA_ITEM*> itemMap;
202 m_board->FillItemMap( itemMap );
203
204 for( const DRC_ITEM& item : violations )
205 {
206 BOOST_TEST_MESSAGE(
207 item.ShowReport( &unitsProvider, RPT_SEVERITY_ERROR, itemMap ) );
208 }
209
210 BOOST_CHECK_EQUAL( violations.size(), expectedErrors );
211
212 BOOST_ERROR( wxString::Format( "DRC regression: %s, failed", testName ) );
213 }
214 }
215 }
216}
constexpr EDA_IU_SCALE pcbIUScale
Definition: base_units.h:108
Container for design settings for a BOARD object.
std::map< int, SEVERITY > m_DRCSeverities
std::shared_ptr< DRC_ENGINE > m_DRCEngine
std::set< wxString > m_DrcExclusions
SEVERITY GetSeverity(int aDRCErrorCode)
std::function< void(PCB_MARKER *aMarker)> DRC_CUSTOM_MARKER_HANDLER
Definition: drc_engine.h:69
@ DRCE_UNCONNECTED_ITEMS
Definition: drc_item.h:39
@ DRCE_LIB_FOOTPRINT_ISSUES
Definition: drc_item.h:82
@ DRCE_INVALID_OUTLINE
Definition: drc_item.h:72
@ DRCE_STARVED_THERMAL
Definition: drc_item.h:49
@ DRCE_DRILLED_HOLES_TOO_CLOSE
Definition: drc_item.h:52
@ DRCE_COPPER_SLIVER
Definition: drc_item.h:92
@ DRCE_LIB_FOOTPRINT_MISMATCH
Definition: drc_item.h:83
void LoadBoard(SETTINGS_MANAGER &aSettingsManager, const wxString &aRelPath, std::unique_ptr< BOARD > &aBoard)
@ RPT_SEVERITY_ERROR
@ RPT_SEVERITY_IGNORE
BOOST_FIXTURE_TEST_CASE(DRCFalsePositiveRegressions, DRC_REGRESSION_TEST_FIXTURE)