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KiCad PCB EDA Suite
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Creepage DRC test with HV/GND netclass constraints. More...
#include <qa_utils/wx_utils/unit_test_utils.h>#include <pcbnew_utils/board_test_utils.h>#include <board.h>#include <board_design_settings.h>#include <drc/drc_item.h>#include <drc/drc_engine.h>#include <settings/settings_manager.h>#include <widgets/report_severity.h>Go to the source code of this file.
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| struct | DRC_CREEPAGE_TEST_FIXTURE |
Functions | |
| BOOST_FIXTURE_TEST_CASE (CreepageHVvsGND, DRC_CREEPAGE_TEST_FIXTURE) | |
Creepage DRC test with HV/GND netclass constraints.
The board has an HV trace running near a GND trace. The custom rule requires 8mm creepage between HV and GND netclasses, but the actual surface distance is ~3.25mm.
Definition in file test_drc_creepage.cpp.
| BOOST_FIXTURE_TEST_CASE | ( | CreepageHVvsGND | , |
| DRC_CREEPAGE_TEST_FIXTURE | ) |
Definition at line 64 of file test_drc_creepage.cpp.
References BOOST_TEST_MESSAGE(), DRC_ENGINE::ClearViolationHandler(), DRCE_CREEPAGE, DRCE_FIRST, DRCE_LAST, BOARD_DESIGN_SETTINGS::GetSeverity(), KI_TEST::LoadBoard(), BOARD_DESIGN_SETTINGS::m_DRCEngine, BOARD_DESIGN_SETTINGS::m_DRCSeverities, MM, RPT_SEVERITY_ERROR, RPT_SEVERITY_IGNORE, DRC_ENGINE::RunTests(), and DRC_ENGINE::SetViolationHandler().