KiCad PCB EDA Suite
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test_drc_creepage.cpp File Reference

Creepage DRC test with HV/GND netclass constraints. More...

Go to the source code of this file.

Classes

struct  DRC_CREEPAGE_TEST_FIXTURE
 

Functions

 BOOST_FIXTURE_TEST_CASE (CreepageHVvsGND, DRC_CREEPAGE_TEST_FIXTURE)
 
 BOOST_FIXTURE_TEST_CASE (CreepageMalformedEdge, DRC_CREEPAGE_TEST_FIXTURE)
 Regression test for https://gitlab.com/kicad/code/kicad/-/issues/23653.
 

Detailed Description

Creepage DRC test with HV/GND netclass constraints.

The board has an HV trace running near a GND trace. The custom rule requires 8mm creepage between HV and GND netclasses, but the actual surface distance is ~3.25mm.

Definition in file test_drc_creepage.cpp.

Function Documentation

◆ BOOST_FIXTURE_TEST_CASE() [1/2]

◆ BOOST_FIXTURE_TEST_CASE() [2/2]

BOOST_FIXTURE_TEST_CASE ( CreepageMalformedEdge ,
DRC_CREEPAGE_TEST_FIXTURE  )

Regression test for https://gitlab.com/kicad/code/kicad/-/issues/23653.

A board with an extra line on Edge.Cuts that prevents GetBoardPolygonOutlines from forming a valid polygon should still produce creepage violations. Previously the creepage test bailed out entirely when the outline was malformed.

Definition at line 110 of file test_drc_creepage.cpp.

References BOOST_TEST_MESSAGE(), DRC_ENGINE::ClearViolationHandler(), DRCE_CREEPAGE, DRCE_FIRST, DRCE_LAST, BOARD_DESIGN_SETTINGS::GetSeverity(), KI_TEST::LoadBoard(), BOARD_DESIGN_SETTINGS::m_DRCEngine, BOARD_DESIGN_SETTINGS::m_DRCSeverities, MM, RPT_SEVERITY_ERROR, RPT_SEVERITY_IGNORE, DRC_ENGINE::RunTests(), and DRC_ENGINE::SetViolationHandler().