KiCad PCB EDA Suite
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netlist_exporter_spice.h
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 1992-2013 jp.charras at wanadoo.fr
5 * Copyright (C) 2013 SoftPLC Corporation, Dick Hollenbeck <[email protected]>
6 * Copyright The KiCad Developers, see AUTHORS.TXT for contributors.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <https://www.gnu.org/licenses/>.
20 */
21
22#ifndef NETLIST_EXPORTER_SPICE_H
23#define NETLIST_EXPORTER_SPICE_H
24
26#include <sim/sim_lib_mgr.h>
27#include <sim/sim_library.h>
28#include <sim/sim_model.h>
30#include <sim/spice_generator.h>
31
32#include <list>
33
34
35class wxWindow;
36
37// Test-only access seam for the private multi-unit helpers (see qa/tests/spice).
39
40
42{
43public:
44 std::string Generate( const std::string& aProposedName );
45
47 void Clear() { m_names.clear(); }
48
49private:
50 std::unordered_set<std::string> m_names;
51};
52
53
55{
56public:
58
76
77 NETLIST_EXPORTER_SPICE( SCHEMATIC* aSchematic, KIWAY* aKiway );
78
82 bool writeNetlist( const wxString& aOutFileName, unsigned aNetlistOptions,
83 REPORTER& aReporter ) override;
84
88 bool DoWriteNetlist( const wxString& aSimCommand, unsigned aSimOptions,
89 OUTPUTFORMATTER& aFormatter, REPORTER& aReporter );
90
94 virtual void WriteHead( OUTPUTFORMATTER& aFormatter, unsigned aNetlistOptions );
95
99 virtual void WriteTail( OUTPUTFORMATTER& aFormatter, unsigned aNetlistOptions );
100
107 virtual bool ReadSchematicAndLibraries( unsigned aNetlistOptions, REPORTER& aReporter );
108
113 static void ConvertToSpiceMarkup( wxString* aNetName );
114
118 std::set<wxString> GetNets() const { return m_nets; }
119
129 wxString GetItemName( const wxString& aRefName ) const;
130
134 const std::list<SPICE_ITEM>& GetItems() const { return m_items; }
135
139 const SPICE_ITEM* FindItem( const wxString& aRefName ) const;
140
141 const std::vector<wxString>& GetDirectives() { return m_directives; }
142
143protected:
144 void ReadDirectives( unsigned aNetlistOptions );
145 virtual void WriteDirectives( const wxString& aSimCommand, unsigned aSimOptions,
146 OUTPUTFORMATTER& candidate ) const;
147
148 virtual wxString GenerateItemPinNetName( const wxString& aNetName, int& aNcCounter ) const;
149
153 SCH_SHEET_LIST BuildSheetList( unsigned aNetlistOptions = 0 ) const;
154
155private:
156 void readRefName( SCH_SHEET_PATH& aSheet, SCH_SYMBOL& aSymbol, SPICE_ITEM& aItem,
157 std::set<std::string>& aRefNames );
158
171 wxString collectMergedSimPins( SCH_SYMBOL& aSymbol, const SCH_SHEET_PATH& aSheet,
172 const wxString& aVariantName );
173
186 std::vector<UNIT_PIN_MAP> collectUnitPinMaps( SCH_SYMBOL& aSymbol, const SCH_SHEET_PATH& aSheet,
187 const wxString& aVariantName );
188
196 const wxString& aVariantName ) const;
197
198 void readModel( SCH_SHEET_PATH& aSheet, SCH_SYMBOL& aSymbol, SPICE_ITEM& aItem,
199 const wxString& aVariantName, REPORTER& aReporter );
200 void readPinNumbers( SCH_SYMBOL& aSymbol, SPICE_ITEM& aItem,
201 const std::vector<PIN_INFO>& aPins );
202 void readPinNetNames( SCH_SYMBOL& aSymbol, SPICE_ITEM& aItem,
203 const std::vector<PIN_INFO>& aPins, int& aNcCounter );
204 void getNodePattern( SPICE_ITEM& aItem, std::vector<std::string>& aModifiers );
205 void readNodePattern( SPICE_ITEM& aItem );
206
207 void writeInclude( OUTPUTFORMATTER& aFormatter, unsigned aNetlistOptions,
208 const wxString& aPath );
209
210 void writeIncludes( OUTPUTFORMATTER& aFormatter, unsigned aNetlistOptions );
211 void writeModels( OUTPUTFORMATTER& aFormatter );
212 void writeItems( OUTPUTFORMATTER& aFormatter );
213
214private:
217
218 std::vector<wxString> m_directives;
219 std::set<wxString> m_rawIncludes;
220 std::set<wxString> m_nets;
221
223 std::list<SPICE_ITEM> m_items;
224
226 std::vector<std::unique_ptr<SIM_MODEL_MULTIUNIT>> m_multiunitModels;
227};
228
229
230#endif // NETLIST_EXPORTER_SPICE_H
A minimalistic software bus for communications between various DLLs/DSOs (DSOs) within the same KiCad...
Definition kiway.h:348
std::unordered_set< std::string > m_names
std::string Generate(const std::string &aProposedName)
void Clear()
Forget every previously generated name so a reused exporter starts each netlist clean.
NETLIST_EXPORTER_BASE(SCHEMATIC *aSchematic, KIWAY *aKiway)
NETLIST_EXPORTER_SPICE(SCHEMATIC *aSchematic, KIWAY *aKiway)
void readPinNetNames(SCH_SYMBOL &aSymbol, SPICE_ITEM &aItem, const std::vector< PIN_INFO > &aPins, int &aNcCounter)
void writeModels(OUTPUTFORMATTER &aFormatter)
void writeIncludes(OUTPUTFORMATTER &aFormatter, unsigned aNetlistOptions)
std::list< SPICE_ITEM > m_items
Items representing schematic symbols in Spice world.
void getNodePattern(SPICE_ITEM &aItem, std::vector< std::string > &aModifiers)
static void ConvertToSpiceMarkup(wxString *aNetName)
Convert an escaped schematic net name to SPICE, preserving literal slashes when mapping ground names.
void ReadDirectives(unsigned aNetlistOptions)
SCH_SHEET_LIST BuildSheetList(unsigned aNetlistOptions=0) const
Return the paths of exported sheets (either all or the current one).
virtual wxString GenerateItemPinNetName(const wxString &aNetName, int &aNcCounter) const
void readRefName(SCH_SHEET_PATH &aSheet, SCH_SYMBOL &aSymbol, SPICE_ITEM &aItem, std::set< std::string > &aRefNames)
wxString GetItemName(const wxString &aRefName) const
Return name of Spice device corresponding to a schematic symbol.
void writeItems(OUTPUTFORMATTER &aFormatter)
std::vector< wxString > m_directives
Spice directives found in the schematic sheet.
virtual void WriteHead(OUTPUTFORMATTER &aFormatter, unsigned aNetlistOptions)
Write the netlist head (title and so on).
const std::vector< wxString > & GetDirectives()
bool writeNetlist(const wxString &aOutFileName, unsigned aNetlistOptions, REPORTER &aReporter) override
Write to specified output file.
void writeInclude(OUTPUTFORMATTER &aFormatter, unsigned aNetlistOptions, const wxString &aPath)
std::set< wxString > GetNets() const
Return the list of nets.
virtual void WriteDirectives(const wxString &aSimCommand, unsigned aSimOptions, OUTPUTFORMATTER &candidate) const
wxString collectMergedSimPins(SCH_SYMBOL &aSymbol, const SCH_SHEET_PATH &aSheet, const wxString &aVariantName)
Collect merged Sim.Pins from all units of a multi-unit symbol.
SIM_LIB_MGR m_libMgr
Holds libraries and models.
const SPICE_ITEM * FindItem(const wxString &aRefName) const
Find and return the item corresponding to aRefName.
virtual bool ReadSchematicAndLibraries(unsigned aNetlistOptions, REPORTER &aReporter)
Process the schematic and Spice libraries to create net mapping and a list of SPICE_ITEMs.
SIM_DECOMPOSITION getDecomposition(SCH_SYMBOL &aSymbol, const SCH_SHEET_PATH &aSheet, const wxString &aVariantName) const
Read and parse the Sim.Decomposition field from the primary unit.
bool DoWriteNetlist(const wxString &aSimCommand, unsigned aSimOptions, OUTPUTFORMATTER &aFormatter, REPORTER &aReporter)
Write the netlist in aFormatter.
void readPinNumbers(SCH_SYMBOL &aSymbol, SPICE_ITEM &aItem, const std::vector< PIN_INFO > &aPins)
const std::list< SPICE_ITEM > & GetItems() const
Return the list of items representing schematic symbols in the Spice world.
void readNodePattern(SPICE_ITEM &aItem)
std::set< wxString > m_rawIncludes
include directives found in symbols
void readModel(SCH_SHEET_PATH &aSheet, SCH_SYMBOL &aSymbol, SPICE_ITEM &aItem, const wxString &aVariantName, REPORTER &aReporter)
virtual void WriteTail(OUTPUTFORMATTER &aFormatter, unsigned aNetlistOptions)
Write the tail (.end).
NAME_GENERATOR m_modelNameGenerator
Generates unique model names.
std::vector< std::unique_ptr< SIM_MODEL_MULTIUNIT > > m_multiunitModels
Owns the synthesized repeat-per-unit wrappers referenced by m_items.
std::vector< UNIT_PIN_MAP > collectUnitPinMaps(SCH_SYMBOL &aSymbol, const SCH_SHEET_PATH &aSheet, const wxString &aVariantName)
Gather every unit's Sim.Pins mapping for a multi-unit symbol, one entry per unit.
An interface used to output 8 bit text in a convenient way.
Definition richio.h:294
A pure virtual class used to derive REPORTER objects from.
Definition reporter.h:73
Holds all the data relating to one schematic.
Definition schematic.h:149
A container for handling SCH_SHEET_PATH objects in a flattened hierarchy.
Handle access to a stack of flattened SCH_SHEET objects by way of a path for creating a flattened sch...
Schematic symbol object.
Definition sch_symbol.h:73
Per-component decomposition descriptor stored in the Sim.Decomposition field.