KiCad PCB EDA Suite
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test_ngspice_helpers.cpp
Go to the documentation of this file.
1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2020 S.Kocjan <[email protected]>
5 * Copyright The KiCad Developers, see AUTHORS.TXT for contributors.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <https://www.gnu.org/licenses/>.
19 */
20
25
26#include <string.h>
28#include <vector>
29#include <wx/string.h>
30
31// Code under test
32#include <project.h>
33#include <schematic.h>
36#include <sim/spice_simulator.h>
37
39{
40public:
42 m_schematic( nullptr ),
44 {
45 m_manager.LoadProject( "" );
46 m_schematic.SetProject( &m_manager.Prj() );
47 }
48
50 {
51 m_schematic.Reset();
52 }
53
55
57
59};
60
61
65BOOST_FIXTURE_TEST_SUITE( NgspiceCircuitModel, TEST_NGSPICE_HELPERS )
66
67
68
71BOOST_AUTO_TEST_CASE( CommandToSimType )
72{
73 struct TEST_DATA
74 {
75 wxString command;
76 SIM_TYPE type;
77 };
78
79 std::vector<struct TEST_DATA> testData = {
80 { ".op", ST_OP },
81 { ".option TEMP=27", ST_UNKNOWN },
82 { ".tran 0 1 0.1", ST_TRAN },
83 { ".tran 0 1 0.1 UIC", ST_TRAN },
84 { ".ac dec 10 1 10K", ST_AC },
85 { ".ac dec 10 1K 100MEG", ST_AC },
86 { ".ac lin 100 1 100HZ", ST_AC },
87 { ".dc VIN 0.25 5.0 0.25", ST_DC },
88 { ".dc VDS 0 10 .5 VGS 0 5 1", ST_DC },
89 { ".dc VCE 0 10 .25 IB 0 10u 1u", ST_DC },
90 { ".dc RLoad 1k 2k 100", ST_DC },
91 { ".dc TEMP -15 75 5", ST_DC },
92 { ".disto dec 10 1kHz 100MEG", ST_DISTO },
93 { ".disto dec 10 1kHz 100MEG 0.9", ST_DISTO },
94 { ".noise v(5) VIN dec 10 1kHz 100MEG", ST_NOISE },
95 { ".noise v(5,3) V1 oct 8 1.0 1.0e6 1", ST_NOISE },
96 { ".pz 1 0 3 0 cur pol", ST_PZ },
97 { ".pz 2 3 5 0 vol zer", ST_PZ },
98 { ".pz 4 1 4 1 cur pz", ST_PZ },
99 { ".SENS V(1,OUT)", ST_SENS },
100 { ".SENS V(OUT) AC DEC 10 100 100k", ST_SENS },
101 { ".SENS I(VTEST)", ST_SENS },
102 { ".tf v(5, 3) VIN", ST_TF },
103 { ".tf i(VLOAD) VIN", ST_TF },
104 };
105
106 for( auto& step : testData )
107 {
109
110 BOOST_CHECK_EQUAL( result, step.type );
111 }
112
113 for( auto& step : testData )
114 {
115 step.command.Append( "\n" );
117
118 BOOST_CHECK_EQUAL( result, step.type );
119 }
120}
121
122
126BOOST_AUTO_TEST_CASE( VectorToSignal )
127{
128 struct TEST_DATA
129 {
130 std::string vector;
131 wxString signal;
132 SIM_TRACE_TYPE type;
133 };
134
135 std::vector<struct TEST_DATA> testData = {
136 { "@c3[i]", "I(C3)", SPT_CURRENT },
137 { "@r12[i]", "I(R12)", SPT_CURRENT },
138 { "@r7[i]", "I(R7)", SPT_CURRENT },
139 { "@l2[i]", "I(L2)", SPT_CURRENT },
140 { "@c2[i]", "I(C2)", SPT_CURRENT },
141 { "@r6[i]", "I(R6)", SPT_CURRENT },
142 { "@r5[i]", "I(R5)", SPT_CURRENT },
143 { "@r10[i]", "I(R10)", SPT_CURRENT },
144 { "@q3[ie]", "Ie(Q3)", SPT_CURRENT },
145 { "@q3[ic]", "Ic(Q3)", SPT_CURRENT },
146 { "@q3[ib]", "Ib(Q3)", SPT_CURRENT },
147 { "@r11[i]", "I(R11)", SPT_CURRENT },
148 { "@r8[i]", "I(R8)", SPT_CURRENT },
149 { "@q1[ie]", "Ie(Q1)", SPT_CURRENT },
150 { "@q1[ic]", "Ic(Q1)", SPT_CURRENT },
151 { "@q1[ib]", "Ib(Q1)", SPT_CURRENT },
152 { "@r1[i]", "I(R1)", SPT_CURRENT },
153 { "@l1[i]", "I(L1)", SPT_CURRENT },
154 { "@c4[i]", "I(C4)", SPT_CURRENT },
155 { "@r2[i]", "I(R2)", SPT_CURRENT },
156 { "@q2[ig]", "Ig(Q2)", SPT_CURRENT },
157 { "@q2[id]", "Id(Q2)", SPT_CURRENT },
158 { "@q2[is]", "Is(Q2)", SPT_CURRENT },
159 { "@v2[i]", "I(V2)", SPT_CURRENT },
160 { "@r9[i]", "I(R9)", SPT_CURRENT },
161 { "@c1[i]", "I(C1)", SPT_CURRENT },
162 { "@v1[i]", "I(V1)", SPT_CURRENT },
163 { "@r3[i]", "I(R3)", SPT_CURRENT },
164 { "@r4[i]", "I(R4)", SPT_CURRENT },
165 { "vout", "V(vout)", SPT_VOLTAGE },
166 { "net-_q3-pad2_", "V(net-_q3-pad2_)", SPT_VOLTAGE },
167 { "net-_q2-pad3_", "V(net-_q2-pad3_)", SPT_VOLTAGE },
168 { "net-_q2-pad1_", "V(net-_q2-pad1_)", SPT_VOLTAGE },
169 { "net-_q1-pad3_", "V(net-_q1-pad3_)", SPT_VOLTAGE },
170 { "net-_l2-pad1_", "V(net-_l2-pad1_)", SPT_VOLTAGE },
171 { "net-_c4-pad2_", "V(net-_c4-pad2_)", SPT_VOLTAGE },
172 { "net-_c3-pad1_", "V(net-_c3-pad1_)", SPT_VOLTAGE },
173 { "net-_c1-pad2_", "V(net-_c1-pad2_)", SPT_VOLTAGE },
174 { "/vin", "V(/vin)", SPT_VOLTAGE },
175 { "/vbase", "V(/vbase)", SPT_VOLTAGE },
176 { "+12v", "V(+12v)", SPT_VOLTAGE },
177 { "@m1[cgs]", "", SPT_UNKNOWN },
178 { "@d1[g11]", "", SPT_UNKNOWN },
179 { "@d1[c12]", "", SPT_UNKNOWN },
180 { "@d1[y21]", "", SPT_UNKNOWN },
181 { "@n1[vth0]", "", SPT_UNKNOWN },
182 { "@mn1[gm]", "", SPT_UNKNOWN },
183 { "@m.xmos1.xmos2.m1[vdsat]", "", SPT_UNKNOWN }
184 };
185
186 for( auto& step : testData )
187 {
188 wxString outputSignalName;
189 SIM_TRACE_TYPE retVal;
190
191 retVal = m_exporter.VectorToSignal( step.vector, outputSignalName );
192
193 BOOST_CHECK_EQUAL( retVal, step.type );
194 BOOST_CHECK_EQUAL( outputSignalName.Cmp( step.signal ), 0 );
195 }
196}
197
198
200{
201 struct TEST_DATA
202 {
203 SIM_TYPE type;
204 wxString shortName;
205 wxString longName;
206 };
207
208 std::vector<struct TEST_DATA> testData = {
209 { ST_OP, wxT( "OP" ), _( "DC Operating Point" ) },
210 { ST_AC, wxT( "AC" ), _( "Small-Signal Analysis" ) },
211 { ST_DC, wxT( "DC" ), _( "DC Sweep Analysis" ) },
212 { ST_TRAN, wxT( "TRAN" ), _( "Transient Analysis" ) },
213 { ST_NOISE, wxT( "NOISE" ), _( "Noise Analysis" ) },
214 { ST_PZ, wxT( "PZ" ), _( "Pole-Zero Analysis" ) },
215 { ST_TF, wxT( "TF" ), _( "Transfer Function Analysis" ) },
216 { ST_SP, wxT( "SP" ), _( "S-Parameter Analysis" ) },
217 { ST_FFT, wxT( "FFT" ), _( "Frequency Content Analysis" ) },
218 { ST_UNKNOWN, wxT( "Custom" ), _( "Custom" ) },
219 };
220
221 for( auto& step : testData )
222 {
223 BOOST_CHECK_EQUAL( SPICE_SIMULATOR::TypeToName( step.type, true ), step.shortName );
224 BOOST_CHECK_EQUAL( SPICE_SIMULATOR::TypeToName( step.type, false ), step.longName );
225 }
226}
227
228
Holds all the data relating to one schematic.
Definition schematic.h:90
Special netlist exporter flavor that allows one to override simulation commands.
static SIM_TYPE CommandToSimType(const wxString &aCmd)
Return simulation type basing on a simulation command directive.
static wxString TypeToName(SIM_TYPE aType, bool aShortName)
Return a string with simulation name based on enum.
SPICE_CIRCUIT_MODEL m_exporter
#define _(s)
SIM_TRACE_TYPE
Definition sim_types.h:46
@ SPT_UNKNOWN
Definition sim_types.h:63
@ SPT_VOLTAGE
Definition sim_types.h:48
@ SPT_CURRENT
Definition sim_types.h:49
SIM_TYPE
< Possible simulation types
Definition sim_types.h:28
@ ST_SP
Definition sim_types.h:39
@ ST_TRAN
Definition sim_types.h:38
@ ST_UNKNOWN
Definition sim_types.h:29
@ ST_NOISE
Definition sim_types.h:33
@ ST_AC
Definition sim_types.h:30
@ ST_DISTO
Definition sim_types.h:32
@ ST_TF
Definition sim_types.h:37
@ ST_SENS
Definition sim_types.h:36
@ ST_DC
Definition sim_types.h:31
@ ST_OP
Definition sim_types.h:34
@ ST_FFT
Definition sim_types.h:40
@ ST_PZ
Definition sim_types.h:35
BOOST_AUTO_TEST_CASE(HorizontalAlignment)
BOOST_AUTO_TEST_SUITE_END()
BOOST_AUTO_TEST_CASE(CommandToSimType)
Declare the test suite.
wxString result
Test unit parsing edge cases and error handling.
BOOST_CHECK_EQUAL(result, "25.4")