#include <cadstar_pcb_archive_parser.h>

Inheritance diagram for CADSTAR_PCB_ARCHIVE_PARSER::SPACINGCODE:

Classes
struct	REASSIGN

Public Member Functions
void	Parse (XNODE aNode, PARSER_CONTEXT aContext) override

Public Attributes
SPACINGCODE_ID	ID
	Possible spacing rules:

long	Spacing

std::vector< REASSIGN >	Reassigns
	Can have different spacings on different layers.

Detailed Description

Definition at line 211 of file cadstar_pcb_archive_parser.h.

Member Function Documentation

◆ Parse()

void CADSTAR_PCB_ARCHIVE_PARSER::SPACINGCODE::Parse	(	XNODE *	aNode,
		PARSER_CONTEXT *	aContext
	)

overridevirtual

Implements CADSTAR_ARCHIVE_PARSER::PARSER.

Definition at line 636 of file cadstar_pcb_archive_parser.cpp.

References XNODE::GetChildren(), XNODE::GetNext(), CADSTAR_ARCHIVE_PARSER::GetXmlAttributeIDLong(), CADSTAR_ARCHIVE_PARSER::GetXmlAttributeIDString(), ID, CADSTAR_PCB_ARCHIVE_PARSER::SPACINGCODE::REASSIGN::Parse(), and THROW_UNKNOWN_NODE_IO_ERROR.

Referenced by CADSTAR_PCB_ARCHIVE_PARSER::RULESET::Parse(), and CADSTAR_PCB_ARCHIVE_PARSER::CODEDEFS_PCB::Parse().

Member Data Documentation

◆ ID

SPACINGCODE_ID CADSTAR_PCB_ARCHIVE_PARSER::SPACINGCODE::ID

Possible spacing rules:

A_A = Component Placement to Component Placement
C_B = Copper to Board
C_C = Copper to Copper
H_H = Hole to Hole
OT_P = Optimal Route to Pad (Optional Rule)
OT_T = Optimal Route to Route (Optional Rule)
OT_V = Optimal Route to Via (Optional Rule)
P_B = Pad to Board
P_C = Pad to Copper
P_P = Pad to Pad
P_S = Pad to SMD pad (Optional Rule)
P_V = Pad to Via
T_B = Route to Board outline
T_C = Route to Copper
T_P = Route to Pad
T_T = Route to Route
T_S = Route to SMD Pad (Optional Rule)
T_V = Route to Via
S_B = SMD Pad to Board (Optional Rule)
S_C = SMD Pad to Copper (Optional Rule)
S_S = SMD Pad to SMD Pad (Optional Rule)
L_B = Test Land to Board
L_O = Test Land to Component
L_L = Test Land to Test Land
V_B = Via to Board
V_C = Via to Copper
V_S = Via to SMD Pad (Optional Rule)
V_V = Via to Via

Other design rules are in: TECHNOLOGY->MAXMITER = Maximum Mitre (This parameter is not actually checked in Cadstar) TECHNOLOGY->MINMITER = Minimum Mitre (This parameter is not actually checked in Cadstar) TECHNOLOGY->MINUNNECKED = Minimum Thicker Track Length TECHNOLOGY->MINNECKED = Minimum Thinner Track Length TECHNOLOGY->MINROUTEWIDTH = Thin Route Width

Definition at line 259 of file cadstar_pcb_archive_parser.h.

Referenced by CADSTAR_PCB_ARCHIVE_PARSER::RULESET::Parse(), and CADSTAR_PCB_ARCHIVE_PARSER::CODEDEFS_PCB::Parse().