Public Member Functions | |
def | __init__ (self, *args) |
"bool" | LoadFromFile (self, *args) |
"BOARD_STACKUP const &" | GetStackupDescriptor (self, *args) |
"SEVERITY" | GetSeverity (self, "int" aDRCErrorCode) |
"bool" | Ignore (self, "int" aDRCErrorCode) |
"NETCLASSES &" | GetNetClasses (self) |
"void" | SetNetClasses (self, "NETCLASSES" aNetClasses) |
"ZONE_SETTINGS &" | GetDefaultZoneSettings (self) |
"void" | SetDefaultZoneSettings (self, "ZONE_SETTINGS" aSettings) |
"NETCLASS *" | GetDefault (self) |
"wxString const &" | GetCurrentNetClassName (self) |
"bool" | UseNetClassTrack (self) |
"bool" | UseNetClassVia (self) |
"bool" | UseNetClassDiffPair (self) |
"int" | GetBiggestClearanceValue (self) |
"int" | GetSmallestClearanceValue (self) |
"int" | GetCurrentMicroViaSize (self) |
"int" | GetCurrentMicroViaDrill (self) |
"unsigned int" | GetTrackWidthIndex (self) |
"void" | SetTrackWidthIndex (self, "unsigned int" aIndex) |
"int" | GetCurrentTrackWidth (self) |
"void" | SetCustomTrackWidth (self, "int" aWidth) |
"int" | GetCustomTrackWidth (self) |
"unsigned int" | GetViaSizeIndex (self) |
"void" | SetViaSizeIndex (self, "unsigned int" aIndex) |
"int" | GetCurrentViaSize (self) |
"void" | SetCustomViaSize (self, "int" aSize) |
"int" | GetCustomViaSize (self) |
"int" | GetCurrentViaDrill (self) |
"void" | SetCustomViaDrill (self, "int" aDrill) |
"int" | GetCustomViaDrill (self) |
"bool" | UseCustomTrackViaSize (self, *args) |
"unsigned int" | GetDiffPairIndex (self) |
"void" | SetDiffPairIndex (self, "unsigned int" aIndex) |
"void" | SetCustomDiffPairWidth (self, "int" aWidth) |
"int" | GetCustomDiffPairWidth (self) |
"void" | SetCustomDiffPairGap (self, "int" aGap) |
"int" | GetCustomDiffPairGap (self) |
"void" | SetCustomDiffPairViaGap (self, "int" aGap) |
"int" | GetCustomDiffPairViaGap (self) |
"bool" | UseCustomDiffPairDimensions (self, *args) |
"int" | GetCurrentDiffPairWidth (self) |
"int" | GetCurrentDiffPairGap (self) |
"int" | GetCurrentDiffPairViaGap (self) |
"void" | SetMinHoleSeparation (self, "int" aDistance) |
"void" | SetCopperEdgeClearance (self, "int" aDistance) |
"void" | SetSilkClearance (self, "int" aDistance) |
"LSET" | GetEnabledLayers (self) |
"void" | SetEnabledLayers (self, "LSET" aMask) |
"bool" | IsLayerEnabled (self, "PCB_LAYER_ID" aLayerId) |
"int" | GetCopperLayerCount (self) |
"void" | SetCopperLayerCount (self, "int" aNewLayerCount) |
"int" | GetBoardThickness (self) |
"void" | SetBoardThickness (self, "int" aThickness) |
"int" | GetDRCEpsilon (self) |
"int" | GetHolePlatingThickness (self) |
"int" | GetLineThickness (self, "PCB_LAYER_ID" aLayer) |
"wxSize" | GetTextSize (self, "PCB_LAYER_ID" aLayer) |
"int" | GetTextThickness (self, "PCB_LAYER_ID" aLayer) |
"bool" | GetTextItalic (self, "PCB_LAYER_ID" aLayer) |
"bool" | GetTextUpright (self, "PCB_LAYER_ID" aLayer) |
"int" | GetLayerClass (self, "PCB_LAYER_ID" aLayer) |
"void" | SetAuxOrigin (self, "wxPoint" aOrigin) |
"wxPoint const &" | GetAuxOrigin (self) |
"void" | SetGridOrigin (self, "wxPoint" aOrigin) |
"wxPoint const &" | GetGridOrigin (self) |
"void" | CloneFrom (self, "BOARD_DESIGN_SETTINGS" aOther) |
Properties | |
thisown = property(lambda x: x.this.own(), lambda x, v: x.this.own(v), doc="The membership flag") | |
m_TrackWidthList = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TrackWidthList_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TrackWidthList_set, doc=) | |
m_ViasDimensionsList = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasDimensionsList_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasDimensionsList_set, doc=) | |
m_DiffPairDimensionsList = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DiffPairDimensionsList_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DiffPairDimensionsList_set, doc=) | |
m_MicroViasAllowed = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasAllowed_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasAllowed_set, doc=) | |
m_BlindBuriedViaAllowed = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_BlindBuriedViaAllowed_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_BlindBuriedViaAllowed_set, doc=) | |
m_CurrentViaType = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_CurrentViaType_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_CurrentViaType_set, doc=) | |
m_UseConnectedTrackWidth = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_UseConnectedTrackWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_UseConnectedTrackWidth_set, doc=) | |
m_TempOverrideTrackWidth = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TempOverrideTrackWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TempOverrideTrackWidth_set, doc=) | |
m_MinClearance = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MinClearance_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MinClearance_set, doc=) | |
m_TrackMinWidth = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TrackMinWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TrackMinWidth_set, doc=) | |
m_ViasMinAnnularWidth = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinAnnularWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinAnnularWidth_set, doc=) | |
m_ViasMinSize = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinSize_set, doc=) | |
m_MinThroughDrill = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MinThroughDrill_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MinThroughDrill_set, doc=) | |
m_MicroViasMinSize = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinSize_set, doc=) | |
m_MicroViasMinDrill = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinDrill_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinDrill_set, doc=) | |
m_CopperEdgeClearance = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_CopperEdgeClearance_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_CopperEdgeClearance_set, doc=) | |
m_HoleClearance = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_HoleClearance_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_HoleClearance_set, doc=) | |
m_HoleToHoleMin = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_HoleToHoleMin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_HoleToHoleMin_set, doc=) | |
m_SilkClearance = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SilkClearance_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SilkClearance_set, doc=) | |
m_DRCSeverities = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DRCSeverities_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DRCSeverities_set, doc=) | |
m_DrcExclusions = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DrcExclusions_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DrcExclusions_set, doc=) | |
m_ZoneFillVersion = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ZoneFillVersion_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ZoneFillVersion_set, doc=) | |
m_ZoneKeepExternalFillets = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ZoneKeepExternalFillets_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ZoneKeepExternalFillets_set, doc=) | |
m_MaxError = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MaxError_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MaxError_set, doc=) | |
m_SolderMaskMargin = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMargin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMargin_set, doc=) | |
m_SolderMaskMinWidth = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMinWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMinWidth_set, doc=) | |
m_SolderPasteMargin = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMargin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMargin_set, doc=) | |
m_SolderPasteMarginRatio = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMarginRatio_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMarginRatio_set, doc=) | |
m_DefaultFPTextItems = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DefaultFPTextItems_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DefaultFPTextItems_set, doc=) | |
m_LineThickness = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_LineThickness_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_LineThickness_set, doc=) | |
m_TextSize = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TextSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TextSize_set, doc=) | |
m_TextThickness = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TextThickness_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TextThickness_set, doc=) | |
m_TextItalic = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TextItalic_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TextItalic_set, doc=) | |
m_TextUpright = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TextUpright_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TextUpright_set, doc=) | |
m_DimensionUnitsMode = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionUnitsMode_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionUnitsMode_set, doc=) | |
m_DimensionPrecision = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionPrecision_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionPrecision_set, doc=) | |
m_DimensionUnitsFormat = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionUnitsFormat_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionUnitsFormat_set, doc=) | |
m_DimensionSuppressZeroes = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionSuppressZeroes_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionSuppressZeroes_set, doc=) | |
m_DimensionTextPosition = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionTextPosition_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionTextPosition_set, doc=) | |
m_DimensionKeepTextAligned = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionKeepTextAligned_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionKeepTextAligned_set, doc=) | |
m_DimensionArrowLength = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionArrowLength_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionArrowLength_set, doc=) | |
m_DimensionExtensionOffset = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionExtensionOffset_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DimensionExtensionOffset_set, doc=) | |
m_HasStackup = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_HasStackup_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_HasStackup_set, doc=) | |
m_UseHeightForLengthCalcs = property(_pcbnew.BOARD_DESIGN_SETTINGS_m_UseHeightForLengthCalcs_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_UseHeightForLengthCalcs_set, doc=) | |
def pcbnew.BOARD_DESIGN_SETTINGS.__init__ | ( | self, | |
* | args | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.CloneFrom | ( | self, | |
"BOARD_DESIGN_SETTINGS" | aOther | ||
) |
"wxPoint const &" pcbnew.BOARD_DESIGN_SETTINGS.GetAuxOrigin | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetBiggestClearanceValue | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetBoardThickness | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCopperLayerCount | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentDiffPairGap | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentDiffPairViaGap | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentDiffPairWidth | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentMicroViaDrill | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentMicroViaSize | ( | self | ) |
"wxString const &" pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentNetClassName | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentTrackWidth | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentViaDrill | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentViaSize | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCustomDiffPairGap | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCustomDiffPairViaGap | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCustomDiffPairWidth | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCustomTrackWidth | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCustomViaDrill | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetCustomViaSize | ( | self | ) |
"NETCLASS *" pcbnew.BOARD_DESIGN_SETTINGS.GetDefault | ( | self | ) |
"ZONE_SETTINGS &" pcbnew.BOARD_DESIGN_SETTINGS.GetDefaultZoneSettings | ( | self | ) |
"unsigned int" pcbnew.BOARD_DESIGN_SETTINGS.GetDiffPairIndex | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetDRCEpsilon | ( | self | ) |
"LSET" pcbnew.BOARD_DESIGN_SETTINGS.GetEnabledLayers | ( | self | ) |
"wxPoint const &" pcbnew.BOARD_DESIGN_SETTINGS.GetGridOrigin | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetHolePlatingThickness | ( | self | ) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetLayerClass | ( | self, | |
"PCB_LAYER_ID" | aLayer | ||
) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetLineThickness | ( | self, | |
"PCB_LAYER_ID" | aLayer | ||
) |
"NETCLASSES &" pcbnew.BOARD_DESIGN_SETTINGS.GetNetClasses | ( | self | ) |
"SEVERITY" pcbnew.BOARD_DESIGN_SETTINGS.GetSeverity | ( | self, | |
"int" | aDRCErrorCode | ||
) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetSmallestClearanceValue | ( | self | ) |
"BOARD_STACKUP const &" pcbnew.BOARD_DESIGN_SETTINGS.GetStackupDescriptor | ( | self, | |
* | args | ||
) |
"bool" pcbnew.BOARD_DESIGN_SETTINGS.GetTextItalic | ( | self, | |
"PCB_LAYER_ID" | aLayer | ||
) |
"wxSize" pcbnew.BOARD_DESIGN_SETTINGS.GetTextSize | ( | self, | |
"PCB_LAYER_ID" | aLayer | ||
) |
"int" pcbnew.BOARD_DESIGN_SETTINGS.GetTextThickness | ( | self, | |
"PCB_LAYER_ID" | aLayer | ||
) |
"bool" pcbnew.BOARD_DESIGN_SETTINGS.GetTextUpright | ( | self, | |
"PCB_LAYER_ID" | aLayer | ||
) |
"unsigned int" pcbnew.BOARD_DESIGN_SETTINGS.GetTrackWidthIndex | ( | self | ) |
"unsigned int" pcbnew.BOARD_DESIGN_SETTINGS.GetViaSizeIndex | ( | self | ) |
"bool" pcbnew.BOARD_DESIGN_SETTINGS.Ignore | ( | self, | |
"int" | aDRCErrorCode | ||
) |
"bool" pcbnew.BOARD_DESIGN_SETTINGS.IsLayerEnabled | ( | self, | |
"PCB_LAYER_ID" | aLayerId | ||
) |
"bool" pcbnew.BOARD_DESIGN_SETTINGS.LoadFromFile | ( | self, | |
* | args | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetAuxOrigin | ( | self, | |
"wxPoint" | aOrigin | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetBoardThickness | ( | self, | |
"int" | aThickness | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetCopperEdgeClearance | ( | self, | |
"int" | aDistance | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetCopperLayerCount | ( | self, | |
"int" | aNewLayerCount | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetCustomDiffPairGap | ( | self, | |
"int" | aGap | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetCustomDiffPairViaGap | ( | self, | |
"int" | aGap | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetCustomDiffPairWidth | ( | self, | |
"int" | aWidth | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetCustomTrackWidth | ( | self, | |
"int" | aWidth | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetCustomViaDrill | ( | self, | |
"int" | aDrill | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetCustomViaSize | ( | self, | |
"int" | aSize | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetDefaultZoneSettings | ( | self, | |
"ZONE_SETTINGS" | aSettings | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetDiffPairIndex | ( | self, | |
"unsigned int" | aIndex | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetEnabledLayers | ( | self, | |
"LSET" | aMask | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetGridOrigin | ( | self, | |
"wxPoint" | aOrigin | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetMinHoleSeparation | ( | self, | |
"int" | aDistance | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetNetClasses | ( | self, | |
"NETCLASSES" | aNetClasses | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetSilkClearance | ( | self, | |
"int" | aDistance | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetTrackWidthIndex | ( | self, | |
"unsigned int" | aIndex | ||
) |
"void" pcbnew.BOARD_DESIGN_SETTINGS.SetViaSizeIndex | ( | self, | |
"unsigned int" | aIndex | ||
) |
"bool" pcbnew.BOARD_DESIGN_SETTINGS.UseCustomDiffPairDimensions | ( | self, | |
* | args | ||
) |
"bool" pcbnew.BOARD_DESIGN_SETTINGS.UseCustomTrackViaSize | ( | self, | |
* | args | ||
) |
"bool" pcbnew.BOARD_DESIGN_SETTINGS.UseNetClassDiffPair | ( | self | ) |
"bool" pcbnew.BOARD_DESIGN_SETTINGS.UseNetClassTrack | ( | self | ) |
"bool" pcbnew.BOARD_DESIGN_SETTINGS.UseNetClassVia | ( | self | ) |
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