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conn_bindings.h
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1/*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright The KiCad Developers, see AUTHORS.txt for contributors.
5 *
6 * This program is free software: you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation, either version 3 of the License, or (at your
9 * option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <https://www.gnu.org/licenses/>.
18 */
19
20#pragma once
21
22#include "conn_components.h"
24
25namespace SCH_CONNECTIVITY
26{
35{
38
41 std::vector<NAME_KEY> edges;
42
44 std::vector<NAME_KEY> parentEdges;
45 std::vector<NAME_ID> parentNetclasses;
47 bool operator==( const SLOT_INPUT& ) const = default;
48};
49
54{
61
64 std::vector<LEAF_NAME> leaves;
65
67 bool drivesRecord = false;
68};
69
74{
76 std::vector<ITEM_KEY> items;
77 std::vector<BUNDLE_CLAIM> claims;
78 std::vector<NAME_ID> netclasses;
79};
80
85{
86 std::vector<ITEM_KEY> items;
87 std::vector<NAME_ID> netclasses;
88 std::optional<CLAIM> canonical;
89 std::vector<SLOT_KEY> members;
90 std::vector<SLOT_INPUT> slots;
91};
92
101BUNDLE_INPUT PrepareBundle( const PARTITION& aPartition, const RECORD_STORE::RECORD_CACHE& aRecords,
102 SESSION_KEYS& aKeys );
103
109BUNDLE_BINDING BindBundle( const BUNDLE_INPUT& aInput, const SESSION_KEYS& aKeys );
110
117{
118public:
120
121 SLOT_STORE( CACHE_VERSIONS& aVersions, SESSION_KEYS& aKeys );
122 void Update( const COMPONENT_CACHE<BUNDLE_BINDING>& aBundles );
123 const SLOT_CACHE& Slots() const { return m_slots; }
124 void Clear();
125
126private:
128 std::map<NODE_ID, uint64_t> m_bundleInputs;
129};
130
137std::vector<NODE_INPUT> SignalNodes( const RECORD_STORE::RECORD_CACHE& aRecords, const SLOT_STORE::SLOT_CACHE& aSlots,
138 SESSION_KEYS& aKeys );
139} // namespace SCH_CONNECTIVITY
Versioned value table.
Definition conn_cache.h:61
One sequence for all cache tables for the lifetime of an engine session.
Definition conn_cache.h:37
Cache current component evaluations by exact node/version identity, within one stratum and key sessio...
CACHE_TABLE< RECORD_KEY, ISLAND_RECORD, KEY_LESS > RECORD_CACHE
Session IDs are dense handles, never a canonical ordering.
Definition conn_keys.h:146
CACHE_TABLE< SLOT_KEY, SLOT_INPUT, KEY_LESS > SLOT_CACHE
std::map< NODE_ID, uint64_t > m_bundleInputs
void Update(const COMPONENT_CACHE< BUNDLE_BINDING > &aBundles)
SLOT_STORE(CACHE_VERSIONS &aVersions, SESSION_KEYS &aKeys)
const SLOT_CACHE & Slots() const
Value keys and the key session of the schematic connectivity engine.
BUNDLE_INPUT PrepareBundle(const PARTITION &aPartition, const RECORD_STORE::RECORD_CACHE &aRecords, SESSION_KEYS &aKeys)
Collect the bus claims of a bundle partition and intern their leaf names on the main thread.
uint32_t NAME_ID
Session handle of a name, ordered by UTF-8 value through NAME_LESS.
Definition conn_keys.h:42
uint32_t NODE_ID
Session handle of a NODE_KEY graph node.
Definition conn_keys.h:43
constexpr uint32_t INVALID_ID
Marks an unset handle.
Definition conn_keys.h:47
BUNDLE_BINDING BindBundle(const BUNDLE_INPUT &aInput, const SESSION_KEYS &aKeys)
Align the prepared claims to the canonical claim and make the member slots.
std::vector< NODE_INPUT > SignalNodes(const RECORD_STORE::RECORD_CACHE &aRecords, const SLOT_STORE::SLOT_CACHE &aSlots, SESSION_KEYS &aKeys)
Main-thread interning of current signal records and slots for the signal fold.
Bound result of one bus component.
std::vector< NAME_ID > netclasses
std::vector< SLOT_KEY > members
Canonical slots in leaf order. Extra slots are not listed.
std::vector< SLOT_INPUT > slots
Canonical and extra slots, sorted by key.
std::optional< CLAIM > canonical
Strongest bus claim. It is empty for a bus without a bus claim.
std::vector< ITEM_KEY > items
NAME_ID fullName
Leaf name after the sheet path of this claim.
NAME_ID localName
Group path and leaf local name joined with dots.
NAME_ID name
Leaf name with all group prefixes.
One bus claim of a bundle partition, with its leaf names interned.
bool drivesRecord
The claim drives its own island, which lets a sheet pin name members in the parent sheet.
std::vector< LEAF_NAME > leaves
One entry for each leaf of the claim schema, in the same order.
RECORD_KEY record
Record of the island that holds the claim.
Main-thread input of BindBundle() for one bundle partition.
std::vector< NAME_ID > netclasses
NODE_ID parent
Anchor node of the partition.
std::vector< ITEM_KEY > items
std::vector< BUNDLE_CLAIM > claims
Bus claims. The canonical claim is first.
The claim of one item for the name of its island.
Definition conn_claims.h:53
Exact identity of one connected component.
One island in one sheet instance.
Definition conn_keys.h:87
One bus member as a node of the signal stratum.
std::vector< NAME_KEY > parentEdges
Parent-sheet names from a driving sheet pin, which join only names a signal record already claims.
bool operator==(const SLOT_INPUT &) const =default
SLOT_KEY key
Source item of the declaring claim and the leaf ordinal in its schema.
CLAIM claim
PRIORITY::BUS_MEMBER claim with the leaf name and the path of its owning claim.
std::vector< NAME_ID > parentNetclasses
Netclasses of the bus component.
NAME_ID localName
Group path and leaf local name joined with dots.
NODE_ID parentBundle
Anchor node of the bus component.
std::vector< NAME_KEY > edges
Sheet name keys that always join this slot.
One member position of a bus.
Definition conn_keys.h:127